Vous êtes sur la page 1sur 12

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

January 2008

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs


Features
ICC and IOZ reduced by 50% Non-inverting buffers Bidirectional data path A and B outputs source/sink 24mA ACT245 has TTL-compatible inputs

General Description
The AC/ACT245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 24mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (activeLOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Ordering Information
Order Number
74AC245SC 74AC245SJ 74AC245MTC 74AC245PC 74ACT245SC 74ACT245SJ 74ACT245MSA 74ACT245MTC 74ACT245PC

Package Number
M20B M20D MTC20 N20A M20B M20D MSA20 MTC20 N20A

Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard.

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

Connection Diagram

Logic Symbol

IEEE/IEC

Pin Description
Pin Names
OE T/R A0A7 B0B7

Description
Output Enable Input Transmit/Receive Input Side A 3-STATE Inputs or 3-STATE Outputs Side B 3-STATE Inputs or 3-STATE Outputs

Truth Table
Inputs OE
L L H

T/R
L H X

Outputs
Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 2

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

Absolute Maximum Ratings


Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 3

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

DC Electrical Characteristics for AC


TA = +25C Symbol
VIH

TA = 40C to +85C Units


V 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 75 A mA mA A A V V V

Parameter
Minimum HIGH Level Input Voltage

VCC (V)
3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5

Conditions
VOUT = 0.1V or VCC 0.1V VOUT = 0.1V or VCC 0.1V IOUT = 50A

Typ.
1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 2.1

Guaranteed Limits
3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86

VIL

Maximum LOW Level Input Voltage

VOH

Minimum HIGH Level Output Voltage

VIN = VIL or VIH, IOH = 12mA VIN = VIL or VIH, IOH = 24mA VIN = VIL or VIH, IOH = 24mA(1) 0.002 0.001 0.001 VIN = VIL or VIH, IOL = 12mA VIN = VIL or VIH, IOL = 24mA VIN = VIL or VIH, IOL = 24mA(1) VI = VCC, GND VOLD = 1.65V Max. VOHD = 3.85V Min. VIN = VCC or GND VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND IOUT = 50A

VOL

Maximum LOW Level Output Voltage

3.0 4.5 5.5 3.0 4.5 5.5

0.1 0.1 0.1 0.36 0.36 0.36 0.1

IIN(2) IOLD IOHD ICC


(2)

Maximum Input Leakage Current Minimum Dynamic Output Current(3) Maximum Quiescent Supply Current Maximum I/O Leakage Current

5.5 5.5 5.5 5.5 5.5

4.0 0.3

40.0 3.0

IOZT

Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3. Maximum test duration 2.0ms, one output loaded at a time.

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 4

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

DC Electrical Characteristics for ACT

Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time.

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 5

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

AC Electrical Characteristics for AC


TA = +25C, CL = 50pF Symbol
tPLH tPHL tPZH tPZL tPHZ tPLZ

TA = 40C to +85C, CL = 50pF Min.


1.0 1.0 1.0 1.0 2.0 1.0 2.0 1.0 1.0 1.0 1.5 1.0

Parameter
Propagation Delay, An to Bn or Bn to An Propagation Delay, An to Bn or Bn to An Output Enable Time Output Enable Time Output Disable Time Output Disable Time

VCC (V)(6)
3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0

Min.
1.5 1.5 1.5 1.5 2.5 1.5 2.5 1.5 2.0 1.5 2.0 1.5

Typ. Max.
5.0 3.5 5.0 3.5 7.0 5.0 7.5 5.5 6.5 5.5 7.0 5.5 8.5 6.5 8.5 6.0 11.5 8.5 12.0 9.0 12.0 9.0 11.5 9.0

Max.
9.0 7.0 9.0 7.0 12.5 9.0 13.5 9.5 12.5 10.0 13.0 10.0

Units
ns ns ns ns ns ns

Note: 6. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V 0.5V.

AC Electrical Characteristics for ACT


TA = +25C, CL = 50pF Symbol
tPLH tPHL tPZH tPZL tPHZ tPLZ

TA = 40C to +85C, CL = 50pF Min.


1.5 1.0 1.5 1.5 1.0 1.5

Parameter
Propagation Delay, An to Bn or Bn to An Propagation Delay, An to Bn or Bn to An Output Enable Time Output Enable Time Output Disable Time Output Disable Time

VCC (V)(7)
5.0 5.0 5.0 5.0 5.0 5.0

Min.
1.5 1.5 1.5 1.5 1.5 2.0

Typ.
4.0 4.0 5.0 5.5 5.5 5.0

Max.
7.5 8.0 10.0 10.0 10.0 10.0

Max.
8.0 9.0 11.0 12.0 11.0 11.0

Units
ns ns ns ns ns ns

Note: 7. Voltage range 5.0 is 5.0V 0.5V.

Capacitance
Symbol
CIN CI/O CPD

Parameter
Input Capacitance Input/Output Capacitance Power Dissipation Capacitance

Conditions
VCC = OPEN VCC = 5.0V VCC = 5.0V

Typ.
4.5 15.0 45.0

Units
pF pF pF

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 6

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 7

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

Physical Dimensions (Continued)

Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 8

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 9

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 10

74AC245, 74ACT245 Octal Bidirectional Transceiver with 3-STATE Inputs/Outputs

Physi4 aimensions

(Continued)

Figure 5. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 11

TRADEMARKS Th

1988 Fairchild Semiconductor Corporation 74AC245, 74ACT245 Rev. 1.5.0

www.fairchildsemi.com 12

Vous aimerez peut-être aussi