Hybrid titaniumaluminum oxide layer as alternative high-k gate dielectric for the next generation of complementary metaloxidesemiconductor devices

O. Auciello, W. Fan, B. Kabius, S. Saha, J. A. Carlisle et al. Citation: Appl. Phys. Lett. 86, 042904 (2005); doi: 10.1063/1.1856137 View online: http://dx.doi.org/10.1063/1.1856137 View Table of Contents: http://apl.aip.org/resource/1/APPLAB/v86/i4 Published by the AIP Publishing LLC.

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APPLIED PHYSICS LETTERS 86, 042904 2005

Hybrid titaniumaluminum oxide layer as alternative high-k gate dielectric for the next generation of complementary metaloxidesemiconductor devices
O. Auciello,a W. Fan, B. Kabius, S. Saha, and J. A. Carlisle
Materials Science Division, Argonne National Laboratory, Argonne, Illinois 60439

R. P. H. Chang
Department of Materials Science and Engineering, Northwestern University, Evanston, Illinois 60208

C. Lopez and E. A. Irene

Department of Chemistry, University of North Carolina, Chapel Hill, North Carolina 27599

R. A. Baragiola
Department of Materials Science, University of Virginia, Charlottesville, Virginia 22904

Received 2 September 2004; accepted 30 November 2004; published online 20 January 2005 Research is focused on nding reliable high-dielectric constant k oxides with high capacitance and all critical properties required for the next generation of complementary metaloxide semiconductor CMOS gates. A trade-off between dielectric constant and band-offset height is generally observed on gate oxides. Combining TiO2 and Al2O3, with the two extremes of high permittivity k and high band offset, we produced a TixAl1xOy TAO oxide layer with k = 30 and low dielectric leakage for a next generation of high-k dielectric gates. We developed a low temperature oxidation process, following room temperature sputter-deposition of TiAl layers, to produce ultrathin TAO layers on Si with subatomic or no SiO2 or silicide interface formation. We demonstrated TAO layers with 0.5 nm equivalent oxide thickness on Si and thermal stability under rapid thermal annealing up to about 950 C. The data presented here provide insights into fundamental physics and materials science of the TAO layer and its potential application as gate dielectric for the next generation of CMOS devices. 2005 American Institute of Physics. DOI: 10.1063/1.1856137 The technology roadmap1 for the next generation of complementary metaloxidesemiconductor CMOS devices requires an equivalent oxide thickness EOT of SiO2 of less than 1.5 nm to maintain a suitable capacitance for sub-100 nm gate. Materials with intermediate dielectric constants 12 k 201,2 trading-off between high k and offset barrier height are investigated as gate layers. Thin layers of HfO2 and ZrO2 with EOT less than 1.5 nm and low leakage have been reported.1,2 However, higher dielectric constant might be desirable for future CMOS requirements TiO2 attracted attention because of its high k 50, arising from soft phonons involving Ti ions. However, TiO2 exhibit high leakage current, due to a near zero offset barrier to Si,3 and undesirable crystallization at low temperature 400 C. Alternatively, Al2O3 exhibits the largest band gap Eg = 8.8 eV next to SiO2 with a conduction band offset of 2.8 eV with respect to Si, 4.9 eV valence band offset, and thermodynamic stability against Si, but has relatively low k = 8 10. The idea of the TixAl1xOy TAO high-k layer presented in this letter evolved from our prior work developing a Ti0.5Al0.5 alloy layer as oxygen diffusion barrier for integration of complex oxide layers with Cu-based electrodes.4 Our studies showed that the TiAl oxygen barrier resulted from formation of an amorphous TAO thin 4 6 nm thick surface layer, including TiO2 and Al2O3 the two extremes of high permittivity and high band gap, respectively. Thus, TAO with Ti: Al= 75: 25at. % could be a dielectric material
a

Electronic mail: auciello@anl.gov

with combined high permittivity, low leakage current, and high thermal stability. A limitation to achieve a sub-1 nm EOT dielectric layer is the formation of an interfacial low-k SiO2 layer, formed during high temperature growth of the high-k lm, which lowers the MOS capacitance when in series with a high-k layer. Therefore, a low partial pressure of oxygen/growth temperature processes is desirable to inhibit or minimize Si oxidation. The initial studies of the TAO layer discussed here were performed using a sputter-deposition system integrated with time-of-ight mass spectroscopy of recoil ions TOF-MSRI and x-ray photoelectron spectroscopy XPS5 that provides controlled oxide growth and enables in situ analysis of the layers without exposure to air. We are also investigating molecular beam epitaxial and atomic layer deposition methods. TAO layers were produced via room temperature RT sputter-deposition of thin TiAl alloy lms in the ultrahigh vacuum system 109 Torr base pressure described earlier, followed by in situ oxidation. Amorphous TiAl 75/ 25 at. % layers were deposited on hydrouoric acid nished n Si 100 = 4 6 cm and p Si 100 = 12 16 cm substrates using a broad beam of 500 eV Xe ions. TOF-MSRI, used to monitor the TiAl growth on Si, indicated that a pinhole free 0.9 nm TiAl layer covers the Si substrate. Atomic oxygen delivered by an Oxford source at 104 Torr was used to convert the TiAl metallic into fully oxidized TAO via postdeposition oxidation at 25 700 C. In situ XPS analysis of the TiAl layers after oxidation
2005 American Institute of Physics

0003-6951/2005/864/042904/3/$22.50

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FIG. 1. In situ XPS analysis of TiAl thin layer on Si before and after oxidation with atomic oxygen. The Al 2 p a and Ti 2 p b spectra show complete transitions to Al3+ and Ti4+ for both oxidation processes. The Si 2 p spectra c and the Sin+ / Si0 intensity ratio vs oxidation temperature d reveal inhibition of SiO2 interfacial layer formation.

revealed complete transitions of Ti0 to Ti4+ and Al0 to Al3+ within the 25 700 C range Figs. 1a and 1b, indicating that stoichiometric alloy oxides with identical chemical bonding are produced by oxidation with atomic oxygen at all temperatures, unlike molecular oxygen O2. The XPS results were conrmed by near-edge x-ray absorption ne structures NEXAFS studies of the O K-edge and Ti L-edge of TAO thin layers on Si. NEXAFS is sensitive to the local bonding environment, providing information on crystal structures and forms of titanium oxides. In Fig. 2a, the doublet shown at the O K-edge, corresponding to an electron transfer from the O 1s orbit to a covalently mixed state from the O 2 p and Ti 3d states, agrees with published NEXAFS spectra for TiO2.6 The broad peak at 550 eV corresponds to the superposition of O p states hybridized with Al 3sp and Ti 2t2g and 3eg, and its shape is similar to the O K-edge from a 34-ML-thick TiO2 lm grown on Al2O3.7 The two Ti L-edge-peaks in Fig. 2b arise from the spinorbit interaction of the Ti 2 p core level, and could not be confused

FIG. 3. Color HRTEM and EELS analyses of room-temperature oxidized TAO layer grown on Si100. a HRTEM image, b elemental maps, and c integrated line scans for Al, Si, O and Ti, respectively.

FIG. 2. NEXAFS analysis of TAO thin layers produced with atomic oxygen oxidation at RT and at 500 C for 30 min. The O K-edge a and Ti L-edge b spectra show identical O and Ti local binding environments for both oxidation conditions, consistent with XPS analysis.

with Ti3+ and Ti2+ oxidation states from analysis of Ti2O3 and TiO.8 The similarity of the O K- and Ti L-edge spectra from TAO layers grown at 500 C and RT indicates that low temperature oxidation produces stoichiometric TAO. Thermodynamically, Ti and Al oxidize favorably over Si, However, SiO2 formation is determined by kinetics when nonequilibrium or excess amount of oxygen is present. In situ XPS studies of the TAO/Si interface were performed on 3-nm-thick TiAl layers deposited on Si Fig. 1c to allow detection of photoelectrons from the interface escaping through the TAO layer. The formation of a SiO2 interface layer is revealed by the Si3+ peak at 102.5 eV, but the low intensity relative to the Si0 Fig. 1d is indicative of a large suppression of SiO2 formation at low oxidation temperature, due to the excellent barrier property of the amorphous TAO surface layer.4 The low-temperature 50 C oxidation used in this study practically eliminates the possibility of undesirable silicide formation. Cross-sectional transmission electron microscopy TEM studies of the RT oxidized TAO thin layer were performed with a microscope equipped with Cs corrector for the objective lens, to avoid contrast delocalization.9 Two amorphous layers can be distinguished in Fig. 3a, i.e., a darker top layer L2 3 4 nm thick and a brighter intermediate layer L1 2 nm thick. The line scan across the image with a linewidth of 3 nm shows a sharp boundary between the crystalline Si substrate and the amorphous TAO layer. A Fourier transformation of the line scan at the L1 and L2 layers location did not reveal any periodicities. We used energy ltering TEM to obtain a qualitative mapping of the elements Si, O, Ti, and Al in a 200 kV TEM TECNAI F20ST. For energy width of 10 eV, a resolution of better than 0.6 nm can be expected from the dampling envelopes of spatial and temporal coherence.10 Elemental maps using the Al L-, Si L-, Ti L-, and O K-edges were obtained using the three-window method11 Fig. 3b. The TAO layer L2 and a layer containing mostly Al and oxygen L1, which provides a much more stable interface than having direct contact between Ti and Si, are recognizable in the high-resolution

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FIG. 4. C V characteristics of the TAO-based MOS capacitors on n and n+ Si with Pt top electrodes, measured at different frequencies.

TEM image. An intermediate layer I consisting mostly of Si and O is evident between the substrate and L1, in agreement with the XPS analysis showing a minimal Si3+ intensity on the TAO layer oxidized at low temperature Fig. 3. The C V analysis of capacitors dened with 100to 500-m-diam top Pt electrodes, with various TAO physical thicknesses, demonstrated a permittivity of 30 for the dielectric layer. A signicant increase for the accumulation capacitance density was observed for the TAO dielectric layer produced at temperatures 200 C with atomic oxygen, due to a large suppression of the interfacial SiO2 formation. Figure 4 shows the C V characteristics for 4-nm-thick TAO layers produced on n Si and n+ Si by RT oxidation. The dual frequency technique12 was used to extract the C V behavior of TAO layers grown on n Si, to eliminate the parasitic resistance inuence from the substrate. High capacitance densities of 7.7 8.3 F / cm2 EOT= 0.42 0.48 nm were obtained on all n and p Si substrates, consistent with those measured from the same TAO layers grown on heavily doped Si = 0.004 cm. The leakage current across the TAO layers, at 1 V, was about 5 A / cm2 on n and p substrates i.e., 4 5 decades lower than that for SiO2 with a similar EOT. Preliminary band gap measurements via spectroscopic ellipsometry and EEELS revealed a band gap of 4 eV for the TAO composition reported here. Initial measurements of the trapping density of states revealed values of 8 1011 to 1012. It is encouraging that by adding a very

small amount of Al2O3 into a TiO2 matrix, the band gap of the latter is increased by 1 eV, and the density of trapping states is within the same order of magnitude as for frontrunners amorphous oxide candidate materials. Atomic force microscopy analysis demonstrated that the surface morphology of the thin TAO layer remained practically the same as that of the original atomically smooth Si surface after 30 s rapid thermal annealing up to 950 C, indicating that no crystallization or interfacial reaction has taken place. There is substantial room for compositional improvement in the TAO layer to optimize its performance as a high-k dielectric. In summary, a room temperature oxidation process via atomic oxygen exposure of room temperature sputterdeposited metallic alloy lms was developed to produce TAO high-k thin layer with highly suppressed or no SiO2 interface and free of silicide. The resulting amorphous TAO layer on Si exhibits high capacitance density with exceptionally low leakage. A TAO layer with EOT 0.5 nm was produced on Si, satisfying capacitance density and leakage requirement of next generation CMOSs.1 The authors acknowledge support from the Department of Energy-Ofce of Science-Basic Energy Science under Contract No. W-31-109-ENG-38. The authors thank S. Lentzen and K. Urban from the Research Center in Jlich, Germany, for experimental time on the Cs corrected TEM.
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