CSSE3010 Embedded Systems Design & Interfacing

Practical 4 SPI / Radio control

Objectives
To learn the fundamentals of the SPI bus, including data transmission and the conceptual understanding of a multiple slave configuration. Become familiar with the basic operation of the nRF24l01+ radio package including configuring the radios registers for TX/RX transmission. To understand the complications that may arise when setting up and communicating on an RF network.

The main objective of this practical is to introduce or strengthen your knowledge in one of the most widely used communication protocols; the SPI bus. Although a summary of the bus is presented here, it is recommended that before starting on this practical that you do some extra background reading on the topics covered here (see references for some good resources). Throughout this practical you will setup SPI communication with the radio and configure the radio, creating a RF communication link between multiple microcontrollers.

Introduction
The Serial Peripheral Interface (SPI) [1] is a high speed bus that connects a master to one or more slave devices such as the nRF24l01+ [2]. The bus operates using a 4 wire interface which includes: SPI Clock (SCLK, SCK, CLK) this line is used for the clock signal sent by the master to synchronise the data sent between the master and the slave. The speed of data transactions depend on the speed of the clock signal. Master Out Slave In (MOSI, SIMO) - this carries data from the master to the slave. Master In Slave Out (MISO, SOMI) this carries data from the slave to the master. Slave Select (SS, CSN) As previously mentioned, the bus can support multiple slave devices, each sharing the above three connections. Furthermore, each slave can be selected by holding the SS at active low. Only one slave can be selected at a time.

Notice that the bus is bidirectional such that the master can send data whilst the slave can simultaneously send data back to the master, perhaps sending data from a previous request or simply status information. The master controls the communication, such that the slave cannot initiate data communication, and for this reason some devices make use of an external interrupt

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mechanism. Transmissions often occur in 8-bit words, however, it should be noted many other word sizes are common. The SPI bus is similar to a circular ring shift register as depicted below, with the slave and master holding a single word. The words are shifted out via the MOSI/MISO lines ticking the clock 8 times to complete a data transfer.

The phase and polarity of data signals must be configured to match the slave device. This is configured using two options CPOL (clock polarity) and CPHA (clock phase), resulting in the below 4 configurations: CPOL=0, CPHA=0: Data is captured on the clocks rising edge and propagated on a falling edge. CPOL=0, CPHA=1: Data is captured on the clocks falling edge and propagated on a rising edge. CPOL=1, CPHA=0: Data is captured on the clocks falling edge and propagated on a rising edge CPOL=1, CPHA=1: Data is captured on the clocks rising edge and propagated on a falling edge.

The nRF24l01+ uses mode 0 (CPOL=0, CPHA=0) and supports up to 8Mbps transfer rate (note this is the transfer rate on the SPI bus, the radio transmission itself is limited to 2Mbps). The code provided in rf.c shows how the SPI is configured for the nrf24l01+. The AT91SAM7 has an SPI controller handled by the Peripheral DMA Controller (PDC). This handles SPI transactions using operations not under the control of the central processor; resulting in quicker transfers and more CPU time for other tasks (this will become more important when using an operating system, such as FreeRTOS). The nRF24l01+ has a set of registers defining the firmware interface. This register map can be found in section 9.1 of the datasheet [3]. It is recommended you familiarise yourself with these few registers, especially CONFIG, RF_CH, STATUS, RF_SETUP, EN_RXADDR. In order to send / receive data or issue commands to the device from the SPI port we first ensure the CSN pin is high. We then bring the CSN pin low to alert the nRF24l01+ that an SPI transaction is going

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to take place. When writing to the device, firstly the command byte is sent followed by the data. When reading, we must send the register we would like to read, and then in order for the device to send its response we must send another (arbitrary) byte to receive the response. The STATUS register can be read to check whether something important has happened, such as a packet being received. When a packet is successfully received (with CE held high), the CE pin must be brought low and the R_RX_PAYLOAD operation can be executed, followed by dummy bytes (corresponding to the payload width configured). After successfully receiving the data, hold the CE pin high again to continue listening. Similarly for transmission, the CE pin is brought low, executing the W_TX_PAYLOAD command followed by the data you wish to send, followed by bringing the CE pin high again. There are three interrupts that can be generated by the nRF24l01+; RX_DR, TX_DS and MAX_RT. These can be detected on the devices IRQ pin, or by reading the STATUS register. RX_DR is triggered when the radio has received a packet. TX_DS is triggered when a packet has been successfully transmitted. The MAX_RT is set when the maximum number of retries for sending a packet has exceeded the preconfigured amount. Note that the TX FIFO must be cleared in this case in order to continue receiving packets. Refer to page 20 of the datasheet to see a state diagram of radio modes and recommended operating mode paths. The nRF24l01+ has 6 pipes which can be configured to receive data. Each of these pipes can have their own address as defined by RX_ADDR_PX registers, on which the radio can receive data. As well as this the device has two packet queues for RX and TX. Each queue can hold up to three packets and are read on a First in First Out (FIFO) basis. There are many inherit issues of having a class full of nRF24l01+s. There are only a limited number of channels available to use and therefore many radios may be on the same channel. So there must be a way to differentiate between packets that you and others send as well as handling packet collisions and noise. On a radio level this is done via the RX_ADDR / TX_ADDR and a packet checksum. In this prac we will define source and destination address in our protocol. We will also make use of a 16 bit checksum on each transmitted packet. Although the radio already performs its own checksum, for the purposes of this prac we will re-implement it for completeness. When selecting a channel please limit yourself to the lower 50 channels to be compliant with the Australian radio frequency regulations [4]. Do note that if you decide to configure the nRF24l01+ at 2Mbps, the channel spacing is 2MHz, rather than 1MHz, limiting the possible channels further. The SPI bus and nRF24l01+ are covered broadly here. It is highly recommended to read more information from sources found at the end of the document [5].

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We will connect the radio to the AT91s SPI channel 0. The pin layout we will be using is shown in the figure below.

Make sure you have checked out the source files accompanying this practical. Note that additional files have been included which contain methods for some of the low level radio calls you will be using. FIRST: update your source files using subversion: 1. 2. 3. 4. Open a terminal window and navigate to /home/user/svn Type svn update If prompted for a password: csse3010 DO NOT store the password in the gnome keyring, if prompted.

The Design Task

For this prac we will configure the radios to channel 40. Before we begin sending packets we first define our communications protocol. Packet Type 1 Byte Destination Address 4 Bytes Source Address 4 Bytes Payload 21 Bytes Checksum byte 2 Byte

The destination and source addresses with a width of 4 will define to whom you are sending your packet to. For the purpose of this practical, it will consist of your student number formatted in hex. (i.e. s41234123 will have address 0x41234123). One of the tutors will be running a base station to which you will be communicating with. This base station has address 0x12345678. The packet type field for this practical is 0x20. Be sure to set this field as well as the destination field correctly, otherwise the base station will not respond to your request. You are required to send a packet of the format above to the base station. The payload must be filled via Putty by typing characters and submitting the packet by pressing the return key (or exceeding the maximum payload length). The base station will receive your request and send back a packet. This packet will contain a capitalised form of your initial payload which you must print back to the terminal over the USB interface. Be sure to filter any incoming packets for your student ID address, otherwise you will display other peoples packets.

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Response from Base Station In main.c a data structure has been included to help you structure your packets according to the protocol defined above. User input
typedefstruct { char type; chardest[4]; charsrc[4]; char payload[PAYLOAD_WIDTH]; shortcrc; }__attribute__((packed)) Packet; // 32 bytes long. Data structure for packets.

The packed attribute is a hint to the compiler that we do not want padding within the data structure, meaning we can operate on the data pointed to by the Packet structure as if it is 32 consecutive bytes. A checksum can be performed on the packet before it is sent by using the following function;
crc16(0, tx_buf, 30);

Some helpful comments in the main function should help you to get started. Make sure you examine the radio functions defined in nrf24l01plus.c. The radio driver will send and receive packets through tx_buf and rf_buf. The base station will send a request back fairly quickly, therefore make sure you switch your radio back to receive mode straight after transmission. Remember, you can use the USB interface as a feedback mechanism for debugging. When finished, you should be able to explain your code to the tutor. And demonstrate a functioning program to receive marks for this practical. Leave the checksum till last. The base station will still send a (different) packet if you cant get the checksum working. Challenge: Your packet may not get through the first time if the base station is processing another request. Write your code such that if a response is not received within 500milliseconds to resend the request. Make sure to keep any new input from the terminal in the buffer for the next request.

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Marking criteria
The practicals in this course are marked on a pass / fail basis. This means you must demonstrate to your tutor sufficient understanding and functionality before progressing. If you fail to demonstrate sufficient understanding through completing the design task you will be required to show a tutor you are competent at another time to pass this practical. Do note that if you did not pass the requirements the first time, tutors will be more thorough in checking your understanding. Each practical has a set of specific questions you need to be able to answer to pass. The questions can vary from very detailed to more theoretical. You will be asked just one question (or two at most) and if your answer is not satisfactory you fail. BE PREPARED.

Sample questions for this practical (Hint - Read the NRF24l01+ datasheet and the nrf24l01plus.c
file):

0. 1. 2. 3. 4. 5.

WORKBOOK
What SPI mode (master or slave) must the ARM processor be in? What does the CSN pin do? What radio frequency does the NRF24l01+ transmit/receive on? How do you change the radio channel that he NRF24l01+ uses? What does the CE pin do?

References / Further Readings

1. 2. 3. 4. 5. http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus http://www.sparkfun.com/products/691 http://www.nordicsemi.com/eng/nordic/download_resource/8041/1/77976879 http://www.acma.gov.au http://www.diyembedded.com/tutorials/nrf24l01_0/nrf24l01_tutorial_0.pdf

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