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MC74HC14A Hex Schmitt-Trigger Inverter

HighPerformance SiliconGate CMOS


The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14A is useful to square up slow input rise and fall times. Due to hysteresis voltage of the Schmitt trigger, the HC14A finds applications in noisy environments.
Features
14 1

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14 PDIP14 N SUFFIX CASE 646 1 14 14 1 SOIC14 D SUFFIX CASE 751A 1 14 14 1 TSSOP14 DT SUFFIX CASE 948G 1 HC 14A ALYWG G HC14AG AWLYWW MC74HC14AN AWLYYWWG

Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7.0 A Requirements Chip Complexity: 60 FETs or 15 Equivalent Gates NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP Capable These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant

A L, WL Y, YY W, WW G or G

= Assembly Location = Wafer Lot = Year = Work Week = PbFree Package

(Note: Microdot may be in either location)

ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.

Semiconductor Components Industries, LLC, 2012

July, 2012 Rev. 13

Publication Order Number: MC74HC14A/D

MC74HC14A
Pinout: 14Lead Packages (Top View)
VCC 14 A6 13 Y6 12 A5 11 Y5 10 A4 9 Y4 8 A1

LOGIC DIAGRAM
1 2 Y1

A2

Y2

A3 1 A1 2 Y1 3 A2 4 Y2 5 A3 6 Y3 7 GND A4

Y3 Y=A

Y4

Pin 14 = VCC Pin 7 = GND

A5

11

10

Y5

FUNCTION TABLE
Inputs A L H Outputs Y H L

A6

13

12

Y6

ORDERING INFORMATION
Device MC74HC14ANG MC74HC14ADG MC74HC14ADR2G MC74HC14ADTG MC74HC14ADTR2G NLV74HC14ADG* NLV74HC14ADR2G* NLV74HC14ADTG* NLV74HC14ADTR2G* NLV74HC14ANG* Package PDIP14 (PbFree) SOIC14 (PbFree) SOIC14 (PbFree) TSSOP14 (PbFree) TSSOP14 (PbFree) SOIC14 (PbFree) SOIC14 (PbFree) TSSOP14 (PbFree) TSSOP14 (PbFree) PDIP14 (PbFree) Shipping 25 Units / Rail 55 Units / Rail 2500 / Tape & Reel 96 Units / Rail 2500 / Tape & Reel 55 Units / Rail 2500 / Tape & Reel 96 Units / Rail 2500 / Tape & Reel 25 Units / Rail

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP Capable

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MAXIMUM RATINGS
Symbol VCC Vin Iin Vout Iout PD Parameter Value Unit V V V DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) 0.5 to + 7.0 0.5 to VCC + 0.5 0.5 to VCC + 0.5 20 25 50 750 500 450 DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA mA mA DC Output Current, per Pin ICC DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP SOIC Package TSSOP Package mW Tstg TL Storage Temperature Range 65 to + 150 260 _C _C Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP, SOIC or TSSOP Package Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Derating Plastic DIP: 10 mW/_C from 65_ to 125_C SOIC Package: 7 mW/_C from 65_ to 125_C TSSOP Package: 6.1 mW/_C from 65_ to 125_C

MC74HC14A

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.


RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter Min 2.0 0 Max 6.0 Unit V V DC Supply Voltage (Referenced to GND) Vin, Vout TA DC Input Voltage, Output Voltage (Referenced to GND) VCC Operating Temperature Range, All Package Types Input Rise/Fall Time (Figure 1) 55 0 0 0 + 125 _C ns tr, tf VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V No Limit* No Limit* No Limit* *When Vin = 50% VCC, ICC > 1mA

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MC74HC14A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol VT+ max Parameter Maximum PositiveGoing Input Threshold Voltage (Figure 3) Minimum PositiveGoing Input Threshold Voltage (Figure 3) Maximum NegativeGoing Input Threshold Voltage (Figure 3) Minimum NegativeGoing Input Threshold Voltage (Figure 3) Maximum Hysteresis Voltage (Figure 3) Condition Vout = 0.1V |Iout| 20mA VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 4.5 6.0 |Iout| 2.4mA |Iout| 4.0mA |Iout| 5.2mA 3.0 4.5 6.0 2.0 4.5 6.0 |Iout| 2.4mA |Iout| 4.0mA |Iout| 5.2mA 3.0 4.5 6.0 6.0 6.0 Guaranteed Limit 55 to 25C 1.50 2.15 3.15 4.20 1.0 1.5 2.3 3.0 0.9 1.4 2.0 2.6 0.3 0.5 0.9 1.2 1.20 1.65 2.25 3.00 0.20 0.25 0.40 0.50 1.9 4.4 5.9 2.48 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.26 0.1 1.0 85C 1.50 2.15 3.15 4.20 0.95 1.45 2.25 2.95 0.95 1.45 2.05 2.65 0.3 0.5 0.9 1.2 1.20 1.65 2.25 3.00 0.20 0.25 0.40 0.50 1.9 4.4 5.9 2.34 3.84 5.34 0.1 0.1 0.1 0.33 0.33 0.33 1.0 10 125C 1.50 2.15 3.15 4.20 0.95 1.45 2.25 2.95 0.95 1.45 2.05 2.65 0.3 0.5 0.9 1.2 1.20 1.65 2.25 3.00 0.20 0.25 0.40 0.50 1.9 4.4 5.9 2.20 3.70 5.20 0.1 0.1 0.1 0.40 0.40 0.40 1.0 40 mA mA V Unit V

VT+ min

Vout = 0.1V |Iout| 20mA

VT max

Vout = VCC 0.1V |Iout| 20mA

VT min

Vout = VCC 0.1V |Iout| 20mA

VHmax Note 1

Vout = 0.1V or VCC 0.1V |Iout| 20mA

VHmin Note 1

Minimum Hysteresis Voltage (Figure 3)

Vout = 0.1V or VCC 0.1V |Iout| 20mA

VOH

Minimum HighLevel Output Voltage

Vin VT min |Iout| 20mA Vin VT min

VOL

Maximum LowLevel Output Voltage

Vin VT+ max |Iout| 20mA Vin VT+ max

Iin ICC

Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package)

Vin = VCC or GND Vin = VCC or GND Iout = 0mA

1. VHmin > (VT+ min) (VT max); VHmax = (VT+ max) (VT min).

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MC74HC14A
AC CHARACTERISTICS (CL = 50pF, Input tr = tf = 6ns)
Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Input A or B to Output Y (Figures 1 and 2) VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 Guaranteed Limit 55 to 25C 75 30 15 13 75 27 15 13 10 85C 95 40 19 16 95 32 19 16 10 125C 110 55 22 19 110 36 22 19 10 Unit ns

tTLH, tTHL

Maximum Output Transition Time, Any Output (Figures 1 and 2)

ns

Cin

Maximum Input Capacitance

pF

Typical @ 25C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Inverter)*
2f

22 + ICC VCC .

pF

* Used to determine the noload dynamic power consumption: P D = CPD VCC

tf 90% 50% 10% tPLH 90% OUTPUT Y 50% 10% tTLH

tr VCC

INPUT A

GND tPHL

tTHL

Figure 1. Switching Waveforms

TEST POINT OUTPUT DEVICE UNDER TEST CL*

*Includes all probe and jig capacitance

Figure 2. Test Circuit

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MC74HC14A
VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS 4

3 (VT+) VHtyp

2 (VT-)

3 4 5 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT+ typ) - (VT- typ)

Figure 3. Typical Input Threshold, VT+, VT versus Power Supply Voltage

(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times VH Vin VCC VT+ VTGND VOH Vout VOL Vout Vin VH

(b) A Schmitt-Trigger Offers Maximum Noise Immunity VCC VT+ VTGND VOH

VOL

Figure 4. Typical SchmittTrigger Applications

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MC74HC14A
PACKAGE DIMENSIONS
PDIP14 N SUFFIX CASE 64606 ISSUE P

14

B
1 7

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 10 _ 0.38 1.01

A F N T
SEATING PLANE

L C

D 14 PL

K
M

J M

DIM A B C D F G H J K L M N

0.13 (0.005)

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MC74HC14A
PACKAGE DIMENSIONS
SOIC14 NB CASE 751A03 ISSUE K
D
14 8

A B A3 E L

H
1 7

DETAIL A

NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. DIM A A1 A3 b D E e H h L M MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.19 0.25 0.35 0.49 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ INCHES MIN MAX 0.054 0.068 0.004 0.010 0.008 0.010 0.014 0.019 0.337 0.344 0.150 0.157 0.050 BSC 0.228 0.244 0.010 0.019 0.016 0.049 0_ 7_

0.25

13X

b 0.25

C A A

X 45 _

DETAIL A

A1 C

M
SEATING PLANE

SOLDERING FOOTPRINT*
6.50 1
14X

1.18

1.27 PITCH

0.58

14X

DIMENSIONS: MILLIMETERS

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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MC74HC14A
PACKAGE DIMENSIONS
TSSOP14 DT SUFFIX CASE 948G01 ISSUE B
14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_

0.10 (0.004) 0.15 (0.006) T U


S

T U

N
2X

L/2

14

0.25 (0.010) M

L
PIN 1 IDENT. 1 7

B U

N F DETAIL E K

0.15 (0.006) T U

A V J J1

SECTION NN W


K1

C 0.10 (0.004) T SEATING


PLANE

DETAIL E

SOLDERING FOOTPRINT*
7.06 1

0.65 PITCH

0.36

14X

14X

1.26

DIMENSIONS: MILLIMETERS

*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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MC74HC14A

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PUBLICATION ORDERING INFORMATION


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MC74HC14A/D