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Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 1
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 2
Analog quantities have continuous values Digital quantities have discrete sets of values
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 3
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 4
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 5
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 6
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 7
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 8
The conventional numbering system uses ten digits: 0,1,2,3,4,5,6,7,8, and 9. The binary numbering system uses just two digits: 0 and 1.
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Slide 9
The two binary digits are designated 0 and 1 They can also be called LOW and HIGH, where LOW = 0 and HIGH = 1
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Slide 10
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 11
Major parts of a digital pulse Base line Amplitude Rise time (tr) Pulse width (tw) Fall time (tf)
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Slide 12
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Slide 13
Slide 14
clock
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Slide 15
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Slide 16
Data Transfer
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Slide 17
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Slide 18
Basic Logic Operations There are only three basic logic operations:
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 19
When the input is LOW, the output is HIGH When the input is HIGH, the output is LOW
The output logic level is always opposite the input logic level.
Floyd Digital Fundamentals, 9/e Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 20
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 21
The OR operation
When any input is HIGH, the output is HIGH When both inputs are LOW, the output is LOW
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 22
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 23
Floyd Digital Fundamentals, 9/e
Comparison function Arithmetic functions Code conversion function Encoding function Decoding function Data selection function Data storage function Counting function
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Slide 24
Comparison function
Compares two binary values and determines whether or not they are equal
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Slide 25
Arithmetic functions Perform the basic arithmetic operations on two binary values:
Addition Subtraction of two values Multiplication Division
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Slide 26
Code conversion function Converts, or translates, information from one code format to another
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Slide 27
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Slide 28
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Slide 29
Decoder
y0 = abc y1 = abc y2 = abc y3 = abc y4 = abc y5 = abc y6 = abc y7 = abc
a 0 0 0 0 1 1 1 1 b 0 0 1 1 0 0 1 1 c 0 1 0 1 0 1 0 1 y0 1 0 0 0 0 0 0 0 y1 0 1 0 0 0 0 0 0 y2 0 0 1 0 0 0 0 0 y3 0 0 0 1 0 0 0 0 y4 0 0 0 0 1 0 0 0 y5 0 0 0 0 0 1 0 0 y6 0 0 0 0 0 0 1 0 y7 0 0 0 0 0 0 0 1
a b c
a b c d e f g
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Slide 30
Demultiplexer (demux)
switches digital data from a single input to any number of output lines
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Slide 31
Multiplexer
I0 I1 I2 I3 A
A 0 0 1 1
+
4-to-1 MUX
A B I0 A B I1 A B I2 A B I3
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B
B 0 1 0 1 Z I0 I1 I2 I3
Slide 32
Multiplexer
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Slide 33
Slide 34
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Slide 35
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Slide 36
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Slide 37
Storage Function
Flip-flops
S-R Type D Type
Q Clock Q D
Floyd Digital Fundamentals, 9/e Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 38
Slide 39
Example
N0 Need
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Slide 40
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Slide 41
IC package styles Dual in-line package (DIP) Small-outline IC (SOIC) Flat pack (FP) Plastic-leaded chip carrier (PLCC) Leadless-ceramic chip carrier (LCCC)
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Slide 42
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Slide 43
Small-outline IC (SOIC)
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Slide 44
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Slide 45
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 46
Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 47
Two as a team, one alone is allowed. Draw a conceptual block diagram by means of basic gates and logic function units introduced (please refer to the example of Slide 40) No correct answer at all. Please develop your design with full freedom
Floyd Digital Fundamentals, 9/e Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 48
Introduction to Programmable Logic (Skip: This class will skip all the contents related to programmable logic)
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Slide 49
SPLDSimple programmable logic devices CPLDComplex programmable logic devices FPGAField-programmable gate arrays
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Slide 50
SPLD
PAL (programmable array logic) GAL (generic array logic) PLA (programmable logic array) PROM (programmable read-only memory)
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Slide 51
CPLD
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Slide 52
FPGA
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Slide 53
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Slide 54
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Slide 55
Analog Oscilloscope Digital Oscilloscope Logic Analyzer Logic Probe, Pulser, and Current Probe DC Power Supply Function Generator Digital Multimeter
Floyd Digital Fundamentals, 9/e Copyright 2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
Slide 56