COMPANY PROFILE

Centre For Development of Advanced Computing (CDAC Mohali)

C-DAC (Erstwhile CEDTI) Mohali, established in 1989 in the ELTOP(Electronics Town of Punjab) Complex, caters to the training, consultancy, design and product development needs of electronics and information technology industry and allied sectors. It also promotes potential Entrepreneurs through various services, academic and training progarms. The institute has its own aesthetically designed building with covered area of 4300 sq mts. The building has an attached students hostel, which provides for residential facility to the outstation students. Another modern hostel and housing complex has been developed in sector-70, Mohali that is a kilometer away from the institute. C-DAC (Erstwhile CEDTI) Mohali, an institute under the Government of India, is the first society of Ministry of Communications and Information Technology to have an ISO 9001 : 2000 certification, which reflects the quality in conceptualization, design, implementation and monitoring of the training programs. The certification is a testimony by international quality in system that governs its well structured and regularity updated training with global acceptance.

CHAPTER 1 8051 Microcontrollers

1.1 Microcontroller Vs Microprocessor

Table 1.1

MICROPROCESSOR 1. CPU is a stand alone. RAM, ROM, I/O, timers are separate. 2. Designer can decide the amount of ROM, Ram and I/O ports. 3. Expensive 4. Versality 5. General Purpose

MICROCONTROLLER 1. CPU, RAM, ROM, I/O and timer are all on a single chip. 2. Fix amount of on chip ROM, RAM and I/O ports. 3. Less expensive 4. Non-versatile 5. Single purpose.

1.2 8051 Architecture

1.2.1

Block Diagram of 8051

Figure 1.1 Block diagram of 8051

1.2.2 RAM memory space allocation in the 8051 There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside the 8051 are assigned addresses 00 to 7FH.The 128 bytes are divided into three different groups as follows.
3

1. A total of 32 bytes from location 00 to 1F hex are set aside for registers bank and the stacks. 2. A total of 16 bytes from location 20H to 2FH are set aside for bit-addressable memory and instructions 3. A total of 80 bytes from locations 30H to 7FH are used for read and write storage, or what is normally called scratch pad. 1.2.3 STACK IN 8051 The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up the SP register contains value 07.

7FH Scratch pad RAM 30H 2FH Bit-Addressable RAM 20H 1FH 18H 17H 10H 0FH 08H 07H 00H 4 Register Bank 3 Register Bank 2 Stack) Register( Bank 1 Register Bank 0

Figure 1.2 Stack in 8051

1.3 Pin Description of 8051

Although 8051 family members (e.g.; 8751, 89C51, 89C52, DS89C4x0) come in different packages, such as DIP (dual in line package), QFP (quad flat package), and LLC (leadless chip carrier), they all have 40 pins are dedicated to various functions such as I/O, RD/WR, address, data and interrupts. It must be noted that some companies provide a 20-pin version of 8051 with a reduced numbers of I/O ports for less demanding applications.

Figure 1.3 PIN Description of 8051

5

Note that of the 40 pins, a total of 32 pins are set aside for the four ports P0, P1, P2, P3, where each ports takes 8 pins. The rest of the pins are designated as Vcc, GND, XTAL1, XTAL2, RST, EA bar, PSEN Bar, and ALE. Out of these pins, six (Vcc, GND, XTAL1, XTAL2, RST, and EA Bar) are used by all the members of 8051 and 8031 family. Vcc: Pin 40 provides supply voltage to the chip. The voltage source is +5 V. GND: Pin 20 is the Ground. XTAL1 and XTAL2: The 8051 has an on-chip oscillator but requires an external clock to run it. Most often a quartz crystal oscillator is connected to inputs XTAL1 and XTAL2. The quartz crystal oscillator connected to XTAL1 and XTAL2 also needs two capacitor of 30 pf value. One side of each capacitor is connected to ground as shown in fig.

C2 18 XTAL2 30p F C1 19 XTAL1 30p F 20 GND

Figure1.4. XTAL connection to 8051

6

When the 8051 is connected to a crystal oscillator and is powered up, we can observe the frequency on the XTAL2 pin using the oscilloscope. RST: Pin 9 is the RESET pin. It is an input and is active high (normally LOW). Upon applying a high pulse to this pin, the microcontroller will reset terminate all activities. This is often referred to as power-on-reset. It will set the program counter to all 0s. Figure shows connecting the RST pin to the power-on reset circuitry.

Vcc

31 10 uF 30 pF

EA/VPP X1

9 10 K

X2 RST

Figure 1.5 Reset circuitry EA: The 8051 family member such as the 8751/52, 89C51, 52 all come with on chip ROM to store program. In such cases, the EA pin is connected to Vcc.

PSEN: This is an output pin. PSEN stands for program store enable. ALE : ALE (Address Latch Enable) is an output pin. Ports 0, 1, 2, 3: The four ports P0, P1, P2, P3 each use 8 pins, making them 8 bit ports. All the ports upon RESET are configured as input, since P0 P3 have value FFH on them.

P0: As shown in port description. Port 0 is also designated as AD0-AD7, allowing it to

be used for both address and data. In the 8051-based systems where there is no external memory connection, the pin of P0 must be connected externally to a 10K-ohm pull-up resistor. This is due to the fact that P0 is an open drain, unlike P1, P2, P3. With external pull-up resistor connected to P0, it can be used as a simple I/O port, just like P1 and P2.In contrast to port 0, ports P1, P2, and P3 do not need any pull-up resistors since they already have pull-up resistors internally.

Port 0 with Pull -Up Resistors

Vcc 10 K

DS5000 8751 8951

P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7

Port 0

Figure 1.6 PORT0 connections

9

P1 and P2: Both P1 and P2 are used as I/O ports. However, in 8051 based systems with external memory connections, port 2 must be used along with P0 to provide the 16-Bit address for the external memory. As shown in pin description P2 is also designated as A8 A15, indicating its dual function. Since an 8051 is capable of accessing 64K of external memory, it needs a path for the 16 bit of the address. While P0 provides the lower 8 bits, P2 is used for the upper 8 bits of 16-bit address, and cannot be used for I/O. Port 3: Port 3 occupies a total of 8 pins, pins 10 through 17.It can be used as input or output. Port 3 has the additional features of providing some extremely important signals such as interrupts. Below Table provides these alternative functions of P3. Port 3 Alternate Function Port3 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 Function RxD TxD INT0 INT1 T0 T1 WR RD Pin 10 11 12 13 14 15 16 17

P3.0 and P3.1 are used for the RxD and TxD serial communication signals. P3.2 and P3.3 are set aside for external interrupts. P3.4 and P3.5 are used for Timer 0 and 1. P3.6 and P3.7 are used to provide the WR and RD signals of external memory connections.

10

CHAPTER 2 TIMERS and COUNTERS in 8051

2.1 INTRODUCTION The AT89C51 has two 16 bit Timer/Counter registers. Timer0 and Timer1 both can be configured to operate as timers or event counters. In the TIMER function, the register is incremented every machine cycle. Thus one can think of it as counting machine cycles. Since a machine cycle consists of 12 oscillator periods, the counter rate is 1/12 of the oscillator frequency. In the COUNTER function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin T0 or T1. In this function, the external input is sampled during S592 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the cycle is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since it takes two machine cycles(24 oscillator periods) to recognize a 1-to0 transition, the maximum count rate is 1/24 of the oscillator frequency. In addition to the TIMER or COUNTER selection, timer0 and timer1 have four operating modes from which to select.

2.2 TIMERS in 8051

Both Timer 0 and timer 1 are 16 bits wide. Since the 8051 has 8 bit architecture, each 16 bit timer is accessed as two separate registers of low byte and high byte. Each timer is discussed separately. Timer 0 registers: The 16-bit registers of timer are accessed as low byte and high byte. The Low byte register is called TL0 (Timer 0 low byte) and the high byte register is referred to as TH0 (Timer 0 high byte).
11

Timer 1 registers: Timer 1 is also 16 bits and its 16-bit register is split into two bytes, referred to as TL1 (Timer 1 low byte) and TH1(Timer 1 high byte).

2.2.1 TMOD (timer mode) register: Both Timer 0 and 1 use the same register ,called
TMOD, to set the various timer operation modes. TMOD is an 8-bit register in which the lower 4 bit are set aside for Timer 0 and the upper 4 bit for Timer 1. In each case, the lower 2 bits are used to set the timer mode and the upper 2 bits to specify the operation.

Figure 2.1 TMOD Register GATE Gating control when set. The timer/counter is enabled only while the INTx pin

is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is set. C/T This bit is used to decide whether the timer is used as a delay generator or an

event counter. If C/T =0 it is used as a timer for time delay generation. M1 Mode bit 1 M0 Mode bit 0 M1 0 0 1 1 M0 0 1 0 1 MODE 0 1 2 3 OPERATING MODE 13-bit timer mode,8 bit timer/counter 16-bit timer mode,16-bit timer/counter 8-bit auto reload Split timer mode

12

Mode 1 programming The following are the characteristics and operation of mode 1. 1. It is a 16-bit timer; therefore, it allows values of 0000 to FFFFH to be loaded into the timer's register TL and TH 2. After TH and TL are loaded with a 16-bit initial value, the timer must be started. This is done by TR0=1 for timer 0 and TR1=1 for timer 1. 3. After the timer is started, it starts to count up. It counts up until it reaches its limit of FFFFH. When it roll over from FFFFH to 0000, it sets high a flag bit called TF (timer flag). This timer flag can be monitored. When this timer flag is raised one option would be to stop the timer with the instruction TR0=0 for timer 0 and TR1=1 for timer 1. 4. After the timer reaches its limit and roll over, in order to repeat the process the register TH and TL must be reloaded with the original value, and TF must be reset to 0. Mode 0 programming Mode 0 is exactly like mode 1 except that it is a 13-bit timer instead of 16 bit. The bit timer can hold values from 0000 to 1FFFH in TH-TL. MODE 2 programming THE following are the characteristics and operations of mode2. 1. It is an 8-bit timer; therefore it allows only the values of 00-FFh to be loaded into the timers register TH. 2. After TH is loaded with the 8-bit value, 8051 gives a copy of it to TL. Then the timer must be started. This is done by instruction SETB TR0 for timer 0 and SETB TR1 for timer 1.

13

3. After the timer is started, it starts to count up by incrementing the TL register. It counts up until it reaches its limit of FFh. When it rolls over from FFh to 00, it sets high the TF. 4. When the TL register rolls from FFh to 00 and TF is set to 1, TL is reloaded automatically with the original value kept by the TH register.

2.3 COUNTER PROGRAMMING

The timers can also be as counters counting events happening outside the 8051.when it is used as a counter, it is a pulse outside the 8051 that increments the TH, TL register. In counter mode, the TMOD and TH, TL registers are the same as for the timer. They even have the same names. The timers modes are the same as well. C/T bit in TMOD register When C/T =1, the timer is used as a counter and get its pulses from outside 8051. The counter counts up as pulses are fed from pins 14 and 15. These pins are called T0 and T1 and belong to port3. When C/T=0 in case of timer 0, pin P3.4 provides the clock pulse and the counter counts up for each clock pulse coming from that pin. For timer 1 when C/T=1 each clock pulse coming in from pin P3.5 makes the counter count up. TCON register This register is an 8-bit register. The upper four bits are used to store the TF and TR bits of both timers. The lower four bits are set aside for controlling the interrupt bits. It is a bit addressable register.

Figure 2.2 TCON Register

14

CHAPTER 3 INTERRUPTS

3.1INTRODUCTION
A microcontroller can serve several devices. There are two ways to do that: interrupts or polling. In polling, microcontroller continuously monitors; when the status condition is meet it performs the service. After that it moves on to monitor the next device until each one is serviced. But it is not an efficient use of microcontroller. In interrupt, whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal. On receiving an interrupt signal, the microcontroller interrupts whatever is doing and serves the device. The program associated with the interrupt is called interrupt service routine.

3.2 INTERRUPT SERVICE ROUTINE

When an interrupt is invoked the microcontroller runs the interrupt service routine. For every interrupt, there is a fixed location in memory that holds the address of its ISR. The group of memory location set aside to hold the addresses of ISRs is called INTERRUPT VECTOR TABLE.

3.3 TYPES OF INTERRUPT

There are five interrupts available to the user in 8051. But reset is also included as interrupts in 8051. These are as follows: 3.3.1 INTERNAL INTERRUPTS: These are generated automatically by internal operations.

15

1. Timer flag interrupt: When a timer/counter overflows the corresponding timer flag, TF0 or TF1 is set to 1. The flag is cleared to 0 when the resulting interrupt generates a program call to the appropriate timer subroutine in memory. 2. Serial port interrupt: If a data byte is received an interrupt bit R1 is set to 1 in the SCON register. When a data byte has been transmitted an interrupt bit T1 is set in SCON. These are OR together to provide a single interrupt to the processor: the serial port interrupt. 3.3.2 EXTERNAL INTERRUPTS: These are triggered by external signals provided by circuitry. Pins INT0 and INT1 are used by external circuitry. Inputs on these pins can set the interrupt flags IE0 and IE1 in the TCON register to 1. The IEX flags may be set when INTX pin signal; reaches a low level or the flags may be set when a high to low transition takes place on the INTX pin. 3.3.3 RESET: It is an interrupt because the program may not block the action of the voltage on the RST pin. This type of interrupt is called non-maskable, because no combination of bits in any register can stop, or mask, the reset action.

3.4 INTERRUPT ENABLE REGISTER

It is used to control the interrupt functions. BIT 7 6 5 4 3 SYMBOL EA ET2 ES ET1 FUNCTION Enable interrupts bit. not implemented. reserved for future use. enable serial port interrupt. enable timer 1 overflow interrupt
16

2 1 0

EX1 ET0 EX0

enable external interrupt 1. enable timer0 overflow interrupt. Enable external interrupt 0

Figure 3.1 IE REGISTER

3.5 INTERRUPT PRIORITY REGISTER

Interrupt priority is used to decide upon the priority if two interrupts are activated at the same time. When the 8051 is powered up, the priorities are assigned as shown in the table. We can alter the sequence of the table by assigning a higher priority to any one of the interrupt. This is done by programming a register called interrupt priority. Upon power reset interrupt register contains all 0s making the priority sequence based on the table. BIT IP.7 IP.6 IP.5 IP.4 IP.3 SYMBOL PT2 PS PT1 FUNCTION Reserved Reserved Timer 2 interrupt priority bit Serial port interrupt priority bit Timer 1 interrupt priority bit
17

IP.2 IP.1 IP.0

PX1 PT0 PX0

External interrupt 1 priority bit Timer 0 interrupt priority bit External interrupt 0 priority bit

Figure 3.2 IP REGISTER

18

CHAPTER 4 LCD INTERFACING

4.1 INTRODUCTION
LCD display consists of two lines, 16 characters lines per line. It consists alphanumeric characters. The display contains two internal byte wide registers one for commands and the second for characters to be displayed. It also contains a user programmed RAM area that can be programmed to generate any desired character that can be formed using a dot matrix. LCDs are gaining widespread use replacing LEDs because of their declining prices, ease of programming characters and graphics. They have the ability to display numbers, characters and graphics. LCD also relieve the CPU from the task of refreshing LCD because of the incorporation of a refreshing controller into the LCD.

4.2 PIN DESCRIPTION

The LCD has 14 pins. The function of each pin is given below PIN 1 2 3 4 SYMBOL Vss Vcc Vee RS =0 RS= 1 5 R/W=0 R/W=1 DESCRIPTION Ground +5V power supply Power supply to Control contrast to select command Register, to select data Register for write. for read.
19

6 7 8 9 10 11 12 13 14

E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7

Enable The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus

Figure 4.1 LCD CONNECTION

20

4.3 LCD COMMAND CODES

Instruction command codes are send to the LCD to clear the display or force the cursor to the home position or blink the cursor. The table below lists the instruction command codes. CODE (HEX) 1 2 4 6 5 7 8 A C E F 10 14 18 1C 80 C0 38 COMMAND TO LCD INTRUCTION REGISTER Clear display screen Return home Decrement cursor (shift cursor to left) Increment cursor (shift cursor to right) Shift display right Shift display left Display off, cursor off Display off, cursor on Display on, cursor off Display on, cursor blinking Display on, cursor blinking Shift cursor position to left Shift cursor position to right Shift the entire display to the left Shift the entire display to the right Force cursor to the beginning of first line Force cursor to beginning of second line two lines and 5x7 matrix
21

CHAPTER 5 KEYBOARD INTERFACING

5.1 INTRODUCTION
At the lowest level, the keypads are organized in a matrix of rows and columns. The CPU accesses both rows and columns through ports; therefore with two 8-bit ports, an 8 X 8 matrix of keys can be connected to a microprocessor. When a key is pressed, a row and a column make a contact make a contact; otherwise there is no connection between rows and columns.

5.2 SCANNING AND IDENTIFYING THE KEY

Figure shows 4X4 matrix connected to two ports. The rows are connected to output port and the columns are connected to an input port. If no key has been pressed, reading the input port will yield 1s for all columns since they are all connected to high. If all the rows are grounded and the key is pressed one of the columns will have 0 since the key pressed provides the path to ground. It is the function of the microcontroller to scan the keyboard continuously to detect and identify the key pressed.

22

Figure 5.1 Keypad connection

5.3 GROUNDING ROWS AND READING COLUMNS

To detect a pressed key, the microcontroller grounds all rows by providing 0 to the output latch, when it reads the columns. If the data read from the columns is D3-D0=1111, no key has been pressed and the process continues until a key press is detected. However, if one of the column bit has a zero, this means that a key in the D1 column has been pressed. After a key press is detected, the microcontroller will go through the process of
23

identifying the key. Starting with the top row, the microcontroller ground it by providing a low to row D0 only; then it reads the columns. If the data read is all 1s, no key in that row is activated and the process is moved to the next row. It ground the next row, read the columns, and checks for ant zero. This process continues until the row is identified. After identification of the row in which the key has been pressed, the next task is to find out which column the pressed key belong to. This should be easy since the microcontroller knows at any time which row and column are being accessed.

24

CHAPTER 6 ADC INTERFACING

6.1 INTRODUCTION
ADC is used for data acquisition. An ADC has n-bit resolution where n can be 8, 10, 12, 16 or even 24 bits. The higher resolution ADCs provide a smaller step size where step size is the smallest change that can be discerned by an ADC. Conversion time is another major factor in judging an ADC. Conversion time is defined as the time it takes the ADC to convert analog input to a digital input. ADC chips are either parallel or serial. In parallel ADC we have 8 or more pins dedicated to bringing out the binary data but in serial ADC we have only one pin for data out.

6.2 ADC0804 CHIP

The ADC 0804 IC is an 8-bit parallel ADC. It works with +5volts and has a resolution of 8 bits. In the ADC0804, the conversion time varies depending on the checking signals applied to the CLK IN pin, but it cannot be faster than 110 us. 6.2.1 PIN DESCRIPTION OF ADC0804 CS: Chip select5 is an active low input used to activate the ADC0804 chip. To activate the ADC0804, this pin must be low. RD (read): This is an input signal and is active low. The ADC converts the analog input to its binary equivalent and hold it in an internal register. Rd is used to get the converted data out of the ADc0804 chip. WR (Write): this is an active low input used to inform the ADC0804 to start the conversion process.

25

CLK IN and CLK R: CLK IN is an input connected to an external clock source when an external clock is used for timing. However, the 804 has an internal clock generator. To use the internal clock generator of the ADC0804 the CLK IN and CLK R pins are connected to a capacitor and a resistor. INTR: This is an output pin and is active low. It is a normally high pin and when the conversion is finished, it goes low to signal the CPU that the converted data is ready to be picked up. Vin(+) and Vin(-): these are the differential analog inputs where Vin=Vin(+)-Vin(-). Often Vin(-) pin is connected to ground and the Vin(+) pin is used as the analog input to be converted to digital. Vcc: This is the +5 volt power supply. It is also used as a reference voltage when Vref/2 is open. Vref/2: If this is open, the analog input voltage for the ADC0804 is in the range of 0 to 5 volts. D0 to D7: D0-D7 are the digital data output pins since ADC0804 is a parallel ADC chip. These are tri-state buffered and the converted data is accessed only when CS=0 and Rd is forced low.

26

Figure 6.1 ADC0804 chip

27

CHAPTER 7 PROJECT WORK SIX WORD PASSWORD SECURITY SYSTEM

7.1 INTRODUCTION:
This is an 8051 microcontroller based project. AT89C51 chip is used. The programming is done in assembly language with the help of various instructions used. When microcontroller is powered ON, it displays ENTER PASSWORD. One password is saved in the chip. If the password entered by the user matches the password that is stored, LCD will display AUTHORIZED and if not, LCD displays UNAUTHORIZED. Keyboard and LCD interfacing has been used in the project.

7.2 COMPONENTS LIST:

Following is the list of the components used in the project: 7.2.1 +5 VOLTS POWER SUPPLY: Resistance-33 ohms Zener diode-5 volts Battery (9 volts)

7.2.2 8051 MICROCONTROLLER CONNECTION: Resistance-8.2 kiloohms(1), 4.7(8), LED-red Crystal-11.0592 MHz Capacitor-30pF(2), 10 microfarad SIP-10k

28

16 switches Potentiometer-10k LCD Female connector Male connector AT 89C51 chip

7.3 COMPONENT DESCRIPTION: 7.3.1 RESISTANCE:

It is a passive component used to limit the amount of current due to a voltage in an electronic circuit. The ability of a resistor to oppose the current is called resistance. The unit of resistance is ohms. Each resistor has two main characteristics i.e. its RESISTANCE-R, n ohms and its power rating in watts. The power rating may be as low as 1/10 watts to as high as several hundred watts .The value of r is selected to obtain a desired 1 or voltage drop IR in the circuit. At the same time wattage of the resistor is selected so that it can dissipate the heat losses without overheating itself. Too much heat may burn the resistor itself. The resistors may be classified as FIXED VARIABLE

Fixed resistors may be classified into Carbon Composition or Wire Wound Resistors. 7.3.2 CAPACITOR:

The two conducting plates separated by an insulating material (called dielectric) forms a capacitor. The basic purpose of a capacitor is to store the charge. The capacity of a capacitor to store charge per unit potential difference is called capacitance which is measured in Farads but the practical units are micro/nano/pico Farads. The capacitor also offers low impedance to AC

29

but very high impedance to DC. The applications includes coupling, by-passing and filtering for AC signal. Capacitors are of various types that include PAPER MICA CERAMIC ELECTROLYTIC

7.3.3 ZENER DIODE: Zener diode also called breakdown diode is a PN junction diode designed for operation in breakdown region in reverse bias condition. It may operate in either zener breakdown or avalanche breakdown mechanism. The breakdown diode may be silicon or germanium but silicon is preferred. When the reverse bias on a crystal diode is gradually increased a point is reached when the junction breaks down and the reverse current increases abruptly. The breakdown region is the key of the reverse characteristics. Breakdown voltage is called zener voltage Vz and sharply increased current is called zener current Iz. During the operation in the break down region it does not burn out immediately as long as the current through the diode is limited by the external circuit within permissible values, it does not burn out. Here it is used as a voltage regulator to provide a constant voltage.

Figure 7.1 ZENER DIODE

30

7.3.4 LIGHT EMITTING DIODES: LED is the best known of all optoelectronic devices, which emits a fairly narrow bandwidth of visible or invisible light when its internal diode junction is stimulated by a forward electronic current or voltage. They have typical power to light energy conversion efficiencies about 10 or 50 times greater than of a simple tungsten lamp and have very fast response. It operation is based on the phenomenon of electroluminance, which is the emission of light from a semiconductor under the influence of an electrical field, the recombination of charge carrier takes place in a forward PN junction as the electrons cross from the N-region and recombine with holes existing in P-region. Free electrons are in the conduction band of energy levels, while holes are in the valence energy band. Therefore, the electrons are at high energy levels than the holes. For the electrons to recombine with the holes they give some of their energy. These electrons give up energy in the form of heat and light.

Figure 7.2 LED 7.3.5 LIQUID CRYSTAL DISPLAYs: LCD has a distinct advantage of having a low power consumption than LED. Thus they are compatible with MOS integrated logic circuits. They have low cost and good contrast but the main drawback of LCDs are additional requirement of light source, limited temperature range of operation, low reliability, short operated life, poor visibility in low ambient lighting, low speed and need for an AC drive. Two types of display available are dynamic scattering display and feel effect display. When dynamic scattering display is energized the molecules of energized area of the display become turbulent and scatter light in all the directions. Field effect LCD contains front and back polarizers at
31

right angles to each other. Without electrical excitation, the light coming through the front polarizer is rotated 90 in the fluid, passes through rear polarizer and is reflected back by the mirror. When an electrostatic field I applied, the LC fluid molecules rotate 90 degrees so that light is not rotated 90 degrees; and therefore absorbed by the rear polarizer. This causes the appearance of dark digits on a light background. 7.3.6 CRYSTAL : A quartz crystal exhibits a very important property known as piezo-electric effect. The crystal has a high degree of stability enholding constant at whatever frequency the crystal is originally cut to operate. When a mechanical pressure is applied across the face of the crystal a voltage proportional to the applied mechanical pressure appears across the crystal. Conversely when a voltage is applied across the crystal surface the crystal is distorted by an amount proportional to the applied voltage. And alternating voltage applied to a crystal causes it to vibrate at its natural frequency. 7.3.7 POTENTIOMETER: Variable or adjustable resistors usually have three leads, two fixed and one movable. If contacts are made to only two leads of the resistor (stationary and moving lead), the variable resistor is being used as a rheostat If all the three contacts are employed in the circuit it is termed as a POTENTIOMETER or POT. Pots are often used as voltage divider to control or vary voltage across a circuit branch. Thus a potentiometer is a three terminal resistor with an adjustable sliding contact that functions as an adjustable voltage divider and makes it possible to mechanically vary the resistance. 7.3.8 SINGLE IN-LINE PACKAGE: A package or housing for electronic components with a single row of pins that protrude along one edge, usually mounted up on edge. SIP is called Single In-line Pin Package (SIPP). SIPs group Random Access Memory (RAM) chips together on a small board either by the (DIP) process or surface mounting (SMD) process. The board itself has a single row of pin-leads that resembles a comb extending from its bottom edge,

32

which plug into a special socket on a system or system-expansion board. In our project a SIP of 10k is used for PORT 0.

Figure 7.3 SIP 7.3.9 AT89C51 chip: The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

7.4 CIRCUIT DIAGRAMS:

33

7.4.1

POWER SUPPLY:

Fig 7.4 +5 volts power supply 7.4.2 CONNECTION TO AT89C51:

34

Fig 7.5 Connection to 89C51

7.5WORKING:
The working of this project is divided into two parts as explained below:
35

7.5.1

POWER SUPPLY: A 9 volt battery is used, to provide a DC supply. The positive terminal of the battery

is connected to a parallel combination of two resistances each of 33 ohms which provides a voltage drop of 4 volts. The output is connected to the negative terminal of the zener diode and its positive terminal is connected to the negative terminal of the battery. This zener is of 5 volts and thus we get +5 volts at the output. 7.5.2 8051 MICROCONTROLLER CONNECTION: ATMEL 89C51 chip has 40 pins, a total of 32 pins are set for 4 ports p0, p1, p2 and p3. PIN 40 provides supply voltage to the chip. The voltage source is +5 volts. PIN 20 is grounded. The quartz crystal oscillator of 11.0592 Mhz is connected between PIN 18 and Pin19 which are connected to two capacitors of 30 pF each. These are further grounded. Pin 9 is the reset pin which will reset the microcontroller and terminate all its activities on applying a high pulse to this pin. This also accommodates the reset circuitry which connected of a capacitor of 10 microfarads and a resistor of 8.2 kilo ohms. PORT 0 occupies a total of 8 pins, pins 39 to 32. These pins are connected to data pin of LCD from pin-7 to 14. PORT 3 occupies pin from 10 to 17, out of which pin10 to 13 are connected to rows of the keypad. Port 2 extends from pin 21 to 28, out of which pin 21 to 24 are connected to columns of the keypad. PORT 0 is connected to SIP (single in line package) having pins from 32 to 39. Pin 26(P2.5) is connected to pin 4 of the LCD which is RS. A low pulse to this pin will select command register and a high pulse will select data register. Pin 27(P2.6) is connected to pin5 of the LCD which is the R/W pin. A low pulse to this pin will write the data and a high will read the data. Pin28 (p2.7) is connected to pin 6 of LCD which is enable. A high to low pulse is applied to this pin for the LCD to latch in the data present at the data pins.

36

When powered, will display ENTER PASSWORD. One of the password is saved in the chip. If matched the LCD will display AUTHORIZED and if not matched will display UNAUTHORIZED. Keyboard and LCD interfacing has been used in the project.

7.6 PROJECT CODE:

ORG 000H acall INIT SJMP MainProgram INIT:Mov DPTR,#Mycom C1:CLR A MovC A,@A+DPTR Acall Comwrt Acall Delay JZ Rm INC DPTR SJMP C1 Rm:Mov DPTR,#MyData3 C2:CLR A MovC A,@A+DPTR JZ Return Acall DataSend Acall Delay INC DPTR SJMP C2 Return:Mov R1,#00 mov A,#01H Acall Comwrt
37

Ret

MainProgram:CLR A Acall Detect Mov A,R5 ;Acall DataWrt CJNE A,#45H,A1 Acall Processing A1: CJNE A,#31h,Next1 INC R1 Next1:ClR A Acall Detect Mov A,R5 ;Acall DataWrt CJNE A,#45H,A2 Acall Processing A2: CJNE A,#32h,Next2 INC R1 Next2:ClR A Acall Detect Mov A,R5 CJNE A,#45H,A3 Acall Processing A3:CJNE A,#33H,Next3 INC R1 Next3:ClR A
38

;value from LCD to Acc

Acall Detect Mov A,R5 CJNE A,#45H,A4 Acall Processing A4:CJNE A,#34H,Next4 INC R1 Next4:ClR A Acall Detect Mov A,R5 CJNE A,#45H,A5 Acall Processing A5:CJNE A,#35H,Next5 INC R1 Next5:ClR A Acall Detect Mov A,R5 CJNE A,#45H,A6 Acall Processing A6:CJNE A,#36H,Next6 INC R1 Next6:ClR A Acall Detect Mov A,R5 CJNE A,#45H,Next7 Acall Processing Next7:Mov A,#55 Add A,R1 Mov R1,A

39

sjmp MainProgram

Detect: Mov P1,#0FFH RowsK1:Mov P3,#0 Mov A,P1 ANL A,#00001111b CJNE A,#00001111B,K1 K2:ACALL DELAY MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,OVER SJMP K2 OVER:ACALL DELAY MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,OVER1 SJMP K2 OVER1:MOV P3,#11111110b MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,ROW_0 MOV P3,#11111101b MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,ROW_1 MOV P3,#11111011B MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,ROW_2
40

;P2 connrcted to columns and P3

MOV P3,#11110111B MOV A,P1 ANL A,#00001111B CJNE A,#00001111B,ROW_3 LJMP K2 ROW_0:MOV DPTR,#KCODE0 SJMP FIND ROW_1:MOV DPTR,#KCODE1 SJMP FIND ROW_2:MOV DPTR,#KCODE2 SJMP FIND ROW_3:MOV DPTR,#KCODE3 FIND: RRC A JNC MATCH INC DPTR SJMP FIND MATCH:CLR A MOVC A,@A+DPTR MOV R5,A cjne a,#45h,nex acall Processing nex: acall Datawrt Ret ; ljmp K1 '0','1','2','3' '4','5','6','7' '8','9','A','B' 'C','D','E','F' 38H,0CH,80H,0 KCODE0:DB KCODE1: DB KCODE2: DB KCODE3: DB MyCom: DB ;Enter Key Pressed ;Save Pressed Key in R%

MyData1:DB "AUTHORIZED",0
41

MyData2:DB "UNAUTHORIZED",0 MyData3:DB "Enter Password",0

Delay: Mov R3,#250 Here2: Mov R4,#255 Here: DJNZ R4,Here DJNZ R3,Here2 Ret Processing: Clr A Mov A,R1 CJNE A,#6,Unauthorized MOV A,#01H Acall Comwrt Acall Authorized Ret Authorized: Mov DPTR,#MyData1 D1: CLR A Movc A,@A+DPTR JZ Again Acall DataSend Acall Delay INC DPTR sjmp D1 Again: Sjmp Again Ret Unauthorized: MOV A,#01H Acall Comwrt Mov DPTR,#MyData2 D2: CLR A Movc A,@A+DPTR
42

JZ Again1 Acall DataSend INC DPTR sjmp D2 Again1: sjmp Again1 Ret ComWrt: Mov P0,A Clr P2.5 Clr P2.6 SetB P2.7 Acall Delay Clr P2.7 Ret DataWrt: Mov P0,#2AH SetB P2.5 Clr P2.6 SetB P2.7 Acall Delay Clr P2.7 Ret DataSend: Mov P0,A SetB P2.5 Clr P2.6 SetB P2.7 Acall Delay Clr P2.7 Ret END ;RS=P2.5 ;RW=P2.6 ;E=P2.7

7.7APPLICATIONS:
43

1. This can be used in banks for securing the lockers. 2. In computers to avoid the misuse of the system by interloper. 3. In home security to avoid theft. 4. In mobile security, to avoid access by foreigners.

44

CHAPTER 8

REFERENCES

www.8051projects.com www.google.com www.wikipedia.com M.A MIZIDI 2nd edition The 8051 Microcontroller and Embedded Systems KENNETH J. AYALA 2nd edition The 8051 Microcontroller
45

J.B.GUPTA 2nd edition Electronic Devices and Circuits

46