"Arithmetic Operations"

Some key flags within the PSW, i.e. C, AC, OV, P, are utilised in many of the arithmetic instructions. The arithmetic instructions can be grouped as follows: 1. Addition: Register A (the accumulator) is used to hold the result of any addition operation. The flags in the PSW register are affected by the various addition operations, as follows:The C (carry) flag is set to 1 if the addition resulted in a carry out of the accumulators MSB bit, otherwise it is cleared. The AC auxiliary) flag is set to 1 if there is a carry out of bit position 3 of the accumulator, otherwise it is cleared. 2. Subtraction: Computer subtraction can be achieved using 2s complement arithmetic. Most computers also provide instructions to directly subtract signed or unsigned numbers. The accumulator, register A, will contain the result (difference) of the subtraction operation. The C (carry) flag is treated as a borrow flag, which is always subtracted from the minuend during a subtraction operation. 3. Increment/decrement: The increment (INC) instruction has the effect of simply adding a binary 1 to a number while a decrement (DEC) instruction has the effect of subtracting a binary 1 from a number. The increment and decrement instructions can use the addressing modes: direct, indirect and register. The flags C, AC, and OV are not affected by the increment or decrement instructions. If a value of FFh is increment it overflows to 00h. If a value of 00h is decrement it underflows to FFh. The DPTR can overflow from FFFFh to 0000h. The DPTR register cannot be decremented using a DEC instruction 4. Multiply/divide: The 8051 supports 8-bit multiplication and division. This is low precision (8 bit) arithmetic but is useful for many simple control applications. The arithmetic is relatively fast since multiplication and division are implemented as single instructions. If better precision, or indeed, if floating point arithmetic is required then special software routines need to be written. For the MUL or DIV instructions the A and B registers must be used and only unsigned numbers are supported. 5. Decimal adjust: The 8051 performs all arithmetic in binary numbers (i.e. it does not support BCD arithmetic). If two BCD numbers are added then the result can be adjusted by using the DA, decimal adjust, instruction:

8051 Arithmetic Instruction set: ADD A, Rn ADD A, direct ADD A, @Ri ADD A, #data Add register to ACC Add direct byte to ACC Add indirect RAM to ACC Add immediate data to ACC

ADDC A, Rn

Add register to ACC with Carry

ADDC A, direct Add direct byte to ACC with Carry ADDC A, @Ri Add indirect RAM to ACC with Carry ADDC A, #data Add immediate data to ACC with Carry SUBB A, Rn SUBB A, @Ri INC A INC Rn INC direct INC @Ri DEC A DEC Rn DEC direct DEC @Ri INC DPTR MUL AB DIV AB DAA Subtract Register from ACC with borrow Subtract indirect RAM from ACC with borrow Increment ACC Increment register Increment direct byte Increment direct RAM Decrement ACC Decrement Register Decrement direct byte Decrement indirect RAM Increment Data Pointer Multiply A and B Divide A by B Decimal Adjust ACC SUBB A, direct Subtract indirect RAM from ACC with borrow SUBB A, #data Subtract immediate data from ACC with borrow

"Arithmetic Operations"

Most 8051 applications involve adding intelligence to machines where the hexadecimal numbering system works naturally. Four bits are enough to represent the decimal numbers from 0 to 9 that is 0000 to 1001. The numbers represented with four-bit form is called as binary coded decimal (BCD). Two of these BCD numbers can then be packed into a single byte of data. The 8051 do all the arithmetic operations in a binary format. When the numbers are in BCD format the result will be often the non- BCD format. For getting the result in decimal format we are using the instruction DAA. This opcode adjusts the result of BCD addition result into decimal format.

"Jump Instructions"

Jump Instructions: jump instructions in 8051 can be categorized into conditional jumps and un conditional jumps.

Conditional jumps: When using a conditional jump instruction the programmer can simply specify a program label or a full 16-bit address for the conditional jump instructions destination. The assembler will position the code and work out the correct 8-bit relative address for the instruction. Conditional jumps can be categorized into two types.

Bit jumps

Bit jumps operate according to the status of the carry flag in the PSW register. The bit jump instructions are given below. JC radd jump if carry flag CY=1 JNC radd- Jump if carry flag CY=0 JB b, radd-Jump if addressable bit=1 JNB b, radd-Jump if addressable bit=0

JBC b, radd-Jump if addressable bit=1 and clear addressable bit is 0.

Byte jumps

Byte jump instructions test bytes of the data. If the condition is true then jump action is taken. The byte jump instructions are given below. CJNE A, #data,reladdr - Compare A and data, jump if not equal CJNE Rn, #data, reladdr - Compare Rn and data, jump if not equal CJNE @Rn, #data, reladdr - Compare Rn and memory, jump if not equal DJNZ Rn, reladdr -Decrement Rn and then jump if not zero

DJNZ direct, reladdr - Decrement memory and then jump if not zero

Unconditional jumps: Unconditional jumps do not test any bit to determine whether the jump should be taken.8051 supports three unconditional jump instructions

LJMP (long jump) causes the program to branch to a destination address defined by the 16-bit operand in the jump instruction. Because a 16-bit address is used the instruction can cause a jump to any location within the 64KByte program space. Some example instructions are: LJMP LJMP LABEL_X ; Jump to the specified label LJMP 0F200h ; Jump to address 0F200h

LJMP @A+DPTR ; Jump to address which is the sum of DPTR and Reg. A

SJMP (short jump) uses a singe byte address. This address is a signed 8-bit number and allows the program to branch to a distance 128 bytes back from the current SJMP PC address or +127 bytes forward from the current PC address. The address mode used with this form of jumping (or branching) is referred to as relative addressing, introduced earlier, as the jump is calculated relative to the current PC address. AJMP This is a special 8051-jump instruction, which allows a jump with a 2KByte address boundary.

"Call Instructions"

LCALL: This instruction is used to call a subroutine at a specified address. The address is 16 bits long so the call can be made to any location within the 64KByte memory space. When a LCALL instruction is executed the current PC content is automatically pushed onto the stack of the PC. When the program returns from the subroutine the PC contents is returned from the stack so that the program can resume operation from the point where the LCALL was made The return from subroutine is achieved using the RET instruction, which simply pops the PC back from the stack. ACALL: The ACALL instruction is logically similar to the LCALL but has a limited address range similar to the AJMP instruction.

"Further Details on Interrupts"

An interrupt causes a temporary diversion of program execution in a similar sense to a program subroutine call, but an interrupt is triggered by some event, external to the currently operating program. We say the interrupt event occurs asynchronously to the currently operating program, as it is not necessary to know in advance when the interrupt event is going to occur. 8051 Interrupts: There are five interrupt sources for the 8051. Since the main RESET input can also be considered as an interrupt, six interrupts can be listed as follows: 1. System RESET - RST 2. External interrupt 0 - IE0 3. Timer/counter 0- TF0 4. External interrupt 1- IE1 5. Timer/counter 1 - TF1 6. Serial port - RI or TI Interrupt concepts are basically simple and the following sequence of events. 1. The programmer enables the interrupt by setting the interrupt Enable flag is set to 1. 2. External or internal circuit action causes one of the interrupt signals to be generated. 3. The CPU finishes the current instruction places the PC on the stack and then replace the original content of the PC contents with the address of the first instruction of the program code for the particular that make the interrupt.

4. While executing the interrupts the interrupt program must reset the flip flop. 5. After completing the interrupt a RETI instruction resets all the interrupt enable circuitry and pop the PC contents from the stack. The CPU resumes the executing the interrupted program.