Contents of Interest for Exams

(Advanced Program for Mechatronics at HUST) I) Exam Rules: - It is an open book exam. There could be two sessions in the exam: the first one is paper-based writing exam (about 60 minutes) followed by an interview session (10-15 minutes for each student). The interview will be on the problems or relevant problems given to you in the exam question sheet. - Material and resource (e.g., lecture notes, laptops, smartphones) supporting you in the exam are welcomed - No discussion and no copying other students efforts are allowed

II) Coverage of the exam: The following may be covered in the exam. However, you should not take for granted that other contents already covered during the lectures will be skipped. Be aware. Combinational and sequential logics (including FSM) ADC, DAC, Analog Digital transmission/receive Data presentation/organization and error control in communication (parity, checksum and CRC, framing, synchronization) PLD and FPGA fundamentals (including HDL) Memory interfacing and applications Peripheral interfacing and their application o ADC/DAC, Memory, SPI, I2C, UART/RS232/RS485, CAN in ARM, Interrupts of different types o Semiconductors switches, relays, motors, display of various types, Functionality and application of PCA and WD, their distinction from general timers/counters Power savings modes and applications Software architectures and their deployment in improving digital systems RTOS fundamentals and applications in structuring the software architecture Fundamental knowledge of one basic MCU (8051, AVR, PIC) and ARM. Basics of a MCU based digital system How to digitize a system and implement it using MCU Basic knowledge of pseudo-code

III) Examples of Exam Problems (See the next page)

Problem 1: Sketch a digital system that can acquire 5 analog signals from one single channel in the following cases: MCU has a built-in one channel 8-bit ADC MCU has no on-chip ADC, therefore an external 10-bit ADC will be used.

Note: Additional ICs could be used.

Problem 2: Any differences between interfacing 7-segment leds directly to MCU and interfacing 7segment leds to MCU via buffers/drives (give examples) Problem 3:

Problem 4:

Problem 5: One clever way to do display is to exploit persistence of human vision, by driving only one digit at a time. Examine the following circuit, then explain how this multiplexed display system works

Problem 6:

Dene the following acronyms as they apply to digital logic circuits: ASIC/CAN/PLA/PCA/CPLD/FPGA/OSI, Problem 7:

Problem 8:

Problem 9:

Problem 10:

Problem 11:

Problem 12: Explain the operation of the following:

Problem 13:

Problem 14: A ROM memory chip is rated at 4k 8 bits. What, exactly, does this designation mean? How many addresses are there inside this memory chip? How many bits of storage are there, total, in this memory chip? How many address bits are there, and how many data bits are there?

Problem 15:

Problem 16:

Problem 17:

Problem 18:

Problem 19:

Explain the following circuit:

Problem 20:

Problem 21:

Problem 22:

Problem 23: Interface the ROM 16Kx8bit to a MCU. The address will be from 0xC000 to oxFFFF. Then show the software ritual (pseudo-code) required to initialize this memory interface.

Problem 24:

Also write the pseudo-code to run the motor. Problem 25: Design a MCU based system (8 bit, 4 ports) that can control 48 I/O. Problem 27: Design a MCU based system that can control 8 LEDs with the addresses ranging from 0x0400 0x0408 Problem 28: Suggest a solution that can link 2 MCUs (capable of bilateral data communication) using external interrupt for synchronization Problem 29: Assume that your systems obtain 2 readings from field sensors (16 bit current value, 8 bit timing value) and you want to send them to PC via serial communication. Propose a way to do so (considering synchronization, error control)

Problem 30: Why vectored interrupts are advantageous. How to implement them in ARM. Give examples. Problem 31: The following code was developed for a digital system:

Give a solution of adapting it to the RTOS based architecture