Sri Balaji Technical Campus, Jaipur

Department of CSE/IT
Session (2013-14) B.Tech. III Year/V Semester Branch: - CSE/IT Prepared by: - Mr. Amit Kumar Gupta Assignment No. 01 (Unit-I) Subject: - Computer Architecture Date of assignment: -30/08/2013 Date of submission: -04/09/2013 Max Marks: - 100 Subjective Type Questions Q.1 Using a 4-bit counter with parallel load and a 4-bit adder draw a block diagram that shows how to implement the following statements: x : R1 R1 + R2 xy: R1 R1 + 1 Where R1 is a counter with parallel load and R2 is a 4 bit register Q.2 Draw the block diagram for the hardware that implements the following statements: xyT0 + T1 + yT2 : AR AR +1 Where AR n-bit register and x,y are control variables. Include the logic gates for the control function. Q.3 Design a 4 bit combinational circuit incrementer using four full adder circuits. Q.4 An 8 bit register contains the binary value 10011100. What is the value after arithmetic shift right? Starting from initial number 10011100, determine the register value after an arithmetic shift left, and state whether there is an overflow. Q.5 A digital computer has a common bus system for 16 register of 32 bit each. The bus is constructed with multiplexers. (a) How many selection inputs are there in each multiplexer? (b) What size of multiplexers are needed? (c ) How many multiplexers are there in the bus ?

Objective Type Questions Q.1 Arithmetic shift left operation (A) Produces the same result as obtained with logical shift left operation. (B) Causes the sign bit to remain always unchanged. (C) Needs additional hardware to preserve the sign bit. (D) Is not applicable for signed 2's complement representation. Q.2 The content of a 4-bit register is initially 1101. The register is shifted 2 times to the right ith the serial input being 1011101. What is the content of the register after each shift? (A) 1110, 0111 (B) 0001, 1000 (C) 1101, 1011 (D) 1001, 1001

Q.3 SIMD represents an organization that ______________. (A) Refers to a computer system capable of processing several programs at the same time. (B) Represents organization of single computer containing a control unit, processor unit and a memory unit. (C) Includes many processing units under the supervision of a common control unit (D) None of the above. Q.4 Von Neumann architecture is (A)SISD (B) SIMD (C) MIMD (D) MISD

Q.5 A register capable of shifting its binary information either to the right or the left is called a (A) Parallel register. (B) Serial register. (C) Shift register. (D) Storage registers.

Q.6 A collection of lines that connects several devices is called.............. A) Bus B) peripheral connection wires C) Both a and b D) internal wires

Q.7 A complete microcomputer system consist of........... A) Microprocessor B) memory C) peripheral equipment D) all of the above

Q.8 PC Program Counter is also called................... A) Instruction pointer B) memory pointer C) data counter D) file pointer

Q.9 In a single byte how many bits will be there? A) 8 B) 16 C) 4 D) 32

Q.10 CPU does not perform the operation.................. A) Data transfer B) logic operation C) arithmetic operation D) all of the above

Q.11 A Register have 4 bit value that is 1100 what is the value after performing logical shift left A) 1001 B) 0110 C) 1000 D) 1111

Q.12 A Register have 4 bit value that is 1100 what is the value after performing logical shift right A) 1001 B) 0110 C) 1110 D) 1111

Q.13 A Register have 4 bit value that is 1100 what is the value after performing arithmetic shift left A) 1001 B) 0110 C) 1110 D) 1000

Q.14 A Register have 4 bit value that is 1100 what is the value after performing arithmetic shift right A) 1001 B) 0110 C) 1110 D) 1000

Q.15 A Register have 4 bit value that is 1100 what is the value after performing circular shift left A) 1001 B) 0110 C) 1110 D) 1000

Q.16 A Register have 4 bit value that is 1100 what is the value after performing circular shift right

A) 1001

B) 0110

C) 1110

D) 1000

Q.17 If a register containing data (11001100) is subjected to arithmetic shift left operation,

then the content of the register after 'ashl' shall be (A) (11001100) Q.18 RTL stands for (A) Register Transfer Language (B) Register Translation Language (C) Register Transient Language (D) All of above Q.19 A digital computer has a common bus system for 32 register of 64 bit each. The bus is
constructed with multiplexers. How many multiplexers are required?

(B) (1101100)

(C) (10011001)

(D) (10011000)

A) 64

B) 32

C) 16

D) 128

Q.20 The control function is defined as x + yz. What is the means of + A) Arithmetic Plus B) Logical OR C) A) and B) both D) None of these

Sri Balaji Technical Campus, Jaipur

Department of CSE/IT
Session (2013-14) B.Tech. III Year/V Semester Branch: - CSE/IT Prepared by: - Mr. Amit Kumar Gupta Assignment No. 02 (Unit-I) Subject: - Computer Architecture Date of assignment: -7/09/2013 Date of submission: -12/09/2013 Max Marks: - 100 Subjective Type Questions Q.1 Draw the block diagram for the hardware that implements the following statements:
x + yz: AR AR + BR Where AR and BR are two n-bit register and x,y and z are control variables. Include the logic gates for the control function.

Q.2 Design a 4 bit combinational circuit decrementer using four full adder circuits. Q.3 Register A holds the 8 bit binary 11011001.Determine the B operand and the logic micro-operation
to be performed in order to change the value in A to: a. 01101101 b. 11111101

Q.4 Explain all the types of addressing modes with help of example Q.5 Explain each and every steps of instruction cycle? Draw the flow chart for recognition the type of instruction