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INTRODUCTION

1.1 INTRODUCTION
The project aims at developing a messenger system by which one can communicate wirelessly without internet using ZIGBEE technology. The purpose of the project is to implement a messenger system where we can chat with other user without internet facility.

1.2 ADVANTAGES OF INTERNET ACCESS IN RURAL AREAS


Internet access has added multiple new layers to rural life. It provides communication, information, entertainment and access to the latest news. Living in a rural area no longer means being cut off from the rest of the world. For example, shopping online allows you to buy items needed for rural life that are not be available in a small community and without making a long trip to the nearest city.

Communication
The Internet has revolutionized rural communication. With online video communication, you can keep in touch with family and friends that you would not be able to see otherwise. Schedule a weekly or monthly online call and living in a rural area doesn't seem so disconnected. Email allows you to send and receive mail messages and attachments, and keep in contact with family and friends and rest of the world in a much faster and more convenient way than before Internet access was available.

Information/Education
The best thing offered via Internet is information. Living far away from others can make it hard to get simple medical care. Online searches can provide reliable answers to any kind of question; medical, homework, law, technical support, or virtually anything else needed. Students and children are some of the top users surfing the Internet for research. Homeschooling is easier with Internet access, with information and classes offered for all ages.

Services
There are multiple services that save time and money available online. Banking through the Internet, for one, saves long trips to the bank in the nearest town. It provides instant access to account information, allowing you to transfer funds, pay bills and do direct deposit as needed. Shopping via Internet is great for those in rural areas because it provides access to items that are not available otherwise. If you need something not available locally, from home repair or upgrades to tending to livestock or grounds keeping, you'll be able to find it and get it sent to you through the Internet.

Entertainment/News
The Internet is also filled with numerous forms of entertainment. Play online games, watch videos of television programs you otherwise don't have access to, or download music or listen online while you surf. Life away from the crowd can sometimes be boring, but the Internet provides entertainment as well. Stay up-to-date on the latest news from around the world with the click of a button. Most of the world's newspapers are available online, and there are specialty news sites you can subscribe to or read for free.

Business
A great advantage of Internet access for folks that live in rural areas is they can make money at home by starting their own Internet business. It is easy to sell items online, or use your expertise to offer online services. Handmade or folky items from rural areas are great items to sell online, and an Internet-based business can be started and run without ever needing to leave the house, letting you keep a hand in the modern world while leaving more time for you to enjoy the rural life.

1.3 THE DARK SIDE


Despite of the many advantages of Internet, there are many people around us especially in the rural areas who do not know how to use the internet. Most of the people do not even know how to use a computer. For such kind people this project is very helpful to send messages from one place to another to the desired person who does not have the knowledge of using

either the computer or the internet. Since this project is implemented without the use of internet wirelessly.

1.4 PURPOSE OF THE PROJECT


The purpose of the project is to implement a messenger where we can communicate with other user without internet facility. We are implementing a chatting system without using internet in our project. Here we are using ZIGBEE technology for communication between two systems. In this project there are two sections, one is the transmitter section and the other is the receiver section. The ZIGBEE module acts as a transceiver.

1.5 WHAT IS A TRANSCEIVER?


A transceiver is a device comprising both a transmitter and a receiver which are combined and share common circuitry or a single housing. When no circuitry is common between transmit and receive functions, the device is a transmitter-receiver. Technically, transceivers must combine a significant amount of the transmitter and receiver handling circuitry. Similar devices include transponders, and repeaters.

EMBEDDED SYSTEM
2.1 INTRODUCTION TO EMBEDDED SYSTEM
An Embedded system is a computer system designed for specific control functions within a larger system. Often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. By contrast, a general-purpose computer, such as a personal computer (PC), is designed to be flexible and to meet a wide range of end-user needs. Embedded systems control many devices in common use today. Embedded systems contain processing cores that are typically either microcontrollers or digital signal processors (DSP). The key characteristic, however, is being dedicated to handle a particular task. They may require very powerful processors and extensive communication, for example air traffic control systems may usefully be viewed as embedded, even though they involve mainframe computers and dedicated regional and national networks between airports and radar sites (each radar probably includes one or more embedded systems of its own). Since the embedded system is dedicated to specific tasks, design engineers can optimize it to reduce the size and cost of the product and increase the reliability and performance. Some embedded systems are mass-produced, benefiting from economies of scale. Physically, embedded systems range from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants. Complexity varies from low, with a single microcontroller chip, to very high with multiple units, peripherals and networks mounted inside a large chassis or enclosure. In general, "embedded system" is not a strictly definable term, as most systems have some element of extensibility or programmability. For example, handheld computers share some elements with embedded systems such as the operating systems and microprocessors that power them, but they allow different applications to be loaded and peripherals to be connected. Moreover, even systems that do not expose programmability as a primary feature generally need to support software updates. On a continuum from "general purpose" to "embedded", large application systems will have subcomponents at most points even if the system as a 4

whole is designed to perform one or a few dedicated functions, and is thus appropriate to call embedded. A modern example of embedded system is shown in fig: 2.1. Labeled parts include microprocessor (4), RAM (6), flash memory (7).Embedded systems programming is not like normal PC programming. In many ways, programming for an embedded system is like programming PC 15 years ago.

Fig 2.1: A Modern Example of Embedded System

2.2 NEED FOR EMBEDDED SYSTEMS


The uses of embedded systems are virtually limitless, because every day new products are introduced to the market that utilizes embedded computers in novel ways. In recent years, hardware such as microprocessors, microcontrollers, and FPGA chips have become much cheaper. So when implementing a new form of control, it's wiser to just buy the generic chip and write your own custom software for it. Producing a custom-made chip to handle a particular task or set of tasks costs far more time and money. Many embedded computers even come with extensive libraries, so that writing your own software becomes a very trivial task indeed. From an implementation viewpoint, there is a major difference between a computer and an embedded system. 5

Embedded systems are often required to provide Real-Time response. The main elements that make embedded systems unique are its reliability and ease in debugging.

2.4 APPLICATIONS OF EMBEDDED SYSTEMS


2.4.1 Consumer applications At home we use a number of embedded systems which include microwave oven, remote control, vcd players, dvd players, camera etc.

Fig 2.2: Automatic Coffee Makes Equipment 2.4.2 Office automation We use systems like fax machine, modem, printer etc.

Fig 2.3: Fax Machine

2.4.3 Tele communications Cell phones, web cameras etc.

Fig 2.4: Cell Phone

Fig 2.5: Web Camera 2.4.4 Industrial automation Today a lot of industries are using embedded systems for process control. In industries we design the embedded systems to perform a specific operation like monitoring temperature, pressure, humidity ,voltage, current etc.., and basing on these monitored levels we do control other devices, we can send information to a centralized monitoring station.

PROJECT DESCRIPTION
3.1 INTRODUCTION
An embedded system is a combination of software and hardware to perform a dedicated task. Some of the main devices used in embedded products are Microprocessors and Microcontrollers. Microprocessors are commonly referred to as general purpose processors as they simply accept the inputs, process it and give the output. In contrast, a microcontroller not only accepts the data as inputs but also manipulates it, interfaces the data with various devices, controls the data and thus finally gives the result. The project Messenger development without internet using ZigBee using ARM7TDMI-S microcontroller is an exclusive project which is used to send messages in rural areas without internet using ZigBee technology.

3.2 OBJECTIVE OF THE PROJECT


In coming days is to face new challenges. Hence every field prefers automated control systems. Especially in the field of electronics, automated systems are doing better performance. The main aim of the project is to develop a messenger system by which one can communicate wirelessly without internet using ZigBee technology. As ZigBee is the upcoming technology in wireless field, we had tried to demonstrate its way of functionality and various aspects like kinds, advantages and disadvantages using a small application of controlling the any kind of electronic devices and machines. The ZigBee technology is broadly adopted for bulk and fast data transmission over a dedicated channel. In this project there are two sections, one is the transmitter section and the other is the receiver section.

3.3 TRANSMITTER SECTION


The transmitting section consists of a keypad interfaced with microcontroller kit using ps/2 connector and with ZigBee module. User person will enter some data on keypad, this data will be given to the ZigBee module by microcontroller, and then 8

ZigBee transmits the message data in the form of RF data waves in certain range.

3.4 RECEIVER SECTION


In rural node display area or receiving section in the RF data range, the ZigBee module receives the wireless message data in the form of RF waves and gives to the microcontroller kit interfaced to it, then microcontroller gives the data to the LCD, then LCD displays the data given to its nodal area vice versa, while Message sending from village to concern controlling office. In this way data can be sent wirelessly and display in the concern rural areas by arranging ZigBee modules in that area.

3.5 RF waves
Radio frequency (RF) is a rate of oscillation in the range of about 3 KHz to 300 GHz, which corresponds to the frequency of radio waves, and the alternating currents which carry radio signals. RF usually refers to electrical rather than mechanical oscillations, although mechanical RF systems do exist. Although radio frequency is a rate of oscillation, the term "radio frequency" or its acronym "RF" are also used as a synonym for radio i.e. to describe the use of wireless communication, as opposed to communication via electric wire.

HARDWARE DESCRIPTION
In this chapter the block diagram of the project and design aspect of independent modules are considered. Block diagram is shown in figure below.

LCD Display Power supply


PS/2 CABLE

Crystal Oscillator

ARM Microcontroller

Keypad

ZigBee Transceiver

Fig 4.1: Block Diagram of Transmitter Section

ZigBee Transceiver

LCD Display

ARM Microcontroller
Key pad
PS/2 Cable

Fig 4.2: Block Diagram of Receiver Section

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4.1 MAJOR BUILDING BLOCKS


The main blocks that are used in this project are: 1. Microcontroller (ARM7TDMI-S ) 2. Power supply 3. Crystal oscillator 4. Keypad 5. LCD display 6. PS/2 Cable 7. ZigBee

4.2 MICROCONTROLLER LPC2141/2/4/6/8


A Microcontroller consists of a powerful CPU tightly coupled with memory, various I/O interfaces such as serial port, parallel port timer or counter, interrupt controller, data acquisition interfaces-Analog to Digital converter, Digital to Analog converter, integrated on to a single silicon chip. If a system is developed with a microprocessor, the designer has to go for external memory such as RAM, ROM, EPROM and peripherals. But controller is provided all these facilities on a single chip. Development of a Micro controller reduces PCB size and cost of design. One of the major differences between a Microprocessor and a Micro controller is that a controller often deals with bits not bytes as in the real world application. Intel has introduced a family of Micro controllers called the MCS-51. The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMIS CPU with real-time emulation and embedded trace support, that combines the microcontroller with embedded high speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and unique accelerator architecture enable 32bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. Due to their tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. A blend of serial communications interfaces ranging from USB 2.0

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Full Speed device, multiple UARTs, SPI, SSP to I2Cs, and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power. Various 32-bit timers, single or dual 10-bit ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these microcontrollers particularly suitable for industrial control and medical systems.

4.3 ARCHITECTURAL OVERVIEW


The LPC2141/2/4/6/8 consists of an ARM7TDMI-S CPU with emulation support, the ARM7 Local Bus for interface to on-chip memory controllers, the AMBA Advanced High-performance Bus (AHB) for interface to the interrupt controller, and the ARM Peripheral Bus (APB, a compatible superset of ARMs AMBA Advanced Peripheral Bus) for connection to on-chip peripheral functions. The LPC2141/24/6/8 configures the ARM7TDMI-S processor in little-endian byte order. AHB peripherals are allocated a 2 megabyte range of addresses at the very top of the 4 gigabyte ARM memory space. Each AHB peripheral is allocated a 16 kB address space within the AHB address space. LPC2141/2/4/6/8 peripheral functions (other than the interrupt controller) are connected to the APB bus. The AHB to APB bridge interfaces the APB bus to the AHB bus. APB peripherals are also allocated a 2 megabyte range of addresses, beginning at the 3.5 gigabyte address point. Each APB peripheral is allocated a 16 kB address space within the APB address space. The connection of on-chip peripherals to device pins is controlled by a Pin Connect Block. This must be configured by software to fit specific application requirements for the use of peripheral functions and pins. The LPC2141/2/4/6/8 is available in 32-bit reduced instruction set computer (RISC).

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Fig 4.3: Functional block diagram of Microcontroller

4.4 MAJOR FEATURES OF LPC2141/2/4/6/8


16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package. 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program memory.

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128 bit wide interface/accelerator enables high speed 60 MHz operation. In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software. Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms. Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip Real Monitor software and high speed tracing of instruction execution.

USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM. In addition, the LPC2146/8 provides 8 kB of on-chip RAM accessible to USB by DMA. One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of 6/14 analog inputs, with conversion times as low as 2.44 s per channel.

Single 10-bit D/A converter provides variable analog output. Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog. Low power real-time clock with independent power and dedicated 32 kHz clock input. Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities. Vectored interrupt controller with configurable priorities and vector addresses. Up to 45 of 5V tolerant fast general purpose I/O pins in a tiny LQFP64 package. Up to nine edge or level sensitive external interrupt pins available. 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 s. On-chip integrated oscillator operates with an external crystal in range from 1 MHz to 30 MHz and with an external oscillator up to 50 MHz. Power saving modes include idle and power-down. Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization.

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Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out Detect (BOD) or Real-Time Clock (RTC).

4.5 TYPES OF MEMORY


4.5.1 On-chip Flash Memory System The LPC2141/2/4/6/8 incorporates a 32 kB, 64 kB, 128 kB, 256 kB, and 512 kB Flash memory system, respectively. This memory may be used for both code and data storage. Programming of the Flash memory may be accomplished in several ways: over the serial built-in JTAG interface, using In System Programming (ISP) and UART0, or by means of In Application Programming (IAP) capabilities. The application program, using the IAP functions, may also erase and/or program the Flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc. When the LPC2141/2/4/6/8 on-chip boot loader is used, 32 kB, 64 kB, 128 kB, 256 kB, and 500 kB of Flash memory is available for user code. The LPC2141/2/4/6/8 flash memory provides minimum of 100,000 erase/write cycles and 20 years of data-retention. 4.5.2 On-chip Static RAM (SRAM) On-chip Static RAM (SRAM) may be used for code and/or data storage. The on-chip SRAM may be accessed as 8-bits, 16-bits, and 32-bits. The LPC2141/2/4/6/8 provides 8/16/32 kB of static RAM, respectively. The LPC2141/2/4/6/8 SRAM is designed to be accessed as a byte-addressed memory. Word and half word accesses to the memory ignore the alignment of the address and access the naturally-aligned value that is addressed (so a memory access ignores address bits 0 and 1 for word accesses, and ignores bit 0 for half word accesses). Therefore valid reads and writes require data accessed as halfwords to originate from addresses with address line 0 being 0 (addresses ending with 0, 2, 4, 6, 8, A, C, and E in hexadecimal notation) and data accessed as words to originate from addresses with address lines 0 and 1 being 0 (addresses ending with 0, 4, 8, and C in hexadecimal notation). This rule applies to both off and on-chip memory usage. The SRAM controller incorporates a write-back buffer in order to prevent CPU stalls during back-to-back writes. The write-back buffer always holds the last 15

data sent by software to the SRAM. This data is only written to the SRAM when another write is requested by software (the data is only written to the SRAM when software does another write). If a chip reset occurs, actual SRAM contents will not reflect the most recent write request (i.e. after a "warm" chip reset, the SRAM does not reflect the last write operation). Any software that checks SRAM contents after reset must take this into account. Two identical writes to a location guarantee that the data will be present after a Reset. Alternatively, a dummy write operation before entering idle or power-down mode will similarly guarantee that the last data written will be present in SRAM after a subsequent Reset.

4.6 PIN DESCRIPTION

Fig 4.4: Pin diagram of LPC2141/2/4/6/8

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4.7 MEMORY MAPS


The LPC2141/2/4/6/8 incorporates several distinct memory regions, shown in the following figures. Figure 4.5 shows the overall map of the entire address space from the user program viewpoint following reset.

Fig 4.5: Memory Mapping Both the AHB and APB peripheral areas are 2 megabyte spaces which are divided up into 128 peripherals. Each peripheral space is 16 kilobytes in size. This allows simplifying the address decoding for each peripheral. All peripheral register addresses are word aligned (to 32-bit boundaries) regardless of their size. This eliminates the need for byte lane mapping hardware that would be required to allow byte (8-bit) or half-word (16-bit) accesses to occur at smaller boundaries. An implication of this is that word and half-word registers must be accessed all at once. For example, it is not possible to read or write the upper byte of a word register separately. 17

4.8 REGISTERS
The processor has a total of 37 registers made up of 31 general 32 bit registers and 6 status registers. At any one time 16 general registers (R0 to R15) and one or two status registers are visible to the programmer. The visible registers depend on the processor mode and the other registers (the banked registers) are switched in to support IRQ, FIQ, Supervisor, Abort and undefined mode processing. The register bank organization is shown in Register Organization. The banked registers are shaded in the diagram. In all modes 16 registers, R0 to R15, are directly accessible. All registers except R15 are general purpose and may be used to hold data or address values. Register R15 holds the Program Counter (PC). When R15 is read, bits [1:0] are zero and bits [31:2] contain the PC. A seventeenth register (the CPSR - Current Program Status Register) is also accessible. It contains condition code flags and the current mode bits and may be thought of as an extension to the PC. R14 is used as the subroutine link register and receives a copy of R15 when a Branch and Link instruction is executed. It may be treated as a general purpose register at all other times. R14_svc, R14_irq, R14_fiq, R14_abt and R14_und are used similarly to hold the return values of R15 when interrupts and exceptions arise, or when Branch and Link instructions are executed within interrupt or exception routines. FIQ mode has seven banked registers mapped to R8-14 (R8_fiq-R14_fiq). Many FIQ programs will not need to save any registers. User mode, IRQ mode, Supervisor mode, Abort mode and undefined mode each have two banked registers mapped to R13 and R14. The two banked registers allow these modes to each have a private stack pointer and link register.

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General Registers and Program Counter Modes

Fig 4.6: Register Organisation

Supervisor, IRQ, Abort and Undefined mode programs which require more than these two banked registers are expected to save some or the entire caller's 19

registers (R0 to R12) on their respective stacks. They are then free to use these registers which they will restore before returning to the caller. In addition there are also five SPSRs (Saved Program Status Registers) which are loaded with the CPSR when an exception occurs. There is one SPSR for each privileged mode. The format of the Program Status Registers is shown in above Figure. The N, Z, C and V bits are the condition code flags. The condition code flags in the CPSR may be changed as a result of arithmetic and logical operations in the processor and may be tested by all instructions to determine if the instruction is to be executed. I and F bits are the interrupt disable bits. I bit disables IRQ interrupts when it is set and the F bit disables FIQ interrupts when it is set. The M0, M1, M2, M3 and M4 bits (M [4:0]) are the mode bits, and these determine the mode in which the processor operates. The control bits will change when an exception arises and in addition can be manipulated by software when the processor is in a privileged mode. Unused bits in the PSRs are reserved and their state shall be preserved when changing the flag or control bits.

4.9 POWER SUPPLY


Power supply is a supply of electrical power. A device or system that supplies electrical or other types of energy to an output load or group of loads is called a power supply unit or PSU. The term is most commonly applied to electrical energy supplies, less often to mechanical ones, and rarely to others. The power supply is designed to convert high voltage AC mains electricity to a suitable low voltage supply for electronic circuits and other devices. A power supply can be broken down into a series of blocks, each of which performs a particular function. A d.c power supply which maintains the output voltage constant irrespective of a.c mains fluctuations or load variations is known as Regulated D.C Power Supply. A power supply may include a power distribution system as well as primary or secondary sources of energy such as Conversion of one form of electrical power to another desired form and

voltage, typically involving converting AC line voltage to a well-regulated lowervoltage DC for electronic devices. Low voltage, low power DC supply units are

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commonly integrated with the devices they supply, such as computers and household electronics. Chemical fuel cells and other forms of energy storage systems.

Fig 4.7: Functional Block Diagram of Power Supply The input to the circuit is applied from the regulated power supply. The a.c. input i.e., 230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier. The output obtained from the rectifier is a pulsating d.c voltage. So in order to get a pure d.c voltage, the output voltage from the rectifier is fed to a filter to remove any a.c components present even after rectification. Now, this voltage is given to a voltage regulator to obtain a pure constant dc voltage. Transformer A transformer is an electrical device which is used to convert electrical power from one electrical circuit to another without change in frequency. Transformers convert AC electricity from one voltage to another with little loss of power. Transformers work only with AC and this is one of the reasons why mains electricity is AC. Step-up transformers increase in output voltage, step-down transformers decrease in output voltage. Most power supplies use a step-down transformer to reduce the dangerously high mains voltage to a safer low voltage. The input coil is called the primary and the output coil is called the secondary. There is no electrical connection between the two coils; instead they are linked by an alternating magnetic field created in the soft-iron core of the transformer. The two lines in the middle of the circuit symbol represent the core.

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Transformers waste very little power so the power out is (almost) equal to the power in. Note that as voltage is stepped down current is stepped up. The ratio of the number of turns on each coil, called the turns ratio, determines the ratio of the voltages. A step-down transformer has a large number of turns on its primary (input) coil which is connected to the high voltage mains supply, and a small number of turns on its secondary (output) coil to give a low output voltage.

Fig 4.8 An Electrical Transformer Usually, DC voltages are required to operate various electronic equipment and these voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c input available at the mains supply i.e., 230V is to be brought down to the required voltage level. This is done by a transformer. Thus, a step down transformer is employed to decrease the voltage to a required level. Rectifier A circuit, which is used to convert a.c to dc, is known as rectifier. The process of conversion a.c to d.c is called rectification. Types of Rectifiers Half wave Rectifier Full wave rectifier 1. Center tap full wave rectifier. 2. Bridge type full bridge rectifier.

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Table 4.1: Comparison of Rectifier Circuits Type of Rectifier Parameter Number of diodes 1 PIV of diodes Vm 2Vm Vm 2 3 Half wave Full wave Bridge

D.C output voltage

Vm/

2Vm/

2Vm/

Vdc, at no-load

0.318Vm

0.636Vm

0.636Vm

Ripple factor Ripple frequency Rectification efficiency Transformer Utilization Factor(TUF) RMS voltage Vrms

1.21

0.482

0.482

2f

2f

0.406

0.812

0.812

0.287

0.693

0.812

Vm/2

Vm/2

Vm/2

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Full-wave Rectifier From the above comparisons we came to know that full wave bridge rectifier as more advantages than the other two rectifiers. So, in our project we are using full wave bridge rectifier circuit. Rectifier The output from the transformer is fed to the rectifier. It converts A.C. into pulsating D.C. The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier is used because of its merits like good stability and full wave rectification. A bridge rectifier makes use of four diodes in a bridge arrangement to achieve full-wave rectification. This is a widely used configuration, both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally.

Fig 4.9: Bridge Rectifier During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1 and D4 are in reverse biased. The current flow direction is shown with

dotted arrows. Fig 4.10: Operation of Bridge Rectifier

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During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased while D2 and D3 are in reverse biased. The current flow direction is shown in with dotted arrows.

Fig 4.11: Operation of Negative Cycle Filter A Filter is a device, which removes the a.c component of rectifier output but allows the d.c component to reach the load. Capacitive filter is used in this project. It removes the ripples from the output of rectifier and smoothens the D.C. Output received from this filter is constant until the mains voltage and load is maintained constant. However, if either of the two is varied, D.C. voltage received at this point changes. Therefore a regulator is applied at the output stage. Capacitive Filter We have seen that the ripple content in the rectified output of half wave rectifier is 121% or that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is not acceptable for most of the applications. Ripples can be removed by one of the following methods of filtering: (a) A capacitor, in parallel to the load, provides an easier by pass for the ripples voltage though it due to low impedance. At ripple frequency and leave the d.c.to appears the load. (b) An inductor, in series with the load, prevents the passage of the ripple current (due to high impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c). (c) Various combinations of capacitor and inductor, such as L-section filter, section filter, multiple section filters etc. which make use of both the properties

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mentioned in (a) and (b) above. Two cases of capacitor filter, one applied on half wave rectifier and another with full wave rectifier. Filtering is performed by a large value electrolytic capacitor connected across the DC supply to act as a reservoir, supplying current to the output when the varying DC voltage from the rectifier is falling. The capacitor charges quickly near the peak of the varying DC, and then discharges as it supplies current to the output. Filtering significantly increases the average DC voltage to almost the peak value (1.4 RMS value). To calculate the value of capacitor(C), C = *3*f*r*Rl Where, f = supply frequency, r = ripple factor, Rl = load resistance Note: In our circuit we are using 1000microfarads. Voltage Regulator As the name itself implies, it regulates the input applied to it. A voltage regulator is an electrical regulator designed to automatically maintain a constant voltage level. In this project, power supply of 5V and 12V are required. In order to obtain these voltage levels, 7805 and 7812 voltage regulators are to be used. The first number 78 represents positive supply and the numbers 05, 12 represent the required output voltage levels. Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable output voltages. The maximum current they can pass also rates them. Negative voltage regulators are available, mainly for use in dual supplies. Most regulators include some automatic protection from excessive current ('overload protection') and overheating ('thermal protection'). Many of the fixed voltage regulators ICs have 3 leads and look like power transistors, such as the 7805 +5V 1A regulator shown on the right. IC 7805 7805 is an integrated three-terminal positive fixed linear voltage regulator. It supports an input voltage of 10 volts to 35 volts and output voltage of 5 volts. It has a 26

current rating of 1 amp although lower current models are available. Its output voltage is fixed at 5.0V. 7805 is manufactured by many companies, including National Semiconductors and Fairchild Semiconductors.

Fig 4.12: LM 7805 The 7805 will automatically reduce output current if it gets too hot.The last two digits represent the voltage; for instance, the 7812 is a 12-volt regulator. The 78xx series of regulators is designed to work in complement with the 79xx series of negative voltage regulators in systems that provide both positive and negative regulated voltages, since the 78xx series can't regulate negative voltages in such a system. The 7805 & 78 is one of the most common and well-known of the 78xx series regulators, as it's small component count and medium-power regulated 5V make it useful for powering TTL devices. Table 4.2: Specifications of IC7805
SPECIFICATIONS Vout Vein - Vout Difference Operation Ambient Temp Output Imax IC 7805 5V 5V - 20V 0 - 125C 1A

The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, 27

connect the negative lead to the Common pin and then when you turn on the power, you get a 5 volt supply from the output pin.

Fig 4.13: A Three Terminal Voltage Regulator 78XX The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The LM78XX offer several fixed output voltages making them useful in wide range of applications. When used as a zener diode/resistor combination replacement, the LM78XX usually results in an effective output impedance improvement of two orders of magnitude, lower quiescent current. The LM78XX is available in the TO-252, TO-220 & TO-263packages, Features Output Current of 1.5A Output Voltage Tolerance of 5% Internal thermal overload protection Internal Short-Circuit Limited No External Component Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V Offer in plastic TO-252, TO-220 & TO-263

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4.10 CRYSTAL OSCILLATOR


A crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical signal with a very precise frequency.

Fig 4.14: Crystal Oscillator

This frequency is commonly used to keep track of time (as in quartz wristwatches), to provide a stable clock signal for digital integrated circuits, and to stabilize frequencies for radio transmitters and receivers. The most common type of piezoelectric resonator used is the quartz crystal, so oscillator circuits incorporating them became known as crystal oscillators, but other piezoelectric materials including polycrystalline ceramics are used in similar circuits. Quartz crystals are manufactured for frequencies from a few tens of kilohertz to tens of megahertz. More than two billion crystals are manufactured annually. Most are used for consumer devices such as wristwatches, clocks, radios, computers, and cell phones. Quartz crystals are also found inside test and measurement equipment, such as counters, signal generators, and oscilloscopes.

4.11 KEYBOARD
In computing, a keyboard is like a typewriter-style device, which uses an arrangement of buttons or keys, to act as mechanical levers or electronic switches. Following the decline of punch cards and paper tape, interaction via tele printer-style keyboards became the main input device for computers. A keyboard typically has characters engraved or printed on the keys and each press of a key typically corresponds to a single written symbol. However, to produce some symbols requires pressing and holding several keys simultaneously or in 29

sequence. While most keyboard keys produce letters, numbers or signs (characters), other keys or simultaneous key presses can produce actions or computer commands.

Fig 4.15: Keyboard Despite the development of alternative input devices, such as the mouse, touch screen, pen devices, character recognition and voice recognition, the keyboard remains the most commonly used and most versatile device used for direct (human) input into computers. In normal usage, the keyboard is used to type text and numbers into a word processor, text editor or other programs. In a modern computer, the interpretation of key presses is generally left to the software. A computer keyboard distinguishes each physical key from every other and reports all key presses to the controlling software. Keyboards are also used for computer gaming, either with regular keyboards or by using keyboards with special gaming features, which can expedite frequently used keystroke combinations. Keyboards are the only way to enter commands on a command-line interface. Keyboard Types One factor determining the size of a keyboard is the presence of duplicate keys, such as a separate numeric keyboard, for convenience. Further the keyboard size depends on the extent to which a system is used where a single action is produced by a combination of subsequent or simultaneous keystrokes, or multiple pressing of a single key. A keyboard with few keys is called a keypad.

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Another factor determining the size of a keyboard is the size and spacing of the keys. Reduction is limited by the practical consideration that the keys must be large enough to be easily pressed by fingers. Alternatively a tool is used for pressing small keys.

4.12 LCD DISPLAY


A liquid crystal display (LCD) is a flat panel display, electronic visual display, or video display that uses the light modulating properties of liquid crystals. Liquid crystals do not emit light directly.LCD screens are based on the principle of blocking light (rather than emitting it), they use up much less power than standard CRT. LCDs are available to display arbitrary images (as in a general-purpose computer display) or fixed images which can be displayed or hidden, such as preset words, digits, and 7-segment displays as in a digital clock. They use the same basic technology, except that arbitrary images are made up of a large number of small pixels, while other displays have larger elements.

Fig 4.16: LCD display One of the most common devices attached to a micro controller is an LCD display. Some of the most common LCDs connected to the many microcontrollers are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively. Types of LCD Displays Liquid crystal display (LCD) technology has become prevalent in televisions and computer monitors. It operates through electronic manipulation of segments of liquid crystals arranged into rows and columns. The level of sophistication of the arrangement of these liquid crystals as well as their size determines the level of detail and contrast the LCD can offer. There are three main types of LCDs that have been 31

used for separate purposes, including watches, handheld games and televisions. Segment LCD Segment LCDs are a style of LCD that can display a limited number of predetermined characters. These characters are typically numbers and letters. The segments referred to in the name are usually oblong solid shapes used in patterns to form the necessary characters. This is the style of LCD used in a typical digital watch or digital alarm clock.

Fig 4.17: Segment LCD Dot Matrix LCD A dot matrix LCD offers more versatility than the segment LCD. A dot matrix LCD can display more characters than a segment LCD, because it uses a block of 5x7 dots to create the characters or to form a picture. The dot matrix LCD appears in handheld electronic games, like the original Nintendo Game Boy, Tiger's handheld versions of "Pac Man," or the Parker Brothers handheld version of "Sorry."

Fig 4.18: Dot Matrix LCD

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Graphic LCD A graphic LCD is much more complicated than the other two types of LCDs. It consists of potentially thousands of pixels that can form full-color graphics and images. This type of LCD is prevalent in televisions, laptop displays, computer monitors and digital camera displays.

Fig 4.19: Graphic LCD

4.13 APPLICATIONS OF LCD


Medical equipment Electronic test equipment Industrial machinery Interface Serial terminal Advertising system Restaurant ordering systems Security systems Simulators Environmental monitoring Lab development Student projects Home automation PC external display

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4.14 PIN LAYOUT

Fig 4.20: Power to LCD The table below shows the pin description of LCD display. Table 4.3: LCD Pin Description

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4.15 LCD INITIALIZATION


Once the power supply is turned on, LCD is automatically cleared. This process lasts for approximately 15ms. After that, display is ready to operate. The mode of operating is set by default. This means that: 1. Display is cleared 2. Mode DL = 1 Communication through 8-bit interface N = 0 Messages are displayed in one line F = 0 Character font 5 x 8 dots 3. Display/Cursor on/off D = 0 Display off U = 0 Cursor off B = 0 Cursor blink off 4. Character entry ID = 1 Addresses on display are automatically incremented by 1. S = 0 Display shift off

4.16 PS/2 CONNECTOR


The PS/2 connector is a 6-pin Mini-DIN connector used for connecting some keyboards and mice to a PC compatible computer system. Its name comes from the IBM Personal System/2 series of personal computers, with which it was introduced in 1987. The PS/2 mouse connector generally replaced the older DE-9 RS232 "serial mouse" connector, while the PS/2 keyboard connector replaced the larger 5-pin/180 DIN connector used in the IBM PC/AT design. The PS/2 designs on keyboard and mouse interfaces are electrically similar and employ the same communication protocol.

Fig 4.21: PS/2 Cable

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The figure shows the pins of PS/2 cable.

Fig 4.22: Pins of PS/2 Cable Data Mouse data packets or keyboard scan codes are sent from the mouse or keyboard to the computer on this single wire serially. Clock This signal is sent from the mouse or keyboard to synchronize the data signal. +5 Vdc This is a simple 5 volts signal for giving power to the mouse or keyboard. Ground This is a common ground signal used as a return path for data and is a reference to logical 0.

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ZIGBEE
5.1 ZIGBEE MODULE
Now a day's every system is automated in order to face new challenges. In the present days Automated systems have less manual operations, flexibility, reliability and accurate. Due to this demand every field prefers automated control systems. Especially in the field of electronics automated systems are giving good performance. And this is realized by making use of ZigBee technology for communication. ZigBee is new wireless technology guided by IEEE 802.15.4 Personal Area Network standard. It is primarily designed for the wide ranging controlling applications and to replace the existing non-standard technologies. It currently operates in 868MHz band at a data rate of 20Kbps in Europe, 914MHz band at 40kbps in USA, and the 2.4GHz ISM bands Worldwide at a maximum data-rate of 250kbps.

Fig 5.1: ZigBee module ZigBee is a low data rate, two-way standard for home automation and data networks. The standard specification for up to 254 nodes including one master, managed from a single remote control. Real usage examples of ZigBee includes home automation tasks such as turning lights on, setting the home security system, or starting the VCR. With ZigBee all these tasks can be done from anywhere in the home at the touch of a button. ZigBee also allows for dial-in access via the Internet for automation control. ZigBee protocol is optimized for very long battery life measured in months to years from inexpensive, off-the-shelf non-rechargeable batteries, and can control lighting, air conditioning and heating, smoke and fire alarms, and other security

37

devices. The standard supports 2.4 GHz (worldwide), 868 MHz (Europe) and 915 MHz (Americas) unlicensed radio bands with range up to 100 meters. One of the main advantages of this ZigBee communication is that it provides a noise free communication, the amount of noise added in this type of communication is very less compared to the other wireless communications.

5.2 PIN DIAGRAM

Fig 5.2: Pin diagram of X-Bee Transceiver

ZigBee modules feature a UART interface, which allows any microcontroller or microprocessor to immediately use the services of the ZigBee protocol. All a ZigBee hardware designer has to do in this is to ensure that the hosts serial port logic levels are compatible with the X-Bees 2.8 to 3.4-V logic levels. The logic level conversion can be performed using either a standard RS-232 IC or logic level translators such as the 74LVTH125 when the host is directly connected to the X-Bee UART. The table below gives the pin description of transceiver.

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Table 5.1: Pin Description of X-Bee Transceiver


Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name Vcc DOUT DIN/CONFIG DO8 RESET PWM0/RSSI PWM1 [reserved] DDR/SLEEP_RQ/DI8 GND AD4/DIO4 CTS/DIO7 ON/SLEEP VREF Associate/AD5/DIO5 RTS/AD6/DIO6 AD3/DIO3 AD2/DIO2 AD1/DIO1 AD0/DIO0 Direction Output Input Output Input Output Output Input Either Either Output Input Either Either Either Either Either Either Description Power Supply UART Data Out UART Data In Digital Output 8 Module Reset PWM Output 0/RX Signal Strength Indicator PWM Output 1 Do not connect Pin Sleep Control Line or Digital Input 8 Ground Analog Input 4 or Digital I/O 4 Clear-to-Send Flow Control or Digital I/O 7 Module Status Indicator Voltage Reference for A/D Inputs Associated Indicator, Analog Input 5 or Digital I/O 5 Request-to-Send Flow Control, Analog Input 6 or Digital I/O 6 Analog Input 3 or Digital I/O 3 Analog Input 2 or Digital I/O 2 Analog Input 1 or Digital I/O 1 Analog Input 0 or Digital I/O 0

Design Notes

Minimum connections: VCC, GND, DOUT & DIN


Minimum connections for updating firmware: VCC, GND, DIN, DOUT, RTS and DTR Signal Direction is specified with respect to the module Module includes a 50k pull-up resistor attached to RESET Several of the input pull-ups can be configured using the PR command Unused pins should be left disconnected

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5.3 FEATURES
Table 5.2: Performance Characteristics

Parameters
Indoor/Urban Range Outdoor RF (LOS) Transmit Power Output RF Data Rate Serial Interface Data Rate Receiver Sensitivity

Value
30m 100m 1mW (0dBm) 250,000bps 1200-115200bps -92dBm

Power Requirements Table 5.3: Power Requirement Characteristics

Parameters
Supply Voltage Transmit Current Receive Current

Value
2.8 - 3.4V 45mA 50mA

General Characteristics Table 5.4: General Characteristics

Parameters
Operating Frequency Dimensions Operating Temperature Antenna Options

Value
ISM 2.4GHz 2.468 x 2.761 -40o to 85o C Integrated Chip Antenna

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Networking and Security Table 5.5: Networking and Security Characteristics

Parameters
Supported Network Topologies Number of Channels Addressing Options

Value
Point-to-point, Point-to-multipoint, Peer-to-peer 16 Direct Sequence Channels PAN ID, Channel and Addresses

5.4 SYSTEM DATA FLOW DIAGRAM

Fig 5.3: Data Flow Diagram The X-Bee RF Modules interface to a host device through a logic-level asynchronous serial port. Through its serial port, the module can communicate with any logic and voltage compatible UART; or through a level translator to any serial device. Data is presented to the X-Bee module through its DIN pin, and it must be in the asynchronous serial format, which consists of a start bit, 8 data bits, and a stop bit. Because the input data goes directly into the input of a UART within the X-Bee module, no bit inversions are necessary within the asynchronous serial datastream. All of the required timing and parity checking is automatically taken care of by the XBees UART. Just in case you are producing data faster than the X-Bee can process and transmit it, both X-Bee modules incorporate a clear-to-send (CTS) function to throttle the data being presented to the X-Bee modules DIN pin. You can eliminate the need for the CTS signal by sending small data packets at slower data rates. 41

If the microcontroller wants to send data to transceiver, it will send RTS (Request to Send) signal. If the transceiver is idle it sends CTS (Clear to Send) signal. The RTS and CTS signals are active low. When microcontroller receives CTS command it will send data to the transceiver through DIN pin. The transceiver will send the data to microcontroller through DOUT pin. The communication between transceiver and the microcontroller at the transmitter and receiver is similar. The communication between transmitter and receiver is through RF communication.
Internal Data Flow

Fig 5.4: Internal Data Flow Diagram


DI (Data In) Buffer

When serial data enters the RF module through the DI pin (pin 3), the data is stored in the DI Buffer until it can be processed.
Hardware Flow Control (CTS)

When the DI buffer is 17 bytes away from being full; by default, the module de-asserts CTS (high) to signal to the host device to stop sending data [refer to D7 (DIO7 Configuration) parameter]. CTS are re-asserted after the DI Buffer has 34 bytes of memory available.
How to eliminate the need for flow control

Send messages that are smaller than the DI buffer size. Interface at a lower baud rate [BD (Interface Data Rate) parameter] than the throughput data rate. 42

Case in which the DI Buffer may become full and possibly overflow

If the module is receiving a continuous stream of RF data, any serial data that arrives on the DI pin is placed in the DI Buffer. The data in the DI buffer will be transmitted over-the-air when the module is no longer receiving RF data in the network.
DO (Data Out) Buffer:

When RF data is received, the data enters the DO buffer and is sent out the serial port to a host device. Once the DO Buffer reaches capacity, any additional incoming RF data is lost.
Hardware Flow Control (RTS)

If RTS is enabled for flow control (D6 (DIO6 Configuration) Parameter = 1), data will not be sent out the DO Buffer as long as RTS (pin 16) is de-asserted.
Two cases in which the DO Buffer may become full and possibly overflow

If the RF data rate is set higher than the interface data rate of the module, the module will receive data from the transmitting module faster than it can send the data to the host. If the host does not allow the module to transmit data out from the DO buffer because of being held off by hardware or software flow control.

5.5 I/O DATA FORMAT


I/O data begins with a header. The first byte of the header defines the number of samples forthcoming. A sample is comprised of input data and the inputs can contain either DIO or ADC. The last 2 bytes of the header (Channel Indicator) define which inputs are active. Each bit represents either a DIO line or ADC channel.

Fig 5.5: Header of I/O Data Format 43

Sample Data

Sample data follows the header and the channel indicator frame is used to determine how to read the sample data. If any of the DIO lines are enabled, the first 2 bytes are the DIO data and the ADC data follows. ADC channel data is stored as an unsigned 10-bit value right-justified on a 16-bit boundary.

Fig 5.6: Sample Data of I/O Data Format

5.6 ZIGBEE ARCHITECTURE


The IEEE 802.15.4 standard and ZigBee wireless network technology are ideal for the implementation of a wide range of low cost, low power and reliable control and monitoring applications within the private home and industrial environment. The working model of the IEEE 802.15.4 and ZigBee is illustrated in Figure 5.17.

Fig 5.7: ZigBee Architecture 44

In the ZigBee architecture, the PHY layer and MAC layer are based on the IEEE 802.15.4 WPAN standard. ZigBee defines the NWK and APS layers. The software and hardware vendor will provide the software stack with appropriate tools to allow an OEM to create applications, which are added to the APL. The Physical (PHY) layer and Medium Access Control (MAC) layer are based on the IEEE802.15.4 PAN standard. This includes the actual radio hardware. Above the MAC and PHY are the Network (NWK) and application layers defined by ZigBee. The first two layers, the physical (PHY) and Medium Access Control (MAC) are defined in the IEEE standard. The other layers that build on the PHY and MAC layers are defined by the ZigBee alliance. The PHY layer contains the RF transceiver and access to the other hardware and control mechanisms. The function of the PHY is to activate and deactivate the radio transceiver and other hardware specific services such as access to the channels. The MAC layer is as described by the name a controlling device for radio medium. It controls access to the physical radio channel and other services defined by the PHY service. It is also responsible for a reliable transmission system through its services. The services are about channel access and transmission techniques and validation of data packets. The network (NWK) layer is responsible for the network controlling functions. It controls the mechanism for joining and leaving a network and for creating a network for those devices which have the capability to do so. The NWK layer applies also security to what is going to be data packets. The NWK layer is responsible for discovery and storing information about the neighbors in the network. Responsibility for routing between devices and routing of packets to their destination goes to this layer. The application layer (APL) consists of three different blocks which have different functionalities and responsibilities. The application support sub-layer (APS) is responsible for maintaining a table of devices that are connected to each other, a binding table. The APS layer provides an interface between the NWK layer and the APL with its set of services. The ZigBee device object (ZDO) is responsible for managing ZigBee devices in the network. This could be discovering new device in the network and define its role in the network it also determines the services the new device provides. Possible device types are those defined in ZigBee standard and they are coordinators, routers 45

and end devices. The Application Frame (AF) contains application objects which can be manufacturer defined application objects. An example of an application object is a power switch. The security service provider (SSP) provides enhanced security options as encryption with 128-bit key transport.
Physical Layer

The physical layer is responsible for the radio hardware device.The standardd efines twohardwarePlatforms for the IEEE 802.15.4. One describes the 2.4 GHz spec trum andonethe 868/915 MHz spectrum.The lower band use different modulations te chnique and lowerdata rate. Explanations for the different bands are given in the regu lations section. The lower band provides better radio performance when reviewing

the frequency band and the antenna performance specifications in the rest of the report apply only for the 2.4GHz band. Table 5.6: Operating Frequency Bands of ZigBee
PHY (MHz) Frequency Band (MHz) Chip rate (k chips/s) (kb/s) 865/ 915 902-928 600 BPSK 40 40 Binary 1-10 868-868.6 300 BPSK 20 Modulation Bit rate Symbol rate (k symbol/s) 20 Binary 0 Symbols Channel Spreading parameters Data parameters

2400

24002483.5

2000

O-QPSK

250

62.5

16-ary Orthogon al

11-26

Responsibility

The layer is responsible for the hardware and can be divided into the following tasks Activation and deactivation of radio transceiver. Data transmission and reception. Channel frequency selection. Indicator for radio quality within channels and for packets. 46

Layer service The PHY data service is responsible of transport of MPDU between MAC peer sub-layers through the PD-SAP. This is done by data primitives such as PDDATA request. The PLME is responsible for managing a database of managed objects by the PHY. It is referred to as PHY information base (PIB). The PLME-SAP is responsible for management commands between the MAC layer management entity (MLME) and the PLME. The primitives that are provided are defined for the PLME. They provide for example performing CCA, Energy Detection (ED) measurements or accessing the PIB data base. PHY enumeration descriptions, constants and PIB attributes are defined in a table in the standard. The maximum PSDU that the PHY shall be able to receive from the MAC layer is 127 octets as described in the introduction. Turnaround times for TX-to-RX and RX-to-TX shall be a maximum of 12 data symbol periods. Each symbol is 4 bits which gives a maximum turnaround time of 6 octet periods. The spreading of the data decreases the raw data transfer but leads to a much higher reliability in the transmission. Errors in the baseband chip sequence do not mean errors in the raw data. The probability to recognize the correct symbol even if bit errors have occurred is high. The O-QPSK modulation used is equivalent to MSK modulation. It utilizes constant amplitude and enables use of relatively nonlinear amplifier designs which means more simple and low cost construction. Mac Layer The MAC layer is responsible for accessing the physical radio channel through the PHY layer. It provides services to enable reliable single hop communication links between devices in a network. The services are about channel access and transmission techniques and validation of data packets. Layer Service The services provided by the MAC layer can be divided into these sub groups: Providing a single-hop peer link between MAC entities. Supporting PAN association and dissociation. Using CSMA-CA mechanism for channel access. Handling and maintaining of GTS mechanism. 47

Generate network beacons if device is coordinator. Synchronization to network beacons. Supporting device security. Layer Structure The structure communication model is similar to the PHY layer. The MAC layer includes a management entity (MLME) which provides interface to management entities on other devices. The MLME is also responsible of maintaining a data base of management objects. The MAC sub-layer provides two services accessed through the data entity and management. The services are provided for the PHY layer and next higher layer. Data services provided by the MAC layer are those for requesting and confirming data for example. Management services in the MAC layer is among others association primitives, beacon primitives and channel scanning primitives. CSMA-CA The CSMA-CA algorithm implements time units called back off periods. In slotted CSMA-CA the back off periods of every device in the network are aligned with the super frame boundaries of the coordinator. In the unslotted CSMA-CA the back off periods of devices in the network are not related in time to any other device 9in the PAN. The IEEE 802.15.4 MAC sub layer controls the access to the radio channel using the CSMA-CA (Carrier Sense Multiple Access with Collision Avoidance) method, and handles network (dis)association and MAC layer security (AES-128 encryption based). It is also responsible for flow control via acknowledgement and retransmission of data packets, frame validation, and network synchronization as well as support to upper layers for robust link operation. The ZigBee wireless technology specifies the network, security, and application layers upon the IEEE 802.15.4 PHY and MAC layers. The ZigBee Alliance also provides interoperability and conformance testing specifications. Channel Access There are two types of channel access in the IEEE 802.15.4 defined communication system. They are based on contention which decides if the devices retain their own time slot for communication. The contention based allows the devices 48

to access channel in the distributed way using CSMA-CA algorithm. With this contention free method the network coordinator decides about the channel access with the use of Guaranteed Time Slots (GTS) of the channel space. This contention free method is suitable for latency sensitive devices that require short delay time and no competition of the channel access. Transmission Transmission, reception and acknowledgements are procedures for sending data, receiving data and for acknowledging that data has been received or sent. Retransmission of data if error occurs if bounded to acknowledgments procedures that are optional. Security The MAC layer is responsible for providing security services when requested by higher layers. The higher layers are responsible for information necessary to provide needed security services. Key management, device authentication and freshness protection may be services provided by higher layers but out of the scope for this standard. The IEEE 802.15.4 supports the following security services: Access control Data encryption Frame integrity Sequential freshness The security can be implemented on both incoming and outgoing frames. Access control provides and maintains an Access Control List (ACL). The list contains devices that have been selected and approved for communicating with. Data encryption security service uses a symmetric cipher to encrypt data for parties who do not have the cryptographic key. In this standard the data encryption may be provided on beacon payloads, command payloads and data payloads. Frame integrity service provides assurance that data have not been modified by parties without the cryptographic key and also that data originates from sources with the key. The service may be provided on beacon frames, command frames and data frames. Sequential

49

freshness uses a sequence to protect from frames that are not the original in some manner. Network Layer The NWK layer is the first ZigBee layer. It is build upon the MAC and PHY layers. The NWK layer provides services for routing and multi-hop communication needed to build different network topologies it is required for correct functionality for underlying layers. It acts as a interface for next higher layer, the application layer. It includes a NWK layer management entity (NLME). The NLME and the NWK layer data entity (NLDE) uses the NLME-SAP and the NLDE-SAP for communicating to other layers. The NLDE provides two kinds of services Generate NWK Protocol Data Unit (NPDU) from next higher layer, APS layer. Deliver NPDU to recipient or route it to the next step towards the destination. The NLME provides the following services: Configuring a new device Starting a network Joining and leaving a network Addressing Neighbour discovery Route discovery Reception control Attributes A list of constants is characterizing the NWK layer. A list of attributes is also given and it is used to manage the NWK layer of a device. An attribute is a data entity that represents a physical quantity or a state. The attribute data is sent using commands. Building Network The procedures for building networks are build on those defined in the MAC layer. Only coordinators are able to build a network. After that is guaranteed an ED 50

scan is performed followed by an active scan. When data is processed a PAN identifier is selected, channel selection are made and a network address is assigned. Joining Network Coordinators and routers can permit devices to join the network. The relationship between the device that provides permission and the device that wants to join the network is called a parent-child relationship. A parent can directly accept a child and join it to the network with the 64 bit IEEE address. The child retains then a short logical address. When a device wants to join a network first a scan procedure is performed. A suitable parent is searched for from the neighbour table. Joining the network is then done by an association request. If joining was successful the new device receives a 16 bit short address for communication within the network. The devices are then updating the information in their neighbour tables. Orphaning is the procedure that is performed when a child loose connection to its network or to its parent. The leaving of a network can be done either by request from the child or as a request from the parent to force the child device to leave the network. Every device has an associated depth. It tells the minimum hops a data frame has to perform through parent links to reach the coordinator. The coordinator itself has 0 depth and its children have 1 depth. The maximum depth of the network is decided by the coordinator. Neighbour tables shall contain information about devices within a specified transmission range. The information shall be used for different purpose and contains basic device and network information. It can also be increased with more information. A table entry shall be updated each time a device receives a frame from the neighbour. The addressing of joined devices can be assigned in two ways. Either as distributed address assignment mechanism or as higher-layer address assignment mechanism. Application Layer The application layer is the second of two ZigBee layers. The application layer houses the responsibility for overall device management. It is also responsible for applications and service function within the application layer and to the NWK layer. The application layer consists of the APS, AF and ZDO. 51

There are two addressing concepts for ZigBee devices. It consists of addressing the specific radio hardware or the application object. They are called node addressing respective endpoint addressing. A node refers to a single radio device. A node could consist of several subunits where each subunit has a device description. Each subunit is assigned its own specific endpoint which range from 1 to 240. Each endpoint has a description that describes for example what it does and which attributes it has. Attributes are variables that represent physical quantity or states. In a typical application an attribute could be temperature and endpoints could be sensor applications for temperature and humidity. A cluster is identifier of messages that are sent and are also container for attributes. A ZigBee device would then represent a node that could be an indoors climate report station and another ZigBee device node a controller and communication central for a climate control centre. Application Support Sub-Layer (APS) The APS provides interface between the NWK layer and application layer. The services are offered via the two services, APS Data Entity (APSDE) and APS Management Entity (APSME). The APSDE provides data transmission through its APSDE-SAP and the management entity provides all other services through APSMESAP. The APSDE provides these services Generation of APDU-APS layer specific frame are generated Binding-Transmission between matched devices The APSME provides these services: Interaction with ZigBee Stack Binding-Ability to match devices Security-Security relationships with use of keys Transmission If an indirect transmission is sent the originating device shall direct the transmission to the ZigBee coordinator which handles message reflection. The ZigBee coordinator contains the binding table and shall search for table entry that matches the source address, the cluster identifier or the source endpoint field. The transmission 52

shall be directed to each of these matched entries. The source address is retained from the NWK layer, the cluster identifier and the source endpoint is included in the frame. The indirect transmission shall include the source endpoint or destination endpoint field depending on direction with respect to the coordinator. If the transmission is towards the coordinator for relay it shall contain destination endpoint. If it is directed from coordinator after relay it shall contain the source endpoint. Acknowledgement is optional and in indirect addressing the coordinator shall answer acknowledgement request from originating devices and requesting acknowledgement from devices that frames are relayed to. Retransmissions are bound to acknowledgement. When acknowledge is enabled retransmission shall be performed if error occurs. Application Framework (AF) The application frame work is containing the application objects and provides services that the application uses. The applications communicate through the APSDESAP. The control and management of application frame is performed by ZDO public interfaces. The primitives is as for the APS sub-layer request, confirm and indication. Endpoints The application framework can house up to 240 application objects. Each one is defined on an endpoint with index from 1 to 240, see figure 2.13. Endpoint 0 is reserved and is used for interface to the ZDO and endpoint 255 is reserved for broadcasting of data to all application objects.

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INTERNAL SCHEMATIC
In this chapter, schematic diagram and interfacing of LPC2148 microcontroller with each module is considered.

Fig 6.1: Schematic of Messenger Development without Internet Using ZigBee The above schematic Messenger development without internet using ZigBee explains the interfacing section of each component with LPC2148 microcontroller and 54

LCD module, ZigBee, ps/2 connector to develop a chatting system so that one can communicate wirelessly without using internet using ZigBee. Regulated power supply is also connected to micro controller. The detailed explanation of each module interfacing with microcontroller is as follows:

6.1 INTERFACING LCD WITH LPC2148 MICROCONTROLLER

Fig 6.2: Interfacing of LCD with LPC2148 Microcontroller

All the pins of LCD display are connected to the port 1.16 to port 1.23 of the ARM microcontroller. LCD is a 14 bit display which comprises of 8 data bits, 3 control lines (EN, R/W, Rs) and ground. This device is used to display the information on screen.

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6.2 INTERFACING ZIGBEE WITH LPC2148 ARM MICROCONTROLLER


Fig 6.3 explains the connection of ZIGBEE with microcontroller. ZigBee is a low data rate, two-way standard for home automation and data networks. Here we will be connecting port 0.0, port 0.1 pins of LPC2148 microcontroller to the transmitter and receiver pins of ZigBee.

Fig 6.3: Interfacing ZigBee with LPC2148 Microcontroller

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6.3 INTERFACING PS/2 CONNECTOR WITH LPC2148 MICROCONTROLLER


The PS/2 connector is a 6-pin Mini-DIN connector used for connecting keyboards and mice to a PC compatible computer system. Here we will be interfacing clock and data pins of ZigBee to the LPC2148 ARM microcontroller.

Fig 6.4: Interfacing PS/2 Connector with LPC2148

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SOFTWARE DESCRIPTION
7.1 INTRODUCTION TO EMBEDDED C Data Types
We have already come across the word Data types in C- Language. Here also the functionality and the meaning of the word are same except a small change in the prefix of their labels. Now we will discuss some of the widely used data types for embedded C- programming.

Table 7.1: Data Types

Data Types unsigned char signed char unsigned int signed int sbit Bit Sfr

Size in Bits 8-bit 8-bit 16-bit 16-bit 1-bit 1-bit 8-bit

Data Range/Usage 0-255 -128 to +127 0 to 65535 -32,768 to +32,767 SFR bit addressable only RAM bit addressable only RAMaddresses80-FFH only

Unsigned Char
The unsigned char is an 8-bit data type that takes a value in the range of 0255(00-FFH). It is used in many situations, such as setting a counter value, where there is no need for signed data we should use the unsigned char instead of the signed char. Remember that C compilers use the signed char as the default if we do not put the key word. 58

Signed Char
The signed char is an 8-bit data type that uses the most significant bit (D7 of D7-D0) to represent the or + values. As a result, we have only 7 bits for the magnitude of the signed number, giving us values from -128 to +127. In situations where + and are needed to represent a given quantity such as temperature, the use of the signed char data type is a must.

Unsigned Int
The unsigned int is a 16-bit data type that takes a value in the range of 0 to 65535 (0000-FFFFH). It is also used to set counter values of more than 256. We must use the int data type unless we have to. Since registers and memory are in 8-bit chunks, the misuse of int variables will result in a larger hex file. To overcome this we can use the unsigned char in place of unsigned int.

Signed Int
Signed int is a 16-bit data type that uses the most significant bit (D15 of D15D0) to represent the or + value. As a result we have only 15 bits for the magnitude of the number or values from -32,768 to +32,767.

S-bit (single bit)


The S-bit data type is widely used and designed specifically to access single bit addressable registers. It allows access to the single bits of the SFR registers.

7.2 I/O PROGRAMMING IN EMBEDDED C


In this topic we look at C- programming of the I/O ports and also both byte and bit I/O programming.

Byte Size I/O


As we know that ports P0-P3 are byte accessible, we use the P0-P3 labels as defined in the header file.

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Bit Addressable I/O Programming


The I/O ports of P0-P3 are bit- addressable, so we can access a single bit without disturbing the rest of the port. We use the sbit data type to access a single bit of P0-P3.the format is Px^y where x is the port and y is the bit.

Accessing SFR addresses 80-FFH


Another way to access the SFR RAM space 80-FFH is to use the sfr data type. This is shown in the below example .Both the bit and byte addresses for the P0-P3 ports are given in the table. Notice in the given example that there is no #include<reg51.h> statement which allows us to access any byte of the SFR RAM space 80-FFH.

7.3 SOFTWARE DESCRIPTION


Softwares used is Keil Vision3 for C programming.

What's New in Vision3?


Vision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in parallel with Vision2.

What is Vision3?
Vision3 is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components: A project manager. A make facility. Tool configuration. Editor. A powerful debugger.

To help you get started, several example programs (located in the C51\Examples\C251\Examples\C166\Examples, provided. 60 and \ARM\...\Examples) are

HELLO is a simple program that prints the string "Hello World" using the Serial Interface.

Building an Application in Vision2


To build (compile, assemble, and link) an application in Vision2, you must: 1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2). 2. Select Project - Rebuild all target files or Build target. Vision2 compiles, assembles, and links the files in your project.

Creating Your Own Application in Vision2


To create a new project in Vision2, you must: 1. Select Project - New Project. 2. Select a directory and enter the name of the project file. 3. Select Project - Select Device and select an 8051, 251, or C16x/ST10 device from the Device Database 4. Create source files to add to the project. 5. Select Project - Targets, Groups, and Files. Add/Files, select Source Group1, and add the source files to the project. 6. Select Project - Options and set the tool options. Note when you select the target device from the Device Database all special options are set automatically. You typically only need to configure the memory map of your target hardware. Default memory model settings are optimal for most applications. 7. Select Project - Rebuild all target files or Build target.

Debugging an Application in Vision2


To debug an application created using Vision2, you must: 1. Select Debug - Start/Stop Debug Session. 2. Use the Step toolbar buttons to single-step through your program. You may enter G, main in the Output Window to execute to the main C function. 3. Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and so on.

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Starting Vision2 and creating a Project


Vision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the Vision2 menu Project New Project: This opens a standard Windows dialog that asks you for the new project file name. We suggest that you use a separate folder for each project. You can simply use the icon Create New Folder in this dialog to get a new empty folder. Then select this folder and enter the file name for the new project, i.e. Project1. Vision2 creates a new project file with the name PROJECT1.UV2 which contains a default target and file group name. You can see these names in the Project. Window Files Now use from the menu Project then Select Device for Target and select a CPU for your project. The Select Device dialog box shows the Vision2 device database. Just select the micro controller you use. We are using for our examples the Philips 80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device and simplifies in this way the tool Configuration.

Building Projects and Creating HEX Files


Typical, the tool settings under Options then Target are all you need to start a new application. You may translate all source files and line the application with a click on the Build Target toolbar icon. When you build an application with syntax errors, Vision2 will display errors and warning messages in the Output Window Build page. A double click on a message line opens the source file on the correct location in a Vision2 editor window. Once you have successfully generated your application you can start debugging. After you have tested your application, it is required to create an Intel HEX file to download the software into an EPROM programmer or simulator. Vision2 creates HEX files with each build process when Create HEX files under Options for Target Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1.

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CPU Simulation
Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for read, write, or code execution access. The Vision2 simulator traps and reports illegal memory accesses. In addition to memory mapping, the simulator also provides support for the integrated peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you have selected are configured from the Device.

Database Selection
You have made when you create your project target. Refer to page 58 for more Information about selecting a device. You may select and display the on-chip peripheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes.

Start Debugging
You start the debug mode of Vision2 with the Debug Start/Stop Debug Session command. Depending on the Options for Target Debug Configuration, Vision2 will load the application program and run the startup code Vision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, Vision2 opens an editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debugging, most editor features are still available. For example, you can use the find command or correct program errors. Program source text of your application is shown in the same windows. The Vision2 debug mode differs from the edit mode in the following aspects: The Debug Menu and Debug Commands described on page 28 are Available. The additional debug windows are discussed in the following. The project structure or tool parameters cannot be modified. All build Commands are disabled.

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Disassembly Window
The Disassembly window shows your target program as mixed source and assembly program or just assembly code. A trace history of previously executed instructions may be displayed with Debug then View Trace Records. To enable the trace history, set Debug then Enable/Disable Trace Recording. If you select the Disassembly Window as the active window all program step commands work on CPU instruction level rather than program source lines. You can select a text line and set or modify code breakpoints using toolbar buttons or the context menu commands. You may use the dialog Debug, Inline Assembly to modify the CPU instructions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.

Steps for Executing the Keil Programs 1. 2.


Click on the Keil uVision Icon on Desktop. The following figure will appear.

Fig 7.1: Keil uVision Window

3. 4.

Click on the Project menu from the title bar. Then click on New Project.

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Fig 7.2: Picture of Selecting New Project

5.

Save the Project by typing suitable project name with no extension in your own folder sited in either C:\ or D:\.

Fig 7.3: Picture of Creating a New Project

6. 7. 8.

Then click on save button above. Select the component for your project. i.e. Atmel. Click on the + Symbol beside of Atmel. 65

Fig 7.4: Picture of Selecting Device Target

9.

Select AT89C51 as shown below.

Fig 7.5: Picture of Selecting AT89C51 Device

10. 11.

Then click on OK. The Following figure will appear.

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Fig 7.6: Picture of Creating Source Group

12. 13. 14.

Then click either YES or NO, mostly NO. Now your project is ready to use. Now double click on the Target1, you would get another option Source group 1 as shown in next page.

Fig 7.7: Picture of New Source Group

15.

Click on the file option from menu bar and select new.

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Fig 7.8: Picture of Opening a New Project

16.

The next screen will be as shown in next page, and just maximize it by double clicking on its blue boarder.

Fig 7.9: Picture of New Project Window

17. 18.

Now start writing program in either in C or ASM. For a program written in Assembly, then save it with extension .asm and for C based program save it with extension .C.

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Fig 7.10: Picture of Window Saving the Program

19.

Now right click on Source group 1 and click on Add files to Group Source.

Fig 7.11: Picture of Adding Files to Source Group

20.

Now you will get another window, on which by default C files will appear. 69

Fig 7.12: Picture of Selecting File Type

21. 22. 23.

Now select as per your file extension given while saving the file. Click only one time on option ADD. Now Press function key F7 to compile. Any error will appear if so happen.

Fig 7.13: Picture of Program Compilation

24.

If the file contains no error, then press Control+F5 simultaneously.

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25.

The new window is as follows.

Fig 7.14: Picture of Program Window after Checking Errors

26. 27.

Then click OK. Now click on the Peripherals from menu bar, and check your required port as shown in figure below.

Fig 7.15: Picture of Window for Selecting Required Port

28.

Drag the port aside and click in the program file.

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Fig 7.16: Picture of Output Window after Successful Compilation

29.

Now keep Pressing function key F11 slowly and observe. You are running your program successfully.

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SOURCE CODE
#include<LPC21xx.H> #include<string.h> #define GPIO_Port0s_IODIR #define GPIO_Port1s_IODIR #define Set_Port0s #define Clear_Port0s #define Set_Port1s #define Clear_Port1s #define Port0_Set #define Port1_Set #define Logic_Low 0 #define Port0 0 #define Port1 1 #define device1 (1<<29) #define device2 (1<<30) #include "LCD.c" #include "Serial_Uart0.c" #include "PS_2.c" #include "App.c" int PinStatus_Port(unsigned char ,unsigned int); unsigned char x; main () { GPIO_Port1s_IODIR = ~ (KB_DATA|KB_CLK); GPIO_Port1s_IODIR = (LCD_Data|RS|EN); input=0 Lcd_Init(); Init_UART0 (9600); Init_UART0_Interrupt(); Lcd_Data_Str(1,1," XBEE-PS/2 "); //output=1 // //(0xFFFFFFFF)<<29 //(0xFFFFFFFF)<<30 IODIR0 IODIR1

IOSET0 IOCLR0 IOSET1 IOCLR1 IOPIN0 IOPIN1

Lcd_Data_Str(2,1,"Chatting System");

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Delay (400); Lcd_Data_Chr(0,0,0,LCD_CLEAR); while (1) { Get_KB_value=RdData_PS2_KB(); Delay (15); ScanCodes_ASCII_Alphabets(Get_KB_value); ScanCodes_ASCII_Numbers(Get_KB_value); ScanCodes_ASCII_SPL_Chars(Get_KB_value); } } PinStatus_Port(unsigned char port, unsigned int pin) { if(port==0) { x=(Port0_Set& (1<<pin))?1:0; } if(port==1) { x=(Port1_Set& (1<<pin))?1:0; } return x; } LCD: #define RS (1<<24) #define EN (1<<25) //24 //25

#define LCD_Data (0xFF)<<16 unsigned char LCD_C=0,LCD_D=1,Wr_Data=1; int Delay(unsigned int ); void Lcd_Init(void); int Lcd_Data_Chr(unsigned char ,unsigned char ,unsigned char ,unsigned char); int Lcd_Data_Str(unsigned char ,unsigned char ,unsigned char temp[]); int Lcd_Wr(unsigned char );

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Lcd_Data_(0-cmd:1-data,line no,position,char to disp on LCD); void Lcd_Init(void) { unsigned char LCD_2_LINE=0x38; unsigned char LCD_CLEAR=0X01; unsigned char DISPLAY_ON=0X0E; unsigned char LCD_CURSOR_OFF=0x0C; Lcd_Data_Chr(0,0,0,LCD_2_LINE); Lcd_Data_Chr(0,0,0,DISPLAY_ON); Lcd_Data_Chr(0,0,0,LCD_CURSOR_OFF); Lcd_Data_Chr(0,0,0,LCD_CLEAR); } Lcd_Data_Chr(unsigned char RS1 ,unsigned char line,unsigned char position,unsigned char temp1) { unsigned char x; if(RS1==0) { Set_Port1s= (temp1<<16)&LCD_Data; Lcd_Wr(LCD_C); Clear_Port1s=LCD_Data; } if(RS1==1) { if(line==1) { x=0x7f+position; Set_Port1s= (x<<16)&LCD_Data; Lcd_Wr(LCD_C); Clear_Port1s=LCD_Data; } if(line==2) {

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x=0xbf+position; Set_Port1s= (x<<16)&LCD_Data; Lcd_Wr(LCD_C); Clear_Port1s=LCD_Data; } Set_Port1s= (temp1<<16)&LCD_Data; Lcd_Wr(LCD_D); Clear_Port1s=LCD_Data; Delay(5); } } Lcd_Data_Str(unsigned char line1,unsigned char position,unsigned char temp[]) { unsigned int p; unsigned char t; if(line1==1) { p=0x7f+position; Lcd_Data_Chr(0,0,0,(Set_Port1s=(p<<16)&LCD_Data)); } if (line1==2) { p=0xbf+position; Lcd_Data_Chr(0,0,0,(Set_Port1s=(p<<16)&LCD_Data)); } while (temp[t]!='\0') { Set_Port1s= (temp[t]<<16)&LCD_Data; Lcd_Wr(LCD_D); t++; Clear_Port1s=LCD_Data; } }

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Lcd_Wr(unsigned char r) { if(r==1) { Set_Port1s= RS; Set_Port1s= EN; Delay (1); Clear_Port1s= EN; } if(r==0) { Clear_Port1s= RS; Set_Port1s= EN; Delay (1); Clear_Port1s= EN; } } Delay (unsigned int time) { unsigned int i,j; for (i=0;i<time;i++) for (j=0;j<25000;j++); } SERIAL UART: #define Fosc 11059200 #define Cclk Fosc*5 #define Pclk Cclk /4 void Init_UART0 (unsigned int baud_rate); void UART0_TX_Chr (char ch); char UART0_RX_Chr (void); char UART0_RX_Chr1 (void); void UART0_TX_Str (unsigned char *str); void Init_UART0_Interrupt(void);

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void ISR_UART0(void)__irq; void Dispaly_Data_LCD(void); void Clear_Rx_Buffer(void); unsigned int Divisor; unsigned char rx_serial_data,Serial_Data[40]; unsigned char flag=0,k; /* Initialize Uart0 Interface */ void Init_UART0 (unsigned int baud_rate) { //PINSEL0 = 0x00050000; PINSEL0 = 0x5; Divisor=Pclk/(16*baud_rate); U0LCR = 0x83; U0DLL = Divisor;//%256; /* This value must be loaded (into U0DLL & /* Selecting the GPIO to UART pins */

U0DLM which forms a DIVISOR) have 9600 Baud Rate @ 11.0592 MHz VPB Clock */ // U0DLM= Divisor/256; /* DLAB=1,8 bits, no Parity, 1 Stop bit */

U0LCR = 0x03; } void UART0_TX_Chr (char ch) { while (U0LSR == 0x20); // return (U0THR = ch); U0THR = ch; }

/* DLAB = 0 */

/* Write character to Serial Port */

void UART0_TX_Str (unsigned char *str) { /* Write character to Serial Port */

while (*str!='\0') { while (U0LSR == 0x20);

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U0THR = *str; str++; Delay(5); } } char UART0_RX_Chr (void) { while (!(U0LSR & 0x01)); return (U0RBR); } char UART0_RX_Chr1 (void) { while (!(U0LSR & 0x01)); { rx_serial_data=U0RBR; } return (rx_serial_data); } void Init_UART0_Interrupt(void) { U0IER = 0x01; VICVectCntl0 = 0x00000026; //select a priority slot for a given interrupt //pass the address of the IRQ /* Read character from Serial Port */ /* Read character from Serial Port */

VICVectAddr0 = (unsigned long) ISR_UART0; into the VIC slot VICIntEnable = 0x00000040; } void ISR_UART0(void)__irq { rx_serial_data=U0RBR; VICVectAddr = 0x00000000; if(rx_serial_data!=0x0A) //0X0D) { Serial_Data[k]= rx_serial_data; k++;

//enable interrupt2

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if(rx_serial_data==0X0D) { Dispaly_Data_LCD(); Clear_Rx_Buffer(); k=0; } } return; } void Dispaly_Data_LCD(void); void KB_Data_On_Lcd(unsigned char); void Enter_Key(void); void Transmit_Data(void); void Clear_Tx_Buffer(void); void Clear_Rx_Buffer(void); void Display_Data_LCD(void) { Lcd_Data_Chr(0,0,0,LCD_CLEAR); chr_count=1; line_no=1; Char_position=1; for(lcd_cnt=0;Serial_Data[lcd_cnt]!=0x0d;lcd_cnt++) { if(chr_count==16) { line_no=2; Char_position=1; } if(chr_count==32) { line_no=1; Char_position=1; chr_count=1;

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Lcd_Data_Chr(0,0,0,LCD_CLEAR); } Lcd_Data_Chr(1,line_no,Char_position++,Serial_Data[lcd_cnt]); chr_count++; } line_no=1; Char_position=1; chr_count=1; incr=0; } void KB_Data_On_Lcd(unsigned char value) { if(value==0x05) { if(chr_count==16) { line_no=1; Char_position=17; } if(chr_count>0&&chr_count<=32) { Get_Chr_Data[incr--]=' '; value=0x20; Lcd_Data_Chr(1,line_no,Char_position-=1,value); chr_count-=1; } } else { if(chr_count==16) { line_no=2; Char_position=1;

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} if(chr_count==32) { line_no=1; Char_position=1; chr_count=1; Lcd_Data_Chr(0,0,0,LCD_CLEAR); } Lcd_Data_Chr(1,line_no,Char_position++,value); chr_count++; } } void Enter_Key(void) { Get_Chr_Data[incr++]='\n'; Get_Chr_Data[incr++]='\r'; Transmit_Data(); Clear_Tx_Buffer(); Lcd_Data_Chr(0,0,0,LCD_CLEAR); line_no=1; Char_position=1; chr_count=1; incr=0; } void Transmit_Data(void) { unsigned char j; for(j=0;Get_Chr_Data[j]!='\0';j++) { UART0_TX_Chr(Get_Chr_Data[j]); Delay(15); //Lcd_Data_Chr(1,2,ps++,&Get_Chr_Data[j]); }

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} void Clear_Tx_Buffer(void) { unsigned char j; for(j=0;j<40;j++) { Get_Chr_Data[j]='\0'; } } void Clear_Tx_Buffer(void); void Clear_Rx_Buffer(void); void Clear_Rx_Buffer(void) { unsigned char j; for(j=0;j<40;j++) { Serial_Data[j]='\0'; } } Keypad: #define KB_DATA (1<<29)//KEYPAD// #define KB_CLK (1<<30) unsigned char Data=0,i,Get_KB_value,lcd_cnt,GGG='H',B_data,x; unsigned char LCD_CLEAR=0X01; unsigned char chr_count,line_no,Char_position,incr; unsigned char Get_Chr_Data[40],Serial_Data[40],k=0; unsigned char rd_flag=0,wr_flag=0,wr_flag1=0; unsigned char Parity_Bit=0,Stop_Bit=0; unsigned char Caps_Flag=0; void Dispaly_Data_LCD(void); int RdData_PS2_KB(void); void ScanCodes_ASCII_SPL_Chars(unsigned char); void ScanCodes_ASCII_Numbers(unsigned char);

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void ScanCodes_ASCII_Alphabhets(unsigned char); void KB_Data_On_Lcd(unsigned char); void Enter_Key(void); void Transmite_Data(void); void Clear_Tx_Buffer(void); void Dispaly_Data_LCD(void); void Clear_Rx_Buffer(void); int Delay(unsigned int); int PinStatus_Port(unsigned char ,unsigned int); int RdData_PS2_KB(void) { while(PinStatus_Port(1,30)=1); while(PinStatus_Port(1,29)=1); for(i=0;i<8;i++) { B_data=B_data>>1; while(PinStatus_Port(1,30)=0); if(Port1_Set& (0<<29)?1:0) B_data=(0X00|0x80); while(PinStatus_Port(1,30)=1); } while(PinStatus_Port(1,30)=0); while(PinStatus_Port(1,30)=1); return(B_data); } void ScanCodes_ASCII_Alphabhets(unsigned char S_codes_alpha) { switch (S_codes_alpha) { Alphabets: Case 0x1C: //A if (Caps_Flag==0XFF) { //10 //parity bit //clk //data

84

KB_Data_On_Lcd('A'); Get_Chr_Data[incr++]='A'; } if(Caps_Flag==0) { KB_Data_On_Lcd('a'); Get_Chr_Data[incr++]='a'; } break; Case 0X32: //B if (Caps_Flag==0XFF) { KB_Data_On_Lcd('B'); Get_Chr_Data[incr++]='B'; } if(Caps_Flag==0) { KB_Data_On_Lcd('b'); Get_Chr_Data[incr++]='b'; } break; Case 0x21: //C if (Caps_Flag==0XFF) { KB_Data_On_Lcd('C'); Get_Chr_Data[incr++]='C'; } if(Caps_Flag==0) { KB_Data_On_Lcd('c'); Get_Chr_Data[incr++]='c'; }

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break; Case 0X23: //D if (Caps_Flag==0XFF) { KB_Data_On_Lcd('D'); Get_Chr_Data[incr++]='D'; } if(Caps_Flag==0) { KB_Data_On_Lcd('d'); Get_Chr_Data[incr++]='d'; } break; Case 0x24: //E if (Caps_Flag==0XFF) { KB_Data_On_Lcd('E'); Get_Chr_Data[incr++]='E'; } if (Caps_Flag==0) { KB_Data_On_Lcd('e'); Get_Chr_Data[incr++]='e'; } break; Case 0X2B: //F if (Caps_Flag==0XFF) { KB_Data_On_Lcd('F'); Get_Chr_Data[incr++]='F'; } if (Caps_Flag==0) {

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KB_Data_On_Lcd('f'); Get_Chr_Data[incr++]='f'; } break; Case 0x34: //G if (Caps_Flag==0XFF) { KB_Data_On_Lcd('G'); Get_Chr_Data[incr++]='G'; } if (Caps_Flag==0) { KB_Data_On_Lcd('g'); Get_Chr_Data[incr++]='g'; } break; Case 0X33: //H if (Caps_Flag==0XFF) { KB_Data_On_Lcd('H'); Get_Chr_Data[incr++]='H'; }

if(Caps_Flag==0) { KB_Data_On_Lcd('h'); Get_Chr_Data[incr++]='h'; } break; Case 0x43: //I if (Caps_Flag==0XFF) { KB_Data_On_Lcd('I');

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Get_Chr_Data[incr++]='I'; } if(Caps_Flag==0) { KB_Data_On_Lcd('i'); Get_Chr_Data[incr++]='i'; } break; Case 0X3B: //J if (Caps_Flag==0XFF) { KB_Data_On_Lcd('J'); Get_Chr_Data[incr++]='J'; } if (Caps_Flag==0) { KB_Data_On_Lcd('j'); Get_Chr_Data[incr++]='j'; } break; Case 0X42: //K if (Caps_Flag==0XFF) { KB_Data_On_Lcd('K'); Get_Chr_Data[incr++]='K'; } if(Caps_Flag==0) { KB_Data_On_Lcd('k'); Get_Chr_Data[incr++]='k'; } break;

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Case 0X4B: //L if (Caps_Flag==0XFF) { KB_Data_On_Lcd('L'); Get_Chr_Data[incr++]='L'; } if (Caps_Flag==0) { KB_Data_On_Lcd('l'); Get_Chr_Data[incr++]='l'; } break; Case 0X3A: //M if (Caps_Flag==0XFF) { KB_Data_On_Lcd('M'); Get_Chr_Data[incr++]='M'; } if(Caps_Flag==0) { KB_Data_On_Lcd('m'); Get_Chr_Data[incr++]='m'; } break; Case 0X31: //N if (Caps_Flag==0XFF) { KB_Data_On_Lcd('N'); Get_Chr_Data[incr++]='N'; } if (Caps_Flag==0) { KB_Data_On_Lcd('n'); Get_Chr_Data[incr++]='n'; 89

} break; Case 0X44: //O if (Caps_Flag==0XFF) { KB_Data_On_Lcd('O'); Get_Chr_Data[incr++]='O'; } if (Caps_Flag==0) { KB_Data_On_Lcd('o'); Get_Chr_Data[incr++]='o'; } break; Case 0X4D: //P if (Caps_Flag==0XFF) { KB_Data_On_Lcd('P'); Get_Chr_Data[incr++]='P'; } if(Caps_Flag==0) { KB_Data_On_Lcd('p'); Get_Chr_Data[incr++]='p'; } break; Case 0x15: //Q if (Caps_Flag==0XFF) { KB_Data_On_Lcd('Q'); Get_Chr_Data[incr++]='Q'; } if (Caps_Flag==0)

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{ KB_Data_On_Lcd('q'); Get_Chr_Data[incr++]='q'; } break; Case 0X2D: //R if (Caps_Flag==0XFF) { KB_Data_On_Lcd('R'); Get_Chr_Data[incr++]='R'; } if (Caps_Flag==0) { KB_Data_On_Lcd('r'); Get_Chr_Data[incr++]='r'; } break; Case 0x1B: //S if(Caps_Flag==0XFF) { KB_Data_On_Lcd('S'); Get_Chr_Data[incr++]='S'; } if (Caps_Flag==0) { KB_Data_On_Lcd('s'); Get_Chr_Data[incr++]='s'; } break; Case 0X2C: //T if (Caps_Flag==0XFF) { KB_Data_On_Lcd('T');

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Get_Chr_Data[incr++]='T'; } if (Caps_Flag==0) { KB_Data_On_Lcd('t'); Get_Chr_Data[incr++]='t'; } break; Case 0x3C: //U if (Caps_Flag==0XFF) { KB_Data_On_Lcd('U'); Get_Chr_Data[incr++]='U'; } if(Caps_Flag==0) { KB_Data_On_Lcd('u'); Get_Chr_Data[incr++]='u'; } break; Case 0X2A: //V if (Caps_Flag==0XFF) { KB_Data_On_Lcd('V'); Get_Chr_Data[incr++]='V'; } if (Caps_Flag==0) { KB_Data_On_Lcd('v'); Get_Chr_Data[incr++]='v'; } break; Case 0X1D: //W if (Caps_Flag==0XFF) 92

KB_Data_On_Lcd('W'); Get_Chr_Data[incr++]='W'; } if (Caps_Flag==0) { KB_Data_On_Lcd('w'); Get_Chr_Data[incr++]='w'; } break; Case 0X22: //X if (Caps_Flag==0XFF) { KB_Data_On_Lcd('X'); Get_Chr_Data[incr++]='X'; } if (Caps_Flag==0) { KB_Data_On_Lcd('x'); Get_Chr_Data[incr++]='x'; } break; Case 0X35: //Y if (Caps_Flag==0XFF) { KB_Data_On_Lcd('Y'); Get_Chr_Data[incr++]='Y'; } if (Caps_Flag==0) { KB_Data_On_Lcd('y'); Get_Chr_Data[incr++]='y';

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} break; Case 0X1A: //Z if (Caps_Flag==0XFF) { KB_Data_On_Lcd('Z'); Get_Chr_Data[incr++]='Z'; } if (Caps_Flag==0) { KB_Data_On_Lcd('z'); Get_Chr_Data[incr++]='z'; } break; default break; }

void ScanCodes_ASCII_Numbers(unsigned char S_codes_num) { switch (S_codes_num) { Numbers: Case 0X70: //0

KB_Data_On_Lcd('0'); Get_Chr_Data[incr++]='0'; break;

Case 0X69: //1 KB_Data_On_Lcd('1');

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Get_Chr_Data[incr++]='1'; break;

Case 0X72: //2

KB_Data_On_Lcd('2'); Get_Chr_Data[incr++]='2'; break;

Case 0X7A: //3

KB_Data_On_Lcd('3'); Get_Chr_Data[incr++]='3'; break;

Case 0X6B: //4

KB_Data_On_Lcd('4'); Get_Chr_Data[incr++]='4'; break;

Case 0X73: //5

KB_Data_On_Lcd('5'); Get_Chr_Data[incr++]='5'; break;

Case 0X74: //6

KB_Data_On_Lcd('6'); Get_Chr_Data[incr++]='6'; break;

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Case 0X6C: //7

KB_Data_On_Lcd('7'); Get_Chr_Data[incr++]='7'; break;

Case 0X75: //8

KB_Data_On_Lcd('8'); Get_Chr_Data[incr++]='8'; break;

Case 0X7D: //9

KB_Data_On_Lcd('9'); Get_Chr_Data[incr++]='9'; break; default

break; }

} void ScanCodes_ASCII_SPL_Chars(unsigned char SPL_Chars) { switch (SPL_Chars) { Special Characters: Case 0X5A: //ENTER

Enter_Key(); break;

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Case 0X29: //SPACE KB_Data_On_Lcd(' '); Get_Chr_Data[incr++]=' '; break;

Case 0X66: //BCKSPC

KB_Data_On_Lcd(0x05); break;

Case 0X58: //CAPSLCK

Caps_Flag=~Caps_Flag; break;

Case 0X76: //ESC

Lcd_Data_Chr(0,0,0,LCD_CLEAR); line_no=1; Char_position=1; chr_count=1; incr=0; break;

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RESULT

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APPLICATIONS, ADVANTAGES & DISADVANTAGES


10.1 APPLICATIONS
Industrial control Communication gateway Scientific equipments Remote control systems Medical systems Wireless communication devices General purpose applications Defence sector for secure data transmission

10.2 ADVANTAGES
Low power consumption Cost effective Low data rate Bulk and fast data transmission Helpful for people who do not know how to operate internet Excellent performance in environments with low signal to noise ratio Appropriate range of operation Appropriate and reliable data transfer, bit rate 250 kbps at 2.4 GHz ZigBee protocols need less than 64 kb of ROM and 2-32 kb of RAM. Large network capacity-one ZigBee network contains one master device and maximum 254 slave devices. There can be as many as 100 ZigBee networks with in one area. ZigBee can be implemented with any microcontroller Noise free communication

10.3 DISADVANTAGES
Replacements with ZigBee complaint appliance can be costly No more secure than a typical 802.11 wireless network

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CONCLUSION & FUTURE SCOPE


CONCLUSION
The project Messenger Development without Internet using ZigBee was designed to develop a messenger system by which one can communicate wirelessly without internet using ZigBee technology. As the use of internet has got its own limitations, this technology ensures security of data while sending messages from one person to the other up to a limited distance. Using ZigBee Technology we can transfer the secured data from one person to another. Thus the data transferred is displayed on the monitor in safety. ZigBee is most promising technological standard for low data rate, low power consumption and has a long battery life. ZigBee networks are reliable and self-healing. These networks are easy to deploy which is cheaper as compared to other technologies. Hence, we can implement a data communication system by which one can communicate wirelessly without making use of the internet.

FUTURE SCOPE
Despite of the many advantages of Internet, there are many people around us especially in the rural areas who do not know how to use the internet. Most of the people do not even know how to use a computer. For such kind people this project is very helpful to send messages from one place to another to the desired person who does not have the knowledge of using either the computer or the internet. Since this project is implemented without the use of internet wirelessly. ZigBee has a very promising future in front of it. Research claims that fuelled by rapid rise in home networking, ZigBee would provide revolutionizing statistics in the upcoming years which would entirely change the wireless world. Hence in the coming future, this project will be of great help in the rural areas providing communication to the people wirelessly without the use of internet with the aid of ZigBee technology.

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BIBLIOGRAPHY
REFERENCES
[1] ZigBee Alliance, ZigBee Specification. Version 1.0, December 14th, 2004. [2] William Stalling, Wireless Communication and Networks, Fourth Edition, Pearson Publication Limited, 2004 [3] 802.15.4, Part 15.4: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LRWPANs). [4] ZigBee Specification v1.0, ZigBee Alliance, December 14th, 2004, Tanenbaum, A. S., Gamage, C., & Crispo, B. (2006). [5] Raj Kamal Microcontrollers Architecture, Programming, and System Design. [6] Mazidi Embedded Systems. [7] Warwick A. Smith-ARM Microcontroller Interfacing. [8] Markus Levy. The history of the ARM architecture: ARM IQ, 4(1), 2005.

WEBSITES
[1] http://techgig.com/projects [2] http://scribd.com/doc [3] http://en.wikipedia.org/wiki/ZigBee [4] http://books.google.co.in [5] http://meseec.ce.rit.edu [6] http://circuitstoday.com [7] http://docs.google.com/viewer

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