2010 International Conference on Power System Technology

Parameter Design Principle of the Arm Inductor in Modular Multilevel Converter based HVDC
Qingrui Tu, Student Member, IEEE, Zheng Xu, Member, IEEE, Hongyang Huang and Jing Zhang
Comparing with the 2-level VSC topology, there are two arm inductors inserted separately between the upper and lower arms in MMC. The arm inductors have two functions: Since the three phase units of MMC are in parallel connection on the DC side, the inequality of the three generated phase unit voltages leads to the balancing currents flowing through the individual phase units. The arm inductors could suppress these balancing currents to a very low level and make them manageable by means of appropriate control methods [1]. The arm inductors are in series with the distributed energy storage capacitors, so the effects of faults arising inside or outside of the converter can be reduced by the arm inductor substantially. As a result, unlike the 2-level VSC topology, the current rise rate of MMC is only a few tens of amperes per microsecond in DC terminal short circuit fault [1]. According to the above two functions, this paper proposes two corresponding parameter design principles of the arm inductors. Firstly, the basic structure and operation principles of MMC are illustrated in Section II. Then the mechanism of the circulating current is analyzed in Section III and the value of the arm inductor is calculated at the given amplitude of the circulating current. Furthermore, the parameter calculation method of the arm inductor at a given fault current rise rate is investigated in Section IV, under the critical condition of a short circuit between the DC terminals of the converter. In the end, detailed PSCAD/EMTDC model is developed. Simulation results show a close agreement with the calculation of the circulating current, with different arm inductor parameters. The fault between the DC terminals was investigated; the results verified the arm inductor parameter design principles in reducing the fault current rise rate. II. BASIC STRUCTURE AND OPERATION PRINCIPLE OF MODULAR MULTILEVEL CONVERTER A. Basic Structure The basic structure of a MMC is shown in Fig. 1. A threephase MMC consists of six arms, each arm includes a total of N submodules and one inductor L0. Two arms in the same phase comprise a phase unit.

AbstractThis paper describes two distinctive functions of the arm inductor in the modular multilevel converters (MMC): suppressing the circulating current and limiting the fault current rise rate. Based on the equality of the instantaneous power, the characteristics of the circulating current are analyzed and demonstrated that it flows through the three phase of the converter in negative sequence at double-fundamental frequency. The relationship between the amplitude of the circulating current and the value of the arm inductor is discussed, and the first principle to design the parameters is proposed. The second principle to design the parameters is based on the calculation of the fault current rise rates, with different values of the arm inductors. A detailed PSCAD/EMTDC model of MMC is developed. Steady state simulation proves the existence of the circulating current at double fundamental frequency. Simulation results show a close agreement with the calculation of the circulating current, with different arm inductor parameters. The fault between the DC terminals of the converter is investigated; the results verify the above parameter design principles of the arm inductor. Index Terms-- modular multilevel converter; parameter design; arm inductor; circulating current; current rise rate

odular multilevel converter (MMC) is a new kind of multilevel voltage source converter topology. Because of the structure with a cascaded connection of so called submodules (SM), every IGBT of the submodules in one arm needs not to be switched on or off at the same time. As a result, the direct series connection of the IGBT in high voltage applications can be avoided [1-3]. MMC is adopted from the cascaded H bridge (CHB) multilevel converter topology. [4-7] investigated the basic operation principle and modulation scheme of CHB topology. MMC topology is very suitable for voltage-sourced converter based HVDC (VSC-HVDC) applications. In this case each submodule only consists a half H bridge. The basic operation of MMC was reported in [1, 2]. So far, space vector modulation schemes [8, 9] and pulse wide modulation schemes [7, 10] have been introduced. Both simulations and experiments based on phase-shift carrier PWM were taken in [7].
Qingrui Tu, Zheng Xu and Hongyang Huang are with the Department of Electrical Engineering, Zhejiang University, Hangzhou, 310027, P.R. China email: qingrui.tu@gmail.com Jing Zhang is with the Zhejiang Electrical Power Dispatch and Communication Center; Hangzhou 310007; P.R. China.

I. INTRODUCTION

978-1-4244-5940-7/10/$26.002010 IEEE

L0

disumj dt

+ R0isumj =

U dc u pj + unj 2 2

( j = a, b, c)

(5)

where ej in (4) is the inner EMF generated in phase j and can be expressed as:

ej =

unj u pj 2

(6)

The desired inner EMF voltage ea is controlled as a sinusoidal waveform (take phase a for example):

ea (t ) = Ea sin 0t =

k U dc sin 0t 2

(7)

Fig. 1. Basic structure of MMC

where 0 is the radian fundamental frequency. Ea is the peak value of the inner EMF voltage and k is defined in [8] as the amplitude modulation index:

k=
A
A

Ea U dc / 2

(8)

The above analysis makes it reasonable to define the reference arm voltage as
B B
C

u pj _ ref =
C

u nj _ ref

U dc ej 2 U = dc + e j 2

(9) (10)

III. ARM INDUCTOR PARAMETER DESIGN

Fig. 2. Equivalent circuit of MMC

B. Operation Principle Fig. 2 is the equivalent circuit of MMC. L0 is the series arm inductor. R0 denotes the arm losses. uvj (j=a,b,c) is the converter output voltage of phase j at point V. ivj (j=a,b,c) is the line current of phase j at point V. Udc is the dc bus voltage between the positive and negative poles. Idc is the dc bus current. The arm voltages generated by the cascaded SMs are expressed as upj and unj (j=a,b,c, and the subscript p denotes the upper arm while n denotes the lower arm). ipj and inj are the corresponding arm currents, which can be expressed as [11]:

A. Circulating Current Mechanism Study According to (7)-(10), the upper and lower arm voltage (take phase a for example) can be expressed as:

1 1 u pa (t ) = U dc ea (t ) = U dc [1 k sin(0t )] (11) 2 2 1 (12) una (t ) = U dc [1 + k sin(0t )] 2

In steady state, the dc bus current Idc is supposed to distribute equally among the three phase units, as a result, the inner current isumj described in (3) contains one third of the dc bus current Idc/3, so according to (1)-(2), the corresponding arm currents in phase a are described as:

i pj = isumj + inj = isumj

ivj 2 ivj 2

(1) (2)

i pa (t ) = ina (t ) =

1 1 1 I dc + iva (t ) = I dc [1 + m sin(0t + )] (13) 3 2 3

(14)

Where ivj is the line current at point V. isumj is the inner current of phase j, which flows through both the upper and lower arm and is given as:

1 I dc [1 m sin(0t + )] 3

where m is defined as [8]:

isumj =

i pj + inj 2

(3)

m=

I vj 2

I dc 3

(15)

According to [11], the MMC is characterized by the following equations

uvj = e j

R0 L di ivj 0 vj 2 2 dt

where Ivj is the peak value of the sinusoidal line current ivj. So the instantaneous power of the upper and lower arms in phase a can be calculated as:

( j = a, b, c)

(4)

p pa (t ) = u pa (t ) i pa (t )
(16) U dc I dc [1 + m sin(0t + )](1 k sin 0t ) 6 pna (t ) = una (t ) ina (t )

early assumptions of the arm voltages and currents in (11)-(14) must be revised. The double-fundamental-frequency component should be added. So the upper and lower arm voltages should be written as :

(17) U dc I dc [1 m sin(0t + )](1 + k sin 0t ) 6

U2f 1 u pa (t ) = U dc [1 k sin( 0 t )] + sin( 2 0 t + ) 2 2

(21)

By integrating (16)-(17) and summing both of the results, the ac component of the total energy stored in phase unit a is calculated:

U 1 una (t ) = U dc [1 + k sin(0t )] + 2 f sin(20t + ) 2 2

(22) The double-fundamental-frequency voltage excites the circulating current flowing through two arm inductors, so the circulating current at double fundamental frequency is described as (the direction is shown in Fig. 3): U2 f i2 f (t ) = sin(20t + ) = I 2 f cos(20t + ) (23) 40 L0 2
where L0 is the arm inductor, I2f is the peak value of the circulating current. So the arm currents in phase a are revised as:

WPUa _ AC (t ) = ( p pa + pna ) d (t ) =

Ps sin( 20t + ) (18) 6 0

(19)

Where Ps is the apparent power defined as:

Ps = U dc I dc / cos

Because the phase unit energy is stored in submodule capacitors, and the capacitor energy is related to the capacitor voltage, so according to (18), if both of the upper and lower arm were taken as a whole voltage source, the phase unit voltage must contain a dc component and an ac component at the double fundamental frequency 20 [8].

U PUa = U PUa _ DC + U PUa _ AC = U dc + U 2 f sin( 20t + )

(20) Where UPUa is the equivalent voltage of phase unit a. UPUa_DC is the dc component. UPUa_AC is the ac component. U2f is the peak value of the double-fundamental-frequency equivalent voltages. Because the dc components of the three equivalent phase unit voltages are equal, and the ac components of the voltages lag each other by 2/3 in a-c-b sequence at double fundamental frequency, thus, the corresponding circulating currents i2fj (j=a,b,c) at double fundamental frequency in negative sequence are excited among the three phase units. The equivalent circuit of the circulating currents is shown in Fig. 3.

i pa (t ) = i na (t ) =

1 I dc [1 + m sin( 0 t + )] + I 2 f cos(2 0 t + ) 3
(24)

1 I dc [1 m sin( 0 t + )] + I 2 f cos(2 0 t + ) 3

(25) According to (21)-(25), by integrating the instantaneous power in phase a and replacing I2f by (23), the revised alternating phase unit energy can be calculated as:

WPUa _ AC (t ) = (u pa i pa + u na ina ) d (t ) = U U Ps sin(20t + ) + dc 2 2 f sin(20t + ) 60 80 L0 I dc U 2 f 60 cos(20t + )

2 U2 f 2 320 L0

(26)

cos(40t + 2 )

Now some approximations should be made. Supposing 0=314rad/s, if L0<0.2 p.u.(this assumption is correct in most cases of the VSC-HVDC project), then

U dc U 2 f I U I U > 10 dc 2 f >> dc 2 f 2 80 L0 60 60

(27)

Fig. 3. Equivalent circuit of the circulating currents

is satisfied. So the third term in (26) can be neglected. Furthermore, because the double-fundamental-frequency equivalent voltage U2f is relatively small with respect to the dc bus voltage Udc, so the last term of (26) can also be neglected. Then the alternating energy of phase unit a should be simplified as:

B. Suppressing Circulating Current Because of the double-fundamental-frequency ac component existing in the equivalent phase unit voltage, the

WPUa _ AC (t ) = (

Ps U dc U 2 f + ) sin( 20t + ) 2 60 80 L0

(28)

The double-fundamental-frequency equivalent voltage U2f is supposed to distribute equally among the 2N submodule capacitors. So the submodule capacitor voltage uc becomes:

equation at the instant of the short circuit is (take phase a for example)

uc (t ) = U c +

U2 f 2 N

sin(20t + )

(29)

L0

di pa dt

+ L0

dina U dc = 0 dt

(35)

where Uc is the dc component of the capacitor voltage. N is the number of submodules per arm. Thus, the total energy stored in the phase unit a can be calculated as:

1 2 WPUa(t) = 2 N C0 uc (t) 2 = N C0 Uc2 + C0UcU2 f sin( 20t +) +

2 C0U2 f

Where ipa and ina are the upper and lower arm currents described in Fig. 2. In a short period after the fault, the majority of the arm current is the transient component. Thus, the upper and lower arm currents are supposed to be equal ipa=ina. So the fault current rise rate can be calculated according to (35):

(30)

4N

sin2 (20t +)

di pa dt

dina U dc = dt 2 L0

(36)

where C0 is the capacitor of the submodule. The three terms in (30) respectively correspond to the dc component, the doublefundamental-frequency component and the higher order component. Comparing (28) with (30), the double-fundamentalfrequency components should be equal

Therefore, the second principle to design the parameter of the arm inductor L0 is

L0 =

U dc 2

(37)

Ps U dc U 2 f + = C0 U c U 2 f 2 L0 60 80
Thus

(31)

where the unit of fault current rise rate is kA/s, if the unit of dc bus voltage Udc is chosen to be kV. IV. PSCAD/EMTDC SIMULATION RESULTS

U2 f

P U dc = s /(C0 U c 2 ) 60 80 L0

(32)

Then the peak value of the double-fundamental-frequency circulating current can be calculated as:

I2 f =

U2 f 40 L0

24 L

Ps

2 0 0

1 C0 Uc Udc 2 80 L0

)=

Ps 1 2 3 80 C0 L0Uc Udc
(33)

To verify the proposed two parameter design principles of the arm inductor, a detailed model based on the time-domain simulation tool PSCAD/EMTDC is developed. The SM capacitor steady state voltage Uc is set to 2kV, which means the well-proven standard IGBT component can be used. In order to enhance the simulating efficiency, the number of SMs per arm is set to 20. So the dc bus voltage is 20kV. The SM capacitor is 13000F. The rating of the dc power is 40MW. A. Limiting Circulating Current In stead-state operations, the parameter of the arm inductor is chosen to be 0.004H. The upper arm current of phase a is shown in Fig. 4. The existence of the circulating current distorts the arm current significantly. The inner currents of the three phases defined in (3) are depicted in Fig. 5. They consist of the dc component and the ac component. The ac component corresponds to the double-fundamental-frequency circulating current and it flows through the three phases in negative sequence. In comparison, the peak values of the circulating currents I2f calculated and simulated are shown in Fig. 6, with different values of the arm inductors L0. The calculation results are derived from (33). Simulation results show a close agreement with the calculation. Hence, the first parameter design principle of the arm inductors is verified.

Therefore, the first principle to design the parameter of the arm inductor at a given circulating current peak value can be derived as:

L0 =

Ps 1 + U dc 2 C0 U c I 80 3 2f

(34)

C. Limiting Fault Current The second function of the arm inductors in MMC is to limit the current rise rate in fault conditions. Taking the most critical fault into consideration, a short circuit fault is applied between the positive and negative dc buses. Then the arm current rise rates are investigated. Because the duration of the transient process is relatively short, the voltages of the SM capacitors are supposed to be constant. Then during the short periods after the fault, the sum of the voltage of the SM capacitors inserted in the same arm is equal to Udc. According to the Kirchhoff's Voltage Law, the

0.8 0.6 0.4 0.2

ipa (kA)

0.0 -0.2 -0.4 -0.6 -0.8

relatively low value if the arm inductor is big enough. Fig. 8 compares the results between the simulation and the calculation based on (36). Both results show a close agreement. So the second parameter design principle of the arm inductor is demonstrated. Therefore, a proper value of the arm inductor can be derived from (37) at a given fault current rise rate (kA/s), in order to provide enough time to switch off the IGBTs.
4
0.52 0.53 0.54 0.55 0.56 0.57 0.58 0.59

0.51

arm current under dc terminal fault (kA)

-1.0

2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 0.57 0.58 0.59 0.60 0.61 0.002H 0.003H 0.004H 0.005H 0.006H 0.007H 0.008H 0.009H 0.010H

time (s)

L0=0.01H

Fig. 4. waveform of the upper arm current in phase a

0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.0 0.51

phase a phase b phase c

L0=0.002H

isum

(kA)

time (s)

Fig. 7.waveform of the arm currents under the dc terminal short circuit fault
0.52 0.53 0.54 0.55 0.56 0.57 0.58 0.59

11000 10000

time (s)

fault current rise rate (kA/s)

Fig. 5. waveform of the inner currents containing the circulating currents

0.7 0.6 0.5 0.4 0.3 0.2 0.1

9000 8000 7000 6000 5000 4000 3000 2000

simulation results calculation results

simulation results calculation results

I2f (kA)

1000 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 0.010 0.011

arm inductor L0 (H)

Fig. 8.fault current rise rate versus different arm inductors

0.0 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 0.010 0.011

arm inductor L0 (H)

Fig. 6. peak value of the circulating current versus different arm inductors

V. CONCLUSIONS This paper presents the basic control and modulation method of the modular multilevel converters (MMC). Two distinctive functions of the arm inductor in MMC are described: suppressing the circulating current and limiting the fault current rise rate. The characteristics of the circulating current are analyzed and demonstrated that it flows through the three phases of the converter in negative sequence at double-fundamental frequency. The relationship between the amplitude of circulating current and the value of the arm inductor is discussed. Meanwhile, the quantitative relationship between

B. Limiting Fault Current The second function of the arm inductor is to reduce the fault current rise rate. A short circuit fault of 100ms duration is applied at 0.6s between the dc terminals of the converter. Fig. 7 shows the waveform of the upper arm current in phase a after the fault occurs. The values of the arm inductors are chosen from 0.002H to 0.01H. From the figure, it is shown that the rise rate of the fault current can be reduced to a

the fault current rise rate and the value of arm inductor is also proposed. The detailed PSCAD/EMTDC model of MMC with 20 submodules per arm is developed. Steady state and transient simulation results verified the proposed two parameter design principles of the arm inductor. VI. REFERENCES
J. DORN., H. HUANG., and D. RETZMANN., "Novel VoltageSourced Converters for HVDC and FACTS Applications " in CIGRE Symposium Osaka, 2007. [2] J. DORN., H. HUANG., and D. RETZMANN., "A new Multilevel Voltage-Sourced Converter Topology for HVDC Applications," in CIGRE, 2008. [3] H. HUANG., "Multilevel voltage-sourced converters for HVDC and FACTS applications," in CIGR SC B4 2009 Bergen Colloquium Bergen and Ullensvang, Norway, 2009. [4] M. Glinka and R. Marquardt, " A New Single Phase AC/AC-Multilevel Converter for Traction Vehicles Operating on AC Line Voltage " in European Power Electronics Conference Toulouse, 2003. [5] M. Glinka, "Prototype of multiphase modular-multilevel-converter with 2 MW power rating and 17-level-output-voltage," in Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual, 2004, pp. 2572-2576 Vol.4. [6] M. Glinka and R. Marquardt, "A new AC/AC multilevel converter family," IEEE Trans. Ind. Electron., vol. 52, pp. 662-669, 2005. [7] M. Hagiwara and H. Akagi, "Control and Experiment of PulsewidthModulated Modular Multilevel Converters," IEEE Trans. Power Electron., vol. 24, pp. 1737-1746, 2009. [8] A. Lesnicar., "Neuartiger, Modularer Mehrpunktumrichter M2C fr Netzkupplungsanwendungen," in Elektrotechnik und Informationstechnik. vol. Doktor Mnchen: Bundeswehr Mnchen, 2008. [9] A. Lesnicar and R. Marquardt, "An innovative modular multilevel converter topology suitable for a wide power range," in Power Tech Conference Proceedings, 2003 IEEE Bologna, 2003, p. 6 pp. Vol.3. [10] G. S. Konstantinou and V. G. Agelidis, "Performance evaluation of halfbridge cascaded multilevel converters operated with multicarrier sinusoidal PWM techniques," in Industrial Electronics and Applications, 2009. ICIEA 2009. 4th IEEE Conference on, 2009, pp. 3399-3404. [11] A. Antonopoulos, L. Angquist, and H. P. Nee, "On dynamics and voltage control of the Modular Multilevel Converter," in Power Electronics and Applications, 2009. EPE '09. 13th European Conference on, 2009, pp. 1-10. [1]

Hongyang Huang was born in Zhejiang, China, in January 1987.He received the BS degree from Zhejiang University, China in 2009, in Electrical Engineering. He is now a Ph.D. student in E.E. Department of Zhejiang University. His main field of interest are power system stability and control of AC/DC system. Jing Zhang was born in Henan, China, in November 1980. He received the Ph.D. degree from Zhejiang University, China in 2009, in Electrical Engineering. His main field of interest includes HVDC & FACTS, power quality and signal processing.

VII. BIOGRAPHIES
Qingrui Tu was born in Gansu, China, in November 1985. He received the BS degree from Zhejiang University, China in 2008, in Electrical Engineering. He is now a Ph.D. candidate in E.E. Department of Zhejiang University. His main field of interest includes the application of VSC-HVDC and FACTS for renewable energy. Zheng Xu was born in Zhejiang, China, in September 1962. He received the BS, MS and Ph.D. degrees from Zhejiang University, China in 1983, 1986 and 1993 respectively, all in Electrical Engineering. He has been with the Electrical Engineering Department of Zhejiang University since 1986. Since 1998 he is a professor of Zhejiang University. His research area includes HVDC, FACTS, power harmonics and power quality.