EED 303 Microprocessors and Microcontrollers (MPU & MCU)

(Core course for EEE, ECE) 1st Semester 2013-14

Credits - 4 Contact Hours (per week) -

[L:T:P]

[3:0:1]

Lectures 3 Hours Tutorials 0 Hours Lab 2 Hours Instructor: Dr. Ashutosh Dwivedi
Office :R.N. 9, B-wing 2nd Floor, Ph: 208 (internal) Mail: ashutosh.dwivedi@snu.edu.in

Course Perquisite: Digital Electronics

(Understanding of at-least followings components)
S.N. Topic Name 1 Number System Detail Description Decimal, Binary, Octal, Hexadecimal representation (signed-unsigned), Inter-conversion from one number system to other number system, complement form, IEEE 754 floating point number, Codes (Binary, Gray, BCD, ASCII), Arithmetic Operations (Addition, Subtraction, Multiplication, Division).

3 4

6
7

Basic/ Axiomatic definitions, Theorems/properties, Functions, Canonical and standard forms (SOP, POS), Two/multiple input- positive/negative logic gates. Gate level minimization K-map and associated operations. Combinational Logic Analysis and design, Adder/ subtracter (Half-Full), Multiplier/ comparator, Decoder/Encoders/MUX, tri-state logic Synchronous Sequential Logic Latches/Flip Flops (SR, D, T, JK), Edge/Level Triggered, Analysis (state table/equations/diagram) / Design /Synthesis, Finite state machines Registers and Counters Serial/parallel/shift/universal registers, Ripple/Synchronous, Ring, Johnson counters. Asynchronous circuits Basics of asynchronous counters/digital circuits Recommend Books : 1. M. Morris Mano and Ciletti M.D., Digital Design, 4th Edition, Prentice-Hall, 2006. 2. T. L. Floyd, Digital Fundamentals, 10th Edition, Pearson education, 2011. Boolean Algebra and Logic Gates

(MPU & MCU) Course

Objective:
To Introduce the Fundamentals of MPU & MCU.

Scope:
Intended as a first level course for microcomputer and embedded system design. Undertake two families of MPU (Intel 8085 and Intel 8086) & one family of MCU, Intel 8051. Various aspects of hardware design, such as interfacing of memory and different types of I/O devices. Assembly language programming (ALP) of 8085, 8086 and 8051.

Typical components Overview Pin-out and chip level functionality Micro level detail e.g. architecture, signal communications, dependencies and interconnection etc. Programming using native assembly language of each of above three Timing issue, Interrupts, serial communication etc. Peripheral chips for I/O, direct memory access, timer, interrupt controller MPU/MCU based systems architecture and programming Learn to use development aids e.g., simulator.

Each of the students will undertake a mini-project.

Basic Formalism and A Bit History

Modular structure of course (tentative) and detail description:

Module Contents Hou rs 1 1 Total Hour (Weeks) 2 (Week1) 9 (Week 1,2,3,4)

Historical background; Organization & Architectural Features of MPU and MCU Generic Architectures Basics of 8085: Basic 8085 microprocessor architecture and its functional blocks, Intel 8085 microprocessor IC pin outs and signals, address, data and control buses, 8085 features and Instruction set overview Programming with 8085: Basic instruction set, Writing assembly language programs, Interfacing: Types of memory and memory interfacing Decoding techniques absolute and partial Mapping techniques I / O mapped I / O and memory mapped I / O

1 1 1 1 1 1 1 2

Major Quiz 1 (MQ1)

Mod. Contents 3 Timings: Timing states, machine cycles and instruction cycles Instruction Timing diagram, Looping /branching , subroutines, call/return, stack operations and I/Os: Looping, counting and indexing operations related programs, Stack and subroutine Stacks and subroutines operations related programs, Conditional call and return instructions operations related programs Input/ output instructions and Debugging programs Interrupts: Interrupt system of 8085 Interrupt process and timing diagram of interrupt instruction execution, Serial Communications: Serial I/O lines of 8085 Implementation asynchronous serial data communication using SOD and SID Other Related Leftover topics Mid-Semester (MS) Exam

2 2 2 1 2 2 1 2 2 1 1 2

Total H (Weeks) 20 (Week 4,5,6,7,8,9, 10)

Module Contents 4 Study and Interfacing of peripherals with 8085 e.g. 8255, 8253,8251,8259,8257,8279 Major Quiz 2 (MQ2) 5 Basics of 8051: Comparison of microprocessor and microcontroller, Architecture and pin functions of 8051 chip controller, CPU timing and machine cycles, Internal memory organization, Program counter and stack, Input/output ports, Counters and timers, Serial data input and output Interrupts. Power saving modes

Hours Total Hour (Weeks) 6 6 (Week 11,12) 6 6 (Week 13,14)

Module Contents 6 Programming with 8051: Instruction set, addressing modes, Immediate, registers, direct and indirect Data movement and exchange instructions, Push and pop op-codes, Arithmetic and logic instructions, Bit level operations, Jump and call instructions, Input/ output port programming, Programming timers, Asynchronous serial data communications, Hardware interrupt service routines. Major Quiz 3 (MQ3) 8086 series Introduction to 8086, 80286,80386 microprocessors Instruction set and Programming Interfacing Some additional Topics related to applications

Hours Total Hour (Weeks) 6 6 (Week 15,16)

4 (Week 17,18) 2 (Week 18) 55 Hours

2 Total

End-Semester Exam (ES) *Course Structure is based on 90 days (18 weeks) teaching as per the university guidelines.

Evaluation Scheme
Component Digital Electronics Quiz(s) Weightage 5 Remark To evaluate the basic know-how of one of essential component of this course i.e., Digital Electronics (on topics covered above corresponding table), there will be one (or two) quiz(s) conducted within first two-three weeks from start of semester on surprise basis (or at-max one day notification). Through multiple surprise quizzes for evaluating day-to-day progress Conducted during class and/or lab sessions discretely in entire semester 5 marks each There will be only one MS exam.

Short Quiz(s) (SQs)

Major-Quiz(s) (MQ1,2,3) Mid-Semester Exam (MS) End-Semester Exam (MS) Lab Component

15 30 25 20

Evaluation is done discretely during entire semester based on Lab performance (lab records, viva-voce, etc.) Mini-project (tentative 10 marks inclusive in Lab component)

Important Note
(a) All Exam schedules are Tentative (any change will be announced in the Lectures) (b) All Exams can be subjective and/or objective type. (c) The Minimum threshold to clear the course is 40% of the total 100 marks. (d) Weightage of surprise quizzes may be increased up to 10% by adjusting other components of evaluation. (e) All exams will be conducted strictly on date declared by Instructor (except surprise exams) and No separate exam will be conducted in any circumstances.

Recommended Text Books

Gaonkar R., Microprocessor Architecture, Programming, and Applications with the 8085, Penram. Ayala K. J., The 8051 Microcontroller Architecture, Programming & Applications, Penram. Douglas V Hall, Microprocessors and Interfacing , Tata Mc. Gram Hill Krishna Kant, Microprocessor and Microcontrollers Architecture, Programming and System Design, PHI

Lab Experiments
Experiments on 8085, 8086 and 8051 (using both trainer kits and simulators) Experiments using various study/interfacing cards Basic hands-on training of MPU/MCU, programming and their use in some real problems.

Complete lab manual will be provided in the LAB

Course Policy
1. During Class:
Student must attend classes regularly
Attendance has not given any weightage in evaluation scheme of the course. However, students need to maintain their attendance as per the university rule Failing to which penalty could be imposed as per the university rule.

Be on time and latecomers will not be allowed in the class. Use of mobiles is prohibited inside the class in any form. It is advisable to all students to maintain class room discipline and make healthy learning environment during the class, failing to which student(s) might face penalty as per the Instructors right and decision. Students must provide prior details about their valid Leave/absence (all kinds) and take approval
(validity will be decided by instructor on case-by-case basis as per the university norms.)

2. During Labs: No Make-lab will be conducted therefore every student must perform all the experiment. There will be no lab exam conducted and lab component will be evaluated as per the evaluation scheme mentioned above. Detailed Lab policy will be provided in the LAB.

3. During Exams: Strictly follow the instructions provided by instructor (verbal and/or written) during exam. There will be zero level tolerance for student involved in any unfair means during exams.
They will be immediately bared from exam and/or action(s) might be taken on school level or university level along with zero marks provided in that exam.

4. In general: It is advisable to students continuously interact with Instructor offline for problems related to course/topic understanding and/or any other course related issues. Instructor will provide a working, feasible mechanism for such interaction
e.g., weekly fixed time slot for discussion