PIC18F452 Assembly Language

Microchip Technologies code templates absolute vs relocatable code

if

absolute code, after assembly, addresses are all resolved if relocatable code, after assembly, user data references are noted as ??

machine code is incomplete until linking is done relocatable code requires linker

code

differs only in the manner that data is defined

Program structure ...preliminary directives

LIST directive
LIST

P=18F452, F=INHX32 <P18F452.INC>

P= define processor F = format of hex file C = columns in listing (wide to avoid text wrap) N = 0 = turn off headers (for hardcopy output) ST = symbol table MM = memory map X = macro expansion (useful to verify that the macro expansion is correct)

INCLUDE directive
#include

CONFIGURATION bits
initialize

processor configuration specific to target board

Constants prefix notation

hexadecimal (default) decimal octal binary HA3 0xA3 D163 163 O243 B10100011 C

ASCII character AC ASCII string string NOTE: AB is not same as A,B

Program Structure data defn

data memory CBLOCK 0x000 value1,value2 result queuehd,queuetail queue:40 longv:0,val_h,val_l ENDC UDATA value1 RES value1 RES queue RES longv RES val_h RES val_l RES 1 1 40 0 1 1

Program Structure data defn

EEPROM memory
ORG DE

0xF00000 string,5,3

program memory
ARRAY

program BRA somewhere NOP DB 0x00,0x01,0x02,1 DA ERROR,1 END

Program Structure interrupt vectors

Interrupt vectors and service routines

reset

at 0x0000

should go to the start of the program

high

priority at 0x0008 low priority at 0x0018

normally, go to the start of the two ISRs for now, use BRA $

Program Structure main, s/r

syntax for a line of code wait btfss PIR1,ADIF

; wait for A/D conversion ; to complete

use tabs to separate components case sensitive (default), modifiable in MPLAB label (32 character max)

begins with character or _ contains character, number, _, ? end with :, tab, space, EOL

Memory Organization

program memory
programs data (not modifiable)
implemented

not implemented

Memory Organization

data memory

byte addressable
GPR

GPR

general purpose registers file registers data memory

SFR

not implemented SFR

special function registers

Memory Organization

data memory
alternate

view

Addressing Modes literal

1.

literal addressing (immediate)

operand part of instruction e.g. movlw 5
operand

e.g.

movlb

Addressing Modes literal

other instructions andlw k WREG [WREG] AND k iorlw k WREG [WREG] OR k xorlw k WREG [WREG] XOR k addlw k WREG [WREG] + k sublw k WREG k - [WREG] mullw k PRODH:PRODL [WREG] * k retlw k return from subroutine WREG k PC (TOS)

Addressing Modes direct

2.

Register direct, memory direct

address operand

operand address(es) in instruction

Addressing Modes direct

e.g. MOVWF MOVWF MOVWF Notation:

NUM1 NUM1,0 NUM1,1

NUM1 [WREG]

in text

movwf

f(,BANKED) f(,a)

in datasheet movwf in reference manual

Addressing Modes direct

in code:
movwf movwf movwf movwf movwf movwf ANS,0 ANS,A ANS ANS,1 ANS,BANKED PORTB

Addressing Modes direct

text movf f,F/W(,BANKED) datasheet movf f,(d(,a)) e.g. movf e.g. movf RESULT,W RESULT,F

** strongly recommend that you use F/W instead of 1/0 for readability

Addressing Modes direct

register to register or memory to memory

banking

movff e.g. e.g.

does not apply fS,fD fD [ fS] movff NUM1,NUM2 movff Num2,W

multiply mulwf e.g.

f(,BANKED) PRODH:PRODL WREG * f mulwf INDEX

Reading

Text: Chapter 1:
1.5

Memory Organization 1.9 Addressing Modes

PIC18FXX2 Data Sheet [pdf, 332pp; 2006 Microchip Technology Inc.]

Section

4. Memory Organization - 4.1, 4.7, 4.9-4.13 - fig 4.7; text - fig 1.4 - fig 4.1; text - table 1.2

data memory map for PIC18F452

datasheet datasheet

special function register map