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4, APRIL 2001
Abstract—A new video-speed current-mode CMOS sample- tion of a BiCMOS switched-current circuit. However, supply
and-hold IC has been developed. It operates with a supply voltages of those circuits were still high when we consider
voltage as low as 1.5 V, a signal-to-noise ratio ( ) of 57 dB
and 54 dB with a 1-MHz input signal at clock frequencies of 20
their integration with low-voltage digital circuits on the same
and 30 MHz, and a power dissipation of 2.3 mW. It consists of chip. The noise level that appeared in the spectral plot in the
current-mirror circuits with the node voltages at the input and former study was 66 dB with a read bandwidth of 300 Hz and
the output terminals which are kept constant in all phases of that in the latter study was 67 dB with a read bandwidth of
the input signal by the use of low-voltage operational amplifiers; 290 Hz. These values are probably not sufficient for processing
this reduces the signal current dependency. The low-voltage
operational amplifier consists of a MOS transistor and a constant a wide-band input signal such as a picture signal. Moreover,
current source in a common-gate amplifier configuration. Only the output of an operational amplifier in the latter study, which
two analog switches in differential form were used to construct fixes the node voltage, begins floating in the hold mode of the
the differential sample-and-hold circuit. This minimizes the error current. This probably degrades the noise performance. These
caused by the switch feedthrough, and thus high accuracy can be factors indicate that it is still difficult to realize a low-voltage
realized. Since there is no analog switch in the input path, it is
possible to convert the input signal voltage to a current by simply accurate analog circuit together with high-speed operational
connecting an external resistor. The circuit was fabricated using capability.
standard 0.6- m MOS devices with normal threshold voltages In this paper, we propose the use of a conventional cur-
+
( th ) of 0.7 V (nMOS) and 0.7 V (pMOS). rent-mirror-based circuit and minimum use of an analog
Index Terms—CMOS, current-mode circuit, low voltage, sample- switch to realize a high-speed and accurate low-voltage
and-hold. sample-and-hold circuit intended to be used for picture signal
processing. The input and output voltages of the current-mirror
circuit are kept constant to obtain accurate current matching. A
I. INTRODUCTION
new low-voltage operational amplifier was used to fix the node
(a)
Fig. 2. High-precision current-mirror circuit.
(3) (6)
(4)
When and are sufficiently large, in (6) becomes ex-
actly equal to . is not affected by the change of the and
where is the drain-to-source current and is the channel mod-
the accompanied with a signal current change. The problem
ulation factor of the transistor, the ’s and ’s of M1 and M2
to be considered next is how to design an operational amplifier
do not become equal and thus introduce a current transfer error.
and a sample-and-hold switch under very low voltage supply
Assuming the voltage changes are small, this situation can be
conditions.
analyzed by using a small-signal equivalent circuit, as shown in
Fig. 1(b). Here, the output current becomes
III. REALIZATION OF A LOW-VOLTAGE HIGH-PERFORMANCE
(5) SAMPLE-AND-HOLD CIRCUIT
The designed sample-and-hold circuit is conceptually de-
where ( is 1 or 2) is the transconductance and ( picted in Fig. 4. The input signal is assumed to be in voltage
is 1 or 2) is the output resistance of M1 and M2. Equation form in this configuration; therefore, an input voltage-to-cur-
(5) indicates that does not become equal to even when rent conversion circuit is required. This can be achieved by
and , due to the different ’s simply connecting an external resistor between the input
698 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 4, APRIL 2001
(10)
TABLE I
OVERALL CHIP PERFORMANCE
VI. CONCLUSION
level. These second and third harmonic levels are not small
enough when this sample-and-hold circuit is used in front of a We were able to demonstrate 1.5-V operation of a 30-MS/s
9- or 10-bit current-mode A/D converter. We are not concerned CMOS current-mode sample-and-hold circuit. This was
about any input signal dependency on the on resistance of the achieved using transistors with normal values. We are con-
analog switches in this sample-and-hold circuit, which may in- fident that a 1.5-V operational and accurate analog circuit for
fluence the harmonics level. The supply voltage for the logic video use can now be realized by applying this current-based
gates, which drives the gates of the analog switches, can be set circuit technique.
to over 1.5 V in this chip, within the range where the parasitic
diode does not conduct. Since we observed a 5-dB improvement
REFERENCES
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