Rajalakshmi Engineering College: Department of Electronics and Communication Engineering

CS2259-MICROPROCESSORS LAB-IT A
RAJALAKSHMI ENGINEERING COLLEGE

Thandalam, Chennai 602 105.
Department of Electronics and Communication

Engineering
CS2259 -
MICROPROCESSORS
LABORATORY
IV SEM
INFORMATION TECHNOLOGY
PREPARED BYMr.M.SATHISH
CS2259 - Microprocessors Lab

IV Semester IT
Syllabus
1. Programming with 8085
2. Programming with 8086-experiments including BIOS/DOS calls:
Keyboard control
Display
File Manipulation
3. Interfacing with 8085/8086-8255,8253
4. Interfacing with 8085/8086-8279,8251
5. 8051 Microcontroller based experiments for Control

Applications
6. Mini- Project
CYCLE I
8085 Programming
1. Introduction to 8085
2. 8 bit Addition and Subtraction
3. 8 bit Multiplication and Division
4. 16 bit Addition and Subtraction
5. 16 bit Multiplication and Division
6. Largest and Smallest number in an array
7. Sorting in Ascending and Descending Order
CYCLE II
8086 Programming
BIOS/DOS calls
8. BIOS/DOS calls Display
9. BIOS/DOS calls File Manipulation
10. BIOS/DOS calls Disk information
Interfacing
11. Interfacing 8255 PPI IC with 8086
12. Interfacing 8253 Timer IC with 8086
13. Interfacing 8279 Keyboard/Display IC with 8085/8086
14. Interfacing 8251 Serial communication IC with 8085/8086
8051 Programming
15. Stepper motor interface
1. INTRODUCTION TO 8085
INTEL 8085 is one of the most popular 8-bit microprocessor capable of
addressing 64 KB of memory and its architecture is simple. The device has 40 pins,
requires +5 V power supply and can operate with 3MHz single phase clock.
ALU (Arithmetic Logic Unit):
The 8085A has a simple 8-bit ALU and it works in coordination with the
accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has
the capability of performing several mathematical and logical operations. The
temporary registers are used to hold the data during an arithmetic and logic operation.
The result is stored in the accumulator and the flags are set or reset according to the
result of the operation. The flags are affected by the arithmetic and logic operation.
They are as follows:
Sign flag
After the execution of the arithmetic - logic operation if the bit D7
of the result is 1, the sign flag is set. This flag is used with signed
numbers. If it is 1, it is a negative number and if it is 0, it is a positive
number.
Zero flag
The zero flag is set if the ALU operation results in zero. This flag
is modified by the result in the accumulator as well as in other registers.
Auxillary carry flag

In an arithmetic operation when a carry is generated by digit D3
and passed on to D4, the auxillary flag is set.
Parity flag
After arithmetic logic operation, if the result has an even number
of 1s the flag is set. If it has odd number of 1s it is reset.
Carry flag
If an arithmetic operation results in a carry, the carry flag is set.
The carry flag also serves as a borrow flag for subtraction.
Timing and control unit

This unit synchronizes all the microprocessor operation with a clock and
generates
the
control
signals
necessary
for
communication
between
the
microprocessor and peripherals. The control signals RD (read) and WR (write)

indicate the availability of data on the data bus.
Instruction register and decoder
The instruction register and decoder are part of the ALU. When an instruction is
fetched from memory it is loaded in the instruction register. The decoder decodes the
instruction and establishes the sequence of events to follow.
Register array
The 8085 has six general purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H and L. they can be combined
as BC, DE and HL to perform 16-bit operation.
Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to
store 8-bit data and to perform arithmetic and logic operation. The result of an
operation is stored in the accumulator.
Program counter
The program counter is a 16-bit register used to point to the memory address of
the next instruction to be executed.
Stack pointer
It is a 16-bit register which points to the memory location in R/W memory, called
the Stack.
Communication lines
8085 microprocessor performs data transfer operations using three communication
lines called buses. They are address bus, data bus and control bus.
Address bus it is a group of 16-bit lines generally identified as A0 A15.

The address bus is unidirectional i.e., the bits flow in one direction from
microprocessor to the peripheral devices. It is capable of addressing 2 16
memory locations.
Data bus it is a group of 8 lines used for data flow and it is bidirectional.
The data ranges from 00 FF.
Control bus it consist of various single lines that carry synchronizing

signals. The microprocessor uses such signals for timing purpose.
2(A). 8 BIT DATA ADDITION

AIM:
To add two 8 bit numbers stored at consecutive memory locations.
ALGORITHM:
6
1.
2.
3.
4.
Initialize memory pointer to data location.

Get the first number from memory in accumulator.
Get the second number and add it to the accumulator.
Store the answer at another memory location.
RESULT:
START
Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 &
4503.
[C]
00H
[HL]
4500H
[A]
[M]
[HL][HL]+1
[A][A]+[M]
Is there a
Carry ?
[C][C]+1
[HL][HL]+1
FLOW CHART:
[M]
[A]
[HL][HL]+1
[M]
[C]
7
STOP
NO
YES
PROGRAM:
ADDRESS OPCODE LABEL
4100
START
4101
4102
4103
MNEMONICS OPERAND
MVI
C, 00
LXI
H, 4500
COMMENT
Clear C reg.
Initialize HL reg. to
4500
4104
4105
MOV
A, M
4106
INX
4107
ADD
4108
4109
410A
JNC
L1
410B
410C
INR
INX
C
H
410D
MOV
M, A
410E
INX
410F
4110
MOV
HLT
M, C
L1
Transfer first data to

accumulator
Increment HL reg. to
point next memory
Location.
Add first number to
acc. Content.
Jump to location if
result does not yield
carry.
Increment C reg.
point next memory
Location.
Transfer the result from
acc. to memory.
point next memory
Location.
Move carry to memory
Stop the program
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
2(B). 8 BIT DATA SUBTRACTION

AIM:
To Subtract two 8 bit numbers stored at consecutive memory locations.
9
ALGORITHM:
1.
2.
3.
4.

Get the first number from memory
in accumulator.
START
Get the second number and subtract from the accumulator.
If the result yields a borrow, the content of the acc. is complemented and 01H is
added to it (2s complement). A register is cleared and the content of that reg. is
incremented in case there is[C]
a borrow.
00H If there is no borrow the content of the acc.
is directly taken as the result.
5. Store the answer at next memory location.
[HL] 4500H
RESULT:
[A] [M]
Thus the 8 bit numbers stored at 4500
&4501 are subtracted and the result stored at 4502
& 4503.
[HL][HL]+1
[A][A]-[M]
Is there a
Borrow ?
Complement [A]
Add 01H to [A]
[C][C]+1
[HL][HL]+1
FLOW CHART:
[M]
[A]
[HL][HL]+1
[M]
[C]
10
STOP
NO
YES
PROGRAM:
4100
START
4102
4102
4103
MNEMONICS OPERAND
MVI
C, 00
LXI
H, 4500
COMMENT
Clear C reg.
4500
11
4104
4105
MOV
A, M
4106
INX
4107
SUB
4108
4109
410A
JNC
L1
410B
410C
INR
CMA
410D
410E
410F
ADI
01H
INX
4110
MOV
M, A
4111
INX
4112
4113
MOV
HLT
M, C
L1

accumulator
point next mem.
Location.
Subtract first number
from acc. Content.
Jump to location if
result does not yield
borrow.
Increment C reg.
Complement the Acc.
content
Add 01H to content of
acc.
point next mem.
Location.
acc. to memory.
point next mem.
Location.
Move carry to mem.
Stop the program
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
12
3(A). 8 BIT DATA MULTIPLICATION

AIM:
To multiply two 8 bit numbers stored at consecutive memory locations and store
the result in memory.
ALGORITHM:
LOGIC: Multiplication can be done by repeated addition.
1.
2.
3.
4.
5.
6.
7.
8.

Move multiplicand to a register.
Move the multiplier to another register.
Clear the accumulator.
Add multiplicand to accumulator
Decrement multiplier
Repeat step 5 till multiplier comes to zero.
The result, which is in the accumulator, is stored in a memory location.
RESULT:
Thus the 8-bit multiplication was done in 8085p using repeated addition method.
13
FLOW CHART:
START
[HL] 4500
B M
[HL] [HL]+1
A 00
C 00
[A] [A] +[M]
Is there
any
carry
NO
YES
C C+1
B B-1
NO
IS
B=0
YES
A
14
A
[HL][HL]+1
[M]
[A]
[HL][HL]+1
[M]
[C]
STOP
15
PROGRAM:
4100
START
4101
4102
4103
MNEMONICS
LXI
OPERAND
H, 4500
COMMENT
4500
MOV
B, M
4104
INX
4105
4106
4107
4108
MVI
A, 00H

reg. B
point next mem.
Location.
Clear the acc.
MVI
C, 00H
Clear C reg for carry
ADD
410A
JNC
NEXT
410B
410C
410D
410E
410F
4110
4111
4112
Add multiplicand
multiplier times.
Jump to NEXT if there
is no carry
INR
DCR
JNZ
C
B
L1
Increment C reg
Decrement B reg
Jump to L1 if B is not
zero.
INX
4113
MOV
M, A
4114
INX
4115
MOV
M, C
4116
HLT
point next mem.
Location.
acc. to memory.
point next mem.
Location.
C reg. to memory.
Stop the program
4109
L1
NEXT
OBSERVATION:
INPUT
4500
4501
OUTPUT
4502
4503
16
3(B). 8 BIT DIVISION

AIM:
To divide two 8-bit numbers and store the result in memory.
ALGORITHM:
LOGIC: Division is done using the method Repeated subtraction.
1. Load Divisor and Dividend
2. Subtract divisor from dividend
3. Count the number of times of subtraction which equals the quotient
4. Stop subtraction when the dividend is less than the divisor .The dividend now
becomes the remainder. Otherwise go to step 2.
5. stop the program execution.
RESULT:
Thus an ALP was written for 8-bit division using repeated subtraction method and
executed using 8085 p kits
17
FLOWCHART:
START
B 00
[HL] 4500
A M
[HL] [HL]+1
M A-M
[B] [B] +1
IS A<0
NO
YES
A A+ M
B B-1
[HL][HL]+1
[M]
[A]
[HL][HL]+1
[M]
[B]
STOP
18
PROGRAM:
ADDRESS
OPCODE LABEL
MNEMO
NICS
MVI
OPERA
ND
B,00
LXI
H,4500
MOV
INX
A,M
H
SUB
INR
JNC
M
B
LOOP
ADD
DCR
INX
M
B
H
410F
MOV
M,A
4110
INX
4111
MOV
M,B
4112
HLT
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
410A
410B
410C
410D
410E
LOOP
COMMENTS
Clear B reg for quotient
4500H
Transfer dividend to acc.
Increment HL reg. to point
next mem. Location.
Subtract divisor from dividend
Increment B reg
Jump to LOOP if result does
not yield borrow
Add divisor to acc.
Decrement B reg
next mem. Location.
Transfer the remainder from
acc. to memory.
next mem. Location.
Transfer the quotient from B
reg. to memory.
Stop the program
OBSERVATION:
S.NO
1
2
ADDRESS
4500
4501
4500
4501
INPUT
DATA
ADDRESS
4502
4503
4502
4503
OUTPUT
DATA
19
4(A). 16 BIT DATA ADDITION

AIM:
To add two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.

Get the first number from memory and store in Register pair.
Get the second number in memory and add it to the Register pair.
Store the sum & carry in separate memory locations.
RESULT:
Thus an ALP program for 16-bit addition was written and executed in 8085p
using special instructions.
20
FLOW CHART:
START
[L]
[H]
[4050 H]
[4051 H]
[DE]
[HL]
[L]
[H]
[4052H]
[4053H]
[A]00H
[HL][HL]+[DE]
Is there a
Carry?
NO
YES
[A][A]+1
[4054][ L]
[4055] [H]
[4056]
[A]
STOP
21
PROGRAM:
4000
START
4001
4002
4003
4004
4005
4006
4007
4008
4009
MNEMONICS OPERAND
LHLD
4050H
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
LOOP
COMMENT
Load the augend in DE
pair through HL pair.
XCHG
LHLD
4052H
Load the addend in HL

pair.
MVI
A, 00H
DAD
JNC
LOOP
INR
SHLD
4054H
STA
4056H
Initialize reg. A for

carry
Add the contents of HL
Pair with that of DE
pair.
If there is no carry, go
to the instruction
labeled LOOP.
Otherwise increment
reg. A
Store the content of HL
Pair in 4054H(LSB of
sum)
Store the carry in
4056H through Acc.
(MSB of sum).
Stop the program.
HLT
OBSERVATION:
ADDRESS
4050H
4051H
4052H
4053H
INPUT
DATA
ADDRESS
4054H
4055H
4056H
OUTPUT
DATA
22
4(B). 16 BIT DATA SUBTRACTION

AIM:
To subtract two 16-bit numbers stored at consecutive memory locations.
ALGORITHM:
1.
2.
3.
4.
5.

Get the subtrahend from memory and transfer it to register pair.
Get the minuend from memory and store it in another register pair.
Subtract subtrahend from minuend.
Store the difference and borrow in different memory locations.
RESULT:
Thus an ALP program for subtracting two 16-bit numbers was written and
executed.
23
FLOW CHART:
START
[L]
[H]
[4050 H]
[4051 H]
[DE]
[HL]
[L]
[H]
[4052H]
[4053H]
[HL][HL]-[DE]
Is there a
borrow?
NO
YES
[C][C]+1
[4054][ L]
[4055] [H]
[4056]
[C]
STOP
24
PROGRAM:
MNEMO
NICS
MVI
OPER COMMENTS
AND
C, 00
Initialize C reg.
LHLD
4050H
Load the subtrahend in DE

reg. Pair through HL reg.
pair.
XCHG
LHLD
4052H
Load the minuend in HL reg.

Pair.
MOV
A, L
400A
SUB
400B
MOV
L, A
400C
MOV
A, H
400D
SBB
400E
MOV
H, A
400F
4010
4011
4012
4013
4014
4015
4016
SHLD
4054H
Move the content of reg. L to

Acc.
Subtract the content of reg.
E from that of acc.
Move the content of Acc. to
reg. L
Move the content of reg. H to
Acc.
Subtract content of reg. D
with that of Acc.
Transfer content of acc. to
reg. H
Store the content of HL pair
in memory location 8504H.
JNC
NEXT
If there is borrow, go to the

instruction labeled NEXT.
INR
MOV
C
A, C
STA
4056H
Increment reg. C
Transfer the content of reg. C
to Acc.
Store the content of acc. to
the memory location 4506H
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
START
NEXT
4017
4018
4019
401A
HLT
Stop the program execution.
OBSERVATION:
ADDRESS
4050H
4051H
4052H
4053H
INPUT
DATA
ADDRESS
4054H
4055H
4056H
OUTPUT
DATA
25
5(A). 16 BIT MULTIPLICATION

AIM:
To multiply two 16 bit numbers and store the result in memory.
ALGORITHM:
1.
2.
3.
4.
Get the multiplier and multiplicand.

Initialize a register to store partial product.
Add multiplicand, multiplier times.
Store the result in consecutive memory locations.
RESULT:
Thus the 16-bit multiplication was done in 8085p using repeated addition
method.
26
FLOWCHART:
START
L
H
[4050]
[4051]
SP HL
L
H
[4052]
[4053]
DE
HL
HL0000
BC0000
HLHL+SP
Is Carry
flag set?
BCBC+1
DEDE+1
Is Zero
flag set?
27
NO
YES
NO
YES
A
[4054]
[4055]
L
H
[4056]
[4057]
C
B
STOP
28
ADDRESS OPCODE LABEL MNEM
8000
4001
4002
4003
4004
4005
4006
4007
4008
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
401A
401B
401C
401D
401E
401F
4020
4021
4022
4023
4024
START
OPERAN COMMENTS
O
D
N
I
C
S
LHLD
4050
Load the first No. in stack pointer
through HL reg. pair
SPHL
LHLD
4052
XCHG
LXI
H, 0000H
LXI
B, 0000H
DAD
JNC
SP
NEXT
Add SP with HL pair.

If there is no carry, go to the
instruction labeled NEXT
INX
DCX
MOV
ORA
JNZ
B
D
A,E
D
LOOP
Increment BC reg. pair

Decrement DE reg. pair.
Move the content of reg. E to Acc.
OR Acc. with D reg.
If there is no zero, go to instruction
labeled LOOP
SHLD
4054
MOV
STA
A, C
4056
Store the content of HL pair in

memory locations 4054 &
4055.
Move the content of reg. C to Acc.
Store the content of Acc. in
memory location 4056.
MOV
STA
A, B
4057
Load the second No. in HL reg.

pair
& Exchange with DE reg. pair.
Clear HL & DE reg. pairs.
LOOP
NEXT
HLT
Move the content of reg. B to Acc.

Store the content of Acc. in
memory location 4056.
Stop program execution
29
OBSERVATION:
ADDRESS
INPUT
DATA
OUTPUT
ADDRESS
DATA
4050
4051
4052
4054
4055
4056
4053
4057
5(B). 16- BIT DIVISION

AIM:
To divide two 16-bit numbers and store the result in memory using 8085
mnemonics.
ALGORITHM:
1.
2.
3.
4.
5.
Get the dividend and divisor.

Initialize the register for quotient.
Repeatedly subtract divisor from dividend till dividend becomes less than divisor.
Count the number of subtraction which equals the quotient.
Store the result in memory.
RESULT:
Thus the 16-bit Division was done in 8085p using repeated subtraction method.
30
FLOWCHART:
START
L
[4051]
H [4052]
HL
DE
L [4050]
H [4051]
BC 0000H
L; AA- E
LA
AH
AA- H- Borrow
HA
BCBC+ 1
NO
Is Carry
flag set ?
YES
A
31
A
BCBC- 1
HLHL+DE
L[4054]
H[4055]
AC
[4056] A
AB
[4057] A
STOP
32
PROGRAM:
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
401A
401B
401C
401D
401E
401F
4020
4021
OBSERVATION:
INPUT
ADDRESS DATA
4050
4051
4052
4053
START
MNEM
ONICS
LHLD
OPERA
ND
4052
COMMENTS
XCHG
LHLD
4050
Load the second No. in HL reg. pair

& Exchange with DE reg. pair.
LXI
B, 0000H
Load the first No. in stack pointer

through HL reg. pair
Clear BC reg. pair.

LOOP
MOV
SUB
MOV
MOV
SBB
MOV
INX
JNC
A, L
E
L, A
A, H
D
H, A
B
LOOP
Move the content of reg. L to Acc.

Subtract reg. E from that of Acc.
Move the content of Acc to L.
Move the content of reg. H Acc.
Subtract reg. D from that of Acc.
Move the content of Acc to H.
Increment reg. Pair BC
If there is no carry, go to the location
labeled LOOP.
DCX
DAD
SHLD
B
D
4054
Decrement BC reg. pair.

Add content of HL and DE reg. pairs.
Store the content of HL pair in 4054 &
4055.
MOV
STA
A, C
4056
Move the content of reg. C to Acc.

Store the content of Acc. in memory
4056
MOV
STA
A, B
4057
Move the content of reg. B to Acc.

Store the content of Acc. in memory
4057.
HLT
Stop the program execution.
OUTPUT
ADDRESS DATA
4054
4055
4056
4057
33
6(A). LARGEST ELEMENT IN AN ARRAY

AIM:
To find the largest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the largest number in the given array is found out.
34
FLOW CHART:
START
[HL] [4100H]
[B] 04H
[A] [HL]
[HL [HL] + 1
NO
IS
[A] <
[HL]?
YES
[A] [HL]
[B] [B]-1
IS
[B] =
0?
NO
YES
[4105] [A]
STOP
35
PROGRAM:
ADDRE
SS
4001
4002
4003
4004
4005
4006
4007
OPCO
DE
4008
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
LABEL
LOOP1
LOOP
MNEM
ONICS
LXI
OPER
AND
H,4100
MVI
B,04
MOV
INX
A,M
H
CMP
JNC
M
LOOP
MOV
DCR
JNZ
A,M
B
LOOP1
STA
4105
HLT
COMMENTS
4100H
Initialize B reg with no. of
comparisons(n-1)
Transfer first data to acc.
next memory location
Compare M & A
If A is greater than M then go
to loop
Transfer data from M to A reg
Decrement B reg
If B is not Zero go to loop1
Store the result in a memory
location.
Stop the program
OBSERVATION:
INPUT
ADDRESS DATA
4100
4101
4102
4103
4104
OUTPUT
ADDRESS DATA
4105
36
6(B). SMALLEST ELEMENT IN AN ARRAY

AIM:
To find the smallest element in an array.
ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.
RESULT:
Thus the smallest number in the given array is found out.
37
FLOW CHART:
START
[HL] [4100H]
[B] 04H
[A] [HL]
[HL [HL] + 1
YES
IS
[A] <
[HL]?
NO
[A] [HL]
[B] [B]-1
IS
[B] =
0?
NO
YES
[4105] [A]
STOP
38
PROGRAM:
ADDRE
SS
4001
4002
4003
4004
4005
4006
4007
OPCO
DE
4004
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
LABEL
LOOP1
LOOP
MNEM
ONICS
LXI
OPER
AND
H,4100
MVI
B,04
MOV
INX
A,M
H
CMP
JC
M
LOOP
MOV
DCR
JNZ
A,M
B
LOOP1
STA
4105
HLT
COMMENTS
4100H
Initialize B reg with no. of
comparisons(n-1)
Compare M & A
If A is lesser than M then go
to loop
Transfer data from M to A reg
Decrement B reg
Store the result in a memory
location.
Stop the program
OBSERVATION:
INPUT
ADDRESS DATA
4100
4101
4102
4103
4104
OUTPUT
ADDRESS DATA
4105
39
7(A).ASCENDING ORDER
AIM:
To sort the given number in the ascending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is larger than second then I
interchange the number.
3. If the first number is smaller, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the ascending order program is executed and thus the numbers are arranged
in ascending order.
40
FLOWCHART:
START
[B] 04H
[HL] [4100H]
[C] 04H
[A] [HL]
[HL [HL] + 1
YES
IS
[A] <
[HL]?
NO
[D] [HL]
[HL] [A]
[HL] [HL] - 1
[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H
41
IS
[C] =
0?
NO
YES
[B] [B]-1
IS
[B] =
0?
NO
YES
STOP
PROGRAM:
42
ADDR
E
SS
4000
4001
4002
4003
4004
4005
4006
4007
4004
OPCO
DE
LABEL
LOOP 3
LOOP2
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
4015
4016
4017
4014
4019
401A
LOOP1
MNEM
ONICS
OPER
AND
MVI
B,04
LXI
H,4100
MVI
C,04
MOV
INX
A,M
H
CMP
JC
M
LOOP1
MOV
MOV
DCX
MOV
INX
DCR
JNZ
D,M
M,A
H
M,D
H
C
LOOP2
Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2
DCR
JNZ
B
LOOP3
Decrement B reg
HLT
COMMENTS
Initialize B reg with number
of comparisons (n-1)
4100H
Initialize C reg with no. of
comparisons(n-1)
Compare M & A
If A is less than M then go to
loop1
Stop the program
OBSERVATION:
INPUT
MEMORY
LOCATION
4100
4101
4102
4103
4104
OUTPUT
DATA
MEMORY
LOCATION
4100
4101
4102
4103
4104
DATA
43
7(B). DESCENDING ORDER

AIM:
To sort the given number in the descending order using 8085 microprocessor.
ALGORITHM:
1. Get the numbers to be sorted from the memory locations.
2. Compare the first two numbers and if the first number is smaller than second then I
interchange the number.
3. If the first number is larger, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order
RESULT:
Thus the descending order program is executed and thus the numbers are arranged
in descending order.
44
FLOWCHART:
START
[B] 04H
[HL] [4100H]
[C] 04H
[A] [HL]
[HL [HL] + 1
NO
IS
[A] <
[HL]?
YES
[D] [HL]
[HL] [A]
[HL] [HL] - 1
[HL] [D]
[HL] [HL] + 1
[C] [C] 01 H
45
IS
[C] =
0?
NO
YES
[B] [B]-1
IS
[B] =
0?
NO
YES
STOP
PROGRAM:
46
ADDRE
SS
4000
4001
4002
4003
4004
4005
4006
4007
4004
OPCO
DE
LABEL
MNEM
ONICS
MVI
OPER
AND
B,04
LXI
H,4100
MVI
C,04
MOV
INX
A,M
H
CMP
JNC
M
LOOP1
MOV
MOV
DCX
MOV
INX
DCR
JNZ
D,M
M,A
H
M,D
H
C
LOOP2
Transfer data from M to D reg

Transfer data from acc to M
Decrement HL pair
Transfer data from D to M
Increment HL pair
Decrement C reg
If C is not zero go to loop2
DCR
JNZ
B
LOOP3
Decrement B reg
LOOP 3
LOOP2
4009
400A
400B
400C
400D
400E
400F
4010
4011
4012
4013
4014
4015
4016
4017
4014
4019
401A
LOOP1
HLT
COMMENTS
Initialize B reg with number
of comparisons (n-1)
4100H
Initialize C reg with no. of
comparisons(n-1)
Compare M & A
If A is greater than M then go
to loop1
Stop the program
OBSERVATION:
INPUT
MEMORY
LOCATION
4100
4101
4102
4103
4104
OUTPUT
DATA
MEMORY
LOCATION
4100
4101
4102
4103
4104
DATA
8. BIOS/DOS CALLS DISPLAY
47
AIM:
To display a message on the CRT screen of a microcomputer using DOS calls.
ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for display.
3. Point to the message and run the interrupt to display the message in the CRT.
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA

MOV DS, AX
MOV AH, 09H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H
CODE ENDS
END START
RESULT:
A message is displayed on the CRT screen of a microcomputer using DOS calls
48
9. BIOS/DOS CALLS FILE MANIPULATION

AIM:
To open a file using DOS calls.
ALGORITHM:
1. Initialize the data segment, file name and the message to be displayed.
2. Set the file attribute to create a file using a DOS call.
3. If the file is unable t o create a file display the message
PROGRAM:
DATA SEGMENT
FILENAME DB SAMPLE.DAT, $
MSG DB 0DH, 0AH, FILE NOT CREATED, ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET FILENAME
MOV CX, 00H
MOV AH, 3CH
INT 21H
JNC LOOP1
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET MSG
MOV AH, 09H
INT 21H
LOOP1
MOV AH, 4CH

INT 21H
CODE ENDS
END START
RESULT:
A file is opened using DOS calls.
49
10. BIOS/DOS CALLS DISK INFORMATION

AIM:
To display the disk information.
ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for disk information.
3. Point to the message and run the interrupt to display the message in the CRT.
PROGRAM:
DATA SEGMENT
MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA

MOV DS, AX
MOV AH, 36H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H
CODE ENDS
END START
RESULT:
The disk information is displayed.
50
11.INTERFACING 8255 WITH 8085

AIM:
To interface programmable peripheral interface 8255 with 8085 and study its
characteristics in mode0,mode1 and BSR mode.
APPARATUS REQUIRED:
4085 p kit, 8255Interface board, DC regulated power supply, VXT parallel bus
I/O MODES:
Control Word:
MODE 0 SIMPLE I/O MODE:

This mode provides simple I/O operations for each of the three ports and
is suitable for synchronous data transfer. In this mode all the ports can be configured
either as input or output port.
Let us initialize port A as input port and port B as output port
PROGRAM:
51
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS
4100
START: MVI
A, 90
Initialize port A
as Input and Port
4101
B as output.
4102
OUT
C6
Send Mode
Control word
4103
4104
IN
C0
Read from Port A
4105
4106
OUT
C2
Display the data
in port B
4107
4108
STA
4200
Store the data
read from Port A
4109
in 4200
410A
410B
HLT
Stop the program.
MODE1 STROBED I/O MODE:
In this mode, port A and port B are used as data ports and port C is used as control
signals for strobed I/O data transfer.
Let us initialize port A as input port in mode1
MAIN PROGRAM:
4100
START: MVI
A, B4
Initialize port A
as Input port in
4101
mode 1.
4102
OUT
C6
Send Mode
Control word
4103
4104
MVI
A,09
Set the PC4 bit
for INTE A
4105
4106
OUT
C6
Display the data
in port B
4107
EI
4108
MVI
A,08
Enable RST5.5
4109
410A
SIM
EI
410B
HLT
Stop the program.
ISR (Interrupt Service Routine)
52
4200
4201
4202
4203
4204
4205
START: IN
STA
HLT
C0
Read from port A
4500
Store in 4500.
Stop the program.
Sub program:
405E
JMP
4200
Go to 4200
405F
4060
BSR MODE (Bit Set Reset mode)
53
Any lines of port c can be set or reset individually without affecting other lines
using this mode. Let us set PC0 and PC3 bits using this mode.
PROGRAM:
ADDRESS OPCODES LABEL MNEMONICS
4100
START: MVI
4101
4102
OUT
4103
4104
MVI
4105
OPERAND COMMENTS
A, 01
Set PC0
C6
A,07
Send Mode
Control word
Set PC3
54
4106
4107
4109
OUT
HLT
C6
Send Mode
Control word
Stop the program.
RESULT:
Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is
studied.
12. INTERFACING 8253 TIMER WITH 8085

Interfacing 8253 Programmable Interval Timer with 8085 p
AIM:
To interface 8253 Interface board to 8085 p and to generate a square wave of
150MHz.
APPARATUS REQUIRED:
55
8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus,
CRO.
Mode 3 Square wave generator:
It is similar to Mode 2 except that the output will remain high until one half of count
and go low for the other half for even number count. If the count is odd, the output
will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for
8251A (USART).
Example:
We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.
Address Opcodes Label
Mnemonic Operands
Comments
4100
3E 36
START: MVI
A, 36
Channel 0 in mode 3
4102
D3 CE
OUT
CE
Send Mode Control word
4104
3E 0A
MVI
A, 0A
LSB of count
4106
D3 C8
OUT
C8
Write count to register
4108
3E 00
MVI
A, 00
MSB of count
410A
D3 C8
OUT
C8
Write count to register
410C
76
HLT
Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz.
This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.
Vary the frequency by varying the count. Here the maximum count is FFFF H.
So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H
counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period
of 0.067 microseconds, the resulting square wave has an ON time of 0.02184
microseconds and an OFF time of 0.02184 microseconds.
To increase the time period of square wave, set the jumpers such that CLK2 of
8253 is connected to OUT 0. Using the above-mentioned program, output a square wave
of frequency 150 KHz at channel 0. Now this is the clock to channel 2.
Result:
Thus the 8253 has been interfaced with 8085 p to generate a Square Wave of
150KHz
13. STEPPER MOTOR INTERFACING WITH 8051

AIM:
To interface a stepper motor with 4051 microcontroller and operate it.
56
THEORY:
A motor in which the rotor is able to assume only discrete stationary angular
position is a stepper motor. The rotary motion occurs in a step-wise manner from one
equilibrium position to the next. Stepper Motors are used very wisely in position control
systems like printers, disk drives, process control machine tools, etc.
The basic two-phase stepper motor consists of two pairs of stator poles. Each of
the four poles has its own winding. The excitation of any one winding generates a North
Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic
system has two end faces. It is a permanent magnet with one face as South Pole and the
other as North Pole.
The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC
current to run the motor in clockwise direction. By reversing the phase sequence as A1,
B2, A2, B1, anticlockwise stepping can be obtained.
2-PHASE SWITCHING SCHEME:
In this scheme, any two adjacent stator windings are energized. The switching
scheme is shown in the table given below. This scheme produces more torque.
ANTICLOCKWISE
STEP A1
A2
B1
1
2
3
4
1
0
0
1
0
1
1
0
0
0
1
1
B2
DATA
1
1
0
0
9h
5h
6h
Ah
CLOCKWISE
STEP A1 A2
1
2
3
4
1
0
0
1
0
1
1
0
B1
B2
DATA
1
1
0
0
0
0
1
1
Ah
6h
5h
9h
ADDRESS DECODING LOGIC:

The 74138 chip is used for generating the address decoding logic to generate the
device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data
bus to the stepper motor driving circuitry.
Stepper Motor requires logic signals of relatively high power. Therefore, the
interface circuitry that generates the driving pulses use silicon darlington pair transistors.
The inputs for the interface circuit are TTL pulses generated under software control using
the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated
to high voltage output pulses using a buffer 7407 with open collector.
PROCEDURE:
Enter the above program starting from location 4100.and execute the same. The
stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the
data in the look-up TABLE in the reverse order can vary direction of rotation.
57
PROGRAM :
Address
OPCODES
Label
Comments
ORG
4100h
START:
MOV
DPTR, #TABLE
LOOP:
MOV
MOVX
R0, #04
A, @DPTR
4106
4108
410A
PUSH
PUSH
MOV
DPH
DPL
DPTR, #0FFC0h
410D
MOVX
@DPTR, A
MOV
MOV
R4, #0FFh
R5, #0FFh
DJNZ
R5, DELAY1
4114
4116
4118
411A
DJNZ
POP
POP
INC
R4, DELAY
DPL
DPH
DPTR
411B
DJNZ
R0, LOOP
411D
SJMP
START
DB
09 05 06 0Ah
4100
4103
4105
410E
4110
4112
411F
DELAY
:
DELAY
1:
TABLE:
Load the start

address of switching
scheme data TABLE
into Data Pointer
(DPTR)
Load the count in R0
Load the number in
TABLE into A
Push DPTR value to
Stack
Load the Motor port
address into DPTR
Send the value in A
to stepper Motor port
address
Delay loop to cause
a specific amount of
time delay before
next data item is sent
to the Motor
POP back DPTR
value from Stack
Increment DPTR to
point to next item in
the table
Decrement R0, if not
zero repeat the loop
Short jump to Start
of the program to
make the motor
rotate continuously
Values as per twophase switching
scheme
RESULT:
Thus a stepper motor was interfaced with 4051 and run in forward and reverse
directions at various speeds.
58

Rajalakshmi Engineering College: Department of Electronics and Communication Engineering

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CS2259-MICROPROCESSORS LAB-IT A

RAJALAKSHMI ENGINEERING COLLEGE

Department of Electronics and Communication

CS2259 - Microprocessors Lab

5. 8051 Microcontroller based experiments for Control

Auxillary carry flag

Timing and control unit

microprocessor and peripherals. The control signals RD (read) and WR (write)

Address bus it is a group of 16-bit lines generally identified as A0 A15.

Control bus it consist of various single lines that carry synchronizing

2(A). 8 BIT DATA ADDITION

Initialize memory pointer to data location.

Transfer first data to

2(B). 8 BIT DATA SUBTRACTION

Initialize memory pointer to data location.

Transfer first data to

3(A). 8 BIT DATA MULTIPLICATION

Initialize memory pointer to data location.

Transfer first data to

Clear C reg for carry

3(B). 8 BIT DIVISION

4(A). 16 BIT DATA ADDITION

Initialize memory pointer to data location.

Load the addend in HL

Initialize reg. A for

4(B). 16 BIT DATA SUBTRACTION

Initialize memory pointer to data location.

Load the subtrahend in DE

Load the minuend in HL reg.

Move the content of reg. L to

If there is borrow, go to the

Stop the program execution.

5(A). 16 BIT MULTIPLICATION

Get the multiplier and multiplicand.

ADDRESS OPCODE LABEL MNEM

Add SP with HL pair.

Increment BC reg. pair

Store the content of HL pair in

Load the second No. in HL reg.

Clear HL & DE reg. pairs.

Move the content of reg. B to Acc.

5(B). 16- BIT DIVISION

Get the dividend and divisor.

Load the second No. in HL reg. pair

Load the first No. in stack pointer

Clear BC reg. pair.

Move the content of reg. L to Acc.

Decrement BC reg. pair.

Move the content of reg. C to Acc.

Move the content of reg. B to Acc.

Stop the program execution.

6(A). LARGEST ELEMENT IN AN ARRAY

6(B). SMALLEST ELEMENT IN AN ARRAY

Transfer data from M to D reg

Stop the program

7(B). DESCENDING ORDER

Transfer data from M to D reg

Stop the program

8. BIOS/DOS CALLS DISPLAY

MOV AX, DATA

9. BIOS/DOS CALLS FILE MANIPULATION

MOV AH, 4CH

10. BIOS/DOS CALLS DISK INFORMATION