University of Pennsylvania Department of Electrical and Systems Engineering ESE171 - Digital Design Laboratory

Lab 2: Traffic Light Controller

Purpose
In this introductory lab, you will learn how to: Convert truth tables into combinational logic circuits Design a decoder for a seven-segment display Use buses and the pattern wizard for the behavior simulation. Experimentally verify the operation of a combinational traffic controller

Tutorials
You should read through these tutorials before lab to make the lab process easier. The VHDL tutorial is quite long, so you should at least skim it. Pay special attention to Section 9c. The other two tutorials are fairly short and deal with the schematic and simulation aspects of the lab. These tasks were not covered in the Lab 1 tutorial, so make sure you spend time to understand them. Familiarize yourself with the VHDL tutorial Read How to use Buses and Bus Taps Read the tutorial on Pattern Wizard

Pre-lab and Background

Congratulations! You have just been hired as an integrated circuit (IC) designer. On your first day of work, an order is placed for a shipment of traffic light controller chips and it is your job to design them according to the following specifications (no, there is no training period; do it wrong, and, well, we will not elaborate): The controller will be used for a one way, single lane street light with a crosswalk The system has four input signals: o E: Emergency Car Presence o C: Car Presence o A: Pedestrian Arrived o W: Pedestrian Waiting The system has three output signals, one for each light: Green, Yellow, Red The customer has also requested that in addition to simple binary outputs, the chip should output a three-letter representation of each code to be displayed on a sevensegment display for debugging purposes. These codes are: o Green = grn o Yellow = yel o Red = red o Error = err The system adheres to a set of logic, as given below: o If all input signals are low, then cars get precedence (green) o If the emergency car signal is high, cars get precedence (green), except o The emergency car presence and car presence signals should never by high simultaneously since the system use the same channel for both signals (and thus are physically incapable of transmitting both signals simultaneously). If both emergency car presence and car presence signals are high, something has gone wrong and the lights should reflect an error state (green, yellow, and red) o Waiting pedestrians get precedence over cars, but not emergency cars (red) o Pedestrians who have just arrived must wait for a little while, regardless of whether there is a car or not (yellow) o If there are both waiting and arriving pedestrians, then the waiting pedestrian gets precedence (red)

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1. Fill in the table below according to the given specifications. Input C A W 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Output Yellow

E 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

Green

Red

2. Find the logic expression (in terms of the inputs E, C, A, W) for each output (Green, Yellow, and Red). It would be beneficial to you to minimize these expressions using skills learned in lecture. Remember that the smaller the design, the easier the implementation using Xilinx.

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Your next task is to design the output decoder for the seven-segment display (SSD). It will take in three signals from the combinational circuit, each representing a color signal (green, yellow, and red). Your decoder will need to take these signals and output the appropriate signals to get the SSD to display the appropriate three-letter text code.

Figure 1: Seven-Segment Display Seven-segment displays work by taking seven input segments (A, B, C, D, E, F, G) and turning the corresponding segment on and off based upon the setting of each bit (see Figure 1). We will ignore the decimal point (DP) for now. The input to a seven-segment display is a string of seven bits representing the state of the seven segments. In this bit string, A is the most-significant bit (MSB) and G is the least-significant bit (LSB). Remember this order. You will be using SSDs for the rest of the semester. However, rather than making a display with 28 inputs (four letters times seven segments each), we will use a module that contains seven wires for the segments and four additional wires multiplexing between the four digits. How does one display three different letters simultaneously using only one select pin? This is done by switching through the select inputs to the display so quickly that the human eye sees continuous output on each SSD. Taking advantage of the way the human eye works is also behind the technology used to dim lights and play video. Now, you can take a deep breath and relax. Your co-worker (read: your TA) has graciously taken on the job of creating the switching circuitry so that all you need to design is the SSD decoder. This switching unit takes in a 21-bit signal (a bus containing seven-bits for each of the three characters) and outputs it to the display.

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3. Determine the 21-bit representation for each of the four codes if each letter has the representation given below. The first one has been completed for you as an example. Again, remember that the most significant bit is 'A' and the least significant bit is 'G'. NOTE: The display sections are active-low, meaning they turn off when the inputs are high and turn on when the inputs are low. G = A,B,C,D,F,G E = A,D,E,F,G R = E,G L = D,E,F g 0000100 y r Red e Error r r N = C,E,G D = B,C,D,E,G r e e Y = B,C,D,F,G

n l d

Green Yellow

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In Lab Assignment
Part I: Traffic Light Controller
1. Create a new project. Place the project in C:\user\your_name\. Of course, replace your_name with a unique identifier for your team. 2. Create a new top-level schematic source and call it TrafficTop. This schematic will be where you will assemble all the pieces of this lab (the controller, the decoder, and the switcher module we have provided). 3. Create another schematic source and call this TrafficController. This circuit will be where you assemble the combinational logic that represents the problem statement given earlier. 4. The TrafficController block should have four inputs and six outputs. Each output (Red, Yellow, Green) needs to be duplicated. Why? As you will soon learn, wires feeding bus taps must have the same name as the bus. Wires feeding pins must have the same name as the pin. Thus, a single wire cannot feed both a bus and a pin without using a buffer. This can be done either in the TrafficController module or the Top-level. To keep the top-level as clean as possible, we recommend duplicating the outputs in the TrafficController module. An easy way of replicating an output without sharing the same wire is by using a buffer (Xilinx module buf). A buffer simply outputs the input, but allows you to name them differently. 5. Do a behavioral simulation to verify that your traffic controller is functioning correctly. Make use of the Pattern Wizard to put in all possible combinations of inputs. Use the Pattern Wizard tutorial on the ESE171 website as reference. 6. After you have verified the circuit is working correctly, take a screenshot of your schematic. Also, take a screenshot of your behavioral simulation and make sure that all your test cases are visible. You will submit both of these along with the discussion questions. 7. Create a symbol for this schematic.

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Part II: Decoder

1. Add a new VHDL module and call it Decoder 2. In the wizard window, specify the inputs and outputs of the decoder. Make use of buses for the inputs and outputs. See the Bus Tutorial on the ESE171 website. 3. You will use VHDL to design this decoder. Specifically, you should use the with-select structure to list out all the possible combinations (which you derived in the pre-lab). This command allows you to set a target expression and alter the outputs based on a given selection. For more information on how to use this command, read the VHDL Primer, Section 9c, on the ESE171 website. 4. Save the module, press F5 to refresh the workspace. Do a behavioral simulation to test a few cases. Since these are seven-segment display codes, it may be more difficult to make sense of them. However, it is still important to ensure that you have programmed it correctly before proceeding. 5. Take a screenshot of your behavioral simulation. Copy your code file (it is plain text, and can be opened using any text editor) for submission and reference. 6. Create a schematic symbol for the Decoder module.

Updated January 28, 2012

Part III: Top Level Schematic

1. Insert the two lower level macros (TrafficController and Decoder) you created in the connect the inputs and outputs to finish your top level schematic (TrafficTop). Use Figure 2 below as a reference. As you will notice in the schematic, buses (the thick wires) are used to aggregate and split up inputs. Use bus taps to interface with the buses. See the bus tutorial on the ESE171 website for more information. 2. Download the Switcher VHDL file (link). Use the Add Copy of Source option to add this source to your project. Create a schematic symbol. 3. Add the switcher to your top-level and connect the inputs and outputs as shown below. Name the input pin for the switcher clock sysclk. During the pin assignments phase, you will connect this pin to the onboard system clock. Also, ensure you have placed the LDG pin. 4. In all, there should be five input pins (E, C, A, W, sysclk), and 5 output pins (YellowOut, RedOut, GreenOut, Cathodes<6:0>, Anodes<3:0>).

TrafficController

Figure 2: Top Level Schematic in Xilinx

5. Check the schematic (using the design checker tool) to make sure no design errors have occurred.

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6. Take a screenshot of the top-level schematic. 7. Now, implement the design on the board. If you need to refresh your memory, refer to the Half Adder Tutorial. You should do all the steps under Implementation and Programming the Board. You may skip the Timing Simulation section for this lab. 8. When you assign the pins, note the pin numbers for sysclk and LDG, as well as the order of the cathodes and the anodes. 9. Download the design onto the board and give a demo to a TA. 10. Before leaving the lab, archive your project (in Xilinx, go to Project, and then Archive, to save a .zip file of your entire project) and store it on your SEAS account or on a flash drive. Make sure you have all necessary screenshots. Delete your project from the computer.

Updated January 28, 2012