PREPARED BY: BERNARDINO, CHRISTINE KATE S. Chapter 5: I. True or False. Write TRUE is the statement is correct or is a fact.

Otherwise, FALSE if it is incorrect. 1. The low level of abstraction is called the gate-level. 2. We cannot instantiate a gate without instance name. 3. The default delay value is the typical value. Identification. Identify what term is asked on each number 1. It is the delay associated with the transition from another state to 1. 2. It is a gate that has one scalar output and one or more scalar inputs which complements the input signal. 3. It is a gate that has multiple inputs and one scalar output whose output is 1 if any of the inputs is 1. Multiple Choice. Choose the letter of the correct answer. 1. These are instantiated like modules but do not need module definition as it is also defined. a. Primate c. Instance b. Primitives d. Gates 2. It is the lowest level of abstraction. a. Register c. Switch b. Gates d. Memory 3. Which of the gates is a parity check gate? a. XNOR c. XOR b. BUF d. AND 4. It is the maximum delay value that the designer expects the gate to have a. Max Value c. Rise Delay b. Min Value d. Fall Delay Fill in the blanks. 1. ______________ is a multiple input and one output gate wherein the output is the same as the input 2. ______________ is a delay which is associated with transition to 0 from other states. Enumeration. 1. Give the two delays discussed. (2) 2. Give the six gates included in multiple scalar inputs and one scalar output gates. (6)

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PREPARED BY: BERNARDINO, CHRISTINE KATE S.

Chapter 5: VI. True or False. Write TRUE is the statement is correct or is a fact. Otherwise, FALSE if it is incorrect. 1. The low level of abstraction is called the gate-level. TRUE 2. We cannot instantiate a gate without instance name. FALSE 3. The default delay value is the typical value. TRUE Identification. Identify what term is asked on each number 1. It is the delay associated with the transition from another state to 1. RISE DELAY 2. It is a gate that has one scalar output and one or more scalar inputs which complements the input signal. NOT GATE 3. It is a gate that has multiple inputs and one scalar output whose output is 1 if any of the inputs is 1. OR GATE Multiple Choice. Choose the letter of the correct answer. 1. These are instantiated like modules but do not need module definition as it is also defined. a. Primate c. Instance b. Primitives d. Gates 2. It is the lowest level of abstraction. a. Register c. Switch b. Gates d. Memory 3. Which of the gates is a parity check gate? a. XNOR c. XOR b. BUF d. AND 4. It is the maximum delay value that the designer expects the gate to have a. Max Value c. Rise Delay b. Min Value d. Fall Delay Fill in the blanks. 1. BUF GATE is a multiple input and one output gate wherein the output is the same as the input 2. FALL GATE is a delay which is associated with transition to 0 from other states. Enumeration. 1. Give the two delays discussed. (2) - RISE, FALL AND TURN-OFF DELAYS - MIN, TYP, MAX VALUES 2. Give the six gates included in multiple scalar inputs and one scalar output gates. (6) OR GATE, AND GATE, XOR GATE, XNOR GATE, NAND GATE, NOR GATE

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