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2010
Acknowledgement
I am grateful to MR SHAKTI RAJ CHOPRA teacher for asking me to prepare the topic I woul like to thank him for e!plaining the "asics of the presentation an for answering m# e$er# ou"t with a smile% I woul like to thank m# classmate an m# el er "rother who ha$e helpe me in arrange the information a"out m# topic%
Contents
Introduction Development of 555 timer Variants Usage Monostable mode Bistable Mode Astable mode Dual timer 556 uad timer 55! Bistable Multivibrators Bistable Multivibrator Circuit ""#$CM%& Bistable Multivibrators 'A'D (ate Bistable "&%)* An application of 555 timer IC
+eferences
Introduction
The &&& Timer IC is an integrate circuit 'chip( implementing a $ariet# of timer an multi$i"rator applications% The IC was esigne "# Hans R% Camen)in in *+,- an "rought to market in *+,* "# Signetics 'later ac.uire "# Philips(% The original name was the S/&&& 'metal can(01/&&&'plastic 2IP( an the part was escri"e as 3The IC Time Machine3% It has "een claime that the &&& gets its name from the three & k4 resistors use in t#pical earl# implementations5 "ut Hans Camen)in has state that the num"er was ar"itrar#% The part is still in wi e use5 thanks to its ease of use5 low price an goo sta"ilit#% As of 6--75 it is estimate that * "illion units are manufacture e$er# #ear% 2epen ing on the manufacturer5 the stan ar &&& package inclu es o$er 6- transistors5 6 io es an *& resistors on a silicon chip installe in an 89pin mini ual9in9line package '2IP98(% :ariants a$aila"le inclu e the &&; 'a *<9pin 2IP com"ining two &&&s on one chip(5 an the &&8 'a *;9pin 2IP com"ining four slightl# mo ifie &&&s with 2IS = THR connecte internall#5 an TR falling e ge sensiti$e instea of le$el sensiti$e(% >ltra9low power $ersions of the &&& are also a$aila"le5 such as the ,&&& an T?C&&&% The ,&&& re.uires slightl# ifferent wiring using fewer e!ternal components an less power%
Monostable mode@ in this mo e5 the &&& functions as a 3one9shot3% Applications inclu e timers5 missing pulse etection5 "ouncefree switches5 touch switches5 fre.uenc# i$i er5 capacitance measurement5 pulse9wi th mo ulation 'PAM( etc Astable 9 free running mo e@ the &&& can operate as an oscillator% >ses inclu e ?/2 an lamp flashers5 pulse generation5 logic clocks5 tone generation5 securit# alarms5 pulse position mo ulation5 etc% Bistable mode or &c,mitt trigger@ the &&& can operate as a flip9flop5 if the 2IS pin is not connecte an no capacitor is use % >ses inclu e "ouncefree latche switches5 etc%
Variants
The &&& timer essentiall# consists of 67 transistors5 6 io es an *; resistors integrate on a silicon chip% This chip is installe in an 89pin ual9in9line package '2IP(% The timer ma# also "e a$aila"le in ifferent forms such as the *<9pin &&; 2IP that com"ines two &&&s on a single chip5 the *;9"it &&8 that has four &&&s on a single chip an other ultra9low power $ariants such as the ,&&&% The low power $ersions ha$e a wiring which is slightl# ifferent as compare to the con$entional t#pes% A itionall# the# use less e!ternal components an hence re.uire re uce power%
Usage
D12
TRID
O>T
<
R/S/T A timing inter$al can "e interrupte "# appl#ing a reset pulse to low '- :(
&
CTR?
Control $oltage allows access to the internal $oltage i$i er '607 VCC(
THR
The threshol at which the inter$al en s 'it en s if the $oltage at THR is at least 607 VCC( Connecte to a capacitor whose ischarge time will influence the timing inter$al
2IS
VE5 VCC The positi$e suppl# $oltage which must "e "etween 7 an *& :
Monostable mode
The relationships of the trigger signal5 the $oltage on C an the pulse wi th in monosta"le mo e In the monosta"le mo e5 the &&& timer acts as a Fone9shotG pulse generator% The pulse "egins when the &&& timer recei$es a trigger signal% The wi th of the pulse is etermine "# the time constant of an RC network5 which consists of a capacitor 'C( an a resistor 'R(% The pulse en s when the charge on the C e.uals 607 of the suppl# $oltage% The pulse wi th can "e lengthene or shortene to the nee of the specific application "# a Husting the $alues of R an C% The pulse wi th of time t5 which is the time it takes to charge C to 607 of the suppl# $oltage5 is gi$en "#
where t is in secon s5 R is in ohms an C is in fara s% See RC circuit for an e!planation of this effect%
Bistable Mode
In "ista"le mo e5 the &&& timer acts as a "asic flip9flop% The trigger an reset inputs 'pins 6 an < respecti$el# on a &&&( are hel high $ia pull9up resisters while the threshol input 'pin ;( is simpl# groun e % Thus configure 5 pulling the trigger momentaril# to groun acts as a IsetI an transitions the output pin 'pin 7( to :cc 'high state(% Pulling the reset input to groun acts as a IresetI an transitions the output pin to groun 'low state(% 1o capacitors are re.uire in a "ista"le configuration% Pin 8 ':cc( is5 of course5 tie to :cc while pin * 'Dn ( is groun e % Pins & an , 'control an ischarge( are left floating%
Astable mode
Stan ar &&& Asta"le Circuit In asta"le mo e5 the I&&& timer I puts out a continuous stream of rectangular pulses ha$ing a specifie fre.uenc#% Resistor R* is connecte "etween :CC an the ischarge pin 'pin ,( an another resistor 'R6( is connecte "etween the ischarge pin 'pin ,(5 an the trigger 'pin 6( an threshol 'pin ;( pins that share a common no e% Hence the capacitor is charge through R* an R65 an ischarge onl# through R65 since pin , has low impe ance to groun uring output low inter$als of the c#cle5 therefore ischarging the capacitor% In the asta"le mo e5 the fre.uenc# of the pulse stream epen s on the $alues of R*5 R6 an C@
an the low time from each pulse is gi$en "# where R* an R6 are the $alues of the resistors in ohms an C is the $alue of the capacitor in fara s
Bistable Multivibrators
Jista"le Multi$i"rators are another t#pe of two state e$ice similar to the Monosta"le Multi$i"rator.we looke at in the last tutorial "ut the ifference this time is that "oth states
are sta"le% Jista"le Multi$i"rators ha$e TAO sta"le states 'hence the name@ 3Ji3(5 an the# can "e switche o$er from one sta"le state to the other "# the application of a trigger pulse% As Jista"le Multi$i"rators ha$e two sta"le states the# are more commonl# known as Klip9 flops for use in se.uential t#pe circuits% Jista"le Multi$i"rators are two state non9regenerati$e e$ices an in each state one of the transistors is cut9off while the other transistor is in saturation5 this means that the "ista"le circuit is capa"le of remaining in efinitel# in either sta"le state% To change o$er from one state to the other the circuit re.uires a suita"le trigger pulse an to go through a full c#cle5 two triggering pulses5 one for each stage are re.uire % Its more common name or term of 3Klip9flop3 relates to the actual operation of the e$ice5 as it 3Klips3 into one logic state5 remains there an then changes or 3Klops3 "ack into its first original state%
The Jista"le Multi$i"rator circuit a"o$e is sta"le in "oth states5 either with one transistor 3OKK3 an the other 3O13 or with the first transistor 3O13 an the secon 3OKK3% Switching "etween the two states is achie$e "# appl#ing a trigger pulse which inturn will cause the 3O13 transistor to turn 3OKK3% The circuit will switch se.uentiall# "# appl#ing a pulse to each "ase in turn an this is achie$e from a single input trigger pulse using a "iase io es as a steering circuit% /.uall#5 we coul remo$e the io es5 capacitors an fee "ack resistors an appl# in i$i ual trigger pulses irectl# to the transistor Jases% Then unlike Monosta"le Multi$i"rators whose output is epen ent upon the RC time constant of the fee "ack components use 5 the Jista"le Multi$i"rators output is epen ent upon the application of two in i$i ual trigger pulses% So Monosta"le Multi$i"rators can pro uce a $er# short output pulse or a much longer rectangular shape output whose lea ing e ge rises in time with the e!ternall# applie trigger pulse an whose trailing e ge is epen ent upon a secon trigger pulse as shown "elow%
Jista"le Multi$i"rators ha$e man# applications such as part of a counting circuit5 or as a one9 "it memor# e$ice in a computer5 or as fre.uenc# i$i ers "ecause the output pulses ha$e a fre.uenc# that are e!actl# one half 'f06( that of the trigger input pulse fre.uenc# ue to them changing state from a single input pulse% In other wor s the circuit pro uces Kre.uenc# 2i$ision as it now i$i es the input fre.uenc# "# a factor of two 'an octa$e(%
J# connecting the two 1A12 gates together as shown a"o$e5 we can construct a manuall# controlle "ista"le multi$i"rator that is acti$ate "# the single9pole ou"le9throw switch to
pro uce a logic 3*3 or a logic 3-3 output% Lou ma# notice that this circuit looks a little familiar5 an #ou woul "e rightM5 as its more commonl# calle an SR 1A12 Date Klip9 flop that we looke at "ack in the Se.uential ?ogic tutorials an which we saw that this t#pe of 1A12 Date Jista"le makes an e!cellent switch e"ouncing circuit%
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