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Figure 1. Package
Iout
6A (*)
VCC
36V
PROPORTIONAL LOAD CURRENT SENSE I UNDERVOLTAGE AND OVERVOLTAGE SHUT-DOWN OVERVOLTAGE CLAMP THERMAL SHUT-DOWN I CURRENT LIMITATION I VERY LOW STAND-BY POWER DISSIPATION
I I
PROTECTION AGAINST: LOSS OF GROUND AND LOSS OF VCC I REVERSE BATTERY PROTECTION (**) I IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE
I
DESCRIPTION The VNQ830A-E is a quad HSD formed by assembling two VND830A-E chips in the same SO-28 package. The VND830A-E is a monolithic device designed in| STMicroelectronics VIPower M0-3 Technology. The VNQ830A-E is intended for driving any type of multiple loads with one side connected to ground. This device has four independent channels and four analog sense outputs which deliver currents proportional to the outputs currents. Table 2. Order Codes
Package Tube
VNQ830A-E
Active current limitation combined with thermal shut-down and automatic restart protect the device against overload. Device automatically turns off in case of ground pin disconnection.
SO-28
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Figure 2. Block Diagram
VCC 1,2
OUTPUT 1 ILIM1
IOUT1
VCC 3,4
OUTPUT 3 ILIM3
IOUT3
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Table 3. Absolute Maximum Ratings
Symbol VCC Parameter Value Unit
DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse Output Current Input Current Current Sense Maximum Voltage Electrostatic Discharge R=1.5K; C=100pF) - INPUT (Human Body Model:
V V mA A A mA V V
V V V V W C C
VESD
Ptot Tj Tstg
Power dissipation (per island) at Tlead=25C Junction Operating Temperature Storage Temperature
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
VCC1,2 GND 1,2 INPUT2 INPUT1 CURRENT SENSE 1 CURRENT SENSE 2 VCC1,2 VCC3,4 GND 3,4 INPUT4 INPUT3 CURRENT SENSE 3 CURRENT SENSE 4 VCC3,4
28
VCC1,2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 4 OUTPUT 4 OUTPUT 4 OUTPUT 3 OUTPUT 3 OUTPUT 3
14
15
VCC3,4
N.C. X X
Output X
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Figure 4. Current and Voltage Conventions
IS3,4 VCC3,4 IIN1 VIN1 VSENSE1 VIN2 VSENSE2 VIN3 ISENSE1 IIN2 ISENSE2 IIN3 ISENSE3 INPUT1 CUR. SENSE1 INPUT2 CUR. SENSE2 INPUT3 CUR. SENSE3 INPUT4 CUR. SENSE4 GND3,4 IGND3,4 OUTPUT3 IOUT4 OUTPUT4 GND1,2 IGND1,2 VOUT4 VOUT3 OUTPUT2 IOUT3 VOUT2 OUTPUT1 IOUT2 IOUT1 VOUT1 VCC3,4 VCC1,2 IS1,2 VF1 (*) VCC1,2
Value 20 44 (2) 31
(2)
Note: (1) When mounted on a standard single-sided FR-4 board with 50mm2 of Cu per island (at least 35m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. Note: (2) When mounted on a standard single-sided FR-4 board with 6cm2 of Cu per island (at least 35 m thick) connected to all V CC pins. Horizontal mounting and no artificial air flow.
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VNQ830A-E
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40C< Tj <150C, unless otherwise specified) (Per each channel) Table 5. Power Output
Symbol VCC (**) Parameter Test Conditions Min. Typ. Max. Unit
Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance Clamp voltage IOUT =2A; Tj=25C IOUT =2A; Tj=150C ICC=20 mA (see note 1) Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V;
5.5 3 36
13 4
36 5.5
V V V
60 120 41 48 12 12 55 40 25 7 0 50 5 3
m m V A A mA A A A
IS (**)
Supply Current
Off State Output Current Off State Output Current Off State Output Current
5.5V<VCC<36V Thermal shut-down temperature Thermal reset temperature Thermal hysteresis Turn-off output voltage IOUT =2A; VIN=0V; L=6mH clamp Output voltage drop IOUT =10mA limitation
15
Note: 2. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles
dVOUT /dt(on) Turn-on Voltage Slope dVOUT /dt(off) Turn-off Voltage Slope
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ELECTRICAL CHARACTERISTICS (continued) Table 8. VCC - Output Diode (Per each channel)
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT =1.3A; Tj=150C Min Typ Max 0.6 Unit V
K2
IOUT /ISENSE
K3
IOUT /ISENSE
ISENSE
Analog Sense Leakage Current Max analog sense output voltage Analog sense output voltage in overtemperature condition Intrinsec sense pin resistance Current sense delay response
Note: 3. Current sense signal delay after positive input slope. Note: 4. Sense pin doesnt have to be left floating.
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Figure 5. Switching Characteristics (Resistive load RL=6.5)
VOUT
90% dVOUT/dt(off) tf t
INPUT
tDSENSE
t td(off)
td(on)
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Table 12. Electrical Transient Requirements
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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Figure 6. Waveforms
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Figure 7. Application Schematic
+5V Rprot INPUT1 VCC1,2 VCC3,4 Dld Rprot Rprot C. SENSE 1 INPUT2 OUTPUT1
C Rprot Rprot INPUT3 Rprot Rprot Rprot C. SENSE 4 GND1,2 GND3,4 C. SENSE 3 INPUT4 OUTPUT4 OUTPUT3 C. SENSE 2 OUTPUT2
RSENSE1,2,3,4 VGND
RGND DGND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / 2(IS(on)max). 2) RGND ( VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT line is also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE pin has to be connected to Ground pin.
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.C I/Os PROTECTION: If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k
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SO-28 Double Island Thermal Data Figure 8. SO-28 Double Island PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.5cm2, 3cm2, 6cm2).
RthA = Thermal resistance Junction to Ambient with one chip ON RthB = Thermal resistance Junction to Ambient with both chips ON and Pdchip1=Pdchip2 RthC = Mutual thermal resistance
Figure 9. Rthj-amb Vs. PCB Copper Area In Open Box Free Air Condition
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Figure 10. SO-28 Thermal Impedance Junction Ambient Single Pulse
Zth(C/W )
100
0 ,5 c m ^ 2 / isla n d 3 c m ^ 2 / i sl a n d 6 c m ^ 2 / i sl a n d
10
One channel ON
0.1
0.1
10
100
1000
tim e(s)
Z TH = R TH + Z THtp ( 1 )
where
= tp T
R1 Pd1
R2
R3
R4
R5
R6
Tj_2
Tj_3
Pd3
C7
C8
C9
C10
C11
C12
R7
R8
R9
R10
R11
R12
Tj_4
C15
C16
R15 Pd4
R16
T_amb
Area/island (cm2) R1=R7=R13=R15 (C/W) R2=R8=R14=R16 (C/W) R3=R9 (C/W) R4=R10 (C/W) R5=R11 (C/W) R6=R12 (C/W) C1=C7=C13=C15 (W.s/C) C2=C8=C14=C16 (W.s/C) C3=C9 (W.s/C) C4=C10 (W.s/C) C5=C11 (W.s/C) C6=C12 (W.s/C) R17=R18 (C/W)
0.5 0.05 0.3 3.4 11 15 30 0.001 5.00E-03 1.00E-02 0.2 1.5 5 150
13
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PACKAGE MECHANICAL Table 15. SO-28 Mechanical Data
Symbol A a1 b b1 C c1 D E e e3 F L S millimeters Min 0.10 0.35 0.23 0.50 45 (typ.) 17.7 10.00 1.27 16.51 7.40 0.40 8 (max.) 7.60 1.27 18.1 10.65 Typ Max 2.65 0.30 0.49 0.32
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Figure 13. SO-28 Tube Shipment (No Suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
A
C B
Figure 14. Tape And Reel Shipment (Suffix TR) REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max)
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2
End
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REVISION HISTORY
Date Revision Sept. 2004 1 - First Issue Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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