ELE 804/EE 8604 RF Circuits and Systems

Laboratory One - Low-Noise Ampliers

X. Lai and F. Yuan, PhD., P.Eng. Department of Electrical and Computer Engineering Ryerson University Toronto, Ontario, Canada Copyright c Fei Yuan 2012

Preface
This laboratory manual is an essential component of the 4th-year elective course ELE 804 (Radio-Frequency Circuits and Systems) and the graduate course EE 8604 (Special Topics in Electrical Engineering : Radio-Frequency Circuits and Systems) oered by Professor Fei Yuan in the Department of Electrical and Computer Engineering at Ryerson University, Toronto, Ontario, Canada. Permission to duplicate and distribute this document is granted for an educational purpose only. Please report any error in this Laboratory Manual or problem encountered during laboratories to Professor F. Yuan at fyuan@ee.ryerson.ca. Dr. Fei Yuan Jan. 2012

Calendar Description of EE8604/ELE804

This course deals with the design of low-power high-speed CMOS integrated circuits using deep sub-micron CMOS technology at the system level. The course consists of two essential components: theory and project. The theoretical component consists of : advanced topics on modeling of MOS transistors, modeling of interconnects (lumped, distributed RC, distributed RLC, and transmission line models), impedance matching techniques, layout techniques for high-speed digital and mixed analog-digital circuits, clock generation and distribution on chip, power distribution on chip, analog and digital grounding of mixed analog-digital circuits on chip, I/O and pad design, packaging and ESD protection, switching noise, and high-speed data links. The project component consists of design, layout, and simulation of CMOS circuits using state-of-the-art CMOS technology and CAD tools. 3 hours lecture, 1 hours laboratory each week. Prerequisites ELE704 or ELE734.

Contents
1 2 3 4 5 6 7 Introduction . . . . . . . . . . . . . . . . . . . . . . Cascode Ampliers . . . . . . . . . . . . . . . . . . Maximum-Power-Gain Output Impedance Matching Stability Analysis and Source/Gate Degeneration . Maximum-Power-Gain Input Impedance Matching . Minimum-Noise-Figure Input Impedance Matching Linearity: P1dB and IIP3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 8 13 26 34 40 47

List of Figures
1 2 3 4 Cascode ampliers. . . . . . . . . . . . . . . . . . . . . . . . Simulated output voltage of cascode amplier. The bottom is input and the top is output. . . . . . . . . . . . . . . . . . . Cascode amplier with IBM inductors and capacitors. . . . . Simulated output voltage of the cascode amplier with IBM inductors and capacitors. The bottom trace is input and the top is output. . . . . . . . . . . . . . . . . . . . . . . . . . . Basic cascode amplier with port-setup for output impedance measurement. . . . . . . . . . . . . . . . . . . . . . . . . . . Properties of the input port. . . . . . . . . . . . . . . . . . . Properties of the output port. . . . . . . . . . . . . . . . . . ADE (Analog Design Environment) setting with ideal matching network components. . . . . . . . . . . . . . . . . . . . . S-parameter analysis select menu. . . . . . . . . . . . . . . . Output impedance measurement by plotting Z22 . . . . . . . Cascode amplier with the ideal output impedance matching network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output impedance of the cascode amplier with the ideal output matching network. . . . . . . . . . . . . . . . . . . . . . Cascode amplier with the IBM output impedance matching network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output return loss measurement by plotting S22 . . . . . . . . . 9

. 10 . 11

. 12 . 15 . 16 . 17 . 18 . 19 . 20 . 21 . 22 . 23 . 24

5 6 7 8 9 10 11 12 13 14

15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Output return loss S22 of cascode amplier with the IBM output impedance matching network. . . . . . . . . . . . . . . . . Stability factor K < 1 at the input port of Fig. 5. . . . . . . . Cascode amplier with source and gate inductive degeneration. Stability analysis Spectre menu. . . . . . . . . . . . . . . . . . Stability factor K > 1 with inductive source degeneration. . . Stability factor || < 1 with gate inductive degeneration. . . . Input impedance looking into the gate degeneration inductor (real part). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input impedance looking into the gate degeneration inductor (imaginary part). . . . . . . . . . . . . . . . . . . . . . . . . . Maximum-power-gain input impedance matching with IBM devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input return loss after input impedance matching by IBM devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transducer gain: GT ; Available power gain: GA ; Power gain: GP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noise gure analysis menu. . . . . . . . . . . . . . . . . . . . . Noise gure of the amplier with maximum-power-gain input impedance matching networks. . . . . . . . . . . . . . . . . . . Measurement of optimal source output impedance Zs,opt for minimum noise gure. . . . . . . . . . . . . . . . . . . . . . . Noise circle selection form in Spectre output menu. . . . . . . Noise circle in Smith chart for NF=0.9 dB. . . . . . . . . . . . Noise matching network with IBM devices. . . . . . . . . . . . Noise gure at 2.4 GHz after noise matching network by IBM devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noise circle at NF=1.4 dB passing Zs = 50 origin for the designed matching network in IBM devices. . . . . . . . . . . Linearity measurement for LNA with maximum-power-gain input-output matching in Fig. 23. . . . . . . . . . . . . . . . .

25 27 28 29 30 31 32 33 35 36 37 38 39 41 42 43 44 45 46 48

35 36 37 38 39 40 41 42 43

IIP3 measurement input port setting. . . . . . . . . . . . . . . IIP3 measurement output port setting. . . . . . . . . . . . . . HB (harmanic balance) in ADE analyses selection form. . . . . HB AC analysis in ADE analyses selection form. . . . . . . . . Parameter settings for HB and HBac analyses in Cadence ADE. Plot IIP3 in SpectreRF. . . . . . . . . . . . . . . . . . . . . . IIP3 of the LNA. . . . . . . . . . . . . . . . . . . . . . . . . . Plot input 1dB compression point in SpectreRF. . . . . . . . . 1dB compression point for the LNA. . . . . . . . . . . . . . .

49 50 51 52 53 54 55 56 57

List of Tables
1 Design specications of low-noise amplier . . . . . . . . . . . 8

Introduction

Low-noise ampliers (LNAs) are a key block of wireless receivers. They are used to amplify the received weak RF signal and suppress noise. This laboratory will design a CMOS low-noise amplier for Blue-tooth applications. The carrier frequency is 2.4 GHz. The LNA will be designed in IBM 130 nm CMOS technology. The design of LNAs diers from that of an analog amplier where voltage amplication is the goal. The design of LNAs is constrained by the maximum power transfer, i.e., maximumly convert the received RF power to a voltage signal. Impedance matching is thus required at both the input and output port of a low-noise amplier. In this lab, the design starts from a conventional cascode voltage amplier. Input and output matching networks for maximum power transfer are then added at the input and output of the lownoise amplier. We will also see that low-amplier ampliers might oscillate. Source and gate inductive degenerations are necessary for the LNA to operate stably. In addition to the maximum power transfer, the input impedance matching network can also be tuned so that the noise gure of the LNA is minimized. This is crucial for RF receivers as the noise gure of the LNA typically dominates the noise gure of the receiver. The LNA will be designed using an IBM 130 nm CMOS technology with 7

Table 1: Design specications of low-noise amplier

Specications of LNA Carrier frequency Noise gure Noise gure Gain IIP3 IIP3 Input/Output Impedance Input/Output Return Loss Stability Factor

Value 2.4 GHz; 2 dB (power matching) 1.5dB (noise matching) 25 dB; 0 dBm at 25 dB gain 10 dBm at 15dB gain 50; -20 dB; K > 1;

DM top-metal option used for spiral inductors. The design specications of the LNA are given below :

Cascode Ampliers

In this section, we rst introduce a simple cascode votage amplier with a LC-tank load, as shown in Fig. 1. The LC tank is composed of an ideal inductor in series with a resistor, and an parallel capacitor. The component values are annotated in the gure. The input of the amplier is a 10 mV sinusoid at 2.4 GHz. The simulated output voltage of the amplier is shown in Fig. 2. Next, we replace the idea inductor-resistor with an IBM top-metal spiral inductor and the ideal capacitor with an IBM MiM capacitor, as shown in Fig. 3. The biasing network of the two ampliers is given in the respective schematics. The IBM inductors and capacitors have substrate connections,

Figure 1: Cascode ampliers. which are also shown in the circuit diagram. The simulated output voltage of the amplier is shown in Fig. 4.

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Figure 2: Simulated output voltage of cascode amplier. The bottom is input and the top is output.

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Figure 3: Cascode amplier with IBM inductors and capacitors.

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Figure 4: Simulated output voltage of the cascode amplier with IBM inductors and capacitors. The bottom trace is input and the top is output.

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Maximum-Power-Gain Output Impedance Matching

In this section, we convert the voltage-mode cascode amplier studied earlier to a low-noise amplier. The rst step is to replace the input small-signal voltage source with an input port. The input port is needed for measuring a number of key parameters of the LNA including input impedance. Also, we add an output port at the output node. The output port is needed for measuring the output impedance of the cascode stage. The circuit diagram is shown in Fig. 5. The properties of the input port are shown in Fig. 6 and those of the output port are given in Fig. 7. In order to measure the output impedance of the cascode stage, we open up an ADE (Analog Design Enviroment) interface, as shown in Fig. 8 and choose the sp (S-parameter) analysis from the menu, as shown in Fig. 9. Run the simulation and the results can be found in Results Direct Plot Main Form menu. The Main Form menu is shown in Fig. 10. In many cases, the parameter of Z22 can be approximated as the output impedance and in this design we use Z22 to denote the output impedance Zout , and Z11 to denote the input impedance Zin . Plot the output impedance values (real part and imaginary part for Z22 ) and record the values: Z22,real = Z22,imag = Now, we can construct an output impedance matching network to convert the measured Z22 to 50 . The impedance matching process is done using Agilent ADS Smith Chart utilities and we only gives the results here. The matching network is shown in Fig. 11 and the output impedance looking into the matching network from the output port is shown in Fig. 12(a) for

14 its real part and Fig. 12(b) for its imaginary part respectively. We see that the output impedance looking into the output matching network is indeed close to a 50 resistor. We then replace the ideal matching network that we have justed obtained with actual IBM components as shown in Fig. 13. By using the trial-anderror approach on the inductor turns (n) and capacitor multiplicity (m), the resulted matching can be close to the ideal matching network. This is veried by the output return loss S22 shown in Fig. 15. The S-parameter menu can be selected, as shown in Fig. 14. In the following sections, we always use ideal L-C components for the initial design and then replace them with IBM components.

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Figure 5: Basic cascode amplier with port-setup for output impedance measurement.

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Figure 6: Properties of the input port.

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Figure 7: Properties of the output port.

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Figure 8: ADE (Analog Design Environment) setting with ideal matching network components.

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Figure 9: S-parameter analysis select menu.

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Figure 10: Output impedance measurement by plotting Z22 .

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Figure 11: Cascode amplier with the ideal output impedance matching network.

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(a) real part

(b) imarginary part

Figure 12: Output impedance of the cascode amplier with the ideal output matching network.

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Figure 13: Cascode amplier with the IBM output impedance matching network.

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Figure 14: Output return loss measurement by plotting S22 .

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Figure 15: Output return loss S22 of cascode amplier with the IBM output impedance matching network.

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Stability Analysis and Source/Gate Degeneration

A low-noise amplier could oscillate when its parasitics form a positive feedback loop. The unconditional stability criteria of LNAs are: 1. K > 1 and; 2. || < 1; The denitions of K and can be found in any RF/Microwave book. In order to nd out whether the LNA designed earlier and shown in Fig. 13 is stable or not, we plot its K value in Fig. 16, where we observe that K < 1 at the carrier frequency 2.4 GHz, revealing that the LNA is unstable. To stabilize an RF amplier, a common method is to add negative feedback in the ampliers transistors source terminal. A source degeneration inductor is typically used to achieve this. Practically, a small inductor < 1nH connected to the transistors source terminal could yield K > 1. This, however, only satises the rst criterion. To satisfy the second criterion, another inductor in the transistors gate terminal needs to be added. Shown in Fig. 17 is the designed LNA with source-gate degeneration. The K value can be obtained from sp (S-parameter) analysis form shown in Fig. 18. It is seen that K > 1, as shown in Fig. 19. In Spectre, there is no evaluation. Instead it gives a B1f value, which is obviously not the value according to the SpectreRF user manual. Assuming B1f value resembles , we plot B1f v.s. frequency, as shown in Fig. 20. We can see that B1f < 1 at 2.4 GHz. We measure the input impedance looking into the gate degenerated inductor, as shown in Fig. 21 and Fig. 22. Record the input impedance Z11 : 1. Z11,real = 2. Z11,imag =

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Figure 16: Stability factor K < 1 at the input port of Fig. 5.

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Figure 17: Cascode amplier with source and gate inductive degeneration.

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Figure 18: Stability analysis Spectre menu.

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Figure 19: Stability factor K > 1 with inductive source degeneration.

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Figure 20: Stability factor || < 1 with gate inductive degeneration.

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Figure 21: Input impedance looking into the gate degeneration inductor (real part).

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Figure 22: Input impedance looking into the gate degeneration inductor (imaginary part).

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Maximum-Power-Gain Input Impedance Matching

The procedures for maximum-power-gain input impedance matching is identical to the procedures for output impedance matching presented in in Section ??. We briey summarize the procedures : (1) measure Z11 looking into the gate degeneration inductor; (2) design LC matching network transforming Z11 to 50. The designed input impedance matching network is shown in Fig. 23 and the input return loss S11 is shown in Fig. 24. Since we have already done the maximum-power output impedance matching in Section ??, so at this moment, the input and output terminals are both matched to 50 external ports respectively. The resulted power gains are transducer power gain (GT ), available power gain (GA ) and operating power gain (GP ) shown in Fig. 25 where the three gains coincide at the same point at 2.4 GHz. But, so far, we have not discussed another important issue in LNA design, noise. Spectre provides a convenient Noise Figure (NF) calculation menu, as shown in Fig. 26. NF of the LNA of Fig. 23 is shown in Fig. 27. The noise gure at 2.4 GHz is approximately 2 dB, which meets the specications of most modern wireless applications including Bluetooth.

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Figure 23: Maximum-power-gain input impedance matching with IBM devices.

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Figure 24: Input return loss after input impedance matching by IBM devices.

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Figure 25: Transducer gain: GT ; Available power gain: GA ; Power gain: GP .

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Figure 26: Noise gure analysis menu.

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Figure 27: Noise gure of the amplier with maximum-power-gain input impedance matching networks.

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Minimum-Noise-Figure Input Impedance Matching

In the last section, we have seen the NF for the maximum-power-gain LNA. Can the NF be even lower? The answer is YES. By designing an appropriate input matching network, the NF can be made close to the minimum value, N Fmin , dened in RF/Microwave theories. To design the minimum-NF input impedance matching network, we need to rst know the optimum source impedance Zs,opt that gives the minimum NF. (We are used to 50 source impedance. But it would not give us the optimum NF.) The optimum source impedance Zs,opt can be measured by the circuit conguration in Fig. 28 by putting an input port to the gatedegenerated inductor. The optimum Zs,opt can be estimated by plotting Noise Circles (NC) with the menu form shown in Fig. 29. A 0.9-dB noise circle is plotted in a Smith chart in Fig. 30. We choose a point close to the real axis (x-axis) for the optimum source impedance, e.g., we have picked the point: Zs,opt = (3.82 + j 0.21) 50, where the 50 is the reference characteristic impedance. Then a matching network is designed to make the output impedance looking into the matching network identical to the optimum source impedance Zs,opt . This noise matching network is designed and shown in Fig. 31. The NF at 2.4 GHz is calculated by Spectre to be around 1.4 dB, as shown in Fig. 32. Another conrmation of this NF is to plot the NC=1.4dB in the Smith chart, as shown in Fig. 33 where the 1.4dB circle passes the Smith chart origin, which indicates 1.4 dB NF is indeed realized by the designed noise matching network.

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Figure 28: Measurement of optimal source output impedance Zs,opt for minimum noise gure.

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Figure 29: Noise circle selection form in Spectre output menu.

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Figure 30: Noise circle in Smith chart for NF=0.9 dB.

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Figure 31: Noise matching network with IBM devices.

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Figure 32: Noise gure at 2.4 GHz after noise matching network by IBM devices.

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Figure 33: Noise circle at NF=1.4 dB passing Zs = 50 origin for the designed matching network in IBM devices.

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Linearity: P1dB and IIP3

As with any other RF ampliers, the linearity of an LNA is measured by its input 1dB compression point (P1dB) and its input third-order intercept point (IIP3). The LNA designed in Fig. 23 is used to demonstrate the linearity measurement procedures. The circuitry is reproduced in Fig. 34. SpectreRF provides convenient tools to measure P1dB and IIP3. The measurement procedures include the following three steps: 1. Input and output port setting. 2. Hb (harmonic balance) and hbac (harmonic balance AC) analyses selection. 3. SpectreRF output plot form selection. The input port setting is shown in Fig. 35 and the output port setting is shown in Fig. 36. In the input port, the parameter Frf1 is used to name the carrier frequency of 2.4 GHz in the hb analysis and the parameter Prf1 is a swept variable to sweep input-signal power levels in dBm for hb and hbac analyses. We temporarily set Prf1=-30dBm. SpectreRF uses hb (harmonic balance) to calculate the nonlinearity effects such as P1dB and uses hbac (haronic balance AC) to calculate IIP3 when it is combined with hb analysis. The hb analysis selection form in the ADE is shown in Fig. 37 where the Maxham in the selection form is to inform SpectreRF the number of sidebands with respect to the carrier frequency, 2.4GHz, in its calculation. The input-signal power level is swept from -100 dBm (small signal) to 10 dBm (large signal) in a step of 10dB per calculation. The hbac analysis is selected in the form as shown in Fig. 38 where the input signal sweep range is set at a Single-Point at 2395 MHz. This frequency can be interpreted as 1 = 2395M Hz and SpectreRF assumes another frequency is the carrier frequency such that 2 =2400 MHz. So the 3rd-order inter-modulation frequencies are:

48 21 2 = 2390M Hz 22 1 = 2405M Hz As shown in Fig. 40, 1 = 2395M Hz is chosen as the 1st-order harmonic by SpectrRF and 22 1 = 2405M Hz is chosen as the 3rd-order harmonic. The resultant 3rd-order input intercept point IIP3 is plotted in Fig. 41. The input 1dB compression point can be calculated by hb analysis as shown in Fig. 42. Because there is only one single frequency of 2.4 GHz in the simulation, the 1st-order harmonic is selected to be 2.4 GHz. By clicking the output port, the 1-dB compression point is plotted in Fig. 43.

Figure 34: Linearity measurement for LNA with maximum-power-gain inputoutput matching in Fig. 23.

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Figure 35: IIP3 measurement input port setting.

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Figure 36: IIP3 measurement output port setting.

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Figure 37: HB (harmanic balance) in ADE analyses selection form.

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Figure 38: HB AC analysis in ADE analyses selection form.

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Figure 39: Parameter settings for HB and HBac analyses in Cadence ADE.

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Figure 40: Plot IIP3 in SpectreRF.

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Figure 41: IIP3 of the LNA.

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Figure 42: Plot input 1dB compression point in SpectreRF.

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Figure 43: 1dB compression point for the LNA.