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Technical reference manual Generator protection IED REG 670

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ABB

Document ID: 1MRK502013-UEN Issued: December 2007 Revision: B IED product version: 1.1

Copyright 2007 ABB. All rights reserved

COPYRIGHT
WE RESERVE ALL RIGHTS TO THIS DOCUMENT, EVEN IN THE EVENT THAT A PATENT IS ISSUED AND A DIFFERENT COMMERCIAL PROPRIETARY RIGHT IS REGISTERED. IMPROPER USE, IN PARTICULAR REPRODUCTION AND DISSEMINATION TO THIRD PARTIES, IS NOT PERMITTED. THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN CASE ANY ERRORS ARE DETECTED, THE READER IS KINDLY REQUESTED TO NOTIFY THE MANUFACTURER AT THE ADDRESS BELOW. THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR THE CONCEPT OR PRODUCT DESCRIPTION AND IS NOT TO BE DEEMED TO BE A STATEMENT OF GUARANTEED PROPERTIES. IN THE INTEREST OF OUR CUSTOMERS, WE CONSTANTLY SEEK TO ENSURE THAT OUR PRODUCTS ARE DEVELOPED TO THE LATEST TECHNOLOGICAL STANDARDS. AS A RESULT, IT IS POSSIBLE THAT THERE MAY BE SOME DIFFERENCES BETWEEN THE HW/SW PRODUCT AND THIS INFORMATION PRODUCT. Manufacturer:
ABB AB Substation Automation Products SE-721 59 Vsters Sweden Telephone: +46 (0) 21 34 20 00 Facsimile: +46 (0) 21 14 69 18 www.abb.com/substationautomation

Table of contents

Table of contents
Section 1 Introduction.....................................................................23
Introduction to the technical reference manual.................................23 About the complete set of manuals for an IED............................23 About the technical reference manual.........................................24 Design of the Technical reference manual (TRM).......................25 Introduction.............................................................................25 Principle of operation..............................................................25 Input and output signals.........................................................28 Function block........................................................................28 Setting parameters.................................................................28 Technical data........................................................................28 Intended audience.......................................................................29 Related documents......................................................................29 Revision notes.............................................................................29

Section 2

Local human-machine interface.....................................31


Human machine interface.................................................................31 Small size graphic HMI.....................................................................32 Introduction..................................................................................32 Design.........................................................................................32 Medium size graphic HMI.................................................................34 Introduction..................................................................................34 Design.........................................................................................34 Keypad.............................................................................................34 LED...................................................................................................36 Introduction..................................................................................36 Status indication LEDs................................................................36 Indication LEDs...........................................................................36 LHMI related functions......................................................................37 Introduction..................................................................................37 General setting parameters.........................................................37 Status indication LEDs................................................................38 Design....................................................................................38 Function block........................................................................38 Input and output signals.........................................................38 Indication LEDs...........................................................................39 Introduction.............................................................................39 Design....................................................................................39 Function block........................................................................46

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Input and output signals.........................................................46 Setting parameters.................................................................46

Section 3

Basic IED functions........................................................49


Analog inputs....................................................................................49 Introduction..................................................................................49 Principle of operation...................................................................49 Function block.............................................................................50 Setting parameters......................................................................50 Authorization.....................................................................................57 Authorization handling in the tool................................................58 Authorization handling in the IED................................................63 Self supervision with internal event list.............................................63 Introduction..................................................................................63 Principle of operation...................................................................63 Internal signals.......................................................................65 Run-time model......................................................................67 Function block.............................................................................68 Output signals..............................................................................68 Setting parameters......................................................................68 Technical data.............................................................................69 Time synchronization........................................................................69 Introduction..................................................................................69 Principle of operation...................................................................69 General concepts...................................................................69 Real Time Clock (RTC) operation..........................................70 Synchronization alternatives..................................................71 Function block.............................................................................75 Output signals..............................................................................75 Setting parameters......................................................................75 Technical data.............................................................................78 Parameter setting groups.................................................................79 Introduction..................................................................................79 Principle of operation...................................................................79 Function block.............................................................................80 Input and output signals..............................................................80 Setting parameters......................................................................81 Test mode functionality.....................................................................82 Introduction..................................................................................82 Principle of operation...................................................................82 Function block.............................................................................83 Input and output signals..............................................................83 Setting parameters......................................................................84 IED identifiers...................................................................................84

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Introduction..................................................................................84 Setting parameters......................................................................85 Signal matrix for binary inputs (SMBI)..............................................85 Introduction..................................................................................85 Principle of operation...................................................................85 Function block.............................................................................86 Input and output signals..............................................................86 Signal matrix for binary outputs (SMBO)..........................................86 Introduction..................................................................................86 Principle of operation...................................................................87 Function block.............................................................................87 Input and output signals..............................................................87 Signal matrix for mA inputs (SMMI)..................................................88 Introduction..................................................................................88 Principle of operation...................................................................88 Function block.............................................................................88 Input and output signals..............................................................88 Signal matrix for analog inputs (SMAI).............................................89 Introduction..................................................................................89 Principle of operation...................................................................89 Function block.............................................................................89 Input and output signals..............................................................90 Setting parameters......................................................................90 Summation block 3 phase (SUM3Ph)..............................................92 Introduction..................................................................................92 Principle of operation...................................................................92 Function block.............................................................................93 Input and output signals..............................................................93 Setting parameters......................................................................93 Authority status (AUTS)....................................................................94 Introduction..................................................................................94 Principle of operation...................................................................94 Function block.............................................................................95 Output signals..............................................................................95 Setting parameters......................................................................95 Goose binary receive........................................................................96 Function block.............................................................................96 Input and output signals..............................................................96 Setting parameters......................................................................98

Section 4

Differential protection.....................................................99
Generator differential protection (PDIF, 87G)...................................99 Introduction..................................................................................99 Principle of operation.................................................................100

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Function calculation principles.............................................101 Fundamental frequency differential currents........................101 Supplementary criteria.........................................................106 Harmonic restrain.................................................................109 Cross-block logic scheme....................................................109 Function block...........................................................................112 Input and output signals............................................................113 Setting parameters....................................................................113 Technical data...........................................................................115 Transformer differential protection (PDIF, 87T)..............................115 Introduction................................................................................116 Principle of operation.................................................................118 Function calculation principles.............................................119 Logic diagram.......................................................................139 Function block...........................................................................144 Input and output signals............................................................146 Setting parameters....................................................................148 Technical data...........................................................................155 Restricted earth fault protection (PDIF, 87N).................................155 Introduction................................................................................156 Introduction...........................................................................156 Principle of operation.................................................................156 Fundamental principles of the restricted earth fault protection (REF) ..................................................................156 REF as a differential protection............................................159 Calculation of differential current and bias current...............160 Detection of external earthground faults..............................161 Algorithm of the restricted earth fault protection (REF)........163 Function block...........................................................................164 Input and output signals............................................................164 Setting parameters....................................................................165 Technical data...........................................................................165 High impedance differential protection (PDIF, 87)..........................166 Introduction................................................................................166 Principle of operation.................................................................166 Logic diagram.......................................................................166 Function block...........................................................................167 Input and output signals............................................................167 Setting parameters....................................................................168 Technical data...........................................................................168

Section 5

Impedance protection ..................................................169


Full-scheme distance measuring, Mho characteristic, PDIS 21.....169 Introduction................................................................................169

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Principle of operation.................................................................169 Full scheme measurement...................................................169 Impedance characteristic.....................................................170 Basic operation characteristics.............................................171 Theory for operation.............................................................172 Function block...........................................................................183 Input and output signals............................................................183 Setting parameters....................................................................184 Technical data...........................................................................185 Directional impedance Mho (RDIR)................................................186 Introduction................................................................................187 Principle of operation.................................................................187 Directional impedance element for mho characteristic, ZDM......................................................................................187 Function block...........................................................................189 Input and output signals............................................................189 Setting parameters....................................................................190 Pole slip protection (PPAM, 78)......................................................190 Introduction................................................................................191 Principle of operation.................................................................192 Function block...........................................................................196 Input and output signals............................................................196 Setting parameters....................................................................197 Technical data...........................................................................198 Loss of excitation (PDIS, 40)..........................................................198 Introduction................................................................................198 Principle of operation.................................................................198 Function block...........................................................................202 Input and output signals............................................................202 Setting parameters....................................................................202 Technical data...........................................................................204

Section 6

Current protection.........................................................205
Instantaneous phase overcurrent protection (PIOC, 50)................205 Introduction................................................................................205 Principle of operation.................................................................205 Function block...........................................................................206 Input and output signals............................................................206 Setting parameters....................................................................206 Technical data...........................................................................207 Four step phase overcurrent protection (PTOC, 51_67)................207 Introduction................................................................................208 Principle of operation.................................................................208 Function block...........................................................................212

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Input and output signals............................................................212 Setting parameters....................................................................214 Technical data...........................................................................220 Instantaneous residual overcurrent protection (PIOC, 50N)...........221 Introduction................................................................................221 Principle of operation.................................................................222 Function block...........................................................................222 Input and output signals............................................................222 Setting parameters....................................................................223 Technical data...........................................................................223 Four step residual overcurrent protection (PTOC, 51N/67N).........223 Introduction................................................................................224 Principle of operation.................................................................224 Operating quantity within the function..................................224 Internal polarizing facility of the function..............................225 External polarizing facility for EFGround Fault function.......227 Base quantities within the function.......................................228 Internal EFGround Fault function structure..........................228 Four residual overcurrent stages..........................................228 Directional supervision element with integrated directional comparision stage ..............................................229 Second harmonic blocking element.....................................232 Switch on to fault feature......................................................234 Function block...........................................................................237 Input and output signals............................................................237 Setting parameters....................................................................238 Technical data...........................................................................245 Sensitive directional residual overcurrent and power protection (PSDE, 67N) ..................................................................................246 Introduction................................................................................246 Principle of operation.................................................................247 Introduction...........................................................................247 Function block...........................................................................253 Input and output signals............................................................254 Setting parameters....................................................................256 Technical data...........................................................................259 Thermal overload protection, two time constants (PTTR, 49)........260 Introduction................................................................................260 Principle of operation.................................................................261 Function block...........................................................................264 Input and output signals............................................................264 Setting parameters....................................................................264 Technical data...........................................................................266 Breaker failure protection (RBRF, 50BF)........................................266

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Introduction................................................................................266 Principle of operation.................................................................267 Function block...........................................................................270 Input and output signals............................................................270 Setting parameters....................................................................271 Technical data...........................................................................272 Pole discordance protection (RPLD, 52PD)...................................272 Introduction................................................................................273 Principle of operation.................................................................273 Pole discordance signalling from circuit breaker..................276 Unsymmetrical current detection..........................................276 Function block...........................................................................277 Input and output signals............................................................277 Setting parameters....................................................................277 Technical data...........................................................................278 Directional underpower protection (PDUP, 32)..............................278 Introduction................................................................................278 Principle of operation.................................................................279 Low pass filtering..................................................................281 Calibration of analog inputs..................................................282 Function block...........................................................................283 Input and output signals............................................................283 Setting parameters....................................................................284 Technical data...........................................................................285 Directional overpower protection (PDOP, 32)................................286 Introduction................................................................................286 Principle of operation.................................................................287 Low pass filtering..................................................................289 Calibration of analog inputs..................................................289 Function block...........................................................................290 Input and output signals............................................................291 Setting parameters....................................................................291 Technical data...........................................................................293

Section 7

Voltage protection........................................................295
Two step undervoltage protection (PTUV, 27)...............................295 Introduction................................................................................295 Principle of operation.................................................................295 Measurement principle.........................................................296 Time delay............................................................................296 Blocking................................................................................299 Design..................................................................................301 Function block...........................................................................302 Input and output signals............................................................302

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Setting parameters....................................................................303 Technical data...........................................................................306 Two step overvoltage protection (PTOV, 59).................................306 Introduction................................................................................307 Principle of operation.................................................................307 Measurement principle.........................................................308 Time delay............................................................................308 Blocking................................................................................310 Design..................................................................................310 Function block...........................................................................312 Input and output signals............................................................312 Setting parameters....................................................................313 Technical data...........................................................................315 Two step residual overvoltage protection (PTOV, 59N).................316 Introduction................................................................................316 Principle of operation.................................................................316 Measurement principle.........................................................317 Time delay............................................................................317 Blocking................................................................................320 Design..................................................................................321 Function block...........................................................................322 Input and output signals............................................................322 Setting parameters....................................................................322 Technical data...........................................................................325 Overexcitation protection (PVPH, 24).............................................325 Introduction................................................................................326 Principle of operation.................................................................326 Measured voltage.................................................................328 Operate time of the overexcitation protection.......................329 Cooling.................................................................................332 OEX protection function measurands...................................332 Overexcitation alarm............................................................333 Logic diagram.......................................................................334 Function block...........................................................................334 Input and output signals............................................................334 Setting parameters....................................................................335 Technical data...........................................................................336 Voltage differential protection (PTOV, 60)......................................337 Introduction................................................................................337 Principle of operation.................................................................337 Function block...........................................................................338 Input and output signals............................................................339 Setting parameters....................................................................339

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Technical data...........................................................................340 95% and 100% Stator earthground fault protection based on 3rd harmonic ........................................................................................340 Introduction................................................................................341 Principle of operation.................................................................341 Function block...........................................................................346 Input and output signals............................................................347 Setting parameters....................................................................348 Technical data...........................................................................348 Rotor earthground fault protection..................................................349 Introduction................................................................................349 Rotor earthground fault (GAPC, 64R)..................................349 Principle of operation.................................................................350 Rotor earthground fault........................................................350 Technical data...........................................................................353

Section 8

Frequency protection....................................................355
Underfrequency protection (PTUF, 81)..........................................355 Introduction................................................................................355 Principle of operation.................................................................355 Measurement principle.........................................................356 Time delay............................................................................356 Voltage dependent time delay..............................................356 Blocking................................................................................357 Design..................................................................................358 Function block...........................................................................359 Input and output signals............................................................359 Setting parameters....................................................................359 Technical data...........................................................................360 Overfrequency protection (PTOF, 81)............................................360 Introduction................................................................................361 Principle of operation.................................................................361 Measurement principle.........................................................361 Time delay............................................................................361 Blocking................................................................................362 Design..................................................................................362 Function block...........................................................................363 Input and output signals............................................................363 Setting parameters....................................................................364 Technical data...........................................................................364 Rate-of-change frequency protection (PFRC, 81)..........................364 Introduction................................................................................365 Principle of operation.................................................................365 Measurement principle.........................................................365

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Time delay............................................................................366 Blocking................................................................................366 Design..................................................................................366 Function block...........................................................................367 Input and output signals............................................................367 Setting parameters....................................................................368 Technical data...........................................................................368

Section 9

Multipurpose protection................................................371
General current and voltage protection (GAPC).............................371 Introduction................................................................................371 Inadvertent generator energization......................................372 Principle of operation.................................................................372 Measured quantities within the function...............................372 Base quantities for GF function............................................374 Built-in overcurrent protection steps.....................................375 Built-in undercurrent protection steps...................................380 Built-in overvoltage protection steps....................................381 Built-in undervoltage protection steps..................................381 Inadvertent generator energization......................................381 Logic diagram.......................................................................383 Function block...........................................................................388 Input and output signals............................................................388 Setting parameters....................................................................390 Technical data...........................................................................400

Section 10 Secondary system supervision.....................................403


Current circuit supervision (RDIF)..................................................403 Introduction................................................................................403 Principle of operation.................................................................403 Function block...........................................................................405 Input and output signals............................................................405 Setting parameters....................................................................405 Technical data...........................................................................406 Fuse failure supervision (RFUF).....................................................406 Introduction................................................................................406 Principle of operation.................................................................407 Zero sequence ....................................................................407 Negative sequence...............................................................410 du/dt and di/dt.......................................................................410 Operation modes..................................................................411 Dead line detection...............................................................412 Function block...........................................................................412 Input and output signals............................................................412

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Setting parameters....................................................................413 Technical data...........................................................................414

Section 11 Control..........................................................................415
Synchronizing, synchrocheck and energizing check (RSYN, 25)..................................................................................................415 Introduction................................................................................415 Principle of operation.................................................................416 Basic functionality.................................................................416 Logic diagrams.....................................................................416 Function block...........................................................................424 Input and output signals............................................................425 Setting parameters....................................................................427 Technical data...........................................................................429 Autorecloser (RREC, 79)................................................................430 Introduction................................................................................430 Apparatus control (APC).................................................................431 Introduction................................................................................431 Bay control (QCBAY).................................................................431 Introduction...........................................................................431 Function block......................................................................431 Input and output signals.......................................................431 Setting parameters...............................................................432 Local/Remote switch (LocalRemote, LocRemControl)..............432 Introduction...........................................................................432 Principle of operation............................................................432 Function block......................................................................433 Input and output signals.......................................................434 Setting parameters...............................................................435 Switch controller (SCSWI).........................................................436 Introduction...........................................................................436 Principle of operation............................................................436 Function block......................................................................441 Input and output signals.......................................................441 Setting parameters...............................................................442 Circuit breaker (SXCBR)...........................................................443 Introduction...........................................................................443 Principle of operation............................................................443 Function block......................................................................448 Input and output signals.......................................................448 Setting parameters...............................................................449 Circuit switch (SXSWI)..............................................................449 Introduction...........................................................................449 Principle of operation............................................................449

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Function block......................................................................454 Input and output signals.......................................................454 Setting parameters...............................................................455 Bay reserve (QCRSV)...............................................................455 Introduction...........................................................................455 Principle of operation............................................................455 Function block......................................................................458 Input and output signals.......................................................458 Setting parameters...............................................................459 Reservation input (RESIN)........................................................460 Introduction...........................................................................460 Principle of operation............................................................460 Function block......................................................................461 Input and output signals.......................................................461 Setting parameters...............................................................462 Interlocking.....................................................................................462 Introduction................................................................................462 Principle of operation.................................................................462 Logical node for interlocking (SCILO)........................................465 Introduction...........................................................................465 Principle of operation............................................................465 Function block......................................................................466 Input and output signals.......................................................466 Interlocking for line bay (ABC_LINE).........................................467 Introduction...........................................................................467 Function block......................................................................468 Logic diagram.......................................................................469 Input and output signals.......................................................474 Interlocking for bus-coupler bay (ABC_BC)...............................476 Introduction...........................................................................476 Function block......................................................................477 Logic diagram.......................................................................478 Input and output signals.......................................................482 Interlocking for transformer bay (AB_TRAFO)...........................485 Introduction...........................................................................485 Function block......................................................................486 Logic diagram.......................................................................487 Input and output signals.......................................................490 Interlocking for bus-section breaker (A1A2_BS)........................492 Introduction...........................................................................492 Function block......................................................................492 Logic diagram.......................................................................493 Input and output signals.......................................................494

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Interlocking for bus-section disconnector (A1A2_DC)...............496 Introduction...........................................................................496 Function block......................................................................496 Logic diagram.......................................................................497 Input and output signals.......................................................499 Interlocking for busbar earthinggrounding switch (BB_ES).......500 Introduction...........................................................................500 Function block......................................................................500 Logic diagram.......................................................................501 Input and output signals.......................................................501 Interlocking for double CB bay (DB)..........................................501 Introduction...........................................................................501 Function block......................................................................502 Logic diagrams.....................................................................503 Input and output signals ......................................................510 Interlocking for 1 1/2 CB (BH)....................................................513 Introduction...........................................................................513 Function blocks....................................................................514 Logic diagrams.....................................................................516 Input and output signals.......................................................523 Horizontal communication via GOOSE for interlocking.............529 Function block......................................................................529 Input and output signals.......................................................529 Setting parameters...............................................................531 Logic rotating switch for function selection and LHMI presentation (SLGGIO)...................................................................531 Introduction................................................................................531 Principle of operation.................................................................532 Functionality and behaviour ................................................533 Graphical display..................................................................533 Function block...........................................................................535 Input and output signals............................................................536 Setting parameters....................................................................537 Selector mini switch (VSGGIO)......................................................537 Introduction................................................................................537 Principle of operation.................................................................538 Function block...........................................................................538 Input and output signals............................................................538 Setting parameters....................................................................539 Generic double point function block (DPGGIO)..............................539 Introduction................................................................................540 Principle of operation.................................................................540 Function block...........................................................................540

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Input and output signals............................................................540 Setting parameters....................................................................540 Single point generic control 8 signals (SPC8GGIO).......................541 Introduction................................................................................541 Principle of operation.................................................................541 Function block...........................................................................541 Input and output signals............................................................541 Setting parameters....................................................................542

Section 12 Logic.............................................................................545
Tripping logic (PTRC, 94)...............................................................545 Introduction................................................................................545 Principle of operation.................................................................545 Logic diagram.......................................................................547 Function block...........................................................................550 Input and output signals............................................................550 Setting parameters....................................................................551 Technical data...........................................................................552 Trip matrix logic (GGIO).................................................................552 Application.................................................................................552 Principle of operation.................................................................552 Function block...........................................................................554 Input and output signals............................................................554 Setting parameters....................................................................555 Configurable logic blocks (LLD)......................................................556 Introduction................................................................................556 Inverter function block (INV)......................................................556 OR function block (OR).............................................................556 AND function block (AND).........................................................557 Timer function block (Timer)......................................................558 Pulse timer function block (PULSE)..........................................559 Exclusive OR function block (XOR)...........................................559 Set-reset with memory function block (SRM)............................560 Controllable gate function block (GT)........................................561 Settable timer function block (TS).............................................561 Technical data...........................................................................562 Fixed signal function block (FIXD)..................................................563 Introduction................................................................................563 Principle of operation.................................................................563 Function block...........................................................................563 Input and output signals............................................................563 Setting parameters....................................................................564 Boolean 16 to Integer conversion B16I..........................................564 Introduction................................................................................564

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Principle of operation............................................................564 Function block......................................................................565 Input and output signals.......................................................565 Setting parameters...............................................................566 Boolean 16 to Integer conversion with logic node representation (B16IGGIO)....................................................................................566 Introduction................................................................................566 Principle of operation.................................................................566 Function block...........................................................................567 Input and output signals............................................................567 Setting parameters....................................................................568 Integer to Boolean 16 conversion (IB16)........................................568 Introduction................................................................................568 Principle of operation.................................................................568 Function block...........................................................................569 Input and output signals............................................................569 Setting parameters....................................................................570 Integer to Boolean 16 conversion with logic node representation (IB16GGIO)....................................................................................570 Introduction................................................................................570 Principle of operation.................................................................570 Function block...........................................................................571 Input and output signals............................................................571 Setting parameters....................................................................572

Section 13 Monitoring.....................................................................573
Measurements (MMXU).................................................................573 Introduction................................................................................574 Principle of operation.................................................................576 Measurement supervision....................................................576 Service values (MMXU, SVR)..............................................580 Current Phasors (MMXU, CP)..............................................584 Voltage phasors (MMXU, VN and VP).................................585 Sequence quantities (MSQI, CSQ and VSQ).......................585 Function block...........................................................................585 Input and output signals............................................................587 Setting parameters....................................................................590 Technical data...........................................................................606 Event counter (GGIO).....................................................................606 Introduction................................................................................606 Principle of operation.................................................................607 Reporting..............................................................................607 Design..................................................................................607 Function block...........................................................................608

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Input signals..............................................................................608 Setting parameters....................................................................608 Technical data...........................................................................608 Event function (EV).........................................................................608 Introduction................................................................................609 Principle of operation.................................................................609 Function block...........................................................................611 Input and output signals............................................................611 Setting parameters....................................................................612 Measured value expander block.....................................................614 Introduction................................................................................614 Principle of operation.................................................................615 Function block...........................................................................615 Input and output signals............................................................615 Disturbance report (RDRE)............................................................616 Introduction................................................................................616 Principle of operation.................................................................616 Function block...........................................................................623 Input and output signals............................................................625 Setting parameters....................................................................627 Technical data...........................................................................638 Event list (RDRE)...........................................................................639 Introduction................................................................................639 Principle of operation.................................................................639 Function block...........................................................................640 Input signals..............................................................................640 Technical data...........................................................................640 Indications (RDRE).........................................................................640 Introduction................................................................................640 Principle of operation.................................................................641 Function block...........................................................................642 Input signals..............................................................................642 Technical data...........................................................................642 Event recorder (RDRE)..................................................................642 Introduction................................................................................642 Principle of operation.................................................................643 Function block...........................................................................643 Input signals..............................................................................643 Technical data...........................................................................643 Trip value recorder (RDRE)............................................................644 Introduction................................................................................644 Principle of operation.................................................................644 Function block...........................................................................645

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Input signals..............................................................................645 Technical data...........................................................................645 Disturbance recorder (RDRE)........................................................645 Introduction................................................................................645 Principle of operation.................................................................646 Memory and storage............................................................646 IEC 60870-5-103..................................................................648 Function block...........................................................................648 Input and output signals............................................................648 Setting parameters....................................................................648 Technical data...........................................................................648

Section 14 Metering.......................................................................651
Pulse counter logic (GGIO)............................................................651 Introduction................................................................................651 Principle of operation.................................................................651 Function block...........................................................................653 Input and output signals............................................................653 Setting parameters....................................................................654 Technical data...........................................................................654 Energy metering and demand handling (MMTR)...........................655 Introduction................................................................................655 Principle of operation.................................................................655 Function block...........................................................................656 Input and output signals............................................................656 Setting parameters....................................................................657

Section 15 Station communication.................................................659


Overview.........................................................................................659 IEC 61850-8-1 communication protocol.........................................659 Introduction................................................................................659 Generic single point function block (SPGGIO)..........................660 Introduction...........................................................................660 Principle of operation............................................................660 Function block......................................................................660 Input and output signals.......................................................661 Setting parameters...............................................................662 Generic measured values function block (MVGGIO)................662 Introduction...........................................................................662 Principle of operation............................................................662 Function block......................................................................663 Input and output signals.......................................................663 Setting parameters...............................................................663 Setting parameters....................................................................664

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Technical data...........................................................................664 LON communication protocol.........................................................664 Introduction................................................................................664 Principle of operation.................................................................665 Setting parameters....................................................................682 Technical data...........................................................................683 SPA communication protocol.........................................................683 Introduction................................................................................683 Principle of operation.................................................................683 Communication ports...........................................................691 Design.......................................................................................692 Setting parameters....................................................................692 Technical data...........................................................................693 IEC 60870-5-103 communication protocol.....................................693 Introduction................................................................................693 Principle of operation.................................................................693 General.................................................................................693 Communication ports...........................................................703 Function block...........................................................................703 Input and output signals............................................................705 Setting parameters....................................................................710 Technical data...........................................................................714 Automation bits (AUBI)...................................................................714 Introduction................................................................................714 Principle of operation.................................................................714 Function block...........................................................................715 Input and output signals............................................................715 Setting parameters....................................................................716 Single command, 16 signals (CD)..................................................731 Introduction................................................................................731 Principle of operation.................................................................732 Function block...........................................................................732 Input and output signals............................................................732 Setting parameters....................................................................733 Multiple command (CM) and Multiple transmit (MT).......................733 Introduction................................................................................733 Principle of operation.................................................................734 Design.......................................................................................734 General.................................................................................734 Function block...........................................................................734 Input and output signals............................................................735 Setting parameters....................................................................737

Section 16 Remote communication................................................739


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Binary signal transfer to remote end...............................................739 Introduction................................................................................739 Principle of operation.................................................................740 Function block...........................................................................740 Input and output signals............................................................741 Setting parameters....................................................................743

Section 17 Hardware......................................................................747
Overview.........................................................................................747 Variants of case- and HMI display size.....................................747 Case from the rear side.............................................................749 Hardware modules.........................................................................751 Overview....................................................................................751 Combined backplane module (CBM).........................................752 Introduction...........................................................................752 Functionality.........................................................................752 Design..................................................................................753 Universal backplane module (UBM)..........................................755 Introduction...........................................................................755 Functionality.........................................................................755 Design..................................................................................755 Power supply module (PSM).....................................................757 Introduction...........................................................................757 Design..................................................................................757 Technical data......................................................................758 Numeric processing module (NUM)..........................................758 Introduction...........................................................................758 Functionality.........................................................................759 Block diagram.......................................................................760 Local human-machine interface (LHMI)....................................760 Transformer input module (TRM)..............................................760 Introduction...........................................................................760 Design..................................................................................761 Technical data......................................................................761 Analog digital conversion module, with time synchronization (ADM) .......................................................................................762 Introduction...........................................................................762 Design..................................................................................762 Binary input module (BIM).........................................................764 Introduction...........................................................................764 Design..................................................................................764 Technical data......................................................................767 Binary output modules (BOM)...................................................768 Introduction...........................................................................768

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Design..................................................................................768 Technical data......................................................................770 Static binary output module (SOM)...........................................771 Introduction...........................................................................771 Design..................................................................................771 Technical data......................................................................773 Binary input/output module (IOM)..............................................774 Introduction...........................................................................774 Design..................................................................................774 Technical data......................................................................776 Line data communication module (LDCM)................................777 Introduction...........................................................................777 Design..................................................................................778 Technical data......................................................................778 Serial SPA/IEC 60870-5-103 and LON communication module (SLM) ...........................................................................779 Introduction...........................................................................779 Design..................................................................................779 Technical data......................................................................781 Galvanic RS485 communication module...................................781 Introduction...........................................................................781 Design..................................................................................781 Technical data......................................................................783 Optical ethernet module (OEM).................................................783 Introduction...........................................................................783 Functionality.........................................................................783 Design..................................................................................783 Technical data......................................................................784 mA input module (MIM).............................................................785 Introduction...........................................................................785 Design..................................................................................785 Technical data......................................................................786 GPS time synchronization module (GSM).................................787 Introduction...........................................................................787 Design..................................................................................787 Technical data......................................................................788 GPS antenna.............................................................................789 Introduction...........................................................................789 Design..................................................................................789 Technical data......................................................................790 IRIG-B time synchronization module IRIG-B.............................791 Introduction...........................................................................791 Design..................................................................................791

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Table of contents

Technical data......................................................................792 Dimensions.....................................................................................792 Case without rear cover.............................................................792 Case with rear cover..................................................................793 Flush mounting dimensions.......................................................795 Side-by-side flush mounting dimensions...................................796 Wall mounting dimensions.........................................................797 External resistor unit for high impedance differential protection...................................................................................797 Mounting alternatives.....................................................................798 Flush mounting..........................................................................798 Overview..............................................................................798 Mounting procedure for flush mounting................................799 19 panel rack mounting............................................................800 Overview..............................................................................800 Mounting procedure for 19 panel rack mounting.................801 Wall mounting............................................................................801 Overview..............................................................................801 Mounting procedure for wall mounting.................................802 How to reach the rear side of the IED..................................802 Side-by-side 19 rack mounting.................................................803 Overview..............................................................................803 Mounting procedure for side-by-side rack mounting............804 IED 670 mounted with a RHGS6 case.................................804 Side-by-side flush mounting......................................................805 Overview..............................................................................805 Mounting procedure for side-by-side flush mounting...........806 Technical data................................................................................806 Enclosure...................................................................................806 Connection system....................................................................807 Influencing factors.....................................................................807 Type tests according to standard..............................................808

Section 18 Labels...........................................................................811
Different labels................................................................................811

Section 19 Connection diagrams...................................................815 Section 20 Time inverse characteristics.........................................831


Application......................................................................................831 Principle of operation......................................................................833 Mode of operation......................................................................833 Inverse characteristics....................................................................839

Section 21 Glossary.......................................................................853
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Table of contents

Glossary.........................................................................................853

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Section 1 Introduction

Section 1

Introduction
About this chapter
This chapter explains concepts and conventions used in this manual and provides information necessary to understand the contents of the manual.

1.1
1.1.1

Introduction to the technical reference manual


About the complete set of manuals for an IED
The users manual (UM) is a complete set of five different manuals:
Application manual Technical reference manual Installation and commissioning manual Operators manual Engineering guide

en06000097.vsd

The Application Manual (AM) contains application descriptions, setting guidelines and setting parameters sorted per function. The application manual should be used to find out when and for what purpose a typical protection function could be used. The manual should also be used when calculating settings. The Technical Reference Manual (TRM) contains application and functionality descriptions and it lists function blocks, logic diagrams, input and output signals, setting parameters and technical data sorted per function. The technical reference manual should be used as a technical reference during the engineering phase, installation and commissioning phase, and during normal service. The Installation and Commissioning Manual (ICM) contains instructions on how to install and commission the protection IED. The manual can also be used as a reference during periodic testing. The manual covers procedures for mechanical and electrical installation, energizing and checking of external circuitry, setting and configuration as well as verifying settings and performing directional tests. The chapters are organized in the chronological order (indicated by chapter/section numbers) in which the protection IED should be installed and commissioned. The Operators Manual (OM) contains instructions on how to operate the protection IED during normal service once it has been commissioned. The operators manual

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Section 1 Introduction

can be used to find out how to handle disturbances or how to view calculated and measured network data in order to determine the cause of a fault. The IED 670 Engineering guide (EG) contains instructions on how to engineer the IED 670 products. The manual guides to use the different tool components for IED 670 engineering. It also guides how to handle the tool component available to read disturbance files from the IEDs on the basis of the IEC 61850 definitions. The third part is an introduction about the diagnostic tool components available for IED 670 products and the PCM 600 tool. The IEC 61850 Station Engineering guide contains descriptions of IEC 61850 station engineering and process signal routing. The manual presents the PCM 600 and CCT tool used for station engineering. It describes the IEC 61850 attribute editor and how to set up projects and communication.

1.1.2

About the technical reference manual


The technical reference manual contains the following chapters: The chapter Local human-machine interface describes the control panel on the IED. Display characteristics, control keys and various local human-machine interface features are explained. The chapter Basic IED functions presents functions that are included in all IEDs regardless of the type of protection they are designed for. These are functions like Time synchronization, Self supervision with event list, Test mode and other functions of a general nature. The chapter Current protection describes functions such as overcurrent protection, breaker failure protection and pole discordance. The chapter Voltage protection describes functions like undervoltage and overvoltage protection as well as residual overvoltage protection. The chapter Frequency protection describes functions for overfrequency, underfrequency and rate of change of frequency. The chapter Multipurpose protection describes the general protection function for current and voltage. The chapter Secondary system supervision includes descriptions of functions like current based Current circuit supervision and Fuse failure supervision. The chapter Control describes the control functions. These are functions like the Synchronization and energizing check as well as several others which are product specific. The chapter Logic describes trip logic and related functions. The chapter Monitoring describes measurement related functions used to provide data regarding relevant quantities, events, faults and the like. The chapter Metering describes primarily Pulse counter logic. The chapter Station communication describes Ethernet based communication in general including the use of IEC61850, and horizontal communication via GOOSE. The chapter Remote communication describes binary and analog signal transfer, and the associated hardware. The chapter Hardware provides descriptions of the IED and its components. REG 670

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Section 1 Introduction

The chapter Connection diagrams provides terminal wiring diagrams and information regarding connections to and from the IED. The chapter Time inverse characteristics describes and explains inverse time delay, inverse time curves and their effects. The chapter Glossary is a list of terms, acronyms and abbreviations used in ABB technical documentation.

1.1.3

Design of the Technical reference manual (TRM)


The description of each IED related function follows the same structure (where applicable). The different sections are outlined below.

1.1.3.1

Introduction
Outlines the implementation of a particular protection function.

1.1.3.2

Principle of operation
Describes how the function works, presents a general background to algorithms and measurement techniques. Logic diagrams are used to illustrate functionality.

Logic diagrams

Logic diagrams describe the signal logic inside the function block and are bordered by dashed lines. Signal names Input and output logic signals consist of two groups of letters separated by two dashes. The first group consists of up to four letters and presents the abbreviated name for the corresponding function. The second group presents the functionality of the particular signal. According to this explanation, the meaning of the signal BLKTR in figure 4 is as follows: BLKTR informs the user that the signal will BLOCK the TRIP command from the under-voltage function, when its value is a logical one (1).

Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed. Input and output signals In a logic diagram, input and output signal paths are shown as a lines that touch the outer border of the diagram. Input and output signals can be configured using the CAP531 tool. They can be connected to the inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2, STL3.

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Section 1 Introduction
Setting parameters Signals in frames with a shaded area on their right hand side represent setting parameter signals. These parameters can only be set via the PST or LHMI. Their values are high (1) only when the corresponding setting parameter is set to the symbolic value specified within the frame. Example is the signal Block TUV=Yes. Their logical values correspond automatically to the selected setting value. Internal signals Internal signals are illustrated graphically and end approximately. 2 mm from the frame edge. If an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the signal name to indicate where the signal starts and continues, see figure 3.
BLKTR TEST TEST Block TUV=Yes BLOCK VTSU BLOCK-int. STUL1N BLOCK-int. STUL2N BLOCK-int. STUL3N & & >1 & t & TRIP START STL1 STL2 STL3 & >1

BLOCK-int.

xx04000375.vsd

Figure 1:

Logic diagram example with -int signals

External signals Signal paths that extend beyond the logic diagram and continue in another diagram have the suffix -cont., see figure 2 and figure 3.

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Section 1 Introduction

STCND & & & & & &

>1

STZMPP-cont.

STNDL1L2-cont. STNDL2L3-cont. STNDL3L1-cont. STNDL1N-cont. STNDL2N-cont. STNDL3N-cont. >1 STNDPE-cont.

1L1L2 1L2L3 1L3L1 1L1N 1L2N 1L3N

>1 1--VTSZ 1--BLOCK >1 & 1--STND BLK-cont.


xx04000376.vsd

Figure 2:

Logic diagram example with an outgoing -cont signal

STNDL1N-cont. STNDL2N-cont. STNDL3N-cont. STNDL1L2-cont. STNDL2L3-cont. STNDL3L1-cont.

>1 & >1 & & & 15 ms t 15 ms t 15 ms t 15 ms t STL1 STL2 STL3 START

>1 >1

BLK-cont.
xx04000377.vsd

Figure 3:

Logic diagram example with an incoming -cont signal

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Section 1 Introduction
1.1.3.3 Input and output signals
Input and output signals are presented in two separate tables. Each table consists of two columns. The first column contains the name of the signal and the second column contains the description of the signal.

1.1.3.4

Function block
Each function block is illustrated graphically. Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed. Special kinds of settings are sometimes available. These are supposed to be connected to constants in the configuration scheme, and are therefore depicted as inputs. Such signals will be found in the signal list but described in the settings table.
CAP531 Name Inputs
U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TUV1PH2PUVM TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 en05000330.vsd

IEC 61850 - 8 -1 Logical Node

Outputs

Diagram Number

Figure 4:

Example of a function block

1.1.3.5

Setting parameters
These are presented in tables and include all parameters associated with the function in question.

1.1.3.6

Technical data
The technical data section provides specific technical information about the function or hardware described.

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Section 1 Introduction 1.1.4 Intended audience


General
This manual addresses system engineers, installation and commissioning personnel, who use technical data during engineering, installation and commissioning, and in normal service.

Requirements
The system engineer must have a thorough knowledge of protection systems, protection equipment, protection functions and the configured functional logics in the protective devices. The installation and commissioning personnel must have a basic knowledge in the handling electronic equipment.

1.1.5

Related documents
Documents related to REG 670 Operators manual Installation and commissioning manual Technical reference manual Application manual Buyers guide Setting example Identity number 1MRK 502 014-UEN 1MRK 502 015-UEN 1MRK 502 013-UEN 1MRK 502 016-UEN 1MRK 502 019-BEN 1MRK 502 020-WEN

Connection and Installation components Test system, COMBITEST Accessories for IED 670 Getting started guide IED 670 SPA and LON signal list for IED 670, ver. 1.1 IEC 61850 Data objects list for IED 670, ver. 1.1 Generic IEC 61850 IED Connectivity package Protection and Control IED Manager PCM 600 Installation sheet Engineering guide IED 670 products Buyers guide REG 216

1MRK 013 003-BEN 1MRK 512 001-BEN 1MRK 514 012-BEN 1MRK 500 080-UEN 1MRK 500 083-WEN 1MRK 500 084-WEN 1KHA001027-UEN 1MRS755552 1MRK 511 179-UEN 1MRB520004-BEN

Latest versions of the described documentation can be found on www.abb.com/substationautomation

1.1.6

Revision notes
Revision B Description No functionality added. Minor changes made in content due to problem reports.

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Section 2 Local human-machine interface

Section 2

Local human-machine interface


About this chapter
This chapter describes the structure and use of the Local human machine interface (LHMI) or in other words, the control panel on the IED.

2.1

Human machine interface


The local human machine interface is available in a small, and a medium sized model. The principle difference between the two is the size of the LCD. The small size LCD can display seven line of text and the medium size LCD can display the single line diagram with up to 15 objects on each page. Up to 12 SLD pages can be defined, depending on the product capability. The local human machine interface is equipped with an LCD that can display the single line diagram with up to 15 objects. The local human-machine interface is simple and easy to understand the whole front plate is divided into zones, each of them with a well-defined functionality: Status indication LEDs Alarm indication LEDs which consists of 15 LEDs (6 red and 9 yellow) with user printable label. All LEDs are configurable from the PCM 600 tool Liquid crystal display (LCD) Keypad with push buttons for control and navigation purposes, switch for selection between local and remote control and reset An isolated RJ45 communication port

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Figure 5:

Example of medium graphic HMI

2.2
2.2.1

Small size graphic HMI


Introduction
The small sized HMI is available for 1/2 and 1/1 x 19 case. The LCD on the small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per line. The first line displays the product name and the last line displays date and time. The remaining 5 lines are dynamic. This LCD has no graphic display potential.

2.2.2

Design
The LHMI is identical for both the 1/2 and 1/1 cases. The different parts of the small LHMI is shown in figure 6

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en05000055.eps

Figure 6:

Small graphic HMI

1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ 45 port 7 Communication indication LED 8 Keypad

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2.3
2.3.1

Medium size graphic HMI


Introduction
The 1/2 and 1/1 x 19 cases can be equipped with the medium size LCD. This is a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines with up to 40 characters per line. To display the single line diagram, this LCD is required.

2.3.2

Design
The different parts of the medium size LHMI is shown in figure 7The LHMI, exists in an IEC version and in an ANSI version. The difference is on the keypad operation buttons and the yellow LED designation.
Figure 7: Medium size graphic HMI

1 Status indication LEDs 2 LCD 3 Indication LEDs 4 Label 5 Local/Remote LEDs 6 RJ45 port 7 Communication indication LED 8 Keypad

2.4

Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in all IEDs in the IED 670 series. LCD screens and other details may differ but the way the keys function is identical. The keypad is illustrated in figure 8.

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Section 2 Local human-machine interface

Figure 8:

The HMI keypad.

The keys used to operate the IED are described below in table 1.
Table 1:
Key

HMI keys on the front of the IED


Function This key closes (energizes) a breaker or disconnector.

This key opens a breaker or disconnector.

The help key brings up two submenus. Key operation and IED information.

This key is used to clear entries, It cancels commands and edits.

Opens the main menu, and used to move to the default screen.

The Local/Remote key is used to set the IED in local or remote control mode.

This key opens the reset screen.

The E key starts editing mode and confirms setting changes when in editing mode.

The right arrow key navigates forward between screens and moves right in editing mode. Table continued on next page

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Key Function The left arrow key navigates backwards between screens and moves left in editing mode.

The up arrow key is used to move up in the single line diagram and in menu tree.

The down arrow key is used to move down in the single line diagram and in menu tree.

2.5
2.5.1

LED
Introduction
The LED module is a unidirectional means of communicating. This means that events may occur that activate a LED in order to draw the operators attention to something that has occurred and needs some sort of action.

2.5.2

Status indication LEDs


There are three LEDs above the LCD. The information they communicate is described in the table below.
LED Indication Green: Steady Flashing Dark Yellow: Steady Flashing Red: Steady Trip command issued Dist. rep. triggered Terminal in test mode In service Internal failure No power supply Information

2.5.3

Indication LEDs
The LED indication module comprising 15 LEDs is standard in IED 670s. Its main purpose is to present an immediate visual information for protection indications or alarm signals. There are alarm indication LEDs and hardware associated LEDs on the right hand side of the front panel. The alarm LEDs are found to the right of the LCD screen. They can show steady or flashing light. Flashing would normally indicate an alarm.

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The alarm LEDs are configurable using the PCM 600 tool. This is because they are dependent on the binary input logic and can therefore not be configured locally on the HMI. Some typical alarm examples follow: Bay controller failure CB close blocked Interlocking bypassed Differential protection trip SF6 Gas refill Position error CB spring charge alarm Oil temperature alarm Thermal overload trip Bucholtz trip

The RJ45 port has a yellow LED indicating that communication has been established between the IED and a computer. The Local/Remote key on the front panel has two LEDs indicating whether local or remote control of the IED is active.

2.6
2.6.1

LHMI related functions


Introduction
The adaptation of the LHMI to the application and user preferences is made with: function block LHMI (LocalHMI) function block HLED (LEDMonitor) setting parameters

2.6.2

General setting parameters


Table 2:
Parameter Language DisplayTimeout AutoRepeat

Basic general settings for the localHMI (LHM1-) function


Range English OptionalLanguage 10 - 120 Off On -10 - 20 Step 10 Default English 60 On Unit Min Description Local HMI language Local HMI display timeout Activation of autorepeat (On) or not (Off) Contrast level for display

ContrastLevel

Table continued on next page

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Parameter DefaultScreen EvListSrtOrder SymbolFont Range 0-0 Latest on top Oldest on top IEC ANSI Step 1 Default 0 Latest on top IEC Unit Description Default screen Sort order of event list Symbol font for Single Line Diagram

2.6.3
2.6.3.1

Status indication LEDs


Design
The function block LHMI (LocalHMI) controls and supplies information about the status of the status indication LEDs. The input and output signals of LHMI are configured with the PCM 600 tool. The function block can be used if any of the signals are required in a configuration logic. See section "Status indication LEDs" for information about the LEDs.

2.6.3.2

Function block
LHMILocalHMI CLRLEDS HMI-ON RED-S YELLOW-S YELLOW-F CLRPULSE LEDSCLRD en05000773.vsd

Figure 9:

LHMI function block

2.6.3.3

Input and output signals


Table 3:
Signal CLRLEDS

Input signals for the LocalHMI (LHMI-) function block


Description Input to clear the LCD-HMI LEDs

Table 4:
Signal HMI-ON RED-S YELLOW-S

Output signals for the LocalHMI (LHMI-) function block


Description Backlight of the LCD display is active Red LED on the LCD-HMI is steady Yellow LED on the LCD-HMI is steady

Table continued on next page

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Signal YELLOW-F CLRPULSE LEDSCLRD Description Yellow LED on the LCD-HMI is flashing A pulse is provided when the LEDs on the LCD-HMI are cleared Active when the LEDs on the LCD-HMI are not active

2.6.4
2.6.4.1

Indication LEDs
Introduction
The function block HLED (LEDMonitor) controls and supplies information about the status of the indication LEDs. The input and output signals of HLED are configured with the PCM 600 tool. The input signal for each LED is selected individually with the PCM 600 Signal Matrix Tool (SMT). LEDs (number 16) for trip indications are red and LEDs (number 715) for start indications are yellow. Each indication LED on the LHMI can be set individually to operate in six different sequences; two as follow type and four as latch type. Two of the latching sequence types are intended to be used as a protection indication system, either in collecting or restarting mode, with reset functionality. The other two are intended to be used as signalling system in collecting (coll) mode with an acknowledgment functionality. The light from the LEDs can be steady (-S) or flickering (-F). For details, refer to Technical reference manual.

2.6.4.2

Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the modes of the HLED. The latest LED picture appears immediately after the IED is successfully restarted.

Operating modes
Collecting mode LEDs which are used in collecting mode of operation are accumulated continuously until the unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified alarm system.

Re-starting mode In the re-starting mode of operation each new start resets all previous active LEDs and activates only those which appear during one disturbance. Only LEDs defined for re-starting mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new disturbance. A

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Section 2 Local human-machine interface

disturbance is defined to end a settable time after the reset of the activated input signals or when the maximum time limit has elapsed.

Acknowledgment/reset
From local HMI The active indications can be acknowledged/reset manually. Manual acknowledgment and manual reset have the same meaning and is a common signal for all the operating sequences and LEDs. The function is positive edge triggered, not level triggered. The acknowledgment/reset is performed via the Reset-button and menus on the LHMI. For details, refer to the Operators manual.

From function input The active indications can also be acknowledged/reset from an input, RESET, to the function. This input can for example be configured to a binary input operated from an external push button. The function is positive edge triggered, not level triggered. This means that even if the button is continuously pressed, the acknowledgment/reset only affects indications active at the moment when the button is first pressed.

Automatic reset The automatic reset can only be performed for indications defined for restarting mode with the latched sequence type 6 (LatchedReset-S). When the automatic reset of the LEDs has been performed, still persisting indications will be indicated with a steady light.

Operating sequences

The sequences can be of type Follow or Latched. For the Follow type the LED follow the input signal completely. For the Latched type each LED latches to the corresponding input signal until it is reset. The figures below show the function of available sequences selectable for each LED separately. For sequence 1 and 2 (Follow type), the acknowledgment/reset function is not applicable. Sequence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Sequence 5 is working according to Latched type and collecting mode while sequence 6 is working according to Latched type and restarting mode. The letters S and F in the sequence names have the meaning S = Steady and F = Flash. At the activation of the input signal, the indication operates according to the selected sequence diagrams below. In the sequence diagrams the LEDs have the characteristics shown in figure 10.

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= No indication

= Steady light

= Flash
en05000506.vsd

Figure 10:

Symbols used in the sequence diagrams

Sequence 1 (Follow-S) This sequence follows all the time, with a steady light, the corresponding input signals. It does not react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.
Activating signal

LED
en01000228.vsd

Figure 11:

Operating sequence 1 (Follow-S)

Sequence 2 (Follow-F) This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing steady light. Sequence 3 (LatchedAck-F-S) This sequence has a latched function and works in collecting mode. Every LED is independent of the other LEDs in its operation. At the activation of the input signal, the indication starts flashing. After acknowledgment the indication disappears if the signal is not present any more. If the signal is still present after acknowledgment it gets a steady light.
Activating signal

LED

Acknow.
en01000231.vsd

Figure 12:

Operating sequence 3 (LatchedAck-F-S)

Sequence 4 (LatchedAck-S-F) This sequence has the same functionality as sequence 3, but steady and flashing light have been alternated.

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Sequence 5 (LatchedColl-S) This sequence has a latched function and works in collecting mode. At the activation of the input signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that indications that are still activated will not be affected by the reset i.e. immediately after the positive edge of the reset has been executed a new reading and storing of active signals is performed. Every LED is independent of the other LEDs in its operation.
Activating signal

LED

Reset
en01000235.vsd

Figure 13:

Operating sequence 5 (LatchedColl-S)

Sequence 6 (LatchedReset-S) In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically reset at a new disturbance when activating any input signal for other LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still activated will not be affected by manual reset, i.e. immediately after the positive edge of that the manual reset has been executed a new reading and storing of active signals is performed. LEDs set for sequence 6 are completely independent in its operation of LEDs set for other sequences. Definition of a disturbance A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a settable time, tRestart, has elapsed after that all activating signals for the LEDs set as LatchedReset-S have reset. However if all activating signals have reset and some signal again becomes active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new disturbance start will be issued first when all signals have reset after tRestart has elapsed. A diagram of this functionality is shown in figure 14.

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From disturbance length control per LED set to sequence 6

New disturbance

&

tRestart t

& 1 &

en01000237.vsd

Figure 14:

Activation of new disturbance

In order not to have a lock-up of the indications in the case of a persisting signal each LED is provided with a timer, tMax, after which time the influence on the definition of a disturbance of that specific LED is inhibited. This functionality is shown i diagram in figure 15.
Activating signal To LED

AND tMax t

To disturbance length control

en05000507.vsd

Figure 15:

Length control of activating signals

Timing diagram for sequence 6 Figure 16 shows the timing diagram for two indications within one disturbance.

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Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset

en01000239.vsd

Figure 16:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance

Figure 17 shows the timing diagram for a new indication after tRestart time has elapsed.
Disturbance t Restart Activating signal 1 Activating signal 2 Disturbance t Restart

LED 1

LED 2 Automatic reset Manual reset

en01000240.vsd

Figure 17:

Operating sequence 6 (LatchedReset-S), two different disturbances

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Figure 18 shows the timing diagram when a new indication appears after the first one has reset but before tRestart has elapsed.
Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


en01000241.vsd

Figure 18:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance but with reset of activating signal between

Figure 19 shows the timing diagram for manual reset.


Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


en01000242.vsd

Figure 19:

Operating sequence 6 (LatchedReset-S), manual reset

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2.6.4.3 Function block
HLEDLEDMonitor BLOCK RESET LEDTEST NEWIND ACK

en05000508.vsd

Figure 20:

HLED function block

2.6.4.4

Input and output signals


Table 5:
Signal BLOCK RESET LEDTEST

Input signals for the LEDMonitor (HLED-) function block


Description Input to block the operation of the LED-unit Input to acknowledge/reset the indications of the LED-unit Input for external LED test

Table 6:
Signal NEWIND ACK

Output signals for the LEDMonitor (HLED-) function block


Description A new signal on any of the indication inputs occurs A pulse is provided when the LEDs are acknowledged

2.6.4.5

Setting parameters
Table 7:
Parameter Operation tRestart tMax

Basic general settings for the LEDMonitor (HLED-) function


Range Off On 0.0 - 100.0 0.0 - 100.0 Step 0.1 0.1 Default Off 0.0 0.0 Unit s s Description Operation mode for the LED function Defines the disturbance length Maximum time for the definition of a disturbance Sequence type for LED 1

SeqTypeLED1

Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S

Follow-S

Table continued on next page

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Parameter SeqTypeLED2 Range Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Step Default Follow-S Unit Description Sequence type for LED 2

SeqTypeLED3

Follow-S

Sequence type for LED 3

SeqTypeLED4

Follow-S

Sequence type for LED 4

SeqTypeLED5

Follow-S

Sequence type for LED 5

SeqTypeLED6

Follow-S

Sequence type for LED 6

SeqTypeLED7

Follow-S

Sequence type for LED 7

SeqTypeLED8

Follow-S

sequence type for LED 8

SeqTypeLED9

Follow-S

Sequence type for LED 9

SeqTypeLED10

Follow-S

Sequence type for LED 10

Table continued on next page

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Parameter SeqTypeLED11 Range Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Step Default Follow-S Unit Description Sequence type for LED 11

SeqTypeLED12

Follow-S

Sequence type for LED 12

SeqTypeLED13

Follow-S

Sequence type for LED 13

SeqTypeLED14

Follow-S

Sequence type for LED 14

SeqTypeLED15

Follow-S

Sequence type for LED 15

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Section 3

Basic IED functions


About this chapter
This chapter presents functions that are basic to all REx670 IEDs. Typical functions in this category are time synchronization, self supervision and test mode.

3.1
3.1.1

Analog inputs
Introduction
In order to get correct measurement results as well as correct protection operations the analog input channels must be configured and properly set. For power measuring and all directional and differential functions the directions of the input currents must be properly defined. The measuring and protection algorithms in IED 670 are using primary system quantities and the set values are done in primary quantities as well. Therefore it is extremely important to properly set the data about the connected current and voltage transformers. In order to make Service Values reading easier it is possible to define a reference PhaseAngleRef. Then this analog channels phase angle will be always fixed to zero degree and all other angle information will be shown in relation to this analog input. During testing and commissioning of the IED the reference channel can be freely change in order to facilitate testing and service values reading. VT inputs are sometimes not available depending on ordered type of Transformer Input Module (TRM).

3.1.2

Principle of operation
The direction of a current to the IED is depending on the connection of the CT. The main CTs are typically star connected and can be connected with the star point to the object or from the object. This information must be set to the IED. The convention of the directionality is defined as follows: A positive value of current, power etc. means that the quantity has the direction into the object and a negative value means direction out from the object. For directional functions the direction into the object is defined as Forward and the direction out from the object is defined as Reverse, see figure 21

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Definition of direction for directional functions Reverse Forward

Definition of direction for directional functions Forward Reverse

Protected Object Line, transformer, etc


e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CTStarPoint Correct Setting is "ToObject" e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CTStarPoint Correct Setting is "FromObject" en05000456.vsd

Figure 21:

Internal convention of the directionality in IED 670

With correct setting of the primary CT direction, CTStarPoint set to FromObject or ToObject, a positive quantities always flowing towards the object and a direction defined as Forward always is looking towards the object. To be able to use primary system quantities for settings and calculation in the IED the ratios of the main CTs and VTs must be known. This information is given to the IED by setting of the rated secondary and primary currents and voltages of the CTs and VTs. The CT and VT ratio and the name on respective channel is done under General settings/Analog module in the parameter settings tool PST.

3.1.3

Function block
The function blocks are not represented in the configuration tool. The signals appear only in the SMT tool when a TRM is included in the configuration with the function selector tool. In the SMT tool they can be mapped to the desired virtual input (SMAI) of the IED670 and used internally in the configuration.

3.1.4

Setting parameters
Dependent on ordered IED 670 type.
Table 8:
Parameter PhaseAngleRef

General settings for the AISERVAL (AISV-) function


Range 1 - 24 Step 1 Default 1 Unit Ch Description Reference channel for phase angle presentation

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Table 9:
Parameter CTStarPoint1

Basic general settings for the ANALOGIN12I (TA40-) function


Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec1 CTprim1 CTStarPoint2

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CTStarPoint3

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CTStarPoint4

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4 CTStarPoint5

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec5 CTprim5 CTStarPoint6

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6

1 - 10 1 - 99999

1 1

1 3000

A A

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Parameter CTStarPoint7 Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec7 CTprim7 CTStarPoint8

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec8 CTprim8 CTStarPoint9

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec9 CTprim9 CTStarPoint10

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec10 CTprim10 CTStarPoint11

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec11 CTprim11 CTStarPoint12

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec12 CTprim12

1 - 10 1 - 99999

1 1

1 3000

A A

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Table 10:
Parameter CTStarPoint1

Basic general settings for the ANALOGIN9I3U (TC40-) function


Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec1 CTprim1 CTStarPoint2

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CTStarPoint3

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CTStarPoint4

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4 CTStarPoint5

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec5 CTprim5 CTStarPoint6

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6

1 - 10 1 - 99999

1 1

1 3000

A A

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Parameter CTStarPoint7 Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

CTsec7 CTprim7 CTStarPoint8

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec8 CTprim8 CTStarPoint9

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec9 CTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12

1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00

1 1 0.001 0.05 0.001 0.05 0.001 0.05

1 3000 110.000 400.00 110.000 400.00 110.000 400.00

A A V kV V kV V kV

Table 11:
Parameter CTStarPoint1

Basic general settings for the ANALOGIN6I6U (TD40-) function


Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec1 CTprim1

1 - 10 1 - 99999

1 1

1 3000

A A

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Parameter CTStarPoint2 Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

CTsec2 CTprim2 CTStarPoint3

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CTStarPoint4

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4 CTStarPoint5

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec5 CTprim5 CTStarPoint6

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6 VTsec7 VTprim7 VTsec8 VTprim8 VTsec9 VTprim9

1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00

1 1 0.001 0.05 0.001 0.05 0.001 0.05

1 3000 110.000 400.00 110.000 400.00 110.000 400.00

A A V kV V kV V kV

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Parameter VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12 Range 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 Step 0.001 0.05 0.001 0.05 0.001 0.05 Default 110.000 400.00 110.000 400.00 110.000 400.00 Unit V kV V kV V kV Description Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

Table 12:
Parameter CTStarPoint1

Basic general settings for the ANALOGIN6I (TB40-) function


Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec1 CTprim1 CTStarPoint2

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CTStarPoint3

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CTStarPoint4

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4

1 - 10 1 - 99999

1 1

1 3000

A A

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Parameter CTStarPoint5 Range FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec5 CTprim5 CTStarPoint6

1 - 10 1 - 99999 FromObject ToObject

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6

1 - 10 1 - 99999

1 1

1 3000

A A

3.2

Authorization
To safeguard the interests of our customers, both the IED 670 and the tools that are accessing the IED 670 are protected, subject of authorization handling. The concept of authorization, as it is implemented in the IED 670 and the associated tools is based on the following facts: There are two types of points of access to the IED 670: local, through the local HMI remote, through the communication ports

There are different levels (or types) of users that can access or operate different areas of the IED and tools functionality; the pre-defined user types are defined as follows:
Access rights Read only Full access Read only + control Control from LHMI, no bypass All settings Application configuration (including SMT, GDE and CMT) User and password administration for the IED

User type Guest SuperUser SPAGuest SystemOperator ProtectionEngineer DesignEngineer UserAdministrator

The IED users can be created, deleted and edited only with the User Management Tool (UMT) within PCM 600. The user can only LogOn or LogOff on the LHMI of the IED, there are no users, groups or functions that can be defined on the IED LHMI.

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Section 3 Basic IED functions 3.2.1 Authorization handling in the tool


Upon the creation of an IED in the Plant Structure, the User Management Tool is immediately accessible, by right clicking with the mouse on that specific IED name:

Figure 22:

Right-clicking to get the User Management Tool IED Users.

By left-clicking on the IED Users submenu, the tool will open in the right-side panel:

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Figure 23:

User Manager Tool opened in the right-side panel.

By default, the IEDs are delivered so that users are not required to log on to operate the IED. The default user is the SuperUser. Before doing any changes to the User Management in the IED it is recommendable that the administrator uploads the Users and Groups existent in the IED. If situation requires so, one can restore the factory settings, overwriting all existing settings in the User Management Tool database. Even if the administrator empties the tool database, the users previously defined are still in the IED. They cannot be erased by downloading the empty list into the IED (the tool wont download an empty list), so it is strongly recommended that before you create any user you create one that belongs to the SuperUser group. If the administrator marks the check box User must logon to this IED, then the fields under the User Management tab are becoming accessible and one can add, delete and edit users. To add a new user, the administrator will press the button that is marked with a black arrow, see figure 24 on the User subtab:

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Figure 24:

User subtab and creation of a new user.

Upon pressing this button, a window will appear, enabling the administrator to enter details about the user, assign an access password and (after pressing Next and advancing to the next window) assign the user to a group:

Figure 25:

Enter details about the user.

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Figure 26:

Assign the user to a group.

Once the new user is created, it will appear in the list of users. Once in the list, there are several operations that can be performed on the users, shown in figure 27

Figure 27:
No. Description 1 2 3

Operations on users in the users list.

Delete selected user Change password Add another group to the user permissions

The Group subtab is displaying all the pre-defined groups and gives short details of the permissions allowed to the members of a particular group:

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Figure 28:

The Groups subtab.

It also allows the administrator to add another (already created) user to a group, in the same way it could assign one more group to an user, on the Users subtab. The Functions subtab is a descriptional area, showing in detail what Read/Write permissions has each user group, in respect to various tools and components. Finally, after the desired users are created and permissions assigned to them by means of user groups, the whole list must be downloaded in the IED, in the same way as from the other tools:

No. Description 1 2 Upload from IED Download to IED

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At delivery the default user is the superuser. No LogOn is required to operate the IED until a user has been created with the UMT(User Management Tool). See Application manual for more details. Once a user is created and downloaded into the IED, that user can perform a LogOn, introducing the password assigned in the tool. If there is no user created, an attempt to log on will cause the display to show a message box saying: No user defined! If one user leaves the IED without logging off, then after the timeout (set in Settings \General Settings\HMI\Screen\ Display Timeout ) elapses, the IED will return to a Guest state, when only reading is possible. The display time out is set to 60 minutes at delivery. If there are one or more users created with the UMT and downloaded into the IED, then, when a user intentionally attempts a LogOn or when the user attempts to perform an operation that is password protected, the LogOn window will appear The cursor is focused on the User identity field, so upon pressing the E key, one can change the user name, by browsing the list of users, with the up and down arrows. After choosing the right user name, the user must press the E key again. When it comes to password, upon pressing the E key, the following character will show up: $. The user must scroll for every letter in the pasword. After all the letters are introduced (passwords are case sensitive!) choose OK and press E key again. If everything is O.K. at a voluntary LogOn the LHMI returns to the Authorization screen. If the LogOn is OK, when required to change for example a password protected setting, the LHMI returns to the actual setting folder. If the LogOn has failed, then the LogOn window will pop-up again, until either the user makes it right or presses Cancel.

3.3
3.3.1

Self supervision with internal event list


Introduction
The self-supervision function listens and reacts to internal system events, generated by the different built-in self-supervision elements. The internal events are saved in an internal event list.

3.3.2

Principle of operation
The self-supervision operates continuously and includes:

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Normal micro-processor watchdog function. Checking of digitized measuring signals. Other alarms, for example hardware and time synchronization.

The self-supervision status can be monitored from the local HMI or a SMS/SCS system. Under the Diagnostics menu in the local HMI the present information from the selfsupervision function can be reviewed. The information can be found under Diagnostics\Internal Events or Diagnostics\IED Status\General. Refer to the Installation and Commissioning manual for a detailed list of supervision signals that can be generated and displayed in the local HMI. A self-supervision summary can be obtained by means of the potential free alarm contact (INTERNAL FAIL) located on the power supply module. The function of this output relay is an OR-function between the INT-FAIL signal see figure 30 and a couple of more severe faults that can occur in the IED, see figure 29

Figure 29:

Hardware self-supervision, potential-free alarm contact.

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Figure 30:

Software self-supervision, IES (IntErrorSign) function block.

Some signals are available from the IES (IntErrorSign) function block. The signals from this function block are sent as events to the station level of the control system. The signals from the IES function block can also be connected to binary outputs for signalization via output relays or they can be used as conditions for other functions if required/desired. Individual error signals from I/O modules can be obtained from respective module in the Signal Matrix Tool. Error signals from time synchronization can be obtained from the time synchronization block TIME.

3.3.2.1

Internal signals
Self supervision provides several status signals, that tells about the condition of the IED. As they provide information about the internal life of the IED, they are also called internal signals. The internal signals can be divided into two groups. One group handles signals that are always present in the IED; standard signals. Another group handles signals that are collected depending on the hardware configuration. The standard signals are listed in table 13. The hardware dependent internal signals are listed in table 14. Explanations of internal signals are listed in table 15.

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Table 13:
Name of signal FAIL WARNING NUMFAIL NUMWARNING RTCERROR

Self-supervision's standard internal signals


Description Internal Fail status Internal Warning status CPU module Fail status CPU module Warning status Real Time Clock status Time Synchronization status Runtime Execution Error status IEC 61850 Error status SW Watchdog Error status LON/Mip Device Error status Runtime Application Error status Settings changed Setting groups changed Fault Tolerant Filesystem status

TIMESYNCHERROR RTEERROR IEC61850ERROR WATCHDOG LMDERROR APPERROR SETCHGD SETGRPCHGD FTFERROR

Table 14:
Card ADxx BIM BOM IOM MIM LDCM

Self-supervision's HW dependent internal signals


Name of signal ADxx BIM-Error BOM-Error IOM-Error MIM-Error LDCM-Error Description Analog In Module Error status Binary In Module Error status Binary Out Module Error status In/Out Module Error status Millampere Input Module Error status Line Differential Communication Error status

Table 15:
Name of signal FAIL

Explanations of internal signals


Reasons for activation This signal will be active if one or more of the following internal signals are active; INT--NUMFAIL, INT--LMDERROR, INT-WATCHDOG, INT--APPERROR, INT--RTEERROR, INT-FTFERROR, or any of the HW dependent signals This signal will be active if one or more of the following internal signals are active; INT--RTCERROR, INT--IEC61850ERROR, INT--TIMESYNCHERROR This signal will be active if one or more of the following internal signals are active; INT--WATCHDOG, INT--APPERROR, INT-RTEERROR, INT--FTFERROR This signal will be active if one or more of the following internal signals are active; INT--RTCERROR, INT--IEC61850ERROR This signal will be active when there is a hardware error with the real time clock.

WARNING

NUMFAIL

NUMWARNING RTCERROR Table continued on next page

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Name of signal TIMESYNCHERROR Reasons for activation This signal will be active when the source of the time synchronization is lost, or when the time system has to make a time reset. This signal will be active if the Runtime Engine failed to do some actions with the application threads. The actions can be loading of settings or parameters for components, changing of setting groups, loading or unloading of application threads. This signal will be active if the IEC61850 stack did not succeed in some actions like reading IEC61850 configuration, startup etc. This signal will be activated when the terminal has been under too heavy load for at least 5 minutes. The operating systems background task is used for the measurements. LON network interface, MIP/DPS, is in an unrecoverable error state. This signal will be active if one or more of the application threads are not in the state that Runtime Engine expects. The states can be CREATED, INITIALIZED, RUNNING, etc. This signal will generate an Internal Event to the Internal Event list if any settings are changed. This signal will generate an Internal Event to the Internal Event list if any setting groups are changed. This signal will be active if both the working file and the backup file are corrupted and can not be recovered.

RTEERROR

IEC61850ERROR WATCHDOG

LMDERROR APPERROR

SETCHGD SETGRPCHGD FTFERROR

3.3.2.2

Run-time model
The analog signals to the A/D converter is internally distributed into two different converters, one with low amplification and one with high amplification, see figure 31.

Figure 31:

Simplified drawing of A/D converter for the 600 platform.

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conditions where the signals from the two converters should be identical. An alarm is given if the signals are out of the boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion. The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One of the tasks for the controller is to perform a validation of the input signals. This is done in a validation filter which has mainly two objects: First is the validation part, i.e. checks that the A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals that shall be sent to the CPU, i.e. the signal that has the most suitable level, the ADx_LO or the 16 times higherADx_HI. When the signal is within measurable limits on both channels, a direct comparison of the two channels can be performed. If the validation fails, the CPU will be informed and an alarm will be given. The ADx_Controller also supervise other parts of the A/D converter.

3.3.3

Function block
IS--InternalSignal FAIL WARNING CPUFAIL CPUWARN T SYNCERR RT CERR en04000392.vsd

Figure 32:

IS function block

3.3.4

Output signals
Table 16:
Signal FAIL WARNING CPUFAIL CPUWARN TSYNCERR RTCERR

Output signals for the InternalSignal (IS---) function block


Description Internal fail Internal warning CPU fail CPU warning Time synchronization status Real time clock status

3.3.5

Setting parameters
The function does not have any parameters available in Local HMI or Protection and Control IED Manager (PCM 600)

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Table 17:
Data Recording manner List size

Self supervision with internal event list


Value Continuous, event controlled 1000 events, first in-first out

3.4
3.4.1

Time synchronization
Introduction
Use the time synchronization source selector to select a common source of absolute time for the IED when it is a part of a protection system. This makes comparison of events and disturbance data between all IEDs in a SA system possible.

3.4.2
3.4.2.1

Principle of operation
General concepts Time definitions

The error of a clock is the difference between the actual time of the clock, and the time the clock is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means how much the error increases, i.e. how much the clock gains or loses time. A disciplined clock is a clock that knows its own faults and tries to compensate for them, i.e. a trained clock.

Synchronization principle

From a general point of view synchronization can be seen as a hierarchical structure. A module is synchronized from a higher level and provides synchronization to lower levels.

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Syncronization from a higher level

Module

Optional syncronization of modules at a lower level

en05000206.vsd

Figure 33:

Synchronization principle

A module is said to be synchronized when it periodically receives synchronization messages from a higher level. As the level decreases, the accuracy of the synchronization decreases as well. A module can have several potential sources of synchronization, with different maximum errors, which gives the module the possibility to choose the source with the best quality, and to adjust its internal clock after this source. The maximum error of a clock can be defined as a function of: The maximum error of the last used synchronization message The time since the last used synchronization message The rate accuracy of the internal clock in the module.

3.4.2.2

Real Time Clock (RTC) operation


The IED has a built-in Real Time Clock (RTC) with a resolution of one nanosecond. The clock has a built-in calendar that handles leap years through 2098.

RTC at power off

During power off, the time in the IED time is kept by a capacitor backed RTC that will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may drift with 3 seconds per day, during 5 days, and after this time the time will be lost completely.

RTC at startup

At IED startup, the internal time is free running. If the RTC is still alive since the last up time, the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC power has been lost during power off (will happen after 5 days), the IED time will start at 1970-01-01. For more information, please refer to section "Time synchronization startup procedure" and section "Example, binary synchronization". The first message that contains full time (as for instance LON, SNTP, GPS etc.) will give an accurate time to the IED. The IED is brought into a safe state and the time is 70 Technical reference manual 1MRK502013-UEN rev. B REG 670

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Section 3 Basic IED functions

thereafter set to the correct value. After the initial setting of the clock, one of three things will happen with each of the coming synchronization messages, configured as fine: If the synchronization message, that is similar to the other messages from its origin has an offset compared to the internal time in the IED, the message is used directly for synchronization, that is for adjusting the internal clock to obtain zero offset at the next coming time message. If the synchronization message has an offset that is large compared to the other messages, a spike-filter in the IED will remove this time-message. If the synchronization message has an offset that is large, and the following message also has a large offset, the spike filter will not act and the offset in the synchronization message will be compared to a threshold that defaults to 100 milliseconds. If the offset is more than the threshold, the IED is brought into a safe state and the clock is thereafter set to the correct time. If the offset is lower than the threshold, the clock will be adjusted with 1000 ppm until the offset is removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7 minutes to remove an offset of 100 milliseconds.

Synchronization messages configured as coarse will only be used for initial setting of the time. After this has been done, the messages are checked against the internal time and only an offset of more than 10 seconds will reset the time.

Rate accuracy

In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED is synchronized for a while, the rate accuracy will be approximately 1 ppm if the surrounding temperature is constant. Normally it will take 20 minutes to reach full accuracy.

Time-out on synchronization sources

All synchronization interfaces has a time-out, and a configured interface must receive time-messages regularly, in order not to give a TSYNCERR. Normally, the time-out is set so that one message can be lost without getting a TSYNCERR, but if more than one message is lost, a TSYNCERR will be given.

3.4.2.3

Synchronization alternatives
Three main alternatives of external time synchronization are available. Either the synchronization message is applied via any of the communication ports of the IED as a telegram message including date and time or as a minute pulse, connected to a binary input, or via GPS. The minute pulse is used to fine tune already existing time in the IEDs.

Synchronization via SNTP

SNTP provides a Ping-Pong method of synchronization. A message is sent from an IED to an SNTP-server, and the SNTP-server returns the message after filling in a reception time and a transmission time. SNTP operates via the normal Ethernet network that connects IEDs together in an IEC61850 network. For SNTP to operate REG 670 Technical reference manual 1MRK502013-UEN rev. B 71

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properly, there must be a SNTP-server present, preferably in the same station. The SNTP synchronization provides an accuracy that will give 1 ms accuracy for binary inputs. The IED itself can be set as a SNTP-time server. SNTP server requirements The SNTP server to be used shall be connected to the local network, i.e. not more than 4-5 switches/routers away from the IED. The SNTP server shall be dedicated for its task, or at least equipped with at real-time operating system, i.e. not a PC with SNTP server software. The SNTP server shall be stable, i.e. either synchronized from a stable source like GPS, or local i.e. without synchronization. Using a local SNTP server i.e. without synchronization as primary or secondary server in a redundant configuration is not recommended.

Synchronization via Serial Communication Module (SLM)

On the serial buses (both LON and SPA) two types of synchronization messages are sent. Coarse message is sent every minute and comprises complete date and time, i.e. year, month, day, hours, minutes, seconds and milliseconds. Fine message is sent every second and comprises only seconds and milliseconds.

IEC60870-5-103 is not used to synchronize the relay, but instead the offset between the local time in the relay and the time received from 103 is added to all times (in events and so on) sent via 103. In this way the relay acts as it is synchronized from various 103 sessions at the same time. Actually, there is a local time for each 103 session. The SLM module is located on the AD conversion Module (ADM).

Synchronization via Built-in-GPS

The built in GPS clock modules receives and decodes time information from the global positioning system. The modules are located on the GPS time synchronization Module (GSM).

Synchronization via binary input

The IED accepts minute pulses to a binary input. These minute pulses can be generated from e.g. station master clock. If the station master clock is not synchronized from a world wide source, time will be a relative time valid for the substation. Both positive and negative edge on the signal can be accepted. This signal is also considered as a fine signal. The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical characteristic is thereby the same as for any other binary input. If the objective of synchronization is to achieve a relative time within the substation and if no station master clock with minute pulse output is available, a simple minute pulse generator can be designed and used for synchronization of the IEDs. The minute pulse generator can be created using the logical elements and timers available in the IED.

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The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks are detected, the flank of the minute pulse shall occur one minute after the last flank. Binary minute pulses are checked with reference to frequency. Pulse data: Period time (a) should be 60 seconds. Pulse length (b): Minimum pulse length should be >50 ms. Maximum pulse length is optional.

Amplitude (c) - please refer to section "Binary input module (BIM)".

Deviations in the period time larger than 50 ms will cause TSYNCERR.

a b

c
en05000251.vsd

Figure 34:

Binary minute pulses

The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is received within two minutes a SYNCERR will be given. If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce. If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses, contact bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces occurs more than 50 ms, e.g. it is less than 59950 ms between the two most adjacent positive (or negative) flanks, the minute pulse will not be accepted. Example, binary synchronization A IED is configured to use only binary input, and a valid binary input is applied to a binary input card. The HMI is used to tell the IED the approximate time and the minute pulse is used to synchronize the IED thereafter. The definition of a minute pulse is that it occurs one minute after the previous minute pulse, so the first minute pulse is not used at all. The second minute pulse will probably be rejected due to the spike filter. The third pulse will give the IED a good time and will reset the time so that the

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fourth minute pulse will occur on a minute border. After the first three minutes, the time in the IED will be good if the coarse time is set properly via the HMI or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for instance for an hour, the internal time will drift by maximum the error rate in the internal clock. If the minute pulse is returned, the first pulse automatically is rejected. The second pulse will possibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time is set, the application will be brought to a safe state before the time is set. If the time is adjusted, the time will reach its destination within 1.7 minutes. Synchronization via IRIG Synchronization with DNP3.0 The DNP3.0 communication can be the source for the course time synchronization, while the fine time synchronization needs a source with higher accuracy. The IRIG interface to the IED supplies two possible synchronization methods, IRIGB and PPS. IRIG-B IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the year in this format. The B in IRIG-B states that 100 bits per second are transmitted, and the message is sent every second. After IRIG-B there is a number of figures stating if and how the signal is modulated and the information transmitted. To receive IRIG-B there are two connectors in the IRIG module, one galvanic BNC connector and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical interface, where x (in 00x or 12x) means a figure in the range 1-7. 00 means that a base band is used, and the information can be fed into the IRIG-B module via the BNC contact or an optical fiber. 12 means that a 1 kHz modulation is used. In this case the information must go into the module via the BNC connector. If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year. If x is 0, 1, 2 or 3, the information only contains the time within the year, and year information has to come from the tool or HMI. The IRIG Module also takes care of IEEE1344 messages that are sent by many IRIGB clocks, as IRIG-B previously did not have any year information. IEE1344 is compatible with IRIG-B and contains year information and information of time-zone. It is recommended to use IEEE 1344 for supplying time information to the IRIG module. In this case, also send the local time in the messages, as this local time plus the TZ Offset supplied in the message equals UTC at all times. PPS

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An optical PPS signal can be supplied to the optical interface of the IRIG module. The PPS signal is a transition from dark to light, that occurs 1 second +- 2 us after another PPS signal. The allowed jitter of 2 us is settable.

3.4.3

Function block
TIMETIME TSYNCERR RTCERR en05000425.vsd

Figure 35:

TIME function block

3.4.4

Output signals
Table 18:
Signal TSYNCERR RTCERR

Output signals for the TIME (TIME-) function block


Description Time synchronization error Real time clock error

3.4.5

Setting parameters
Path in local HMI: Setting/Time Path in PCM 600: Settings/Time/Synchronization
Table 19:
Parameter CoarseSyncSrc

Basic general settings for the TimeSynch (TSYN-) function


Range Off SPA LON SNTP Off SPA LON BIN GPS GPS+SPA GPS+LON GPS+BIN SNTP GPS+SNTP Off SNTP-Server Slow Fast Step Default Off Unit Description Coarse time synchronization source Fine time synchronization source

FineSyncSource

Off

SyncMaster

Off

Activate IEDas synchronization master Adjust rate for time synchronization

TimeAdjustRate

Fast

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Table 20:
Parameter CoarseSyncSrc

Basic general settings for the TimeSynch (TSYN-) function


Range Off SPA LON SNTP DNP Off SPA LON BIN GPS GPS+SPA GPS+LON GPS+BIN SNTP GPS+SNTP IRIG-B GPS+IRIG-B PPS Off SNTP-Server Slow Fast Step Default Off Unit Description Coarse time synchronization source

FineSyncSource

Off

Fine time synchronization source

SyncMaster

Off

Activate IEDas synchronization master Adjust rate for time synchronization

TimeAdjustRate

Slow

Table 21:
Parameter ModulePosition

General settings for the TimeSynchBIN (TBIN-) function


Range 3 - 16 Step 1 Default 3 Unit Description Hardware position of IO module for time synchronization Binary input number for time synchronization Positive or negative edge detection

BinaryInput

1 - 16

BinDetection

PositiveEdge NegativeEdge

PositiveEdge

Table 22:
Parameter ServerIP-Add RedServIP-Add

General settings for the TimeSynchSNTP (TSNT-) function


Range 0 - 18 0 - 18 Step 1 1 Default 0.0.0.0 0.0.0.0 Unit Description Server IP-address Redundant server IPaddress

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Table 23:
Parameter MonthInYear

General settings for the DaySumDSTBegin (TSTB-) function


Range January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Step Default March Unit Description Month in year when daylight time starts

DayInWeek

Sunday

Day in week when daylight time starts

WeekInMonth

Last

Week in month when daylight time starts

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time starts

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Table 24:
Parameter MonthInYear

General settings for the DaySumTimeEnd (TSTE-) function


Range January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Step Default October Unit Description Month in year when daylight time ends

DayInWeek

Sunday

Day in week when daylight time ends

WeekInMonth

Last

Week in month when daylight time ends

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time ends

Table 25:
Parameter NoHalfHourUTC

General settings for the TimeZone (TZON-) function


Range -24 - 24 Step 1 Default 0 Unit Description Number of half-hours from UTC

Table 26:
Parameter SynchType TimeDomain Encoding

Basic general settings for the TimeSynchIRIGB (TIRI-) function


Range BNC Opto LocalTime UTC IRIG-B 1344 1344TZ MinusTZ PlusTZ Step Default Opto LocalTime IRIG-B Unit Description Type of synchronization Time domain Type of encoding

TimeZoneAs1344

PlusTZ

Time zone as in 1344 standard

3.4.6

Technical data

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Table 27:
Function

Time synchronization, time tagging


Value 1 ms 1.0 ms typically

Time tagging resolution, Events and Sampled Measurement Values Time tagging error with synchronization once/min (minute pulse synchronization), Events and Sampled Measurement Values Time tagging error with SNTP synchronization, Sampled Measurement Values

1.0 ms typically

3.5
3.5.1

Parameter setting groups


Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creating and switching between fine tuned setting sets, either from the humanmachine interface or configurable binary inputs, results in a highly adaptable IED that can cope with a variety of system scenarios.

3.5.2

Principle of operation
The ACGR function block has six functional inputs, each corresponding to one of the setting groups stored in the IED. Activation of any of these inputs changes the active setting group. Seven functional output signals are available for configuration purposes, so that up to date information on the active setting group is always available. A setting group is selected by using the local HMI, from a front connected personal computer, remotely from the station control or station monitoring system or by activating the corresponding input to the ACGR function block. Each input of the function block can be configured to connect to any of the binary inputs in the IED. To do this the PCM 600 configuration tool must be used. The external control signals are used for activating a suitable setting group when adaptive functionality is necessary. Input signals that should activate setting groups must be either permanent or a pulse exceeding 400 ms. More than one input may be activated at the same time. In such cases the lower order setting group has priority. This means that if for example both group four and group two are set to activate, group two will be the one activated. Every time the active group is changed, the output signal SETCHGD is sending a pulse. The parameter MAXSETGR defines the maximum number of setting groups in use to switch between.

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Figure 36:

Connection of the function to external circuits

The above example also includes seven output signals, for confirmation of which group that is active. The SGC function block has an input where the number of setting groups used is defined. Switching can only be done within that number of groups. The number of setting groups selected to be used will be filtered so only the setting groups used will be shown on the PST setting tool.

3.5.3

Function block
ACGRActiveGroup ACTGRP1 GRP1 ACTGRP2 GRP2 ACTGRP3 GRP3 ACTGRP4 GRP4 ACTGRP5 GRP5 ACTGRP6 GRP6 SETCHGD en05000433.vsd

Figure 37:

ACGR function block

SGC-NoOfSetGrp MAXSETGR en05000716.vsd

3.5.4
80

Input and output signals


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Table 28:
Signal ACTGRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6

Input signals for the ActiveGroup (ACGR-) function block


Description Selects setting group 1 as active Selects setting group 2 as active Selects setting group 3 as active Selects setting group 4 as active Selects setting group 5 as active Selects setting group 6 as active

Table 29:
Signal GRP1 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD

Output signals for the ActiveGroup (ACGR-) function block


Description Setting group 1 is active Setting group 2 is active Setting group 3 is active Setting group 4 is active Setting group 5 is active Setting group 6 is active Pulse when setting changed

3.5.5

Setting parameters
Table 30:
Parameter t

General settings for the ActiveGroup (ACGR-) function


Range 0.0 - 10.0 Step 0.1 Default 1.0 Unit s Description Pulse length of pulse when setting changed

Table 31:
Parameter ActiveSetGrp

General settings for the NoOfSetGrp (SGC--) function


Range SettingGroup1 SettingGroup2 SettingGroup3 SettingGroup4 SettingGroup5 SettingGroup6 1-6 Step Default SettingGroup1 Unit Description ActiveSettingGroup

NoOfSetGrp

No

Number of possible setting groups to switch between

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3.6
3.6.1

Test mode functionality


Introduction
Most of the functions in the IED can individually be blocked by means of settings from the local HMI or PST. To enable these blockings the IED must be set in test mode. When leaving the test mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus mistakes are avoided.

3.6.2

Principle of operation
To be able to test the functions in the IED, you must set the terminal in the TEST mode. There are two ways of setting the terminal in the TEST mode: By configuration, activating the input of the function block TEST. By setting TestMode to On in the local HMI, under the menu: TEST/IED test mode.

While the IED is in test mode, the ACTIVE output of the function block TEST is activated. The other two outputs of the function block TEST are showing which is the generator of the Test mode: On state input from configuration (OUTPUT output activated) or setting from LHMI (SETTING output activated). While the IED is in test mode, the yellow START LED will flash and all functions are blocked. Any function can be de-blocked individually regarding functionality and event signalling. Most of the functions in the IED can individually be blocked by means of settings from the local HMI. To enable these blockings the IED must be set in test mode (the output ACTIVE in function block TEST is set to true), see example in figure 38. When leaving the test mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus no mistakes are possible. The blocked functions will still be blocked next time entering the test mode, if the blockings were not reset. The blocking of a function concerns all output signals from the actual function, so no outputs will be activated. The TEST function block might be used to automatically block functions when a test handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) can supply a binary input which in turn is configured to the TEST function block.

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Each of the protection functions includes the blocking from TEST function block. A typical example from the undervoltage function is shown in figure 38. The functions can also be blocked from sending events over IEC 61850 station bus to prevent filling station and SCADA databases with test events e.g. during a maintenance test.

Disconnection

Normal voltage U1< U2<

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd

tBlkUV2 < t2,t2Min

Figure 38:

Example of blocking the time delayed undervoltage protection function.

3.6.3

Function block
TESTTest INPUT ACTIVE OUTPUT SETTING en05000443.vsd

Figure 39:

TEST function block

3.6.4
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Table 32:
Signal INPUT

Input signals for the Test (TEST-) function block


Description Sets terminal in test mode when active

Table 33:
Signal ACTIVE OUTPUT SETTING NOEVENT

Output signals for the Test (TEST-) function block


Description Terminal in test mode when active Test input is active Test mode setting is (On) or not (Off) Event disabled during testmode

3.6.5

Setting parameters
Table 34:
Parameter TestMode

Basic general settings for the Test (TEST-) function


Range Off On Off On Off On Step Default Off Unit Description Test mode in operation (On) or not (Off) Event disable during testmode Command bit for test required or not during testmode

EventDisable CmdTestBit

Off Off

3.7
3.7.1

IED identifiers
Introduction
There are two functions that allow you to identify each IED individually: ProductInformation function has seven pre-set, settings that are unchangeable but nevertheless very important: IED Type ProductDef FirmwareVer IEDMainFunType SerialNo. Ordering No. ProductionDate.

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Diagnostics/IED Status/ProductIdentifiers They are very helpful in case of support process (such as repair or maintenance). TerminalID function is allowing you to identify the individual IED in your system, not only in the substation, but in a whole region or a country.

3.7.2

Setting parameters
Table 35:
Parameter StationName StationNumber ObjectName ObjectNumber UnitName UnitNumber

General settings for the TerminalID (TEID-) function


Range 0 - 18 0 - 99999 0 - 18 0 - 99999 0 - 18 0 - 99999 Step 1 1 1 1 1 1 Default Station name 0 Object name 0 Unit name 0 Unit Description Station name Station number Object name Object number Unit name Unit number

3.8
3.8.1

Signal matrix for binary inputs (SMBI)


Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way binary inputs are brought in for one IED 670 configuration.

3.8.2

Principle of operation
The SMBI function block, see figure 40, receives its inputs from the real (hardware) binary inputs via the SMT, and makes them available to the rest of the configuration via its outputs, named BI1 to BI10. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT as information which signals shall be connected between physical IO and the SMBI function block.

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SI01SMBI INSTNAME BI1NAME BI2NAME BI3NAME BI4NAME BI5NAME BI6NAME BI7NAME BI8NAME BI9NAME BI10NAME BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8 BI9 BI10

en05000434.vsd

Figure 40:

SI function block

3.8.4

Input and output signals


Table 36:
Signal BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8 BI9 BI10

Output signals for the SMBI (SI01-) function block


Description Binary input 1 Binary input 2 Binary input 3 Binary input 4 Binary input 5 Binary input 6 Binary input 7 Binary input 8 Binary input 9 Binary input 10

3.9
3.9.1

Signal matrix for binary outputs (SMBO)


Introduction
The SMBO function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way binary outputs are sent from one IED 670 configuration.

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The SMBO function block, see figure 41, receives logical signal from the IED configuration, which is transferring to the real (hardware) outputs, via the SMT. The inputs in the SMBO are named BO1 to BO10 and they, as well as the whole function block, can be tag-named. The name tags will appear in SMT as information which signals shall be connected between physical IO and the SMBO.

3.9.3

Function block
SO01SMBO BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 INSTNAME BO1NAME BO2NAME BO3NAME BO4NAME BO5NAME BO6NAME BO7NAME BO8NAME BO9NAME BO10NAME en05000439.vsd

Figure 41:

SO function block

3.9.4

Input and output signals


Table 37:
Signal BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10

Input signals for the SMBO (SO01-) function block


Description Signal name for BO1 in Signal Matrix Tool Signal name for BO2 in Signal Matrix Tool Signal name for BO3 in Signal Matrix Tool Signal name for BO4 in Signal Matrix Tool Signal name for BO5 in Signal Matrix Tool Signal name for BO6 in Signal Matrix Tool Signal name for BO7 in Signal Matrix Tool Signal name for BO8 in Signal Matrix Tool Signal name for BO9 in Signal Matrix Tool Signal name for BO10 in Signal Matrix Tool

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3.10
3.10.1

Signal matrix for mA inputs (SMMI)


Introduction
The SMMI function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way milliamp (mA) inputs are brought in for one IED670 configuration.

3.10.2

Principle of operation
The SMMI function block, see figure 42, receives its inputs from the real (hardware) mA inputs via the SMT, and makes them available to the rest of the configuration via its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT. The outputs on the SMMI are normally connected to the MVGGIO function block for further use of the mA signals.

3.10.3

Function block
SMI1SMMI INSTNAME AI1NAME AI2NAME AI3NAME AI4NAME AI5NAME AI6NAME AI1 AI2 AI3 AI4 AI5 AI6

en05000440.vsd

Figure 42:

SMI function block

3.10.4

Input and output signals


Table 38:
Signal AI1 AI2 AI3 AI4 AI5 AI6

Output signals for the SMMI (SMI1-) function block


Description Analog milliampere input 1 Analog milliampere input 2 Analog milliampere input 3 Analog milliampere input 4 Analog milliampere input 5 Analog milliampere input 6

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3.11
3.11.1

Signal matrix for analog inputs (SMAI)


Introduction
The SMAI function block (or the pre-processing function block, as it is also known) is used within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way analog inputs are brought in for one IED 670 configuration.

3.11.2

Principle of operation
Every SMAI function block can receive four analog signals (three phases and one neutral value), either voltage or current, see figure 43 and figure 44. The outputs of the SMAI are giving information about every aspect of the 3ph analog signals acquired (phase angle, RMS value, frequency and frequency derivates etc. 244 values in total). The BLOCK input will reset to 0 all the outputs of the function block. The output singal AI1 to AI4 are direct output of the in SMT connected input to AI1 to AI4. AIN is always the neutral current, calculated residual sum or the signal connected to AI4. Note that function block will always calculate the residual sum of current/voltage if the input is not connected in SMT. Applications with a few exceptions (HEDIF, BBDIF) shall always be connected to AI3P.

3.11.3

Function block
PR01SMAI BLOCK DFTSPFC GRPNAME AI1NAME AI2NAME AI3NAME AI4NAME TYPE SYNCOUT SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN NOSMPLCY en05000705.vsd

Figure 43:
PR02SMAI BLOCK GRPNAME AI1NAME AI2NAME AI3NAME AI4NAME TYPE

PR01 function block

AI3P AI1 AI2 AI3 AI4 AIN en07000130.vsd

Figure 44:

PR0212 function block

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Table 39:
Signal BLOCK DFTSYNC DFTSPFC

Input signals for the SMAI (PR01-) function block


Description Block group 1 Synchronisation of DFT calculation Number of samples per fundamental cycle used for DFT calculation

Table 40:
Signal SYNCOUT SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN

Output signals for the SMAI (PR01-) function block


Description Synchronisation signal from internal DFT reference function Number of samples per fundamental cycle from internal DFT reference function Group 1 analog input 3-phase group Group 1 analog input 1 Group 1 analog input 2 Group 1 analog input 3 Group 1 analog input 4 Group 1 analog input residual for disturbance recorder

Table 41:
Signal BLOCK

Input signals for the SMAI (PR02-) function block


Description Block group 2

Table 42:
Signal AI3P AI1 AI2 AI3 AI4 AIN

Output signals for the SMAI (PR02-) function block


Description Group 2 analog input 3-phase group Group 2 analog input 1 Group 2 analog input 2 Group 2 analog input 3 Group 2 analog input 4 Group 2 analog input residual for disturbance recorder

3.11.5

Setting parameters

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Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available. Internal nominal frequency DFT reference is then the reference.
Table 43:
Parameter DFTRefExtOut

Basic general settings for the SMAI (PR01-) function


Range InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Step Default InternalDFTRef Unit Description DFT reference for external output

DFTReference

InternalDFTRef

DFT reference

ConnectionType TYPE

Ph-N 1

Ch

Input connection type 1=Voltage,2=Current

Table 44:
Parameter Negation

Advanced general settings for the SMAI (PR01-) function


Range Off NegateN Negate3Ph Negate3Ph+N 5 - 200 Step Default Off Unit Description Negation

MinValFreqMeas

10

Limit for frequency calculation in % of UBase Base Voltage

UBase

0.05 - 2000.00

0.05

400.00

kV

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Table 45:
Parameter DFTReference

Basic general settings for the SMAI (PR02-) function


Range InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Step Default InternalDFTRef Unit Description DFT reference

ConnectionType TYPE

Ph-N 1

Ch

Input connection type 1=Voltage,2=Current

Table 46:
Parameter Negation

Advanced general settings for the SMAI (PR02-) function


Range Off NegateN Negate3Ph Negate3Ph+N 5 - 200 Step Default Off Unit Description Negation

MinValFreqMeas

10

Limit for frequency calculation in % of UBase Base Voltage

UBase

0.05 - 2000.00

0.05

400.00

kV

3.12
3.12.1

Summation block 3 phase (SUM3Ph)


Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog signals (of the same type) for those IED functions that might need it.

3.12.2

Principle of operation
The summation block receives the 3ph signals from the SMAI blocks, see figure 45. In the same way, the BLOCK input will reset to 0 all the outputs of the function block.

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SU01Sum3Ph BLOCK DFTSYNC DFTSPFC G1AI3P G2AI3P AI3P AI1 AI2 AI3 AI4 en05000441.vsd

Figure 45:

SU function block

3.12.4

Input and output signals


Table 47:
Signal BLOCK DFTSYNC DFTSPFC G1AI3P G2AI3P

Input signals for the Sum3Ph (SU01-) function block


Description Block Synchronisation of DFT calculation Number of samples per fundamental cycle used for DFT calculation Group 1 analog input 3-phase group Group 2 analog input 3-phase group

Table 48:
Signal AI3P AI1 AI2 AI3 AI4

Output signals for the Sum3Ph (SU01-) function block


Description Group analog input 3-phase group Group 1 analog input Group 2 analog input Group 3 analog input Group 4 analog input

3.12.5

Setting parameters
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available.

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Table 49:
Parameter SummationType

Basic general settings for the Sum3Ph (SU01-) function


Range Group1+Group2 Group1-Group2 Group2-Group1 (Group1+Group2) InternalDFTRef AdDFTRefCh1 External DFT ref Step Default Group1+Group2 Unit Description Summation type

DFTReference

InternalDFTRef

DFT reference

Table 50:
Parameter FreqMeasMinVal

Advanced general settings for the Sum3Ph (SU01-) function


Range 5 - 200 Step 1 Default 10 Unit % Description Amplitude limit for frequency calculation in % of Ubase Base voltage

UBase

0.05 - 2000.00

0.05

400.00

kV

3.13
3.13.1

Authority status (AUTS)


Introduction
The AUTS function block (or the authority status function block) is an indication function block, which informs about two events related to the IED and the user authorization: the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the output USRBLKED) the fact that at least one user is logged on (the output LOGGEDON)

3.13.2

Principle of operation
Whenever on of the two events described above happens, the specific output (USRBLKED or LOGGEDON) will be activated. The output can e.g. be connected on Event function block for LON/SPA. The signals are also available on IEC 61850 station bus.

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AUTSAuthStatus USRBLKED LOGGEDON en06000503.vsd

Figure 46:

AUTS function block

3.13.4

Output signals
Table 51:
Signal USRBLKED LOGGEDON

Output signals for the AuthStatus (AUTS-) function block


Description At least one user is blocked by invalid password At least one user is logged on

3.13.5

Setting parameters
The function does not have any parameters available in Local HMI or Protection and Control IED Manager (PCM 600)

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3.14
3.14.1

Goose binary receive


Function block
GB01GooseBinRcv BLOCK INSTNAME OUT1 OUT1VAL OUT2 OUT2VAL OUT3 OUT3VAL OUT4 OUT4VAL OUT5 OUT5VAL OUT6 OUT6VAL OUT7 OUT7VAL OUT8 OUT8VAL OUT9 OUT9VAL OUT10 OUT10VAL OUT11 OUT11VAL OUT12 OUT12VAL OUT13 OUT13VAL OUT14 OUT14VAL OUT15 OUT15VAL OUT16 OUT16VAL OUT1NAM OUT2NAM OUT3NAM OUT4NAM OUT5NAM OUT6NAM OUT7NAM OUT8NAM OUT9NAM OUT10NAM OUT11NAM OUT12NAM OUT13NAM OUT14NAM OUT15NAM OUT16NAM en07000047.vsd

Figure 47:

GB function block

3.14.2

Input and output signals

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Table 52:
Signal BLOCK INSTNAME

Input signals for the GooseBinRcv (GB01-) function block


Description Block of output signals Instance name in Signal Matrix Tool

Table 53:
Signal OUT1 OUT1VAL OUT2 OUT2VAL OUT3 OUT3VAL OUT4 OUT4VAL OUT5 OUT5VAL OUT6 OUT6VAL OUT7 OUT7VAL OUT8 OUT8VAL OUT9 OUT9VAL OUT10 OUT10VAL OUT11 OUT11VAL OUT12 OUT12VAL OUT13 OUT13VAL OUT14 OUT14VAL OUT15 OUT15VAL OUT16 OUT16VAL

Output signals for the GooseBinRcv (GB01-) function block


Description Binary output 1 Valid data on binary output 1 Binary output 2 Valid data on binary output 2 Binary output 3 Valid data on binary output 3 Binary output 4 Valid data on binary output 4 Binary output 5 Valid data on binary output 5 Binary output 6 Valid data on binary output 6 Binary output 7 Valid data on binary output 7 Binary output 8 Valid data on binary output 8 Binary output 9 Valid data on binary output 9 Binary output 10 Valid data on binary output 10 Binary output 11 Valid data on binary output 11 Binary output 12 Valid data on binary output 12 Binary output 13 Valid data on binary output 13 Binary output 14 Valid data on binary output 14 Binary output 15 Valid data on binary output 15 Binary output 16 Valid data on binary output 16

Table continued on next page

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Signal OUT1NAM OUT2NAM OUT3NAM OUT4NAM OUT5NAM OUT6NAM OUT7NAM OUT8NAM OUT9NAM OUT10NAM OUT11NAM OUT12NAM OUT13NAM OUT14NAM OUT15NAM OUT16NAM Description Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool

3.14.3

Setting parameters
Table 54:
Parameter Operation

Basic general settings for the GooseBinRcv (GB01-) function


Range Off On Step Default Off Unit Description Operation Off/On

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Section 4

Differential protection
About this chapter
This chapter describes the measuring principles, functions and parameters used in differential protection.

4.1

Generator differential protection (PDIF, 87G)


Function block name: GDPx ANSI number: 87G IEC 61850 logical node name: GENPDIF IEC 60617 graphical symbol:

Id>

4.1.1

Introduction
Short circuit between the phases of the stator windings causes normally very large fault currents. The short circuit gives risk of damages on insulation, windings and stator core. The large short circuit currents cause large current forces, which can damage other components in the power plant, such as turbine and generator-turbine shaft. To limit the damages in connection to stator winding short circuits, the fault clearance must be as fast as possible (instantaneous). If the generator block is connected to the power system close to other generating blocks, the fast fault clearance is essential to maintain the transient stability of the non-faulted generators. Normally the short circuit fault current is very large, i.e. significantly larger than the generator rated current. There is a risk that a short circuit can occur between phases close to the neutral point of the generator, thus causing a relatively small fault current. The fault current fed from the generator itself can also be limited due to low excitation of the generator. Therefore it is desired that the detection of generator phase to phase short circuits shall be relatively sensitive, thus detecting small fault currents. It is also of great importance that the generator short circuit protection does not trip for external faults, when large fault current is fed from the generator. In order to combine fast fault clearance, sensitivity and selectivity the generator current differential protection is normally the best choice for phase to phase generator short circuits.

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The generator differential protection is also well suited to give fast, sensitive and selective fault clearance if used for shunt reactors and small busbars.

4.1.2

Principle of operation
The task of the generator differential protection is to determine whether a fault is within the protected zone, or outside the protected zone. The protected zone is delimited by the position of current transformers, figure 48.

xx06000430.vsd

Figure 48:

Position of current transformers

If the fault is found to be internal, the faulty generator must be quickly tripped, i.e. disconnected from the network, trip of the field breaker and the power from the prime mover will be interrupted. The differential function will always use reference directions towards the protected generator as shown in figure 48. Thus the IED will always internally measure the currents on the two sides of the generator with the same reference direction towards the generator windings. Numerical IEDs have brought a large number of well-known advantages and new functionality to the protective relaying. One of the benefits is the simplicity and accuracy of calculating symmetrical components from individual phase quantities. Within the firmware of a numerical IED, it is no more difficult to calculate negativesequence components than it is to calculate zero-sequence components. Diversity of operation principles integrated in the same protection function enhances the overall performance without a significant increase in cost. A novelty in generator differential protection, namely the negative-sequence-currentbased internal-external fault discriminator, is used with advantage in order to determine whether a fault is internal or external. Indeed, the internal-external fault discriminator not only positively discriminates between internal and external faults, but can as well independently detect minor faults which may not be felt by the "usual" differential protection based on operate-restrain characteristic. The function is using fundamental frequency phase current phasors and negative sequence current phasors. These quantities are derived outside the differential protection function block, in the general pre-processing blocks. The differentials function is also using the DC current and the 2nd and 5th harmonic currents. These currents are calculated in the differentials block using the current samples.

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4.1.2.1 Function calculation principles
To make a differential IED as sensitive and stable as possible, restrained differential characteristic is used. The protection should be provided with a proportional bias, which makes the protection operate for a certain percentage differential current related to the current through the generator stator winding. This stabilizes the protection under through fault conditions while still permitting the system to have good basic sensitivity. The following chapters explain how these quantities are calculated. The fundamental frequency phasors of the phase currents from the both sides of the generator (neutral side and terminal side) are delivered to the differentials function from pre-processing modules in the IED.

4.1.2.2

Fundamental frequency differential currents


The fundamental frequency differential current is a vectorial sum (i.e. sum of fundamental frequency phasors) of the individual phase currents from the two sides of the protected generator. The magnitude of the fundamental frequency differential current, in phase L1, is as calculated in equation 1:
Idiff _ L1 =

( Re ( IL1n + IL1t ) ) + ( Im ( IL1n + IL1t ) )


2

(Equation 1)

One common fundamental frequency bias current is used. The bias current is the magnitude of the highest measured current in the protected circuit. The bias current is not allowed to drop instantaneously, instead, it decays exponentially with a time constant T = 250 ms. These principles make the differential relay more secure, with less risk to operate for external faults. The maximum principle brings as well more meaning to the breakpoint settings of the operate - restrain characteristic.
Ibias = max( IL1n, IL 2 n, IL3n, IL1t , IL 2t , IL 3t )
(Equation 2)

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IL1n

IL1t

Internal fault: IL1t Idiff

IL1n

Idiff _ L1 =

(Re(IL1n + IL1t ))2 + (Im(IL1n + IL1t ))2


en07000018.vsd

Ibias = max(IL1n, IL2n, IL3n, IL1t, IL2t , IL3t )


Figure 49: Internal fault.

IL1n

IL1t

External fault: IL1n = - IL1t

IL1t Idiff = 0
Figure 50: External fault.

IL1n
en07000019.vsd

The generator differential protection function uses two mutually independent limits, to which magnitudes of the three fundamental frequency usual differential currents are compared at each execution of the differential protection function. These two 102 Technical reference manual 1MRK502013-UEN rev. B REG 670

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limits divide, each of them independently, the operate current restrain current plane into two regions: the operate (trip) region and the restrain (block) region, see figure 51.Two kinds of protection are obtained: the non-stabilized (instantaneous) differential protection the stabilized differential protection.

The non-stabilized (instantaneous) differential protection is used for very high differential currents, where it should be beyond any doubt, that the fault is internal. This limit, (defined by the setting UnrestrainedLimit), is a constant, not proportional the bias (restrain) current. No harmonic, or any other restrain is applied to this limit, which is therefore called the unrestrained limit. The reset ratio of the characteristic is equal to 0.95. The stabilized differential protection applies a differential (operate) current, and the common bias (restrain) current, on the operate restrain characteristic as shown in figure 51. Here, the actual limit, where the protection can operate, is adaptive, as the sensitivity of the protection is a function of the bias (restrain) current. The operate value, is stabilized by the bias current. This operate restrain characteristic is represented by a double-slope, double-breakpoint characteristic. The restrained characteristic is determined by the following 5 settings: 1. 2. 3. 4. 5. IdMin (Sensitivity in section 1, set as multiple of generator rated current) EndSection1 (End of section 1, set as multiple of generator rated current) EndSection2 (End of section 2, set as multiple of generator rated current) SlopeSection2 (Slope in section 2 of the characteristic, set in percent) SlopeSection3 (Slope in section 3 of the characteristic, set in percent)

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operate current [ times I1r ] 5

Operate unconditionally

UnrestrainedLimit

Operate conditionally

2 Section 1 Section 2 Section 3 SlopeSection3

1 IdMin SlopeSection2 0 0 1 2 3

Restrain 4 5

EndSection1 EndSection2

restrain current [ times I1r ]

en05000187.vsd

Figure 51:

Operate - restrain characteristic

slope = D Ioperate 100% D Irestrain

(Equation 3)

The operate restrain characteristic is tailor-made, in other words, it can be constructed by the user. A default operate restrain characteristic is suggested which should give acceptably good results in a majority of applications. The operate restrain characteristic has in principle three sections with a section-wise proportionality of the operate value to the common restrain (bias) current. The reset ratio is in all parts of the characteristic equal to 0.95. Section 1 is the most sensitive part on the characteristic. In section 1, normal currents flow through the protected circuit and its current transformers, and risk for higher false differential currents is low. With generators the only cause of small false differential currents in this section can be tolerances of the current transformers used on both sides of the protected generator. Slope in section 1 is always zero percent. Normally, with the protected machine at rated load, the restrain, bias current will be around 1 pu, i.e. equal to the machine rated current.

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In section 2, a certain minor slope is introduced which is supposed to cope with false differential currents proportional to higher than normal currents through the current transformers. The more pronounced slope in section 3 is designed to result in a higher tolerance to substantial current transformer saturation at high through-fault currents, which may be expected in this section. Temporarily decreased sensitivity of differential protection is activated if the input Boolean variable DESENSIT is (temporarily) set to 1 (TRUE). In this case, a new, separate limit is superposed the otherwise unchanged operate bias characteristic. This limit is called TempIdMin and is a setting. The value of the setting TempIdMin must be given as a multiple of the setting IdMin. In this case no trip command can be issued if all fundamental frequency differential currents are below the value of the setting TempIdMin.
operate current [ times I1r ] 5

Operate unconditionally

UnrestrainedLimit

Operate conditionally

2 Section 1 Section 2 Section 3 SlopeSection3

TempIdMin IdMin

1 SlopeSection2 0 0 1 2 3

Restrain 4 5

EndSection1 EndSection2

restrain current [ times I1r ]

en06000637.vsd

Figure 52:

The value of TempIdMin

slope = D Ioperate 100% D Irestrain

(Equation 4)

The generator differential protection can be conditionally temporarily desensitized if the Boolean setting OperDCBiasing is set to 1 (TRUE). In this case, the DC REG 670 Technical reference manual 1MRK502013-UEN rev. B 105

Section 4 Differential protection

component is on-line extracted from the instantaneous differential currents. The highest DC component is taken as a kind of bias in the sense that the highest sensitivity of the differential protection is inversely proportional to the ratio of this DC component to the maximum fundamental frequency differential current. Similar to the desensitization described above under 3.2.1 a separate (temporary) limit is activated. The value of this limit is limited upwards to the generator rated current, or 3 times IdMin, whichever is smaller. This temporary extra limit decays exponentially from its maximum value with a time constant equal to T = 1 second. This feature should be used when unmatched CT:s are used on the generator or shut reactor, especially where a long DC time constant can be expected. The new limit is superposed the otherwise unchanged operate bias characteristic, and temporarily determines the highest sensitivity of the differential protection. This temporary sensitivity should be lower than the sensitivity in section 1 of the operate bias characteristic. This DC desensitization is not active, if a disturbance has been detected and characterized as internal fault.

4.1.2.3

Supplementary criteria
To relieve somewhat the burden of constructing an exact optimal operate restrain characteristic, two special features supplement the basic stabilized differential protection function, making the generator differential protection a very reliable one. The supplementary criteria are: 1. 2. Internal/external fault discriminator. (enhances, or blocks, the trip command) Harmonic restrain. (blocks only)

The internal/external fault discriminator is a very reliable supplementary criterion. It discriminates with a high speed between internal and external faults. The discriminator is the main part of what is here called the negative-sequence-currentbased differential protections. It is recommended that this feature is always used (i.e. enabled, OpNegSeqDiff = 1). If a fault is classified as internal, then any eventual block signals by the harmonic criterion are overridden, and the differential protection can operate very quickly without any further delay. If a fault (disturbance) is classified as external, then generally, but not unconditionally, a trip command is prevented. If a fault is classified as external, further harmonic analysis of the fault conditions is initiated. If all the differential currents which caused their respective start signals to be set, are free of harmonic pollution, that is, if no harmonic block signal has been set, then a (minor) internal fault, simultaneous with a predominant external fault, can be suspected. This conclusion can be drawn because at external faults, major false

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differential currents can only exist when one or more current transformers saturate. In this case, the false instantaneous differential currents are highly polluted by higher harmonic components, the 2nd, the 5th, etc. The existence of relatively high negative-sequence currents is in itself an indication of a disturbance, as the negative-sequence currents are superimposed, pure-fault quantities. The negative-sequence currents are measurable indications of abnormal conditions. The negative sequence currents are particularly suitable for directional tests. The negative sequence internal /external fault discriminator works satisfactorily even in case of three-phase faults. Because of the fundamental frequency components (50/60 Hz) of the decaying DC offset of the fault currents, the system is not quite symmetrical immediately after the fault. Thanks to the transient existence of the negative sequence system, faults can be distinguished as internal or external, even for symmetrical three-phase faults. The internal/external fault discriminator responds to the relative phase angles of the negative sequence fault currents at both ends of the stator winding. If the two negative sequence currents flow in the same direction, the fault is internal. If the two negative sequence currents flow in opposite directions, the fault is external. In other words, under external fault condition, the relative angle is theoretically equal to 180. Under internal fault condition, the angle is ideally 0, referred to the Used CT reference directions, but due to possible different negative-sequence impedance angles on both sides of the internal fault, it may differ somewhat from 0.

The setting NegSeqROA, see figure 53, represents the so called Relay Operate Angle, which determines the boundary between the internal-, and external fault regions. It can be selected in the range 30 to 90, with a step of 1. The default value is 60. The default setting favours somewhat security in comparison to dependability. Magnitudes of both negative-sequence currents to be compared as to their phase positions must be high enough so that one can be sure that they are due to a fault. The limit value IminNegSeq is settable in the range [0.02 0.20] of the protected generator rated current. Only if magnitudes of both currents are above the limit IminNegSeq, the angle between the two currents is calculated. If any of the two currents is too small, no decision is taken regarding the relative position of the fault, and this feature then remains inactive rather than to produce a wrong decision. The relative angle is then assigned the value of 120 (2.094 radians). If this value persists, then this is an indication that no directional comparison has been made. Neither internal-, nor external fault (disturbance) is declared in this case.

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90 120 60

150

30

External Fault Zone 180

Internal Fault Zone ROA

CT1 I- : Reference 210 330

240 270

300

en06000433.vsd

Figure 53:

NegSeqROA determines the boundary between the internal- and external fault regions

Unrestrained negative sequence differential protection

If one or more start signals have been set by the restrained differential protection algorithm, because one or more of the fundamental frequency (usual) differential currents entered the operate region of the restrained differential protection, then the internal/external fault discriminator can enhance the final trip command by the differential protection, or it can cancel it. If a fault is classified as internal, then any eventual block signals by the harmonic criterion are overridden, and the differential protection operates immediately without any further delay. This makes the overall generator differential protection very fast. Operation of this protection is signalled on the output of the function as TRNSUNRE.

Sensitive negative sequence differential protection

The difference from the unrestrained negative sequence differential protection, described above, is that the sensitive one does not require any start signal to be set. It is enough that both of the negative sequence currents, contributions to the total negative sequence differential current, which should be compared, is above the setting IminNegSeq. Thus, this protection can be made very sensitive. Further, an intentional delay of one cycle is added in order not to inadvertently operate for some eventual transients. Further, the sensitive negative sequence differential protection is automatically disabled when the bias current exceeds 1.5 times the rated current of 108 Technical reference manual 1MRK502013-UEN rev. B REG 670

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the protected generator. Operation of this protection is signalled on the output of the function as TRNSENS.

4.1.2.4

Harmonic restrain
Harmonic restrain is the classical restrain method traditionally used with power transformer differential protections. The goal there was to prevent an unwanted trip command due to magnetizing inrush currents at switching operations, due to magnetizing currents at over-voltages, or external faults. Harmonic restrain is just as useful with generator differential protection. The harmonic analysis is only executed in those phases, where start signals have been set. There is no magnetizing inrush to a generator, but there may be some in case of shunt reactors. The false initial differential currents of a shunt reactor have an appreciable amount of higher harmonic currents. At external faults dangerous false differential currents can arise for different reasons, mainly due to saturation of one or more current transformers. The false differential currents will in this case have a considerable amount of higher harmonics which can therefore be used to prevent an unwanted trip of a healthy generator or shunt reactor. If a fault is recognized as external by the internal/external fault discriminator, but nevertheless one or more start signals have been set, then the harmonic analysis is initiated in the phases with start signal, as previously described. If all of the instantaneous differential currents are free of higher harmonics, then a (minor) internal fault is assumed to have happened simultaneously with a predominant external one. A trip command is then allowed.

4.1.2.5

Cross-block logic scheme


The cross-block logic says that in order to issue a common trip command, the harmonic contents in all phases with a start signal set (start = TRUE) must be below the limit defined with the setting HarmDistLimit. In the opposite case, no trip command will be issued. The cross-block logic is active if the setting OpCrossBlock = TRUE. Always using the cross-block logic, the false trips can be prevented for external faults in cases where the internal / external fault discriminator should for some reason fail to declare an external fault. For internal faults, the higher frequency components of an instantaneous differential current will most often be relatively low compared to the fundamental frequency component. While for an external (heavy) fault it will be relatively high. For external faults with moderate fault currents, there will be little or no current transformer saturation and only small false differential currents. The principle design of the generator differential protection is shown in figure 54.

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Phasors IL1N, IL2N,IL3N Calculation Idiff and Ibias

Magnitude Idiff and Ibias

Phasors IL1T, IL2T,IL3T

Diff.prot. characteristic

Start phase selective

TRIP Signals

START Signals

BLOCK Signals Samples IL1N, IL2N,IL3N Calculation instantaneous Idiff Samples Idiff Hamonic analysis: DC, 2nd and 5th Harm. Block

Samples IAT, IBT,ICT

Start and trip logic

INTFAULT EXTFAULT OPENCT OPENCTAL

Phasor IL1N (neg.seq.)

Phasor IL1T (neg.seq.)

Calculation negative sequence Idiff

Internal/ External Fault Discriminator and Sensitive differential protection

Intern/ extern Fault

Analog Outputs

en06000434.vsd

Figure 54:

Principle design of the generator differential protection

Simplified logic diagrams of the function is shown in figures below.

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BLKUNRES IdUnre IDL1MAG IBIAS BLOCK BLKRES STL1


a b

b>a

AND

TRIPUNREL1

AND

AND OR
IDL1 2nd and 5th Harmonic

TRIPRESL1

1
BLKHL1

Cross Block from L2 or L3 OpCrossBlock=On

AND AND

Cross Block to L2 or L3

en07000020.vsd

Figure 55:

Generator differential logic diagram 1.

Neg.Seq. Diff Current Contributions

Internal/ External Fault discrimin ator

EXTFAULT INTFAULT

TRNSSENS

OpNegSeqDiff=On
IBIAS
a b

AND

b>a

Constant
BLKNSSEN BLKNSUNR BLOCK STL1 STL2 STL3

AND OR

TRNSUNR

en07000021.vsd

Figure 56:

Generator differential logic diagram 2.

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STL1 STL2 STL3 BLKHL1 BLKHL2 BLKHL3

OR

START

OR

BLKH

en07000022.vsd

Figure 57:

Generator differential logic diagram 3.

TRIPRESL1 TRIPRESL2 TRIPRESL3 TRIPUNREL1 TRIPUNREL2 TRIPUNREL3

OR

TRIPRES

OR

TRIPUNRE

TRNSSENS TRNSUNR

OR

TRIP

en07000023.vsd

Figure 58:

Generator differential logic diagram 4.

4.1.3

Function block
GDP1GENPDIF_87G I3PNCT1 I3PNCT2 I3PTCT1 I3PTCT2 BLOCK BLKRES BLKUNRES BLKNSUNR BLKNSSEN DESENSIT TRIP TRIPRES TRIPUNRE TRNSUNR TRNSSENS START STL1 STL2 STL3 BLKH IDL1 IDL2 IDL3 IDNSMAG IBIAS en07000025.vsd

Figure 59:

GDP function block

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Section 4 Differential protection 4.1.4 Input and output signals


Table 55:
Signal I3PNCT1 I3PNCT2 I3PTCT1 I3PTCT2 BLOCK BLKRES BLKUNRES BLKNSUNR BLKNSSEN DESENSIT

Input signals for the GENPDIF_87G (GDP1-) function block


Description Neutral side input1 Neutral side input2 Terminal side input1 Terminal side input2 Block of function Block of trip command by the restrained diff. protection Block of trip by unrestrained "instantaneous" diff. prot. Block of trip for unrestr. neg. seq. differential feature Block of trip for sensitive neg. seq. differential feature Raise pick up: function temporarily desensitized

Table 56:
Signal TRIP TRIPRES TRIPUNRE TRNSUNR TRNSSENS START STL1 STL2 STL3 BLKH IDL1 IDL2 IDL3 IDNSMAG IBIAS

Output signals for the GENPDIF_87G (GDP1-) function block


Description General, common trip signal Trip signal from restrained differential protection Trip signal from unrestrained differential protection Trip signal from unrestr. neg. seq. diff. protection Trip signal from sensitive neg. seq. diff. protection Common start signal from any phase Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common harmonic block signal Instantaneous differential current L1; in primary Amperes Instantaneous differential current L2; in primary Amperes Instantaneous differential current L3; in primary Amperes Negative Sequence Differential current; in primary Amperes Magnitude of the common Bias current; in primary Amperes

4.1.5

Setting parameters

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Table 57:
Parameter IBase

Basic general settings for the GENPDIF_87G (GDP1-) function


Range 100.0 - 100000.0 Step 0.1 Default 5000.0 Unit A Description Rated current of protected generator, Amperes Invert CT 2 curr., yes (1) or no (0). Default is no (0).

InvertCT2Curr

No Yes

No

Table 58:
Parameter Operation IdMin

Basic parameter group settings for the GENPDIF_87G (GDP1-) function


Range Off On 0.05 - 1.00 Step 0.01 Default Off 0.25 Unit IB Description Operation Off / On Section 1 sensitivity, multiple of generator rated current Unrestr. prot. limit, multiple of generator rated current Negative Sequence Differential Enable Off/On Neg. sequence curr. limit, as multiple of gen. rated curr.

IdUnre

1.00 - 50.00

0.01

10.00

IB

OpNegSeqDiff

No Yes 0.02 - 0.20

Yes

IMinNegSeq

0.01

0.04

IB

Table 59:
Parameter EndSection1

Advanced parameter group settings for the GENPDIF_87G (GDP1-) function


Range 0.20 - 1.50 Step 0.01 Default 1.25 Unit IB Description End of section 1, multiple of generator rated current End of section 2, multiple of generator rated current Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate-restrain characteristic, in % Operation On / Off for cross-block logic between phases Operate Angle of int/ ext neg. seq. fault discriminator, deg (Total) relative harmonic distorsion limit, percent

EndSection2

1.00 - 10.00

0.01

3.00

IB

SlopeSection2

10.0 - 50.0

0.1

40.0

SlopeSection3

30.0 - 100.0

0.1

80.0

OpCrossBlock

No Yes 30.0 - 120.0

Yes

NegSeqROA

0.1

60.0

Deg

HarmDistLimit

5.0 - 100.0

0.1

10.0

Table continued on next page

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Section 4 Differential protection


Parameter TempIdMin Range 1.0 - 5.0 Step 0.1 Default 2.0 Unit IdMin Description Temp. Id pickup when input raisePickUp=1, multiple of IdMin Additional trip delay, when input raisePickUp=1 Operation DC biasing On / Off

AddTripDelay

0.000 - 60.000

0.001

0.100

OperDCBiasing

Off On

Off

4.1.6

Technical data
Table 60:
Function Reset ratio Unrestrained differential current limit Base sensitivity function Negative sequence current level Operate time, restrained function Reset time, restrained function Operate time, unrestrained function Reset time, unrestrained function Operate time, negative sequence unrestrained function Critical impulse time, unrestrained function

Generator differential protection (PDIF, 87G)


Range or value > 95% (1-50)pu of Ibase (0.051.00)pu of Ibase (0.020.2)pu of Ibase 25 ms typically at 0 to 2 x set level 20 ms typically at 2 to 0 x set level 12 ms typically at 0 to 5 x set level 25 ms typically at 5 to 0 x set level 15 ms typically at 0 to 5 x set level 2 ms typically at 0 to 5 x set level Accuracy 2.0% of set value 2.0% of Ir 1.0% of Ir -

4.2

Transformer differential protection (PDIF, 87T)


Table 61: Transformer differential protection, two winding
IEC 60617 graphical symbol:

Function block name: T2DxANSI number: 87T IEC 61850 logical node name: T2WPDIF

3Id/I

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Table 62:

Transformer differential protection, three winding


IEC 60617 graphical symbol:

Function block name: T3DxANSI number: 87T IEC 61850 logical node name: T3WPDIF

3Id/I

4.2.1

Introduction
The REx 670 differential function for two winding and three winding transformers is provided with internal CT ratio matching and vector group compensation, when required zero sequence current elimination is made internally in the software. The function can be provided with up to six three phase sets of current inputs. All current inputs are provided with percentage bias restraint features, making the REx 670 suitable for two- or three winding transformers in multi-breaker station arrangements.
2-winding applications 2-winding power transformer
xx05000048.vsd

xx05000049.vsd

2-winding power transformer with unconnected delta tertiary winding 2-winding power transformer with 2 circuit breakers on one side 2-winding power transformer with 2 circuit breakers and 2 CT-sets on both sides

xx05000050.vsd

xx05000051.vsd

3-winding applications Table continued on next page

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3-winding power transformer with all three windings connected

xx05000052.vsd

3-winding power transformer with 2 circuit breakers and 2 CT-sets on one side

xx05000053.vsd

Autotransformer with 2 circuit breakers and 2 CT-sets on 2 out of 3 sides

xx05000057.vsd

Temp picture
Figure 60: CT group arrangement for differential protection and other protections

The setting facilities cover for applications of the differential protection to all types of power transformers and autotransformers with or without on-load tap-changer as well as for shunt reactor or and local feeder within the station. An adaptive stabilizing feature is included for heavy through-faults. By introducing the tap changer position, the differential protection pick-up can be set to optimum sensitivity covering internal faults with low fault level. Stabilization is included for inrush currents respectively for overexcitation condition. Adaptive stabilization is also included for system recovery inrush and CT saturation for external faults. A fast high set unrestrained differential current protection is included for very high speed tripping at high internal fault currents. Innovative sensitive differential protection feature, based on the theory of symmetrical components, offers best possible coverage for power transformer windings turn-to-turn faults.

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Section 4 Differential protection 4.2.2 Principle of operation


The task of the power transformer differential protection is to determine whether a fault is within the protected zone, or outside the protected zone. The protected zone is delimited by the position of current transformers (see figure 61), and in principle can include more objects than just transformer. If the fault is found to be internal, the faulty power transformer must be quickly disconnected. The main CTs are normally supposed to be starWYE connected. The main CTs can be stared in any way (i.e. either "ToObject" or "FromObject"). However internally the differential function will always use reference directions towards the protected transformer as shown in figure 61. Thus the IED will always internally measure the currents on all sides of the power transformer with the same reference direction towards the power transformer windings.
IW1 Z1S1 IW1 IW2 Z1S2 IW2

E1S1

E1S2

IED

en05000186.vsd

Figure 61:

Typical CT location and definition of positive current direction

Even in a healthy power transformer, the currents are generally not equal when they flow through the power transformer, due to the turn"s ratio and the connection group of the protected transformer. Therefore the differential protection must first correlate all currents to each other before any calculation can be performed. In numerical differential protections this correlation and comparison is performed mathematically. First, compensation for the protected transformer transformation ratio and connection group is made, and then the currents are compared. This makes the external auxiliary (i.e. interposing) current transformers unnecessary. Conversion of all currents to the common reference side of the power transformer is performed by pre-programmed coefficient matrices, which depend on the protected power transform transformation ratio and connection group. Once the power transformer vector group and rated currents and voltages has been entered by the user, the differential protection is capable to calculate off-line matrix coefficients in order to perform the required on-line current comparison in accordance with the fixed equation. Numerical IEDs have brought a large number of well-known advantages and new functionality to the protective relaying. One of the benefits is the simplicity and accuracy of calculating symmetrical components from individual phase quantities. Within the firmware of a numerical IED, it is no more difficult to calculate negative118 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 4 Differential protection

sequence components than it is to calculate zero-sequence components. Diversity of operation principles integrated in the same protection function enhances the overall performance without a significant increase in cost. A novelty in power transformer differential protection, namely the negativesequence-current-based internal-external fault discriminator, is used with advantage in order to determine whether a fault is internal or external. Indeed, the internalexternal fault discriminator not only positively discriminates between internal and external faults, but can as well independently detect minor faults which may not be felt by the "usual" differential protection based on operate-restrain characteristic.

4.2.2.1

Function calculation principles


To make a differential IED as sensitive and stable as possible, restrained differential characteristic have been developed and are now adopted as the general practice in the protection of power transformers. The protection should be provided with a proportional bias, which makes the protection operate for a certain percentage differential current related to the current through the transformer. This stabilizes the protection under through fault conditions while still permitting the system to have good basic sensitivity. The following chapters explain how these quantities are calculated.

Fundamental frequency differential currents

The fundamental frequency differential current is a vectorial sum (i.e. sum of fundamental frequency phasors) of the individual phase currents from different side of the protected power transformer. Before any differential current can be calculated, the power transformer phase shift, and its transformation ratio, must be allowed for. Conversion of all currents to a common reference is performed in two steps: all current phasors are phase-shifted to (i.e. referred to) the phase-reference side, (whenever possible a first winding with starWYE connection) all currents magnitudes are always referred to the first winding of the power transformer (typically transformer high-voltage side)

The two steps of conversion are made simultaneously on-line by the pre-programmed coefficient matrices, as shown in equation 5 for a two-winding power transformer, and in equation 6 for a three-winding power transformer. These are internal compensation within the differential function. The protected power transformer data are always entered as they are given on the nameplate. Differential function will by it self correlate nameplate data and select proper reference windings.

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Section 4 Differential protection

IDL1 IL1_ W 1 IL1_ W 2 IDL 2 = A IL 2 _ W 1 + Un _ W 2 B IL 2 _ W 2 Un _ W 1 IDL 3 IL 3 _ W 1 IL 3 _ W 2


1 2 3
(Equation 5)

where: 1. 2. 3. is Differential Currents is Differential current contribution from W1 side is Differential current contribution from W2 side

IDL1 IL1_ W 1 IL1_ W 2 IL1_ W 3 IDL 2 = A IL 2 _ W 1 + Vn _ W 2 B IL 2 _ W 2 + Vn _ W 3 C IL 2 _ W 3 Vn _ W 1 Vn _ W 1 IDL3 IL3 _ W 1 IL3 _ W 3 IL3 _ W 2


1 2 3 4
(Equation 6)

where: 1. 2. 3. 4. is Differential Currents is Differential current contribution from W1 side is Differential current contribution from W2 side is Differential current contribution from W3 side

and where, for equation 5 and equation 6: IDL1 IDL2 IDL3 IL1_W1 IL2_W1 IL3_W1 IL1_W2 IL2_W2 IL3_W2 IL1_W3 IL2_W3 IL3_W3 Ur_W1 is the fundamental frequency differential current in phase L1 (in W1 side primary amperes) is the fundamental frequency differential current in phase L2 (in W1 side primary amperes) is the fundamental frequency differential current in phase L3C (in W1 side primary amperes) is the fundamental frequency phase current in phase L1 on W1 side is the fundamental frequency phase current in phase L2 on W1 side is the fundamental frequency phase current in phase L3 on W1 side is the fundamental frequency phase current in phase L1 on W2 side is the fundamental frequency phase current in phase L2 on W2 side is the fundamental frequency phase current in phase L3 is the fundamental frequency phase current in phase L1 on W3 side is the fundamental frequency phase current in phase L2 on W3 side is the fundamental frequency phase current in phase L3 on W3 side is transformer rated phase-to-phase voltage on W1 side (setting parameter)

Table continued on next page

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Ur_W2 Ur_W3 A, B & C

is transformer rated phase-to-phase voltage on W2 side (setting parameter) is transformer rated phase-to-phase voltage on W3 side (setting parameter) are three by three matrices with numerical coefficients

Values of the matrix A, B & C coefficients depend on: 1. 2. 3. Power transformer winding connection type, such as starWYE (i.e. Y/y) or delta (i.e. D/d) Transformer vector group such as Yd1, Dy11, YNautod5, Yy0d5 etc., which introduce phase displacement between individual windings currents in multiples of 30. Settings for elimination of zero sequence currents for individual windings.

When the end user enters all these parameters, transformer differential function automatically calculates off-line the matrix coefficients. During this calculations the following rules are used: For the phase reference, the first winding with set starWYE (i.e. Y) connection is always used. For example, if the power transformer is a Yd1 power transformer, the HV winding (Y) is taken as the phase reference winding. If the power transformer is a Dy1, then the LV winding (y) is taken for the phase reference. If there is no starWYE connected winding, such as in Dd0 type of power transformers, then the HV delta winding (D) is automatically chosen as the phase reference winding. The fundamental frequency differential currents are in general composed of currents of all sequences, i.e. the positive-, the negative-, and the zero-sequence currents. If the zero-sequence currents are eliminated (see section "Optional Elimination of Zerosequence Currents"), then the differential currents can consist only of the positive-, and the negative-sequence currents. When the zero-sequence current is subtracted on one power transformer side, then it is subtracted from each individual phase current. As it can be seen from equation 5 and equation 6 the first entered winding (i.e. W1) is always taken for ampere level reference (i.e. current magnitudes from all other sides are always transferred to W1 side). In other words, within the differential protection function, all differential currents and bias current are always expressed in HV side primary Amperes. It can be shown that the values of the matrix A, B & C coefficients (see equation 5 and equation 6) can be in advanced pre-calculated depending on the relative phase shift between the reference winding and other power transformer windings. Table 63 summarizes the values of the matrices for all standard phase shifts between windings.

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Table 63:

Matrices for differential current calculation


Matrix with Zero Sequence Reduction set to On Matrix with Zero Sequence Reduction set to Off

Matrix for Reference Winding

2 -1 -1 1 -1 2 -1 3 -1 -1 2

1 0 0 0 1 0 0 0 1
Not applicable. Matrix on the left used.

Matrix for winding with 30 lagging

1 -1 0 1 0 1 -1 3 -1 0 1
Matrix for winding with 60 lagging

1 1 1 3 -2
Matrix for winding with 90 lagging

-2 1 1

-2 1

0 -1 0 0 0 -1 -1 0 0
Not applicable. Matrix on the left used.

0 -1 1 1 1 0 -1 3 -1 1 0

Matrix for winding with 120 lagging

-1 -1 2 1 2 -1 -1 3 -1 2 -1
-1 0 1 1 1 -1 0 3 0 1 -1
-2 1 1 3 1
1 1

0 0 1 1 0 0 0 1 0
Not applicable. Matrix on the left used.

Matrix for winding with 150 lagging

Matrix for winding which is in opposite phase

-2 1 1 -2

-1 0 0 0 -1 0 0 0 -1
Not applicable. Matrix on the left used.

Matrix for winding with 150 leading

0 3 1

-1

1 -1 0

-1

Matrix for winding with 120 leading

-1 2 -1 1 -1 -1 2 3 2 -1 -1

0 1 0 0 0 1 1 0 0

Table continued on next page

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Matrix with Zero Sequence Reduction set to On Matrix for winding with 90 leading Matrix with Zero Sequence Reduction set to Off Not applicable. Matrix on the left used.

0 1 -1 1 -1 0 1 3 1 -1 0
Matrix for winding with 60 leading

1 1 -2 3 1
Matrix for winding with 30 leading

1 1 -2

-2 1 1

0 0 -1 -1 0 0 0 -1 0
Not applicable. Matrix on the left used.

1 0 -1 1 -1 1 0 3 0 -1 1

By using this table complete equation for calculation of fundamental frequency differential currents for two winding power transformer with YNd5 vector group and enabled zero sequence current reduction on HV side will be derived. From the given power transformer vector group the following is possible to be concluded: 1. 2. HV winding will be used as reference winding and zero sequence currents shall be subtracted on that side LV winding is lagging for 150

With help of table 63, the following matrix equation can be written for this power transformer:

IDL1 2 -1 -1 IL1_ W1 -1 0 1 IL1_ W 2 IDL2 = 1 -1 2 -1 IL2 _ W1 + Ur _ W 2 1 1 -1 0 IL2 _ W 2 3 Ur _ W1 3 IDL 3 1 1 2 IL 3_ W 1 0 1 1 IL 3_ W 2 (Equation 25)


where: IDL1 IDL2 IDL3 IL1_W1 IL2_W1 IL3_W1 IL1_W2 IL2_W2 is the fundamental frequency differential current in phase L1 (in W1 side primary amperes) is the fundamental frequency differential current in phase L2 (in W1 side primary amperes) is the fundamental frequency differential current in phase L3 (in W1 side primary amperes) is the fundamental frequency phase current in phase L1 on W1 side is the fundamental frequency phase current in phase L2 on W1 side is the fundamental frequency phase current in phase L3 on W1 side is the fundamental frequency phase current in phase L1 on W2 side is the fundamental frequency phase current in phase L2 on W2 side

Table continued on next page

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Section 4 Differential protection

IL3_W2 Ur_W1 Ur_W2

is the fundamental frequency phase current in phase L3 on W2 side is transformer rated phase-to-phase voltage on W1 side (setting parameter) is transformer rated phase-to-phase voltage on W2 side (setting parameter)

As marked in equation 5 and equation 6, the first term on the right hand side of the equation, represents the total contribution from the individual phase currents from W1 side to the fundamental frequency differential currents compensated for eventual power transformer phase shift. The second term on the right hand side of the equation, represents the total contribution from the individual phase currents from W2 side to the fundamental frequency differential currents compensated for eventual power transformer phase shift and transferred to the power transformer W1 side. The third term on the right hand side of the equation, represents the total contribution from the individual phase currents from W3 side to the fundamental frequency differential currents compensated for eventual power transformer phase shift and transferred to the power transformer W1 side. These current contributions are important, because they are used for calculation of common bias current. The fundamental frequency differential currents are the "usual" differential currents, the magnitudes of which are applied in a phase-wise manner to the operate - restrain characteristic of the differential protection. The magnitudes of the differential currents can be read as service values from the function and they are available as outputs IDL1MAG, IDL2MAG, IDL3MAG from the differential protection function block. Thus they can be connected to the disturbance recorder and automatically recorded during any external or internal fault condition.

On-line compensation for on-load tap-changer movement

On-load tap-changer (OLTC) is a mechanical device, which is used to stepwise change number of turns within one power transformer winding. Consequently the power transformer overall turns ratio is changed. Typically the OLTC is located within the HV winding (i.e. winding 1) of the power transformer. By operating OLTC it is possible to stepwise regulate voltage on the LV side of the power transformer. However at the same time the differential protection for power transformer is unbalanced. Differential function in IED 670 has built-in feature to continuously monitor the OLTC position and dynamically compensate on-line for changes in power transformer turns ratio. Differential currents are calculated as shown in equation 5and equation 6. If by setting parameters is defined on which winding OLTC is located and what is the no-load voltage change for each step the differential function will make no load voltage on that power transformer side dependent on actual OLTC position. Thus, if for example the OLTC is located within winding 1 the no-load voltage Vn_W1 will be treated as function of actual OLTC position in equation 5and equation 6. Thus for every OLTC position corresponding value for Ur_W1 will be calculated and used in abovementioned equations. By doing this complete on-line compensation for OLTC movement is achieved. Differential protection will be ideally balanced for every OLTC position and no false differential current will appear irrespective on actual OLTC position. 124 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 4 Differential protection

Typically the minimum differential protection pickup for power transformer with OLTC is set between 30% to 40%. However with this OLTC compensation feature it is possible to set differential protection in IED 670 to more sensitive pickup value of 15% to 20%. OLTC position is measured within IEC 670 by function block YLTC. Within this function block the OLTC position value is continuously monitored to insure its integrity. When any error with OLTC position is detected the alarm is given which shall be connected to the OLTCxAL input into the differential function block. While OLTCxAL input has logical value one the differential protection minimum pickup, originally defined by setting parameter IdMin, will be increased by the set range of the OLTC. Alternatively the differential current alarm feature can be used to alarm for any problems in the whole OLTC compensation chain. It shall be noted that: two-winding differential protection in IED 670 can on-line compensate for one OLTC within protected power transformer three-winding differential protection in IED 670 can on-line compensate for up to two OLTCs within protected power transformer

Differential current alarm

Fundamental frequency differential current level is monitored all the time within the differential function. As soon as all three fundamental frequency differential currents are above set threshold defined by setting parameter IDiffAlarm a delay on pickup timer is started. When the pre-set time, defined by setting parameter tAlarmDelay, has expired the differential current alarm is generated and output signal IDALARM is set to logical value one. This feature can be effectively used to provide alarm when OLTC position compensation is used and something in the whole compensation chain goes wrong. This alarm can be as well used with some additional IED configuration logic to desensitize the differential function.

Bias current

The bias current is calculated as the highest current amongst individual winding current contributions to the total fundamental frequency differential currents, as shown in equation 5 and equation 6. All individual winding current contributions are already referred to the power transformer winding one side Amperes (typically power transformer HV winding) and therefore they can be compared regarding their magnitudes. There are six (or nine in case of three winding transformer) contributions to the total fundamental differential currents, which are the candidates for the common bias current. The highest individual current contribution is taken as a common bias (restrain) current for all three phases. This "maximum principle" makes the differential protection more secure, with less risk to operate for external faults and in the same time brings more meaning to the breakpoint settings of the operate - restrain characteristic. It shall be noted that if the zero-sequence currents are subtracted from the separate contributions to the total differential current, then the zero-sequence component is automatically eliminated from the bias current as well. This ensures that for secondary REG 670 Technical reference manual 1MRK502013-UEN rev. B 125

Section 4 Differential protection

injection from just one power transformer side the bias current is always equal to the highest differential current regardless of the fault type. During normal through-load operation of the power transformer, the bias current is equal to the maximum load current from two (three) power transformer windings. The magnitudes of the common bias (restrain) current expressed in the HV side Amperes can be read as service values from the function. In the same time it is available as outputs IBIAS from the differential protection function block. Thus, it can be connected to the disturbance recorder and automatically recorded during any external or internal fault condition. For application with so called "T" configuration, i.e. two restraint CT inputs from one side of the protected power transformer, such as in the case of breaker-and-a-half scheme the primary CT ratings can be much higher then the rating of the protected power transformer. In order to determine the bias current for such T configuration, the two separate currents flowing on the T-side can be scaled by additional setting. This is done in order to prevent unwanted de-sensitizing of the overall differential protection. In addition to that, the resultant currents into the protected power transformer winding, which is not directly measured is calculated, and included as well in the common bias calculation. The rest of the bias calculation procedure is the same as in protection schemes without breaker-and-a-half scheme.

Optional Elimination of Zero-sequence Currents

To avoid unwanted trips for external earth faults, the zero sequence currents should be subtracted on the side of power transformer, where the zero-sequence currents can flow at external earth faults. The zero-sequence currents can be explicitly eliminated from the differential currents and common bias current calculation by parameter settings, which are available for every individual winding. Elimination of the zero-sequence component of current is necessary whenever: protected power transformer cannot transform the zero-sequence currents to the other side the zero-sequence currents can only flow on one side of the protected power transformer.

In most cases, power transformers do not properly transform the zero sequence current to the other side. A typical example is a power transformer of the starWYE-delta type, e.g. YNd1. Transformers of this type do not transform the zero-sequence quantities, but zero-sequence currents can flow in the earthed star connected winding. In such cases, an external earth fault on the starWYE-side causes the zero-sequence currents to flow on the starWYE-side of the power transformer, but not on the other side. This results in false differential currents - consisting exclusively of the zero-sequence currents. If high enough, these false differential currents can cause an unwanted disconnection of the healthy power transformer. They must therefore be subtracted from the fundamental frequency differential currents if an unwanted trip is to be avoided.

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Section 4 Differential protection

For delta windings this feature shall be enabled only if an earthing transformer exist within differential zone on the delta side of the protected power transformer. Removing the zero-sequence current from the differential currents decreases to some extent sensitivity of the differential protection for the internal earth faults. In order to counteract this effect to some degree, the zero-sequence currents are subtracted not only from the three fundamental frequency differential currents, but automatically from the bias current as well.

Restrained, and Unrestrained Limits of the Differential Protection

Power transformer differential protection function uses two limits, to which actual magnitudes of the three fundamental frequency differential currents are compared at each execution of the function. The unrestrained (i.e. non-stabilized) part of the differential protection is used for very big differential currents, where it should be beyond any doubt, that the fault is internal. This settable limit is constant (i.e. not proportional the bias current). Neither harmonic, nor any other restrain is applied to this limit, which is therefore allowed to trip power transformer instantaneously. The restrained (i.e. stabilized) part of the differential protection compares the calculated fundamental differential (i.e. operating) currents, and the bias (i.e. restrain) current, by applying them to the operate - restrain characteristic. Practically, the magnitudes of the individual fundamental frequency differential currents are compared with an adaptive limit. This limit is adaptive because it is dependent on the bias (i.e. restrain) current magnitude. This limit is called the operate - restrain characteristic. It is represented by a double-slope, double-breakpoint characteristic, as shown in figure 62. The restrained characteristic is determined by the following 5 settings: 1. 2. 3. 4. 5. IdMin (Sensitivity in section 1, multiple of trans. HV side rated current set under the parameter RatedCurrentW1) EndSection1 (End of section 1, as multiple of transformer HV side rated current set under the parameter RatedCurrentW1) EndSection2 (End of section 2, as multiple of transformer HV side rated current set under the parameter RatedCurrentW1) SlopeSection2 (Slope in section 2, as multiple of transformer HV side rated current set under the parameter RatedCurrentW1) SlopeSection3 (Slope in section 2, as multiple of transformer HV side rated current set under the parameter RatedCurrentW1)

The restrained characteristic in figure 62 is defined by the settings: 1. 2. 3. 4. 5. IdMin EndSection1 EndSection2 SlopeSection2 SlopeSection3

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Section 4 Differential protection

operate current [ times I1r ] 5

Operate unconditionally

UnrestrainedLimit

Operate conditionally

2 Section 1 Section 2 Section 3 SlopeSection3

1 IdMin SlopeSection2 0 0 1 2 3

Restrain 4 5

EndSection1 EndSection2

restrain current [ times I1r ]

en05000187.vsd

Figure 62:
where:

Description of the restrained-, and the unrestrained operate characteristics

slope = D Ioperate 100% D Irestrain

The operate - restrain characteristic is tailor-made and can be designed freely by the user after his needs. A default characteristic is recommended to be used. It gives good results in a majority of applications. The operate - restrain characteristic has in principle three sections with a section-wise proportionality of the operate value to the bias (restrain) current. The reset ratio is in all parts of the characteristic is equal to 0.95. Section 1: This is the most sensitive part on the characteristic. In section 1, normal currents flow through the protected circuit and its current transformers, and risk for higher false differential currents is relatively low. Un-compensated on-load tapchanger is a typical reason for existence of the false differential currents in this section. Slope in section 1 is always zero percent. 128 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 4 Differential protection

Section 2: In section 2, a certain minor slope is introduced which is supposed to cope with false differential currents proportional to higher than normal currents through the current transformers. Section 3: The more pronounced slope in section 3 is designed to result in a higher tolerance to substantial current transformer saturation at high through-fault currents, which may be expected in this section. The operate - restrain characteristic should be designed so that it can be expected that: for internal faults, the operate (differential) currents are always safely, i.e. with a good margin, above the operate - restrain characteristic for external faults, the false (spurious) operate currents are safely, i.e. with a good margin, below the operate - restrain characteristic

Fundamental frequency negative-sequence differential currents

Existence of relatively high negative-sequence currents is in itself a proof of a disturbance on the power system, possibly a fault in the protected power transformer. The negative-sequence currents are measurable indications of abnormal conditions, similar to the zero-sequence currents. One of the several advantages of the negativesequence currents compared to the zero-sequence currents is however that they provide coverage for phase-to-phase and power transformer turn-to-turn faults as well, not only for earth-faults. Theoretically the negative sequence currents do not exist during symmetrical three-phase faults, however they do appear during initial stage of such faults for long enough time for the IED to make proper decision. Further, the negative sequence currents are not stopped at a power transformer of the Yd, or Dy connection. The negative sequence currents are always properly transformed to the other side of any power transformer for any external disturbance. Finally, the negative sequence currents are typically not affected by through-load currents. For power transformer differential protection application, the negative-sequence based differential currents are calculated by using exactly the same matrix equations, which are used to calculate the traditional phase-wise fundamental frequency differential currents. However, the same equation shall be fed by the negativesequence currents from the two power transformer sides instead of individual phase currents, as shown in matrix equation 27 for a case of two-winding, YNd5 power transformer.

IDL1 _ NS 2 IDL 2 _ NS = 1 -1 3 IDL3 _ NS -1


1

-1 2 -1

INS _ W 1 Ur _ W 2 -1 a INS _ W 1 + 2 Ur _ W 1 2 a INS _ W 1


2

-1

-1 1 3 0

0 -1 1

INS _ W 2 0 a INS _ W 2 2 -1 a INS _ W 2


1

(Equation 27)

where: 1. 2. is Neg. Seq. Diff Currents is Negative Sequence current contribution from W1 side

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3.

is Negative Sequence current contribution from W2 side

and where: IDL1_NS IDL2_NS IDL3_NS INS_W1 INS_W2 Ur_W1 Ur_W2 a is the negative sequence differential current in phase L1 (in W1 side primary amperes) is the negative sequence differential current in phase L2 (in W1 side primary amperes) is the negative sequence differential current in phase L3 (in W1 side primary amperes) is negative sequence current on W1 side in primary amperes (phase L1 reference) is negative sequence current on W1 side in primary amperes (phase L1 reference) is transformer rated phase-to-phase voltage on W1 side (setting parameter) is transformer rated phase-to-phase voltage on W2 side (setting parameter) is the complex operator for sequence quantities, e.g.

a=e

j 120

=-

1 2

+ j

3 2

Because the negative sequence currents always form the symmetrical three phase current system on each transformer side (i.e. negative sequence currents in every phase will always have the same magnitude and be phase displaced for 120 electrical degrees from each other), it is only necessary to calculate the first negative sequence differential current i.e. IDL1_NS. As marked in equation 27, the first term on the right hand side of the equation, represents the total contribution of the negative sequence current from W1 side compensated for eventual power transformer phase shift. The second term on the right hand side of the equation, represents the total contribution of the negative sequence current from W2 side compensated for eventual power transformer phase shift and transferred to the power transformer W1 side. These negative sequence current contributions are phasors, which are further used in directional comparisons, made in order to characterize a fault as internal or external. See section "Internal/external fault discriminator" for more information. The magnitudes of the negative sequence differential current expressed in the HV side Amperes can be read as service values from the function. In the same time it is available as outputs IDNSMAG from the differential protection function block. Thus, it can be connected to the disturbance recorder and automatically recorded during any external or internal fault condition.

Internal/external fault discriminator

The internal / external fault discriminator is a very powerful and reliable supplementary criterion to the traditional differential protection. It is recommended that this feature shall be always used (i.e. enabled) when protecting three-phase power transformers. The internal / external fault discriminator detects even minor faults, with a high sensitivity and a high speed, and at the same time discriminates with a high degree of dependability between internal and external faults.

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The algorithm of the internal/external fault discriminator is based on the theory of symmetrical components. Already in 1933, Wagner and Evans in their famous book "Symmetrical Components" have stated that:
1. 2. 3. Source of the negative-sequence currents is at the point of fault,
E NS = - I NS Z NS

Negative-sequence currents distribute through the negative-sequence network Negative-sequence currents obey the first Kirchhoff"s law

The internal/external fault discriminator responds to magnitudes and the relative phase angles of the negative-sequence fault currents at different windings (i.e. sides) of the protected power transformer. The negative sequence fault currents must of course first be referred to the same phase reference side, and put to the same magnitude reference. This is done by the matrix expression (see equation 27). Operation of the internal / external fault discriminator is based on the relative position of the two phasors representing winding one (i.e. W1) and winding two (i.e. W2) negative-sequence current contributions, defined by expression shown in equation 27. It practically performs directional comparison between these two phasors. First, the LV side phasors is positioned along the zero degree line. After that the relevant position of the HV side phasor in the complex plain is determined. In case of three-winding power transformers, a little more complex algorithm is applied, with two directional tests. The overall directional characteristic of the internal/ external fault discriminator is shown in figure 63, where the directional characteristic is defined by two setting parameters:

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1. 2.

IMinNegSeq NegSeqROA
90 deg 120 deg

If one or the other of currents is too low, then no measurement is done, and 120 degrees is mapped

Internal/external fault boundary

NegSeqROA (Relay Operate Angle)

180 deg

0 deg

IMinNegSeq

External fault region

Internal fault region

270 deg
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Figure 63:

Operating characteristic of the internal/external fault discriminator

In order to perform directional comparison of the two phasors their magnitudes must be high enough so that one can be sure that they are due to a fault. On the other hand, in order to guarantee a good sensitivity of the internal/external fault discriminator, the value of this minimum limit must not be too high. Therefore this limit value, called IminNegSeq, is settable in the range from 1% to 20% of the differential protection"s base current, which is the power transformer winding one rated current. The default value is 4%. Only if magnitudes of both negative sequence current contributions are above the set limit, the relative position between these two phasors is checked. If either of the negative sequence current contributions, which should be compared, is too small (less than the set value for IminNegSeq), no directional comparison is made in order to avoid the possibility to produce a wrong decision. This magnitude check, as well guarantee stability of the algorithm, when power transformer is energized. The setting NegSeqROA represents the so-called Relay Operate Angle, which determines the boundary between the internal and external fault regions. It can be selected in the range from 30 degrees to 90 degrees, with a step of 1 degree. The default value is 60 degrees. The default setting somewhat favours security in comparison to dependability. If the above condition concerning magnitudes is fulfilled, the internal/external fault discriminator compares the relative phase angle between the negative sequence

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current contributions from the W1 and W2 sides of the power transformer using the following two rules: If the negative sequence currents contributions from W1 and W2 sides are in phase, the fault is internal (i.e. both phasors are within internal fault region) If the negative sequence currents contributions from W1 and W2 sides are 180 degrees out of phase, the fault is external (i.e. W1 phasors is outside internal fault region)

For example, for any unsymmetrical external fault, the respective negative sequence current contributions from the W1 and W2 power transformer sides will be exactly 180 degrees apart and equal in magnitude, regardless the power transformer turns ratio and phase displacement. One such example is shown in figure 64, which shows trajectories of the two separate phasors representing the negative-sequence current contributions from HV and LV sides of an Yd5 power transformer (e.g. after the compensation of the transformer turns ratio and phase displacement by using equation 27) for an unsymmetrical external fault. Observe that the relative phase angle between these two phasors is 180 electrical degrees at any point in time. There is not any current transformer saturation for this case.
"steady state" for HV side neg. seq. phasor

90 60

150 10 ms

30

180 0.1 kA 10 ms 210 0.2 kA 0.3 kA

0.4 kA

330

240 270

"steady state" for LV side neg. seq. phasor

Contribution to neg. seq. differential current from HV side Contribution to neg. seq. differential current from LV side

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Figure 64:

Trajectories of Negative Sequence Current Contributions from HV and LV sides of Yd5 power transformer during external fault

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Therefore, under all external fault condition, the relative angle is theoretically equal to 180 degrees. During internal fault, the angle shall ideally be 0 degrees, but due to possible different negative sequence source impedance angles on W1 and W2 sides of the protected power transformer, it may differ somewhat from the ideal zero value. However, during heavy faults, CT saturation might cause the measured phase angle to differ from 180 degrees for external, and from about 0 degrees for internal fault. See figure 65 for an example of a heavy internal fault with transient CT saturation.
Dire ctiona l Compa ris on Crite rion: Inte rna l fa ult a s s e e n from the HV s ide 90 120
35 ms

60

e xcurs ion from 0 de gre e s due to CT s a tura tion 30 de finite ly a n inte rna l fa ult

150

180 e xte rna l fa ult re gion

trip c o mmand in 12 ms Inte rna l fa ult de cla re d 7 ms a fte r inte rna l fa ult occure d

0.5 kA

210
1.0 kA

330

240 270
1.5 kA

300

HV s ide contribution to the tota l ne ga tive s e que nce diffe re ntia l curre nt in kA Dire ctiona l limit (within the re gion de limite d by 60 de gre e s is inte rna l fa ult)

en05000190.vsd

Figure 65:

Operation of the internal/external fault discriminator for internal fault with CT saturation

However it shall be noted that additional security measures are implemented in the internal/external fault discriminator algorithm in order to guaranty proper operation with heavily saturated current transformers. The trustworthy information on whether a fault is internal or external is typically obtained in about ten milliseconds after the fault inception, depending on the setting IminNegSeq, and the magnitudes of the fault currents. At heavy faults, approximately five milliseconds time-to-saturation of the main CT is sufficient in order to produce a correct discrimination between internal and external faults.

Unrestrained-, and sensitive negative-sequence protections

Two sub-functions, which are based on the internal / external fault discriminator with the ability to trip a faulty power transformer, are complimentary parts to the traditional power transformer differential protection.

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The unrestrained negative sequence differential protection If one or more start signals have been set by the traditional differential protection algorithm, because one or more of the fundamental frequency differential currents entered the operate region on the operate - restrain characteristic then the unrestrained negative sequence protection is activated. If the same fault has been positively recognized as internal, then the unrestrained negative sequence differential protection places its own trip request. Any block signals by the harmonic and / or waveform criteria, which can block the traditional differential protection are overridden, and the differential protection operates quickly without any further delay. This logic guarantees a fast disconnection of a faulty power transformer for any heavier internal faults. If the same fault has been classified as external, then generally, but not unconditionally, a trip command is prevented. If a fault is classified as external, the further analysis of the fault conditions is initiated. If all the instantaneous differential currents in phases where start signals have been issued are free of harmonic pollution, then a (minor) internal fault, simultaneous with a predominant external fault can be suspected. This conclusion can be drawn because at external faults, major false differential currents can only exist when one or more current transformers saturate. In this case, the false instantaneous differential currents are polluted by higher harmonic components, the 2nd, the 5th, etc. Sensitive negative-sequence based turn-to-turn fault protection The sensitive, negative-sequence-current-based turn-to-turn fault protection detects the low-level faults, which are not detected by the traditional differential protection. The sensitive protection is independent from the traditional differential protection and is a very good complement to it. The essential part of this sensitive protection is the internal/external fault discriminator previously described. In order to be activated, the sensitive protection requires no start signal from the traditional power transformer biased differential protection. If magnitudes of HV and LV negative sequence current contributions are above the set limit for IminNegSeq, then their relative positions are determined. If the disturbance is characterized as an internal fault, then a separate trip request will be placed. Any decision on the way to the final trip request must be confirmed several times in succession in order to cope with eventual CT transients. This causes a short additional operating time delay due to this security count. For very low-level turn-to-turn faults the overall response time of this protection is about thirty milliseconds.

Instantaneous differential currents

The instantaneous differential currents are calculated in order to perform the harmonic analysis and waveform analysis upon each one of them (see section "Harmonic-, and waveform block criteria" for more information). The instantaneous differential currents are calculated using the same matrix expression as shown in equation 5 and equation 6. The same matrixes A, B and C are used for these calculations as well. The only difference is that the matrix algorithm is fed by instantaneous values of currents, i.e. samples.

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Harmonic-, and waveform block criteria

The two block criteria are the harmonic restrain and the waveform restrain. These two criteria have the power to block (i.e. prevent) a trip command by the traditional differential protection, which produces start signals by applying the differential currents, and the bias current, to the operate - restrain characteristic. Harmonic restrain The harmonic restrain is the classical restrain method traditionally used with power transformer differential protections. The goal is to prevent an unwanted trip command due to magnetizing inrush currents at switching operations, or due to magnetizing currents at over-voltages. The magnetizing currents of a power transformer flow only on one side of the power transformer (one or the other) and are therefore always the cause of false differential currents. The harmonic analysis (the 2nd and the 5th harmonic) is applied to instantaneous differential currents. Typically instantaneous differential currents during power transformer energizing are shown in figure 66. The harmonic analysis is only applied in those phases, where start signals have been set. For example, if the content of the 2nd harmonic in the instantaneous differential current of phase L1 is above the setting I2/I1Ratio, then a block signal is set for that phase, which can be read as BLK2HL1 output of the differential protection. Waveform restrain The waveform restrain criterion is a good complement to the harmonic analysis. The waveform restrain is a pattern recognition algorithm, which looks for intervals within each fundamental power system cycle with low instantaneous differential current. This interval is often called current gap in protection literature. However, within differential function this criterion actually searches for long-lasting intervals with low rate-of-change in instantaneous differential current, which are typical for the power transformer inrush currents. Block signals BLKWAVLx are set in those phases where such behavior is detected. The algorithm do not requires any end-user settings. The waveform algorithm is automatically adapted dependent only on the power transformer rated data.

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Figure 66:

Inrush currents to a transformer as seen by a protective IED. Typical is a high amount of the 2nd harmonic, and intervals of low current-, and low rate-of-change of current within each period.

Cross-blocking between phases Basic definition of the cross-blocking is that one of the three phases can block operation (i.e. tripping) of the other two phases due to the properties of the differential current in that phase (i.e. waveform, 2nd or 5th harmonic content). In differential algorithm the user can control the cross-blocking between the phases via the setting parameter OpCrossBlock=On. When parameter OpCrossBlock=On cross blocking between phases will be introduced. There is not any time settings involved, but the phase with the operating point above the set bias characteristic (i.e. in the operate region) will be able to crossblock other two phases if it is self-blocked by any of the previously explained restrained criteria. As soon as the operating point for this phase is below the set bias characteristic (i.e. in the restrain region) cross blocking from that phase will be inhibited. In this way cross-blocking of the temporary nature is achieved. In should be noted that this is the default (i.e. recommended) setting value for this parameter. When parameter OpCrossBlock=Off, any cross blocking between phases will be disabled. It is recommended to use the value Off with caution in order to avoid the unwanted tripping during initial energizing of the power transformer.

Switch on to fault feature

Transformer differential function in IED 670 has a built-in, advanced switch on to fault feature. This feature can be enabled or disabled by a setting parameter SOTFMode. When enabled this feature ensures quick differential protection tripping in cases where a transformer is energized with an internal fault (e.g. forgotten earthing on transformer LV side). Operation of this feature is based on the fact that a current gap (term current gap is explained under waveblock feature above) will exist within the first power system cycle when healthy power transformer is energized. If this is not the case the waveblock criterion will reset quickly. A quick reset of the waveblock criterion will temporarily disable the second harmonic blocking feature within the REG 670 Technical reference manual 1MRK502013-UEN rev. B 137

Section 4 Differential protection

differential function. This consequently ensures fast operation of the transformer differential function for a switch on to a fault condition. It shall be noted that this feature is only active during initial power transformer energizing. When the switch on to fault feature is disabled by the setting parameter SOTFMode, the waveblock and second harmonic blocking features work in parallel and are completely independent from each other.

Open CT detection feature

Transformer differential function in IED 670 has a built-in, advanced open CT detection feature. The open CT circuit condition will create unexpected operations for transformer differential protection function under the normal load conditions. It is also possible to damage secondary equipment due to high voltage produced from open CT circuit outputs. Therefore, it is always a requirement from security and reliability points of view to have open CT detection function to block the differential protection function in case of open CT conditions and at the same time, produce the alarm signal to the operational personal to make quick remedy actions to correct the open CT condition. The built-in open CT feature can be enabled or disabled by a setting parameter OpenCTEnable(Off/On). When enabled, this feature will prevent mal-operation when a loaded main CT connected to the differential protection is by mistake open circuited on the secondary side. It shall be noted that this feature can only detect interruption of one CT phase current at the time. If two or even all three-phase currents of one set of CT are accidentally interrupted at the same time this feature cannot operate and the differential function will give trip signal if the false differential current is sufficiently high. In order to ensure blocking of the differential protection for open CT condition this algorithm must operate within 10 ms in order to be able to prevent unwanted operation of the differential protection under all loading conditions. The principle applied in order to detect an open CT is a simple pattern recognition method, similar to the waveform check which has been with advantage used by the Power Transformer Differential Protection in order to detect the magnetizing inrush condition. The open CT detection principle is based on the fact, that for an open CT, the current in the phase with the open CT will suddenly drop (at least theoretically) to zero (i.e. as seen by the protection!), while the currents of the other two phases continue as before. The open CT function is supposed to detect an open CT under normal conditions, that is, with the protected multi-terminal circuit under normal load. If the load currents are very low or zero, the open CT condition cannot be detected. The open CT algorithm will only detect an open CT if the load on the power transformer is from 10% to 110% of the rated load. Outside this range an open CT condition is not even looked for. The search for an open CT starts after 60 seconds (50 seconds in 60 Hz systems) since the bias current enters the 10110% range. The Open CT detection feature can also be explicitly deactivated by setting: OpenCTEnable = 0 (Off). If an open CT is detected and the output OPENCT set to 1, then all the differential functions are blocked, except of the unrestrained (instantaneous) differential. An alarm signal is also produced after a settable delay (tOCTAlarmDelay) to report to 138 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 4 Differential protection

operational personal for quick remedy actions once the open CT is detected. When the open CT condition is removed (i.e. the previously open CT reconnected), the functions remain blocked for a specified interval of time, which is also a setting (tOCTResetDelay). The task of this measure is to prevent an eventual mal-operation after the reconnection of the previously open CT secondary circuit. The open CT feature will work only during normal loading condition. Thus, the open CT feature will be automatically disabled for all external faults, big overloads and inrush conditions. The open CT algorithm provides detailed information about the location of the defective CT secondary circuit. The algorithm will clearly indicate terminal side, CT input and phase in which open CT condition has been detected. These indications are provided via the following outputs from the differential function: 1. 2. 3. 4. Boolean output OPENCT will provide instant information to indicate that open CT circuit has been detected Boolean output OPENCTAL will provide time delayed alarm that the open CT circuit has been detected. Time delay is defined by setting parameter tOCTAlarm Integer output OPENCTINPUT will provide information on which CT input open CT circuit has been detected (1=CT input No 1; 2=CT input No 1) 4. Integer output OPENCTPHASE will provide information in which phase open CT circuit has been detected (1=Phase L1; 2= Phase L2; 3= Phase L3)

Once the open CT condition is declared the algorithm will stop to search for further open CT circuits. It will wait until the first open CT circuit has been corrected. First of all it shall be noted that once the open CT condition has been detected it can be only automatically reset within the differential function itself. It is not possible to externally reset open CT condition. In order to automatically reset the open CT circuit alarm the following conditions have to be fulfilled: Bias current is for at least one minute smaller than 110% Open CT condition in defective CT circuit has been rectified (e.g. current asymmetry disappears) Above two conditions are fulfilled for longer time than defined by the setting parameter tOCTReset

After the reset the open CT detection algorithm will start again to search for any other open CT circuit within the protected zone.

4.2.2.2

Logic diagram
The simplified internal logics, for transformer differential protection are shown in the following figures.

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RET670
ADM Trafo Data
Open CT logic on W1 side
IDL1

Differential function

A/D conversion scaling with CT ratio

Phasor calculation of individual phase current

Phasors & samples

Instantaneous (sample based) Differential current, phase L1 Instantaneous (sample based) Differential current, phase L2 Instantaneous (sample based) Differential current, phase L3

Derive equation to calculate differential currents

IDL2

IDL3

A/D conversion scaling with CT ratio

Phasor calculation of individual phase current

Negative sequence diff current & NS current contribution from individual windings

IDNSMAG

Open CT logic on W2 side

Phasors & samples

Fundamental frequency (phasor based) Diff current, phase L1 & phase current contributions from individual windings Fundamental frequency (phasor based) Diff current, phase L2 & phase current contributions from individual windings Fundamental frequency (phasor based) Diff current, phase L3 & phase current contributions from individual windings

IDL1MAG

IDL2MAG

IDL3MAG

MAX

IBIAS

Settings for Zer. Seq. Current Reduction


en06000544.vsd

Figure 67:

Treatment of measured currents within IED for transformer differential function

Figure 67 shows how internal treatment of measured currents is done in case of two winding transformer. The following currents are inputs to the power transformer differential protection function. They must all be expressed in true power system (primary) Amperes, i.e. as measured. 1. 2. 3. Instantaneous values of currents (samples) from HV, and LV sides for twowinding power transformers, and from the HV, the first LV, and the second LV sides for three-winding power transformers. Currents from all power transformer sides expressed as fundamental frequency phasors, with their real, and imaginary parts. These currents are calculated within the protection terminal by the fundamental frequency Fourier filters. Negative-sequence currents from all power transformer sides expressed as phasors. These currents are calculated within the protection terminal by the symmetrical components module.

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The power transformer differential protection: 1. Calculates three fundamental frequency differential currents, and one common bias current. The zero-sequence component can optionally be eliminated from each of the three fundamental frequency differential currents, and at the same time from the common bias current. Calculates three instantaneous differential currents. They are used for harmonic, and waveform analysis. Instantaneous differential currents are useful for postfault analysis using disturbance recording Calculates negative-sequence differential current. Contributions to it from both (all three) power transformer sides are used by the internal/external fault discriminator to detect and classify a fault as internal or external.

2. 3.

BLKUNRES IdUnre IDL1MAG IBIAS BLOCK BLKRES STL1


a b

b>a

AND

TRIPUNREL1

AND

AND OR
Switch on to fault logic
IDL1 2nd Harmonic Wave block 5th Harmonic Cross Block from L2 or L3 OpCrossBlock=On

TRIPRESL1

1
BLK2HL1 BLKWAVL1 BLK5HL1

AND

OR

AND

Cross Block to L2 or L3

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Figure 68:

Transformer differential protection simplified logic diagram for Phase L1.

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Figure 69:

Transformer differential protection simplified logic diagram for external/internal fault discriminator

TRIPRESL1 TRIPRESL2 TRIPRESL3 TRIPUNREL1 TRIPUNREL2 TRIPUNREL3

OR

TRIPRES

OR

TRIPUNRE

TRNSSENS TRNSUNR

OR

TRIP

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Figure 70:

Transformer differential protection internal grouping of tripping signals.

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Figure 71:

Transformer differential protection internal grouping of logical signals.

Logic in figures 68, 69, 70 and 71 can be summarized as follows: 1. The three fundamental frequency differential currents are applied in a phase-wise manner to two limits. The first limit is the operate - restrain characteristic, while the other is the high-set unrestrained limit. If the first limit is exceeded, a start signal START is set. If the unrestrained limit is exceeded, an immediate unrestrained trip TRIPUNRE and common trip TRIP are issued. If a start signal is issued in a phase, then the harmonic-, and the waveform block signals are checked. Only a start signal, which is free of all of its respective block signals, can result in a trip command. If the cross-block logic scheme is applied, then only if all phases with set start signal are free of their respective block signals, a restrained trip TRIPRES and common trip TRIP are issued If a start signal is issued in a phase, and the fault has been classified as internal, then any eventual block signals (as described above in "") are overridden and a unrestrained negative-sequence trip TRNSUNR and common trip TRIP are issued without any further delay. This feature is called the unrestrained negativesequence protection. The sensitive negative sequence differential protection is independent of any start signals. It is meant to detect smaller internal faults, such as turn-to-turn faults, which are often not detected by the traditional differential protection. The sensitive negative sequence differential protection starts whenever both contributions to the total negative sequence differential current (that must be compared by the internal/external fault discriminator) are higher than the value of the setting IMinNegSeq. If a fault is positively recognized as internal, and the condition is stable with no interruption for at least one fundamental frequency cycle the sensitive negative sequence differential protection TRNSSENS and common trip TRIP are issued. This feature is called the sensitive negative sequence differential protection. If a start signal is issued in a phase, but the fault has been classified as external, then the instantaneous differential current of that phase is analyzed for the 2nd and the 5th harmonic contents. If there is less harmonic pollution, than allowed 143

2.

3.

4.

5.

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6.

by the settings I2/I1Ratio, and I5/I1Ratio, then it is assumed that a minor simultaneous internal fault must have occurred. Only under these conditions a trip command is allowed. The cross-block logic scheme is automatically applied under such circumstances. All start and blocking conditions are available as phase segregated as well as common (i.e. three-phase) signals.

IDL1 MAG I Diff Alarm

a a>b b

IDL2 MAG I Diff Alarm

a a>b b

tAlarm Delay

&

IDALARM

IDL3 MAG I Diff Alarm

a a>b b
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Figure 72:

Differential current alarm logic.

4.2.3

Function block

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T2D1T2WPDIF_87T I3PW1CT1 TRIP I3PW1CT2 TRIPRES I3PW2CT1 TRIPUNRE I3PW2CT2 TRNSUNR TAPOLTC1 TRNSSENS OLTC1AL START BLOCK STL1 BLKRES STL2 BLKUNRES STL3 BLKNSUNR BLK2H BLKNSSEN BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 BLKWAV BLKWAVL1 BLKWAVL2 BLKWAVL3 IDALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG en06000249.vsd

Figure 73:

T2D function block

T3D1T3WPDIF_87T I3PW1CT1 TRIP I3PW1CT2 TRIPRES I3PW2CT1 TRIPUNRE I3PW2CT2 TRNSUNR I3PW3CT1 TRNSSENS I3PW3CT2 START TAPOLTC1 STL1 TAPOLTC2 STL2 OLTC1AL STL3 OLTC2AL BLK2H BLOCK BLK2HL1 BLKRES BLK2HL2 BLKUNRES BLK2HL3 BLKNSUNR BLK5H BLKNSSEN BLK5HL1 BLK5HL2 BLK5HL3 BLKWAV BLKWAVL1 BLKWAVL2 BLKWAVL3 IDALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG en06000250.vsd

Figure 74:

T3D function block

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Section 4 Differential protection 4.2.4 Input and output signals


Table 64:
Signal I3PW1CT1 I3PW1CT2 I3PW2CT1 I3PW2CT2 TAPOLTC1 OLTC1AL BLOCK BLKRES BLKUNRES BLKNSUNR BLKNSSEN

Input signals for the T2WPDIF_87T (T2D1-) function block


Description Three phase winding primary CT1 Three phase winding primary CT2 Three phase winding secondary CT1 Three phase winding secondary CT2 Most recent tap position reading on OLTC 1 OLTC1 alarm Block of function Block of trip for restrained differential feature Block of trip for unrestrained differential feature Block of trip for unrestr. neg. seq. differential feature Block of trip for sensitive neg. seq. differential feature

Table 65:
Signal TRIP TRIPRES TRIPUNRE TRNSUNR TRNSSENS START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 BLKWAV BLKWAVL1 BLKWAVL2 BLKWAVL3

Output signals for the T2WPDIF_87T (T2D1-) function block


Description General, common trip signal Trip signal from restrained differential protection Trip signal from unrestrained differential protection Trip signal from unrestr. neg. seq. diff. protection Trip signal from sensitive neg. seq. diff. protection Common start signal from any phase Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common second harmonic block signal from any phase Second harmonic block signal, phase L1 Second harmonic block signal, phase L2 Second harmonic block signal, phase L3 Common fifth harmonic block signal from any phase Fifth harmonic block signal, phase L1 Fifth harmonic block signal, phase L2 Fifth harmonic block signal, phase L3 Common block signal, waveform criterion, from any phase Block signal, waveform criterion, phase L1 Block signal, waveform criterion, phase L2 Block signal, waveform criterion, phase L3

Table continued on next page

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REG 670

Section 4 Differential protection


Signal IDALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG Description Alarm for sustained diff currents in all three phases An open CT was detected Open CT Alarm output signal. Issued after a delay ... Value of the instantaneous differential current, phase L1 Value of the instantaneous differential current, phase L2 Value of the instantaneous differential current, phase L3 Magnitude of fundamental freq. diff. current, phase L1 Magnitude of fundamental freq. diff. current, phase L2 Magnitude of fundamental freq. diff. current, phase L3 Magnitude of the bias current, which is common to all phases Magnitude of the negative sequence differential current

Table 66:
Signal I3PW1CT1 I3PW1CT2 I3PW2CT1 I3PW2CT2 I3PW3CT1 I3PW3CT2 TAPOLTC1 TAPOLTC2 OLTC1AL OLTC2AL BLOCK BLKRES BLKUNRES BLKNSUNR BLKNSSEN

Input signals for the T3WPDIF_87T (T3D1-) function block


Description Three phase winding primary CT1 Three phase winding primary CT2 Three phase winding secondary CT1 Three phase winding secondary CT2 Three phase winding tertiary CT1 Three phase winding tertiary CT2 Most recent tap position reading on OLTC 1 Most recent tap position reading on OLTC 2 OLTC1 alarm OLTC2 alarm Block of function Block of trip for restrained differential feature Block of trip for unrestrained differential feature Block of trip for unrestr. neg. seq. differential feature Block of trip for sensitive neg. seq. differential feature

Table 67:
Signal TRIP TRIPRES TRIPUNRE TRNSUNR TRNSSENS

Output signals for the T3WPDIF_87T (T3D1-) function block


Description General, common trip signal Trip signal from restrained differential protection Trip signal from unrestrained differential protection Trip signal from unrestr. neg. seq. diff. protection Trip signal from sensitive neg. seq. diff. protection

Table continued on next page

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147

Section 4 Differential protection


Signal START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 BLKWAV BLKWAVL1 BLKWAVL2 BLKWAVL3 IDALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG Description Common start signal from any phase Start signal from phase L1 Start signal from phase L2 Start signal from phase L3 Common second harmonic block signal from any phase Second harmonic block signal, phase L1 Second harmonic block signal, phase L2 Second harmonic block signal, phase L3 Common fifth harmonic block signal from any phase Fifth harmonic block signal, phase L1 Fifth harmonic block signal, phase L2 Fifth harmonic block signal, phase L3 Common block signal, waveform criterion, from any phase Block signal, waveform criterion, phase L1 Block signal, waveform criterion, phase L2 Block signal, waveform criterion, phase L3 Alarm for sustained diff currents in all three phases An open CT was detected Open CT Alarm output signal. Issued after a delay ... Value of the instantaneous differential current, phase L1 Value of the instantaneous differential current, phase L2 Value of the instantaneous differential current, phase L3 Magnitude of fundamental freq. diff. current, phase L1 Magnitude of fundamental freq. diff. current, phase L2 Magnitude of fundamental freq. diff. current, phase L3 Magnitude of the bias current, which is common to all phases Magnitude of the negative sequence differential current

4.2.5

Setting parameters
Table 68:
Parameter RatedVoltageW1

Basic general settings for the T2WPDIF_87T (T2D1-) function


Range 0.05 - 2000.00 Step 0.05 Default 400.00 Unit kV Description Rated voltage of transformer winding 1 (HV winding) in kV Rated voltage of transformer winding 2 in kV Rated current of transformer winding 1 (HV winding) in A

RatedVoltageW2

0.05 - 2000.00

0.05

231.00

kV

RatedCurrentW1

1 - 99999

577

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REG 670

Section 4 Differential protection


Parameter RatedCurrentW2 Range 1 - 99999 Step 1 Default 1000 Unit A Description Rated current of transformer winding 2 in A Connection type of winding 1: Y-wye or D-delta Connection type of winding 2: Y-wye or D-delta Phase displacement between W2 & W1=HV winding, hour notation

ConnectTypeW1

WYE (Y) Delta (D) WYE (Y) Delta (D) 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg] 7 [150 deg lead] 8 [120 deg lead] 9 [90 deg lead] 10 [60 deg lead] 11 [30 deg lead] Off On Off On No Yes 1 - 99999

WYE (Y)

ConnectTypeW2

WYE (Y)

ClockNumberW2

0 [0 deg]

ZSCurrSubtrW1

On

Enable zer. seq. current subtraction for W1 side, On / Off Enable zer. seq. current subtraction for W2 side, On / Off Two CT inputs (Tconfig.) for winding 1, YES / NO CT primary rating in A, T-branch 1, on transf. W1 side CT primary in A, Tbranch 2, on transf. W1 side Two CT inputs (Tconfig.) for winding 2, YES / NO CT primary rating in A, T-branch 1, on transf. W2 side CT primary rating in A, T-branch 2, on transf. W2 side Transformer winding where OLTC1 is located OLTC1 lowest tap position designation (e.g. 1) OLTC1 rated tap/midtap position designation (e.g. 6)

ZSCurrSubtrW2

On

TconfigForW1

No

CT1RatingW1

3000

CT2RatingW1

1 - 99999

3000

TconfigForW2

No Yes 1 - 99999

No

CT1RatingW2

3000

CT2RatingW2

1 - 99999

3000

LocationOLTC1

Not Used Winding 1 (W1) Winding 2 (W2) 1

Not Used

LowTapPosOLTC 1 RatedTapOLTC1

0 - 10

1 - 100

Table continued on next page

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Section 4 Differential protection


Parameter HighTapPsOLTC1 Range 11 Step 1 Default 1 - 100 Unit Description OLTC1 highest tap position designation (e.g. 11) OLTC1 end-tap position with winding highest no-load voltage Voltage change per OLTC1 step in percent of rated voltage

TapHighVoltTC1

1 - 100

StepSizeOLTC1

0.01 - 30.00

0.01

1.00

Table 69:
Parameter Operation SOTFMode tAlarmDelay IDiffAlarm

Basic parameter group settings for the T2WPDIF_87T (T2D1-) function


Range Off On Off On 0.000 - 60.000 0.05 - 1.00 Step 0.001 0.01 Default Off On 10.000 0.20 Unit s %IB Description Operation Off / On Operation mode for switch onto fault Time delay for diff currents alarm level Dif. cur. alarm, multiple of base curr, usually W1 curr. Section1 sensitivity, multi. of base curr, usually W1 curr. End of section 1, multiple of Winding 1 rated current End of section 2, multiple of Winding 1 rated current Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate-restrain characteristic, in % Unrestr. prot. limit, multiple of Winding 1 rated current Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in % Operation Off/On for cross-block logic between phases

IdMin

0.10 - 0.60

0.01

0.30

IB

EndSection1

0.20 - 1.50

0.01

1.25

IB

EndSection2

1.00 - 10.00

0.01

3.00

IB

SlopeSection2

10.0 - 50.0

0.1

40.0

SlopeSection3

30.0 - 100.0

0.1

80.0

IdUnre

1.00 - 50.00

0.01

10.00

IB

I2/I1Ratio

5.0 - 100.0

1.0

15.0

I5/I1Ratio

5.0 - 100.0

1.0

25.0

CrossBlockEn

Off On

On

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REG 670

Section 4 Differential protection


Parameter NegSeqDiffEn Range Off On 0.02 - 0.20 Step Default On Unit Description Operation Off/On for neg. seq. differential protections Neg. seq. curr. must be higher than this level to be used Operate Angle for int. / ext. neg. seq. fault discriminator Open CT detection feature. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated Unrestrained diff. protection blocked after this delay, in s

IMinNegSeq

0.01

0.04

IB

NegSeqROA

30.0 - 120.0

0.1

60.0

Deg

OpenCTEnable

Off On 0.100 - 10.000

On

tOCTAlarmDelay

0.001

3.000

tOCTResetDelay

0.100 - 10.000

0.001

0.250

tOCTUnrstDelay

0.10 - 6000.00

0.01

10.00

Table 70:
Parameter RatedVoltageW1

Basic general settings for the T3WPDIF_87T (T3D1-) function


Range 0.05 - 2000.00 Step 0.05 Default 400.00 Unit kV Description Rated voltage of transformer winding 1 (HV winding) in kV Rated voltage of transformer winding 2 in kV Rated voltage of transformer winding 3 in kV Rated current of transformer winding 1 (HV winding) in A Rated current of transformer winding 2 in A Rated current of transformer winding 3 in A Connection type of winding 1: Y-wye or D-delta Connection type of winding 2: Y-wye or D-delta Connection type of winding 3: Y-wye or D-delta

RatedVoltageW2

0.05 - 2000.00

0.05

231.00

kV

RatedVoltageW3

0.05 - 2000.00

0.05

10.50

kV

RatedCurrentW1

1 - 99999

577

RatedCurrentW2

1 - 99999

1000

RatedCurrentW3

1 - 99999

7173

ConnectTypeW1

WYE (Y) Delta (D) WYE (Y) Delta (D) WYE (Y) Delta (D)

WYE (Y)

ConnectTypeW2

WYE (Y)

ConnectTypeW3

Delta (D)

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Section 4 Differential protection


Parameter ClockNumberW2 Range 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg] 7 [150 deg lead] 8 [120 deg lead] 9 [90 deg lead] 10 [60 deg lead] 11 [30 deg lead] 0 [0 deg] 1 [30 deg lag] 2 [60 deg lag] 3 [90 deg lag] 4 [120 deg lag] 5 [150 deg lag] 6 [180 deg] 7 [150 deg lead] 8 [120 deg lead] 9 [90 deg lead] 10 [60 deg lead] 11 [30 deg lead] Off On Off On Off On No Yes 1 - 99999 Step Default 0 [0 deg] Unit Description Phase displacement between W2 & W1=HV winding, hour notation

ClockNumberW3

5 [150 deg lag]

Phase displacement between W3 & W1=HV winding, hour notation

ZSCurrSubtrW1

On

Enable zer. seq. current subtraction for W1 side, On / Off Enable zer. seq. current subtraction for W2 side, On / Off Enable zer. seq. current subtraction for W3 side, On / Off Two CT inputs (Tconfig.) for winding 1, YES / NO CT primary rating in A, T-branch 1, on transf. W1 side CT primary in A, Tbranch 2, on transf. W1 side Two CT inputs (Tconfig.) for winding 2, YES / NO CT primary rating in A, T-branch 1, on transf. W2 side CT primary rating in A, T-branch 2, on transf. W2 side Two CT inputs (Tconfig.) for winding 3, YES / NO CT primary rating in A, T-branch 1, on transf. W3 side

ZSCurrSubtrW2

On

ZSCurrSubtrW3

On

TconfigForW1

No

CT1RatingW1

3000

CT2RatingW1

1 - 99999

3000

TconfigForW2

No Yes 1 - 99999

No

CT1RatingW2

3000

CT2RatingW2

1 - 99999

3000

TconfigForW3

No Yes 1 - 99999

No

CT1RatingW3

3000

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REG 670

Section 4 Differential protection


Parameter CT2RatingW3 Range 1 - 99999 Step 1 Default 3000 Unit A Description CT primary rating in A, T-branch 2, on transf. W3 side Transformer winding where OLTC1 is located OLTC1 lowest tap position designation (e.g. 1) OLTC1 rated tap/midtap position designation (e.g. 6) OLTC1 highest tap position designation (e.g. 11) OLTC1 end-tap position with winding highest no-load voltage Voltage change per OLTC1 step in percent of rated voltage Transformer winding where OLTC2 is located OLTC2 lowest tap position designation (e.g. 1) OLTC2 rated tap/midtap position designation (e.g. 6) OLTC2 highest tap position designation (e.g. 11) OLTC2 end-tap position with winding highest no-load voltage Voltage change per OLTC2 step in percent of rated voltage

LocationOLTC1

Not Used Winding 1 (W1) Winding 2 (W2) Winding 3 (W3) 1

Not Used

LowTapPosOLTC 1 RatedTapOLTC1

0 - 10

1 - 100

HighTapPsOLTC1

11

1 - 100

TapHighVoltTC1

1 - 100

StepSizeOLTC1

0.01 - 30.00

0.01

1.00

LocationOLTC2

Not Used Winding 1 (W1) Winding 2 (W2) Winding 3 (W3) 1

Not Used

LowTapPosOLTC 2 RatedTapOLTC2

0 - 10

1 - 100

HighTapPsOLTC2

11

1 - 100

TapHighVoltTC2

1 - 100

StepSizeOLTC2

0.01 - 30.00

0.01

1.00

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Section 4 Differential protection

Table 71:
Parameter Operation SOTFMode

Basic parameter group settings for the T3WPDIF_87T (T3D1-) function


Range Off On Off On 0.000 - 60.000 0.05 - 1.00 Step Default Off On Unit Description Operation Off / On Operation mode for switch onto fault feature Time delay for diff currents alarm level Dif. cur. alarm, multiple of base curr, usually W1 curr. Section1 sensitivity, multi. of base curr, usually W1 curr. Unrestr. prot. limit, multi. of base curr. usually W1 curr. Operation Off/On for cross-block logic between phases Operation Off/On for neg. seq. differential protections Neg. seq. curr. limit, mult. of base curr, usually W1 curr. Operate Angle for int. / ext. neg. seq. fault discriminator

tAlarmDelay IDiffAlarm

0.001 0.01

10.000 0.20

s %IB

IdMin

0.10 - 0.60

0.01

0.30

IB

IdUnre

1.00 - 50.00

0.01

10.00

IB

CrossBlockEn

Off On Off On 0.02 - 0.20

On

NegSeqDiffEn

On

IMinNegSeq

0.01

0.04

IB

NegSeqROA

30.0 - 120.0

0.1

60.0

Deg

Table 72:
Parameter EndSection1

Advanced parameter group settings for the T3WPDIF_87T (T3D1-) function


Range 0.20 - 1.50 Step 0.01 Default 1.25 Unit IB Description End of section 1, multi. of base current, usually W1 curr. End of section 2, multi. of base current, usually W1 curr. Slope in section 2 of operate-restrain characteristic, in % Slope in section 3 of operate-restrain characteristic, in % Max. ratio of 2nd harm. to fundamental harm dif. curr. in % Max. ratio of 5th harm. to fundamental harm dif. curr. in %

EndSection2

1.00 - 10.00

0.01

3.00

IB

SlopeSection2

10.0 - 50.0

0.1

40.0

SlopeSection3

30.0 - 100.0

0.1

80.0

I2/I1Ratio

5.0 - 100.0

1.0

15.0

I5/I1Ratio

5.0 - 100.0

1.0

25.0

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REG 670

Section 4 Differential protection


Parameter OpenCTEnable Range Off On 0.100 - 10.000 Step Default On Unit Description Open CT detection feature. Open CTEnable Off/On Open CT: time in s to alarm after an open CT is detected Reset delay in s. After delay, diff. function is activated Unrestrained diff. protection blocked after this delay, in s

tOCTAlarmDelay

0.001

3.000

tOCTResetDelay

0.100 - 10.000

0.001

0.250

tOCTUnrstDelay

0.10 - 6000.00

0.01

10.00

4.2.6

Technical data
Table 73:
Function Operating characteristic Reset ratio Unrestrained differential current limit Base sensitivity function Second harmonic blocking Fifth harmonic blocking Connection type for each of the windings Phase displacement between high voltage winding, W1 and each of the windings, w2 and w3. Hour notation Operate time, restrained function Reset time, restrained function Operate time, unrestrained function Reset time, unrestrained function Critical impulse time

Transformer differential protection (PDIF, 87T)


Range or value Adaptable > 95% (100-5000)% of Ibase on high voltage winding (10-60)% of Ibase (5.0-100.0)% of fundamental (5.0-100.0)% of fundamental Y-wye or D-delta 011 Accuracy 2.0% of Ir for I < Ir 2.0% of I for I > Ir 2.0% of set value 2.0% of Ir 2.0% of Ir 5.0% of Ir -

25 ms typically at 0 to 2 x Id 20 ms typically at 2 to 0 x Id 12 ms typically at 0 to 5 x Id 25 ms typically at 5 to 0 x Id 2 ms typically at 0 to 5 x Id

4.3
REG 670

Restricted earth fault protection (PDIF, 87N)


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Section 4 Differential protection

Function block name: REFxANSI number: 87N IEC 61850 logical node name: REFPDIF

IEC 60617 graphical symbol:

IdN/I

4.3.1
4.3.1.1

Introduction
Introduction
Three low impedance restricted earth fault functions can be included in RET 670. The function can be used on all directly or low impedance earthed windings. The restricted earth fault function can provide higher sensitivity (down to 5%) and higher speed as it measures individually on each winding and thus do not need harmonics stabilization. The low impedance function is a percentage biased function with an additional zero sequence current directional comparison criteria. This gives excellent stability for through faults. The function allows use of different CT ratios and magnetizing characteristics on the phase and neutral CT cores and mixing with other functions and protection IED's on the same cores.

xx05000058.vsd

Figure 75:

Autotransformer low-impedance REF

4.3.2
4.3.2.1

Principle of operation
Fundamental principles of the restricted earth fault protection (REF)
The REF protection should detect earth faults on earthed power transformer windings. The REF protection is a unit protection of differential type. Because this protection is based on the zero sequence currents, which theoretically only exist in case of an earth fault, the REF can be made very sensitive; regardless of normal load currents. It is the fastest protection a power transformer winding can have. It must be borne in mind, however, that the high sensitivity, and the high speed, tend to make such a protection instable, and special measures must be taken to make it insensitive to conditions, for which it should not operate, for example heavy through faults of phaseto-phase type, or heavy external earth faults.

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REG 670

Section 4 Differential protection

The REF protection is of low impedance type. At least three-phase power transformer terminal currents, and the power transformer neutral point current, must be fed separately to RET670. These input currents are then conditioned within RET670 by mathematical tools. Fundamental frequency components of all currents are extracted from all input currents, while other eventual zero sequence components (e.g. the 3rd harmonic currents) are fully suppressed. Then the residual current phasor is constructed from the three line current phasors. This zero sequence current phasor is then vectorially added to the neutral current, in order to obtain differential current. The following facts may be observed from the figure 76 and the figure 77 (where the three-phase line CTs are lumped into a single 3Io current, for the sake of simplicity).
zone of protection

s o A (L1) u B (L2) r c C (L3) e Uzs

Izs1 Izs1 Izs1

Ia = 0 Ib = 0 Ic = 0
Current in the neutral (IN) serves as a directional reference because it has the same direction for both internal and external faults.

a (L1) b (L2) c (L3)

3Io=3Izs1

IN = -3Izs1

IN

zs voltage is max. at the earth fault

For external fault


ROA

REF is a current polarized relay RCA (Relay Characteristic Angle) RCA = 0 deg. IN
ROA

3I0 MTA

REF is permanently set to operate for internal earth faults. REF should never operate for any faults external to the protected zone. Currents 3Io and IN are theoretically 180o out of phase for any external earth fault.
en05000724.vsd

Reference is neutral current

Restrain for external fault

Operate for internal fault

Figure 76:

Currents at an external earth fault.

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Section 4 Differential protection

power system contribution to fault current

zone of protection

s o u r c e

A (L1) B (L2) C (L3)


3Io = -3Izs2

Izs2 Izs2 Izs2


Ifault

Izs1 Izs1 Izs1

Ia = 0 Ib = 0 Ic = 0

a (L1) b (L2) c (L2)

Uzs IN = - 3Izs1

IN

Current in the neutral (IN) serves as a directional reference because it has the same direction for both internal and external faults.

Return path for 3Izs2

Return path for 3Izs1 currents 3Io and IN are approximately in phase for an internal earth fault.

ROA

For internal fault 3I0 MTA

IN
ROA

Reference is neutral current


en05000725.vsd

Restrain for external fault

Operate for internal fault

Figure 77:

Currents at an internal earth fault.

1.

2.

3. 4.

For an external earth fault, (figure 76) the residual current 3Io and the neutral conductor current IN have equal magnitude, but they are 180 degree out of phase due to internal CT reference directions used in IED670. This is easy to understand, as both CTs ideally measure exactly the same component of the earth fault current. For an internal fault, the total earth fault current is composed generally of two zero-sequence components. One zero-sequence component (i.e. 3IZS1) flows towards the power transformer neutral point and into the earth, while the other zero-sequence component (i.e. 3IZS2) flows out into the connected power system. These two primary currents can be expected to be of approximately opposite directions (about the same zero sequence impedance angle is assumed on both sides of the earth fault). However on the secondary CT sides they will be approximately in phase due to internal CT reference directions used in IED670. The magnitudes of the two components may be different, dependent on the magnitudes of zero sequence impedances of both sides. No current can flow towards the power system, if the only point where the system is earthed, is at the protected power transformer. Likewise, no current can flow into the power system, if the winding is not connected to the power system (circuit breaker open and power transformer energized from the other side). For both internal and external earth faults, the current in the neutral connection IN has always the same direction, that is, towards the earth. The two measured zero sequence current are 3Io and IN. The vectorial sum between them is the REF differential current, which is equal to Idiff = IN +3Io.

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REG 670

Section 4 Differential protection

Because REF is a differential protection where the line zero sequence (residual) current is constructed from 3 line (terminal) currents, a bias quantity must give stability against false operations due to high through fault currents. An operate - bias characteristic (only one) has been devised to the purpose. It is not only external earth faults that REF should be stable against, but also heavy phase-to-phase faults, not including earth. These faults may also give rise to false zero sequence currents due to saturated line CTs. Such faults, however, produce no neutral current, and can thus be eliminated as a source of danger, at least during the fault. As an additional measure against unwanted operation, a directional check is made in agreement with the above points 1, and 2. An operation is only allowed if currents 3Io and IN (see the figure 76 and the figure 77) are both within operating region. By taking a smaller ROA, the REF protection can be made more stable under heavy external fault conditions, as well as under the complex conditions, when external faults are cleared by other protections.

4.3.2.2

REF as a differential protection


The REF protection is a protection of differential type, a unit protection, whose settings are independent of any other protection. Compared to the transformer differential protection it has some advantages. It is simpler, as no current phase correction and magnitude correction are needed, not even in the case of an eventual On-Load-Tap-Changer (OLTC). REF is not sensitive to inrush and overexcitation currents. The only danger left is an eventual current transformer saturation. The REF has only one operate-bias characteristic, which is described in the table 74, and shown in the figure 78.
Table 74: Data of the operate - bias characterize of the REF.
Second slope % 100

Default sensitivity Idmin Max. base sensitivity Min. base sensitivity End of zone First slope (zone 1) Idmin (zone 1) Idmin (zone 1) 1 % Irated % Irated % Irated % Irated % 30 4 100 125 70

As a differential protection, the REF calculates a differential current and a bias current. In case of internal earth faults, the differential current is theoretically equal to the total earth fault current. The bias current is supposed to give stability to REF protection. The bias current is a measure of how high the currents are, or better, a measure of how difficult the conditions are under which the CTs operate. The higher the bias, the more difficult conditions can be suspected, and the more likely that the calculated differential current has a component of a false current, primarily due to CT saturation. This law is formulated by the operate-bias characteristic. This characteristic divides the Idif - Ibias plane into two parts. The part above the operate - bias characteristic is the so called operate area, while that below is the block area, see the figure 78.

REG 670

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Section 4 Differential protection

operate current in pu 5

operate

Base Sensitivity Idmin ********************************************* Range : 5 % to 50 % rated current Step : 1 % transformer rated current

zone 1

zone 2

second slope

1
minimum base sensitivity 50 % default base sensitivity 30 % maximum base sensitivity 5 %

first slope 0 1 2 1.25 pu 3 4

block 5 6

bias current in per unit


(98000017)

Figure 78:

Operate - bias characteristic of the restricted earth fault protection REF.

4.3.2.3

Calculation of differential current and bias current


The differential current, (= operate current), as a fundamental frequency phasor, is calculated as (with designations as in the figure 76 and the figure 77)

Idiff = IN + 3 Io

(Equation 30)

where: IN 3Io current in the power transformer neutral as a fundamental frequency phasor, residual current of the power transformer line (terminal) currents as a phasor.

If there are two three-phase CT inputs on the HV winding side for the REF protection (such as in breaker-and-a-half configurations), then their respective residual currents are added within REF function so that: I3PW1 = I3PW1CT1 + I3PW1CT2 where these are defined in table 75 The bias current is a measure (expressed as a current in Amperes) of how difficult the conditions are under which the instrument current transformers operate. 160 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 4 Differential protection

Dependent on the magnitude of the bias current, the corresponding zone (section) of the operate - bias characteristic ia applied, when deciding whether to trip, or not to trip. In general, the higher the bias current, the higher the differential current required to produce a trip. As the bias current the highest current of all separate input currents to REF protection, that is, of current in phase L1, phase L2, phase L3, and the current in the neutral point (designated as IN in the figure 76 and in the figure 77). If there are 2 feeders included in the zone of protection of the REF protection, then the respective bias current is found as the relatively highest of the following currents:
current[1] = max (I3PW1CT1) 1 CTFactorPri1
1 CTFactorPri2
1 CTFactorSec1
1 CTFactorSec2
(Equation 34) (Equation 35) (Equation 33) (Equation 32) (Equation 31)

current[2] = max (I3PW1CT2)

current[3] = max (I3PW2CT1)

current[4] = max (I3PW2CT2)

current[5] = IN

The bias current is thus generally equal to none of the input currents. If all primary ratings of the CTs were equal to IBase, then the bias current would be equal to the highest current in Amperes. IBase shall be set equal to the rated current of the protected winding where the REF function is applied.

4.3.2.4

Detection of external earthground faults


External faults are more common than internal earth faults for which the restricted earth fault protection should operate. It is important that the restricted earth fault protection remains stable during heavy external earth and phase-to-phase faults, and also when such a heavy external fault is cleared by some other protection such as overcurrent, or earth fault protection, etc. The conditions during a heavy external fault, and particularly immediately after the clearing of such a fault may be complex. The circuit breakers poles may not open exactly at the same moment, some of the CTs may still be highly saturated, etc. The detection of external earth faults is based on the fact that for such a fault a high neutral current appears first, while a false differential current only appears if and when one, or more, current transformers saturate. An external earth fault is thus assumed to have occurred when a high neutral current suddenly appears, while at the same time the differential current Idif remains low, at least for a while. This condition must

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be detected before a trip request is placed within REF protection. Any search for external fault is aborted if a trip request has been placed. A condition for a successful detection is that it takes not less than 4 ms for the first CT to saturate. For an internal earth fault, a true differential current develops immediately, while for an external fault it only develops if a CT saturates. If a trip request comes first, before an external fault could be positively established, then it must be an internal fault. If an external earth fault has been detected, then the REF is temporarily desensitized.

Directional criterion

The directional criterion is applied in order to positively distinguish between internaland external earth faults. This check is an additional criterion, which should prevent misoperations at heavy external earth faults, and during the disconnection of such faults by other protections. Earth faults on lines connecting the power transformer occur much more often than earth faults on a power transformer winding. It is important therefore that the restricted earth fault protection (REF) should remain secure during an external fault, and immediately after the fault has been cleared by some other protection. For an external earth fault with no CT saturation, the residual current in the lines (3Io in the figure 76) and the neutral current (IN in the figure 76) are theoretically equal in magnitude and are 180 degree out of phase. It is the current in the neutral (IN) which serves as a directional reference because it flows for all earth faults, and it has the same direction for all earth faults, both external as well as internal. The directional criterion in REF protection makes REF a current-polarized relay. If one or more CTs saturate, then the measured currents 3Io and IN may no more be equal, nor will their positions in the complex plane be exactly 180 degree apart.There is a risk that the resulting false differential current Idif enters the operate area when clearing the external fault. If this happens, a directional test may prevent a misoperation. A directional check is only executed if: 1. 2. a trip request signal has been issued, (REF function START signal set to 1) if the residual current in lines (3Io) is at least 3% of the IBase current.

If a directional check is either unreliable or not possible to do, due to too small currents, then the direction is cancelled as a condition for an eventual trip. If a directional check is executed, the REF protection operation is only allowed if currents 3Io and IN (see the figure 76and figure 77) are both within the operating region.
RCA = 0 degrees = constant; where RCA stands for the Relay Characteristic Angle, ROA = 60 to 90 degrees; where ROA stands for the Relay Operate Angle.

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RCA determines a direction MTA (Maximum Torque Angle) where the line residual current 3Io should lie for an internal earth fault, while ROA sets a tolerance margin.

2nd harmonic analysis

At energizing of a reactor a false differential current may appear in REF even though it does not exist in the primary net. The phase CTs may saturate due to a high dccomponent with long duration where as the current through the neutral CT does not have either the same dc-component or the same amplitude and the risk for saturation in this CT is much lesser. The appearing differential current as a result of the saturation may be so high that it reaches the operate characteristic. A calculation of the content of 2nd harmonic in the neutral current is made when neutral current, residual current and bias current are within some windows and some timing criteria are fulfilled. If the ratio between second and fundamental harmonic exceeds 60%, the REF function will be blocked.

4.3.2.5

Algorithm of the restricted earth fault protection (REF)


1. 2. 3. 4. 5. Check if current in the neutral Ineutral (IN) is less than 50% of the base sensitivity Idmin. If yes, only service values are calculated, then the REF protection algorithm is exited. If current in the Ineutral (IN) is more than 50% of Idmin, then determine the bias current Ibias. Determine the differential (operate) current Idif as a phasor, and calculate its magnitude. Check if the point P(Ibias, Idif) is above the operate - bias characteristic. If yes, increment the trip request counter by 1. If the point P(Ibias, Idif) is found to be below the operate - bias characteristic, then the trip request counter is reset to 0. If the trip request counter is still 0, search for an eventual heavy external earth fault. The search is only made if the neutral current is at least 50% of the IBase current. If an external earth fault has been detected, a flag is set which remains set until the external fault has been cleared. The external fault flag is reset to 0 when Ineutral falls below 50% of the base sensitivity Idmin. Any search for external fault is aborted if trip request counter is more than 0. For as long as the external fault persists an additional temporary trip condition is introduced. That means that the REF protection is temporarily desensitized. If point P(Ibias, Idif) is found to be above the operate - bias characteristic), so that trip request counter is becomes more than 0, a directional check can be made. The directional check is made only if Iresidual (3Io) is more than 3% of the IBase current. If the result of the check means external fault, then the internal trip request is reset. If the directional check cannot be executed, then direction is no longer a condition for a trip. When neutral current, residual current and bias current are within some windows and some timing criteria are fulfilled, the ratio of 2nd to fundamental tone is calculated. If it is found to be above 60% the trip request counter is reset and TRIP remains zero. Finally, a check is made if the trip request counter is equal to, or higher than 2. If it is, and at the same time, the bias current is at least 50% of the highest bias 163

6. 7.

8.

9.

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current Ibiasmax (measured during the disturbance) then the REF function block sets output TRIP to 1. If the counter is less than 2, TRIP signal remains 0.

4.3.3

Function block
REF1REFPDIF_87N I3P I3PW1CT1 I3PW1CT2 I3PW2CT1 I3PW2CT2 BLOCK TRIP START DIROK BLK2H IRES IN IBIAS IDIFF ANGLE I2RATIO en06000251.vsd

Figure 79:

REF function block

4.3.4

Input and output signals


Table 75:
Signal I3P I3PW1CT1 I3PW1CT2 I3PW2CT1 I3PW2CT2 BLOCK

Input signals for the REFPDIF_87N (REF1-) function block


Description Group signal for neutral current input Group signal for primary CT1 current input Group signal for primary CT2 current input Group signal for secondary CT1 current input Group signal for secondary CT2 current input Block of function

Table 76:
Signal TRIP START DIROK BLK2H IRES IN IBIAS IDIFF ANGLE I2RATIO

Output signals for the REFPDIF_87N (REF1-) function block


Description Trip by restricted earth fault protection function Start by restricted earth fault protection function Directional Criteria has operated for internal fault Block due to 2-nd harmonic Magnitude of fund. freq. residual current Magnitude of fund. freq. neutral current Magnitude of the bias current Magnitude of fund. freq. differential current Direction angle from zerosequence feature Second harmonic ratio

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Section 4 Differential protection 4.3.5 Setting parameters


Table 77:
Parameter Operation IBase IdMin CTFactorPri1

Basic parameter group settings for the REFPDIF_87N (REF1-) function


Range Off ON 1 - 99999 4.0 - 100.0 1.0 - 10.0 Step 1 0.1 0.1 Default Off 3000 10.0 1.0 Unit A %IB Description Operation Off / On Base current Maximum sensitivity in % of Ibase CT factor for HV side CT1 (CT1rated/ HVrated current) CT factor for HV side CT2 (CT2rated/ HVrated current) CT factor for MV side CT1 (CT1rated/ MVrated current) CT factor for MV side CT2 (CT2rated/ MVrated current)

CTFactorPri2

1.0 - 10.0

0.1

1.0

CTFactorSec1

1.0 - 10.0

0.1

1.0

CTFactorSec2

1.0 - 10.0

0.1

1.0

Table 78:
Parameter ROA

Advanced parameter group settings for the REFPDIF_87N (REF1-) function


Range 60 - 90 Step 1 Default 60 Unit Deg Description Relay operate angle for zero sequence directional feature

4.3.6

Technical data
Table 79:
Function Operate characteristic Reset ratio Base sensitivity function Directional characteristic Operate time Reset time Second harmonic blocking

Restricted earth fault protection, low impedance (PDIF, 87N)


Range or value Adaptable >95% (4.0-100.0)% of Ibase Fixed 180 degrees or 60 to 90 degrees 20 ms typically at 0 to 10 x Id 25 ms typically at 10 to 0 x Id (5.0-100.0)% of fundamental Accuracy 2.0% of Ir for I < Ir 2.0% of I for I > Ir 2.0% of Ir 2.0 degree 2.0% of Ir

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4.4

High impedance differential protection (PDIF, 87)


Function block name: HZDxANSI number: 87 IEC 61850 logical node name: HZPDIF IEC 60617 graphical symbol:

IdN

4.4.1

Introduction
The high impedance differential protection can be used when the involved CT cores have the same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the phases and neutral current and a series resistor and a voltage dependent resistor externally to the relay.

4.4.2

Principle of operation
The high impedance differential function is based on one current input with external stabilizing resistors and voltage dependent resistors. Three functions can be used to provide a three phase differential protection function. The stabilizing resistor value is calculated from the relay operating value UR calculated to achieve through fault stability. The supplied stabilizing resistor has a link to allow setting of the correct resistance value. Refer to Application manual for operating voltage and sensitivity calculation.

4.4.2.1

Logic diagram
The logic diagram see figure 80 shows the operation principles for the high impedance differential protection function. It is a basically a simple one step relay with an additional lower alarm level. The function can be totally blocked totally or only tripping, can be blocked, by activating inputs from external signals.

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Figure 80:

Logic diagram for High impedance differential protection.

4.4.3

Function block
HZD1HZPDIF_87 ISI BLOCK BLKTR TRIP ALARM MEASVOLT en05000363.vsd

Figure 81:

HZD function block

4.4.4

Input and output signals


Table 80:
Signal ISI BLOCK BLKTR

Input signals for the HZPDIF_87 (HZD1-) function block


Description Group signal for current input Block of function Block of trip

Table 81:
Signal TRIP ALARM MEASVOLT

Output signals for the HZPDIF_87 (HZD1-) function block


Description Trip signal Alarm signal Measured RMS voltage on CT secondary side

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Table 82:
Parameter Operation U>Alarm

Basic parameter group settings for the HZPDIF_87 (HZD1-) function


Range Off On 2 - 500 Step 1 Default Off 10 Unit V Description Operation Off / On Alarm voltage level in volts on CT secondary side Time delay to activate alarm Operate voltage level in volts on CT secondary side Value of series resistor in Ohms

tAlarm U>Trip

0.000 - 60.000 5 - 900

0.001 1

5.000 100

s V

SeriesResistor

10 - 20000

250

ohm

4.4.6

Technical data
Table 83:
Function Operate voltage Reset ratio Maximum continuous voltage Operate time Reset time Critical impulse time

High impedance differential protection (PDIF, 87)


Range or value (20-400) V >95% U>TripPickup2/series resistor 200 W 10 ms typically at 0 to 10 x Ud 90 ms typically at 10 to 0 x Ud 2 ms typically at 0 to 10 x Ud Accuracy 1.0% of Ur for U < Ur 1.0% of U for U > Ur -

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Section 5 Impedance protection

Section 5

Impedance protection
About this chapter
This chapter describes distance protection and associated functions. It includes function blocks, logic diagrams and data tables with information about distance protection, automatic switch onto fault, weak end in-feed and other associated functions. Quadrilateral characteristics are also covered.

5.1

Full-scheme distance measuring, Mho characteristic, PDIS 21


Function block name: ZMHx-ANSI number: 21 IEC 61850 logical node name: ZMHPDIS IEC 60617 graphical symbol:

5.1.1

Introduction
The numerical mho line distance protection is a three zone full scheme protection for back-up detection of short circuit and earth faults. The three zones have fully independent measuring and settings which gives high flexibility for all types of lines. The modern technical solution offers fast operating time down to cycles. The function can be used as underimpedance back-up protection for transformers and generators.

5.1.2
5.1.2.1

Principle of operation
Full scheme measurement
The execution of the different fault loops within the REx 6xx are of full scheme type, which means that each fault loop for phase to earth faults and phase to phase faults are executed in parallel.

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The use of full scheme technique gives faster operation time compare to switched schemes which mostly uses a start element to select correct voltages and current depending on fault type. So each distance protection zone performs like one independent distance protection relay with six measuring elements.

5.1.2.2

Impedance characteristic
The distance function consists of five instances. Each instance can be selected to be either forward or reverse with cross polarized mho characteristic alternatively self polarized offset Mho characteristics with reverse offset. The operating characteristic is in accordance to figure 82 below where zone5 is selected offset Mho.
jX Mho, zone4

Mho, zone3

Zs=0
Mho, zone2

R
Mho, zone1

Zs=Z1
R

Zs=2Z1
Offset mho, zone5 en06000400.vsd

Figure 82:

Mho, offset Mho characteristic and the source impedance influence on the Mho characteristic

The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing the origin as for the offset mho in the left figure 82, which is only valid where the source impedance is zero, the crossing point is moved to the coordinates of the negative source impedance given an expansion of the circle shown in the right figure 82. The polarisation quantities used for the mho circle is 100% memorized positive sequence voltages. This will give a somewhat less dynamic expansion of the mho circle during faults. However, if the source impedance is high, the dynamic expansion of the mho circle might lower the security of the function too much with high loading and mild power swing conditions. The mho distance element has a load encroachment function which cut off a section of the characteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode to On. Enabling of the load encroachment function increases the possibility to detect high resistive faults without interfering with the load impedance. The algorithm for the load encroachment is located in the PHSM function, where also the relevant settings can be found. Information about the load encroachment from the PHS to the zone measurement is given in binary format to the input signal LDCND. 170 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 5 Impedance protection


5.1.2.3 Basic operation characteristics
Each impedance zone can be switched On and Off by the setting parameter Operation. Each zone can also be set to Non-directional, Forward or Reverse by setting the parameter DirMode . The operation for phase to earth and phase to phase fault can be individually switched On and Off by the setting parameter OpModePE and OpModePP. For critical applications such as for lines with high SIRs as well as CVTs, it is possible to improve the security by setting the parameter ReachMode to Underreach. In this mode the reach for faults close to the zone reach is reduced by 20% and the filtering is also introduced to increase the accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the reach is introduced and no extra filtering introduced. The latter setting is recommended for overreaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on transients is not a major issue either because of less likelihood of overreach with higher settings or the fact that these elements do not initiate tripping unconditionally. The offset mho characteristic can be set in Non-directional, Forward or Reverse by the setting parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced. Information about the directional line is given from the directional element and given to the measuring element as binary coded signal to the input DIRCND. The zone reach for phase to earth fault and phase to phase fault is set individually in polar coordinates. The impedance is set by the parameters ZPE and ZPP and the corresponding arguments by the parameters ZAngPE and ZAngPP. Compensation for earth return path for faults involving earth is done by setting the parameter KNMag and KNAng where KNMag is the magnitude of the earth return path and KNAng is the difference of angles between KNMag and ZPE. KNMag and KNAng are defined according to equation 36 and equation 37.
KNMag = Z0-Z1 3 Z1

(Equation 36)

Z0-Z1 KNAng = ( ZAngPE ) - arg 3 Z1

(Equation 37)

Where: Z0 Z1 ZAngP E is the complex zero sequence impedance of the line in ohm/phase is the complex positive sequence impedance of the line in ohm/phase line angle of the positive line impedance

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The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by setting the parameter tPE and tPP respectively. To release the time delay, the operation mode for the timers, OpModetPE and OpModetPP, has to be set to On. This is also the case for instantaneous operation. The function can be blocked in the following ways: activating of input BLOCK blocks the whole function activating of the input BLKZ (fuse failure) blocks all output signals activating of the input BLKZMTD blocks the delta based algorithm activating of the input BLKHSIR blocks the instantaneous part of the algorithm for high SIR values activating of the input BLKTRIP blocks all output signals activating the input BLKPE blocks the phase-to-earth fault loop outputs activating the input BLKPP blocks the phase-to-phase fault loop outputs

The activation of signal BLKZ can either be by external fuse failure function or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block (ZMHODIS 21). The input signal BLKZMTD is activated during some ms after fault has been detected by the Mho supervision logic to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output signal at the Mho supervision function. At SIR values >10, the use of electronic CVT might cause overreach due to the built in resonance circuit in the CVT which reduce the secondary voltage for a while. The input BLKHSIR shall be connected to the output signal HSIR on the Mho supervision logic for increasing of the filtering and high SIR values. This is valid only when permissive underreach scheme is selected by setting ReachMode=Underreach.

5.1.2.4

Theory for operation


The Mho algorithm is based on phase comparison of a operating phasor and a polarizing phasor. When the operating phasor leads the reference phasor by more than 90 degrees, the function will operate and give a trip output.

Phase-to-phase fault
Mho The plain Mho circle has the characteristic as figure 83The condition for deriving the angle is according to equation 38.

b = arg(U L1 L 2 - I L1 L 2 ZPP ) - arg(U pol )

(Equation 38)

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where: the voltage vector difference between phases L1 and L2

U L1 L 2
the current vector difference between phases L1 and L2

I L1 L 2
ZPP Upol the positive sequence impedance setting for phase to phase fault is the polarizing voltage

The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase L1 to L2 fault). The memorized voltage will prevent collapse of the Mho circle for close in faults. Operation occurs if 90270
IL1L2X

Ucomp = UL1L2 - IL1L2 ZPP IL1L2 ZPP

Upol UL1L2

IL1L2R

en07000109.vsd

Figure 83:

Simplified mho characteristic and vectordiagram for phase L1 to L2 fault.

Offset Mho The characteristic for offset mho is a circle where two points on the circle are the setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP and the angle for ZRevPP is AngZPP+180.

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The condition for operation at phase to phase fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90 figure 84. The angle will be 90 for fault location on the boundary of the circle. The angle for L1 to L2 fault can be defined according to equation 42.

b = arg

U-(-IL1L2 ZRevPP)
U -IL1L2 ZPP

(Equation 41)

where:

U
ZRevPP

= is the UL1L2 voltage

= is the positive sequence impedance setting for phase to phase fault in reverse direction

IL1L2jX

Ucomp1 = UL1L2 - IL1L2 ZPP IL1L2 ZPP

U Ucomp2 = U = IFZF=UL1L2 IL1L2R

- IL1L2 Z RevPP
en07000110.vsd

Figure 84:

Simplified offset mho characteristic and voltage vectors for phase L1 to L2 fault.

For operation the angle should be 90<<270. Offset Mho, forward direction When forward direction has been selected for the offset mho, an extra criteria beside the one for offset mho equation 43 is introdced, that is the angle between the voltage and the current must lie between the blinders in second quadrant and fourth quadrant. See figure 85 below. So the condition for operation will be 174 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 5 Impedance protection

90 < b < 270


and

(Equation 43)

ArgDir < j < ArgNegR e s


where

(Equation 44)

ArgDir ArgNegRes

is the setting parameter for directional line in fourth quadrant is the setting parameter for directional line in second quadrant is calculated according to equation 42

The directional information is brought to the mho distance measurement from the mho directional element as binary coded information to the input DIRCND. See chapter Mho directional element for information about the mho directionalety element.
IL1L2jX

ZPP

UL1L2

ArgNegRes

IL1L2
ArgDir

en07000111.vsd

Figure 85:

Simplified offset mho characteristic in forward direction for phase L1 to L2 fault.

Offset Mho, reverse direction The operation area for offset Mho in reverse direction is according to figure 86. The operation area in second quadrant is ArgNegRes+180. The conditions for operation are REG 670 Technical reference manual 1MRK502013-UEN rev. B 175

Section 5 Impedance protection

90 < b < 270


and

(Equation 45)

180 - ArgDir < j < ArgNeg Re s + 180

(Equation 46)

The is derived according to equation 42 for the mho circle and is the angle between the voltage and current.
X ZPP

ArgNegRes

IL1L2

ArgDir
UL1L2

ZRevPP
en06000469.eps

Figure 86:

Operation characteristice for reverse phase L1phase L2 fault.

Phase-to-earth fault
Mho The measuring of earth faults uses earth return compensation applied in a conventional way. The compensation voltage is derived by considering the influence from the earth return path. For a earth fault in phase L1A, we can derive the compensation voltage Ucomp see figure 87 as

Ucomp = U pol - I L1 Z loop

(Equation 47)

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Section 5 Impedance protection

where Upol Zloop is the polarizing voltage (memorized UL1 for Phase L1 to earth fault) is the loop impedance, which in general terms can be expressed as

Z1+ZN = Z 1 1 + KN
where Z1 KN

positive sequence impedance of the line (Ohm/phase) zero sequence compensator factor

The angle between the Ucomp and the polarize voltage Upol for a L1 to earth fault is

b = arg U L1 - I L1 + IN KN ZPE - arg(Upol)

(Equation 49)

where: UL1 VA IL1 IA IN = phase voltage in faulty phase L1 = phase voltage in faulty phase A = phase current in faulty phase L1 = phase current in faulty phase A = zero sequence current in faulty phase L1 =

KN

Z0-Z1 3 Z1

the setting parameter for the zero sequence compensation consisting of the magnitude KN and the angle KNAng.

Upol Vpol

= 100% of positive sequence memorized voltage UL1 = 100% of positive sequence memorized voltage VA

It is to be noted that the angle KNAng is the difference angle between the positive sequence impedance ZPE and the impedance ZN for the earth return path see figure 87

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IL1X

KNAng IL1ZN

Ucomp

IL1 Zloop
IL1ZPE Upol f IL1 (Ref)

IL1R

en06000472.vsd

Figure 87:

Simplified offset mho characteristic and vectordiagram for phase L1 to earth fault.

Operation occurs if

90 b 270

(Equation 52)

Offset Mho The characteristic for offset mho at earth fault is a circle containing the two vectors from the origin ZPE and ZRevPE where ZPE and ZrevPE are the settting reach for the positive sequence impedance in forward respective reverse direction. The vector ZPE in the impedance plane has the settable angle AngZPE and the angle for ZRevPP is AngZPE+180 The condition for operation at phase to earth fault is that the angle between the two compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90 see figure 88. The angle will be 90 for fault location on the boundary of the circle. The angle for L1 to earth fault can be defined as

b = arg
b = arg

UL1-(- IL1 Z Re vPE )


UL1- IL1L ZPE
UL1- IL1L ZPE

UL1-(- IL1 Z Re vPE )

(Equation 53)

where is the phase L1 phase voltage

U L1
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Section 5 Impedance protection

IL1L 2 jX

IL1 ZPE

U comp1 = UL1 - I L1 ZPE

UL1

U comp2 = UL1 - (-IL1 ZRevPE)


IL1L2 R

- I L1 Z Re vPe
en 06000465 .vsd

IABjX

IA ZPE

V comp1 = VA - IA ZPE

VA

V comp2 = VA - (-IA ZRevPE)


I AB R

- IA Z RevPe
en 06000465 _ansi. vsd

Figure 88:

Simplified offset mho characteristic and voltage vector for phase L1 to L2 fault.

Operation occurs if

90 b 270

(Equation 55)

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Offset Mho, forward direction In the same way as for phase-to-phase fault, selection of forward direction of offset mho will introduce an extra criteria for operation. Beside the basic criteria for offset mho according to equations 53 and 55, also the criteria that the angle between the voltage and the current must lie between the blinders in second and fourth quadrant. See figure 89. The condition for operation will hereby be 90<<270 and ArgDir<<ArgNegRes.
where

ArgDir ArgNegRes

is the setting parameter for directional line in fourth quadrant is the setting parameter for directional line in second quadrant. is calculated according to equation 53

IL1 jX

UL1

ArgNegRes

IL1
ArgDir

IL1R

en 06000466 .vsd

Figure 89:

Simplified characteristic for offset mho in forward direction for L1 to earth fault.

Offset mho, reverse direction In the same way as for offset in forward direction, the selection of offset mho in reverse direction will introduce an extra criteria for operation compare to the normal offset Mho. The extra is that the angle between the fault voltage and the fault current shall lie between the blinders in second and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as 180 -ArgDir and in fourth quadrant ArgNegRes+180, see figure 90 The conditions for operation of offset Mho in reverse direction for L1 to earth fault will be 90<<270 and 180-Argdir<<ArgNegRes+180.

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The is derived according to equation 53 for the offset Mho circle and is the angle between the voltage and current.

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X ZPE

ArgNegRes IL1 ArgDir UL1 ZRevPE R

en06000470.eps

X ZPE

ArgNegRes IA ArgDir VA ZRevPE R

en06000470_ansi.eps

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Section 5 Impedance protection


Figure 90: Simplified characteristic for offset Mho in reverse direction for L1 to earth fault.

5.1.3

Function block
ZMH1ZMHPDIS_21 I3P U3P CURR_INP VOLT_INP POL_VOLT BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPE BLKPP DIRCND STCND LDCND TRIP TRL1 TRL2 TRL3 TRPE TRPP START STL1 STL2 STL3 STPE STPP

en06000423.vsd

Figure 91:

ZMH function block

5.1.4

Input and output signals


Table 84:
Signal I3P U3P CURR_INP VOLT_INP POL_VOLT BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPE BLKPP DIRCND STCND LDCND

Input signals for the ZMHPDIS_21 (ZMH1-) function block


Description Connection for current sample signals Connection for voltage sample signals Connection for current signals Connection for voltage signals Connection for polarizing voltage Block of function Block due to fuse failure Block signal for blocking of time domaine function Blocks time domain function at high SIR Blocks all operate output signals Blocks phase-to-earth operation Blocks phase-to-phase operation External directional condition External start condition (loop enabler) External load condition (loop enabler)

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Table 85:
Signal TRIP TRL1 TRL2 TRL3 TRPE TRPP START STL1 STL2 STL3 STPE STPP

Output signals for the ZMHPDIS_21 (ZMH1-) function block


Description Trip General Trip phase L1 Trip phase L2 Trip phase L3 Trip phase-to-earth Trip phase-to-phase Start General Start phase L1 Start phase L2 Start phase L3 Start phase-to-earth Start phase-to-phase

5.1.5

Setting parameters
Table 86:
Parameter Operation IBase UBase DirMode

Basic parameter group settings for the ZMHPDIS_21 (ZMH1-) function


Range Off ON 1 - 99999 0.05 - 2000.00 Off Offset Forward Reverse Off ON OverReach Underreach Off ON 0.005 - 3000.000 Step 1 0.05 Default ON 3000 400.00 Forward Unit A kV Description Operation Off/On Base current Base voltage Direction mode

LoadEnchMode ReachMode OpModePE

Off OverReach ON

Load enchroachment mode Off/On Reach mode Over/ Underreach Operation mode Off / On of Phase-Earth loops Positive sequence impedance setting for Phase-Earth loop Angle for positive sequence line impedance for PhaseEarth loop Magnitud of earth return compensation factor KN

ZPE

0.001

30.000

ohm/p

ZAngPE

10 - 90

80

Deg

KN

0.00 - 3.00

0.01

0.80

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Section 5 Impedance protection


Parameter KNAng Range -180 - 180 Step 1 Default -15 Unit Deg Description Angle for earth return compensation factor KN Reverse reach of the phase to earth loop(magnitude) Delay time for operation of phase to earth elements Minimum operation phase to earth current Operation mode Off / On of Phase-Phase loops Impedance setting reach for phase to phase elements Angle for positive sequence line impedance for PhasePhase elements Reverse reach of the phase to phase loop(magnitude) Delay time for operation of phase to phase Minimum operation phase to phase current

ZRevPE

0.005 - 3000.000

0.001

30.000

ohm/p

tPE

0.000 - 60.000

0.001

0.000

IMinOpPE OpModePP

10 - 30 Off ON 0.005 - 3000.000

1 -

20 ON

%IB -

ZPP

0.001

30.000

ohm/p

ZAngPP

10 - 90

85

Deg

ZRevPP

0.005 - 3000.000

0.001

30.000

ohm/p

tPP

0.000 - 60.000

0.001

0.000

IMinOpPP

10 - 30

20

%UB

Table 87:
Parameter OffsetMhoDir

Advanced parameter group settings for the ZMHPDIS_21 (ZMH1-) function


Range Non-directional Forward Reverse Off ON Off ON Step Default Non-directional Unit Description Direction mode for offset mho Operation mode Off / On of Zone timer, PhE Operation mode Off / On of Zone timer, Phph

OpModetPE

ON

OpModetPP

ON

5.1.6

Technical data

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Table 88:
Function

Full-scheme distance protection, Mho characteristic (PDIS, 21)


Range or value 3 with selectable direction (1030)% of IBase (0.0053000.000) W/phase (1090) degrees (0.0053000.000) /phase (0.0053000.000) /phase (1090) degrees Accuracy 2.0% static accuracy Conditions: Voltage range: (0.1-1.1) x Ur Current range: (0.5-30) x Ir Angle: at 0 degrees and 85 degrees

Number of zones with selectable directions Minimum operate current Positive sequence impedance, phaseearth loop Positive sequence impedance angle, phaseearth loop Reverse reach, phaseearth loop (Magnitude) Impedance reach for phase phase elements Angle for positive sequence impedance, phasephase elements Reverse reach of phasephase loop Magnitude of earth return compensation factor KN Angle for earth compensation factor KN Dynamic overreach Timers Operate time Reset ratio Reset time

(0.0053000.000) /phase (0.003.00) (-180180) degrees <5% at 85 degrees measured with CVTs and 0.5<SIR<30 (0.000-60.000) s 15 ms typically (with static outputs) 105% typically 30 ms typically 0.5% 10 ms -

5.2

Directional impedance Mho (RDIR)


Function block name: ZDMANSI number: IEC 61850 logical node name: ZDMRDIR IEC 60617 graphical symbol:

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REG 670

Section 5 Impedance protection 5.2.1 Introduction


The phase-to-earth impedance elements can be optionally supervised by a phase unselective directional function (phase unselective, because it is based on symmetrical components).

5.2.2
5.2.2.1

Principle of operation
Directional impedance element for mho characteristic, ZDM
The evaluation of the directionality takes place in the function block ZDM. Equation 56 and equation 57 are used to classify that the fault is in the forward direction for phase-to-earth fault and phase-phase fault respectively.

- ArgDir < arg

0.85 U1L1 + 0.15 U1L1M I L1

< ArgNeg Re s
(Equation 56)

- ArgDir < arg

0.85 U1L1L 2 + 0.15 U1L1L 2M I L1L 2

< ArgNeg Re s
(Equation 57)

Where: ArgDir ArgNegRes U1L1 U1L1M IL1 U1L1L2 U1L1L2M IL1L2 Setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) Setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 92 Positive sequence phase voltage in phase L1 Positive sequence memorized phase voltage in phase L1 Phase current in phase L1 Voltage difference between phase L1 and L2 (L2 lagging L1) Memorized voltage difference between phase L1 and L2 (L2 lagging L1) Current difference between phase L1 and L2 (L2 lagging L1)

The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see figure 92) and they should not be changed unless system studies show the necessity. The directional lines are computed by means of a comparator-type calculation, meaning that the directional lines are based on mho-circles (of infinite radius).

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X Zset reach point

ArgNegRes

-ArgDir

-Zs
en06000416.vsd

Figure 92:

Setting angles for discrimination of forward fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage UBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the U1L1M memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100ms or until the positive sequence voltage is restored. After 100ms, the following occurs: If the current is still above the set value of the minimum operating current the condition seals in. If the fault has caused tripping, the trip endures. If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation.

If the current decreases below the minimum operating value, no directional indications will be given until the positive sequence voltage exceeds 10% of its rated value.

The directional function block ZDM has the following output signals: The STDIRCND output provides an integer signal that depends on the evaluation and is derived from a binary coded signal as follows:

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Section 5 Impedance protection

bit 11 (2048) STRVL3L1=1 bit 5 (32) STFWL3L1= 1

bit 10 (1024) STRVL2L3=1 bit 4 (16) STFWL2L3= 1

bit 9 (512) STRVL1L2=1 bit 3 (8) STFWL1L2= 1

bit 8 (256) STRVL3N=1 bit 2 (4) STFWL3N=1

bit 7 (128) STRVL2N=1 bit 1 (2) STFWL2N=1

bit 6 (64) STRVL1N=1 bit 0 (1) STFWL1N=1

The STFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the forward starting conditions, i.e. STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3 and STFWL3L1. The STRV output is similar to the STFW output, the only difference being that it is made up as an OR-function of all the reverse starting conditions, i.e. STRVL1N, STRVL2N, STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1. Values for the following parameters are calculated, and may be viewed as service values: resistance phase L1 reactance phase L1 resistance phase L2 reactance phase L2 resistance phase L3 reactance phase L3 direction phase L1 direction phase L2 direction phase L3

5.2.3

Function block
ZDM1ZDMRDIR I3P U3P DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND en06000422.vsd

Figure 93:

ZDM function block

5.2.4

Input and output signals

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Section 5 Impedance protection

Table 89:
Signal I3P U3P

Input signals for the ZDMRDIR (ZDM1-) function block


Description group connection for current abs 1 group connection for voltage abs 1

Table 90:
Signal DIR_CURR DIR_VOLT DIR_POL STFW STRV STDIRCND

Output signals for the ZDMRDIR (ZDM1-) function block


Description Group connection Group connection Group connection Start in forward direction Start in reverse direction Binary coded directional information per measuring loop

5.2.5

Setting parameters
Table 91:
Parameter IBase UBase DirEvalType

Basic parameter group settings for the ZDMRDIR (ZDM1-) function


Range 1 - 99999 0.05 - 2000.00 Impedance Comparator Imp/Comp 90 - 175 Step 1 0.05 Default 3000 400.00 Comparator Unit Description Base setting for current level Base setting for voltage level Directional evaluation mode Impedance / Comparator Angle of blinder in second quadrant for forward direction Angle of blinder in fourth quadrant for forward direction Minimum operate phase current for Phase-Earth loops Minimum operate delta current for Phase-Phase loops

ArgNegRes

115

Deg

ArgDir

5 - 45

15

Deg

IMinOpPE

5 - 30

%IB

IMinOpPP

5 - 30

10

%IB

5.3

Pole slip protection (PPAM, 78)

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REG 670

Section 5 Impedance protection

Function block name: ANSI number: 78 IEC 61850 logical node name:

IEC 60617 graphical symbol:

<

5.3.1

Introduction
The phenomenon pole slip, also named out of step conditions, occurs when there is phase opposition between different parts of a power system. This is often shown in a simplified way as two equivalent generators connected to each other via an equivalent transmission line and the phase difference between the equivalent generators is 180.
Angle = 90 Angle = -90

Centre of Pole Slip


en07000003.vsd

Figure 94:

The centre of pole slip

The centre of the pole slip can occur in the generator itself or somewhere in the power system. When a pole slip occurs within the generator it is essential to trip the generator. If the centre of pole slip occurs outside any generator the power system should be split into two different parts that could have the ability to get stable operating conditions. The pole slip protection in IED 670 can be used both for generator protection application as well as line protection applications. The situation with pole slip of a generator can be caused by different reasons. A short circuit may occur in the external power grid, close to the generator. If the fault clearing time is too long, the generator will accelerate so much, that the synchronism cannot be maintained.

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Section 5 Impedance protection

Un-damped oscillations occur in the power system, where generator groups at different locations, oscillate against each other. If the connection between the generators is too weak the magnitude of the oscillations will increase until the angular stability is lost. The operation of a generator having pole slip will give risk of damages to the generator, shaft and turbine. At each pole slip there will be significant torque impact on the generator-turbine shaft. In asynchronous operation there will be induction of currents in parts of the generator normally not carrying current, thus resulting in increased heating. The consequence can be damages on insulation and stator/rotor iron.

The pole slip protection function shall detect pole slip conditions and trip the generator as fast as possible if the locus of the measured impedance is inside the generatortransformer block. If the centre of pole slip is outside in the power grid, the first action should be to split the network into two parts, after line protection action. If this fails there should be operation of the generator pole slip protection in zone 2, to prevent further damages to the generator, shaft and turbine.

5.3.2

Principle of operation
If the generator is faster than the power system, the rotor movement in the impedance and voltage diagram is from right to left and generating is signalled. If the generator is slower than the power system, the rotor movement is from left to right and motoring is signalled (the power system drives the generator as if it were a motor). The movements in the impedance plain can be seen in figure 95. The transient behaviour is described by the transient e.m.f's EA and EB, and by X'd, XT and the transient system impedance ZS.

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Section 5 Impedance protection

Zone 1 EB Xd REG 670 jX XT

Zone 2 XS EA

A XS

Pole slip impedance movement

XT

Apparent generator impedance

Xd B

en06000437.vsd

Figure 95:
where: X'd XT ZS

Movements in the impedance plain

= transient reactance of the generator = short-circuit reactance of the step-up transformer = impedance of the power system A

The detection of rotor angle is enabled when: the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting). the maximum voltage falls below 0.92 UBase the voltage Ucos (the voltage in phase with the generator current) has an angular velocity of 0.2...8 Hz and the corresponding direction is not blocked.

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Section 5 Impedance protection

en07000004.vsd

Figure 96:

Different generator quantities as function of the angle between the equivalent generators

An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle set for 'WarnAngle'. Slipping is detected when: a change of rotor angle of min. 50 ms is recognized the slip line is crossed between ZA and ZB.

When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when 'EnableZone1' is enabled (external device detects the direction of the centre of slipping). After the first slip, the signals 'Zone1' or 'Zone2' and depending on the direction of slip - either 'Generator' or 'Motor' are issued. Every time pole slipping is detected, the impedance of the point where the slip line is crossed and the instantaneous slip frequency are displayed as measurements. Further slips are only detected, if they are in the same direction and if the rate of rotor movement has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is then signalled itself as a first slip.

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Section 5 Impedance protection

The 'Trip1' tripping command and signal are generated after n1 slips in zone 1, providing the rotor angle is less than 'TripAngle'. The 'Trip2' signal is generated after n2 slips in zone 2, providing the rotor angle is less than 'TripAngle'. All signals are reset if: the direction of movement reverses the rotor angle detector resets without a slip being counted or no rotor relative movement was detected during the time 't-Reset'.

Imin > 0.10 IBase

Ucosj < 0.92 UBase

AND AND START

0.2 Slip.Freq. 8 Hz

d startAngle ZONE1

Z cross line ZA - ZC

AND

Z cross line ZC - ZB

AND

ZONE2

Counter N1Limit

a b

ab

AND

TRIP1

d tripAngle Counter N2Limit

OR a b ab

TRIP

AND

TRIP2

en07000005.vsd

Figure 97:

Simplified logic diagram for pole slip protection

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Section 5 Impedance protection 5.3.3 Function block


PSP1PSPPPAM_78 I3P U3P BLOCK BLKGEN BLKMOTOR EXTZONE1 TRIP TRIP1 TRIP2 START ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM SLIPZPER UCOSKV UCOSPER en07000030.vsd

Figure 98:

PSP function block

5.3.4

Input and output signals


Table 92:
Signal I3P U3P BLOCK BLKGEN BLKMOTOR EXTZONE1

Input signals for the PSPPPAM_78 (PSP1-) function block


Description Current group connection Voltage group connection Block of function Block operation in generating direction Block operation in motor direction Extension of zone1 with zone2 region

Table 93:
Signal TRIP TRIP1 TRIP2 START ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM

Output signals for the PSPPPAM_78 (PSP1-) function block


Description Common trip signal Trip1 after the N1Limit slip in zone1 Trip2 after the N2Limit slip in zone2 Common start signal First slip in zone1 region First slip in zone2 region Generator is faster then the system Generator is slower then the system Slip frequency Slip impedance in ohms

Table continued on next page

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REG 670

Section 5 Impedance protection


Signal SLIPZPER UCOSKV UCOSPER Description Slip impedance in percent of ZBase UCosPhi voltage in kV UCosPhi voltage in percent of UBase

5.3.5

Setting parameters
Table 94:
Parameter IBase

Basic general settings for the PSPPPAM_78 (PSP1-) function


Range 0.1 - 99999.9 Step 0.1 Default 3000.0 Unit A Description Base Current (primary phase current in Amperes) Base Voltage (primary phase-tophase voltage in kV) Measuring mode (PosSeq, L1L2, L2L3, L3L1) Invert current direction

UBase

0.1 - 9999.9

0.1

20.0

kV

MeasureMode

PosSeq L1L2 L2L3 L3L1 No Yes

PosSeq

InvertCTcurr

No

Table 95:
Parameter Operation OperationZ1 OperationZ2 ImpedanceZA ImpedanceZB ImpedanceZC AnglePhi StartAngle TripAngle N1Limit N2Limit

Basic parameter group settings for the PSPPPAM_78 (PSP1-) function


Range Off On Off On Off On 0.00 - 1000.00 0.00 - 1000.00 0.00 - 1000.00 72.00 - 90.00 0.0 - 180.0 0.0 - 180.0 1 - 20 1 - 20 Step 0.01 0.01 0.01 0.01 0.1 0.1 1 1 Default Off On On 10.00 10.00 10.00 85.00 110.0 90.0 1 3 Unit % % % Deg Deg Deg Description Operation On / Off Operation Zone1 On / Off Operation Zone2 On / Off Forward impedance in % of Zbase Reverse impedance in % of Zbase Impedance of zone1 limit in % of Zbase Angle of the slip impedance line Rotor angle for the start signal Rotor angle for the trip1 and trip2 signals Count limit for the trip1 signal Count limit for the trip2 signal

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Table 96:
Parameter ResetTime

Advanced parameter group settings for the PSPPPAM_78 (PSP1-) function


Range 0.000 - 60.000 Step 0.001 Default 5.000 Unit s Description Time without slip to reset all signals

5.3.6

Technical data
Table 97:
Function Impedance reach Characteristic angle Start and trip angles Zone 1 and Zone 2 trip counters

Pole slip protection (PPAM, 78)


Range or value (0.001000.00)% of Zbase (72.0090.00) degrees (0.0180.0) degrees (1-20) Accuracy 2.0% of Ur/Ir 5.0 degrees 5.0 degrees -

5.4

Loss of excitation (PDIS, 40)


Function block name: UEXx ANSI number: 40 IEC 61850 logical node name: LEXPDIS IEC 60617 graphical symbol:

Z<

5.4.1

Introduction
There are limits for the under-excitation of a synchronous machine. A reduction of the excitation current weakens the coupling between the rotor and the external power system. The machine may lose the synchronism and start to operate like an induction machine. Then, the reactive consumption will increase. Even if the machine does not loose synchronism it may not be acceptable to operate in this state for a long time. The under-excitation increases the generation of heat in the end region of the synchronous machine. The local heating may damage the insulation of the stator winding and even the iron core. To prevent damages to the generator it should be tripped at under-excitation.

5.4.2

Principle of operation
The underexcitation protection in REG 670 measures the apparent impedance seen out from the generator. The measurement loop of apparent impedance can be chosen as the positive sequence loop or any one of the three phase-to-phase loops.

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Section 5 Impedance protection


Measured mode Measured apparent impedance

Zposseq

U posseq I posseq

ZL1L2

U L1 - U L 2 I L1 - I L 2
U L 2 - U L3 I L 2 - I L3
U L 3 - U L1 I L 3 - I L1

ZL2L3

ZL3L1

There are three characteristics in the underexcitation protection as shown in figure 99.
X

Underexcitation Protection Restrain area R

Z1, Fast zone Z2, Slow zone


en06000455.vsd

Figure 99:

Three characteristics in the underexcitation protection

When the apparent impedance reaches the zone Z1 this zone will operate, normally with a short delay. The zone is related to the dynamic stability of the generator. REG 670 Technical reference manual 1MRK502013-UEN rev. B 199

Section 5 Impedance protection

When the apparent impedance reaches the zone Z2 this zone will operate, normally with a longer delay. The zone is related to the static stability of the generator. The protection also has a restrain area as shown in figure 99. In the function the zone measurement is done as shown in figure 100.
X

R XoffsetZ1 Z (apparent impedance)

Z1diameter

Z1 = Z - (XoffsetZ1 + Z1diameter/2)

Z1 or Z2

en06000456.vsd

Figure 100:

Zone measurement in the underexcitation protection function

The impedance Z1 is constructed out from the apparent impedance Z and the impedance corresponding to the centre point of the impedance characteristic (Z1 or Z2). If the amplitude of this impedance is less than the radius (diameter/2) of the characteristic, this part of the protection will operate. If the directional restrain is set off the impedance zone operation will start the appropriate timer and the function will trip after the set delay (tZ1 or tZ2). If the directional restrain is set On the directional release function must operate to enable operation. A new impedance is constructed as Z XoffsetDirLine. If the phase angle of this impedance is less than the set DirAngle the function will be released, see figure 101.

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REG 670

Section 5 Impedance protection

Underexcitation Protection Restrain area

XoffsetDirLine DirAngle

Z (apparent impedance)

en06000457.vsd

Figure 101:

Impedance constructed as Z - XoffsetDirLine in underexcitation protection

The function is schematically described in figure 102.


tZ1 t

Chosen current phasor Chosen voltage phasor Apparent impedance calculation Z

Z in Z1 char.

&

startZ1

TripZ1

Z in Z2 char.

&

startZ2

tZ2 t

TripZ2

Dir. Restrain Dir.Restrain ON

en06000458.vsd

Figure 102:

Simplified logic diagram of the underexcitation protection

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Section 5 Impedance protection 5.4.3 Function block


UEX1LEXPDIS_40 I3P U3P BLOCK BLKTRZ1 BLKTRZ2 TRIP TRZ1 TRZ2 START STZ1 STZ2 XOHM XPERCENT ROHM RPERCENT en07000031.vsd

Figure 103:

UEX function block

5.4.4

Input and output signals


Table 98:
Signal I3P U3P BLOCK BLKTRZ1 BLKTRZ2

Input signals for the LEXPDIS_40 (UEX1-) function block


Description Current group connection Voltage group connection Block of function Block trip of zone Z1 Block trip of zone Z2

Table 99:
Signal TRIP TRZ1 TRZ2 START STZ1 STZ2 XOHM XPERCENT ROHM RPERCENT

Output signals for the LEXPDIS_40 (UEX1-) function block


Description Common trip signal Trip signal from impedance zone Z1 Trip signal from impedance zone Z2 Common start signal Start signal from impedance zone Z1 Start signal from impedance zone Z2 Reactance in Primary Ohms Reactance in percent of Zbase Resistance in Primary Ohms Resistance in percent of Zbase

5.4.5

Setting parameters

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Section 5 Impedance protection

Table 100:
Parameter IBase

Basic general settings for the LEXPDIS_40 (UEX1-) function


Range 0.1 - 99999.9 Step 0.1 Default 3000 Unit A Description Base Current (primary phase current in Amperes) Base Voltage (primary phase-tophase voltage in kV) Measuring mode (PosSeq, L1L2, L2L3, L3L1)

UBase

0.1 - 9999.9

0.1

20

kV

MeasureMode

PosSeq L1L2 L2L3 L3L1

PosSeq

Table 101:
Parameter Operation OperationZ1 XoffsetZ1

Basic parameter group settings for the LEXPDIS_40 (UEX1-) function


Range Off On Off On -1000.00 1000.00 0.01 - 3000.00 Step 0.01 Default Off On -10.00 Unit % Description Operation Off / On Operation Off/On zone Z1 Offset of Z1 circle top point along X axis in % of Zbase Diameter of imedance circle for Z1 in % of Zbase Trip time delay for Z1 Operation Off/On zone Z2 Offset of Z2 circle top point along X axis in % of Zbase Diameter of imedance circle for Z2 in % of Zbase Trip time delay for Z2

Z1diameter

0.01

100.00

tZ1 OperationZ2 XoffsetZ2

0.00 - 6000.00 Off On -1000.00 1000.00 0.01 - 3000.00

0.01 0.01

0.01 On -10.00

s %

Z2diameter

0.01

200.00

tZ2

0.00 - 6000.00

0.01

1.00

Table 102:
Parameter invertCTcurren

Advanced general settings for the LEXPDIS_40 (UEX1-) function


Range No Yes Step Default No Unit Description Invert CT current

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Section 5 Impedance protection

Table 103:
Parameter DirSuperv

Advanced parameter group settings for the LEXPDIS_40 (UEX1-) function


Range Off On -1000.00 3000.00 -180.0 - 180.0 Step Default Off Unit Description Operation Off/On for additional directional criterion Offset of directional line along X axis in % of Zbase Angle between directional line and Raxis in degrees

XoffsetDirLine

0.01

0.00

DirAngle

0.1

-13.0

Deg

5.4.6

Technical data
Table 104:
Function X offset of Mho top point Diameter of Mho circle Timers

Loss of excitation (PDIS, 40)


Range or value (1000.001000.00)% of Zbase (0.003000.00)% of Zbase (0.006000.00) s Accuracy 2.0% of Ur/Ir 2.0% of Ur/Ir 0.5% 10 ms

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REG 670

Section 6 Current protection

Section 6

Current protection
About this chapter
This chapter describes current protection functions. These include functions like Instantaneous phase overcurrent protection, Four step phase overcurrent protection, Pole discordance protection and Residual overcurrent protection.

6.1

Instantaneous phase overcurrent protection (PIOC, 50)


Function block name: IOCxANSI number: 50 IEC 61850 logical node name: PHPIOC IEC 60617 graphical symbol:

3I>>

6.1.1

Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short tripping time to allow use as a high set short-circuit protection function, with the reach limited to less than typical eighty percent of the fault current at minimum source impedance.

6.1.2

Principle of operation
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to the IOC function. In a comparator the RMS values are compared to the set operation current value of the function (IP>>). If a phase current is larger than the set operation current a signal from the comparator for this phase is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for this phase and the TRIP signal that is common for all three phases.

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There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out of 3 any phase trip signal will be activated. If the parameter is set to 2 out of 3 at least two phase signals must be activated for trip. There is also a possibility to activate a preset change of the set operation current (StValMult) via a binary input (ENMULT). In some applications the operation value needs to be changed, for example due to transformer inrush currents. The function can be blocked from the binary input BLOCK.

6.1.3

Function block
IOC1PHPIOC_50 I3P BLOCK ENMULT TRIP TRL1 TRL2 TRL3 en04000391.vsd

Figure 104:

IOC function block

6.1.4

Input and output signals


Table 105:
Signal I3P BLOCK ENMULT

Input signals for the PHPIOC_50 (IOC1-) function block


Description Three phase current Block of function Enable current start value multiplier

Table 106:
Signal TRIP TRL1 TRL2 TRL3

Output signals for the PHPIOC_50 (IOC1-) function block


Description Trip signal from any phase Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3

6.1.5

Setting parameters

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Table 107:
Parameter Operation IBase OpMode

Basic parameter group settings for the PHPIOC_50 (IOC1-) function


Range Off On 1 - 99999 2 out of 3 1 out of 3 1 - 2500 Step 1 Default Off 3000 1 out of 3 Unit A Description Operation Off / On Base current Select operation mode 2-out of 3 / 1out of 3 Operate phase current level in % of IBase

IP>>

200

%IB

Table 108:
Parameter StValMult

Advanced parameter group settings for the PHPIOC_50 (IOC1-) function


Range 0.5 - 5.0 Step 0.1 Default 1.0 Unit Description Multiplier for operate current level

6.1.6

Technical data
Table 109:
Function Operate current Reset ratio Operate time Reset time Critical impulse time Operate time Reset time Critical impulse time Dynamic overreach

Instantaneous phase overcurrent protection (PIOC, 50)


Range or value (1-2500)% of lbase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at t = 100 ms Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir -

6.2

Four step phase overcurrent protection (PTOC, 51_67)

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Function block name: TOCxANSI number: 51/67 IEC 61850 logical node name: OC4PTOC

IEC 60617 graphical symbol:

3I> 4 4 alt

6.2.1

Introduction
The four step phase overcurrent function has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined time characteristic. The function can be set to be directional or non-directional independently for each of the steps.

6.2.2

Principle of operation
The function is divided into four different sub-functions, one for each step. For each step x an operation mode is set (DirModex): Off/Non-directional/Forward/Reverse. The protection design can be decomposed in four parts: The direction element, indicates the over current fault direction The harmonic Restraint Blocking function The 4 step over current function The Mode Selection If VT inputs are not available or not connected, func parameter DirModex shall be left to default value, Non-directional.

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faultState I3P U3P

Direction Element

dirPh1Flt dirPh2Flt dirPh3Flt

4 step over current element One element for each step

faultState

START

TRIP

I3P

Harmonic Restraint Element

harmRestrBlock

enableDir Mode Selection enableStep1-4 DirectionalMode1-4

en05000740.vsd

Figure 105:

Functional overview of TOC.

A common setting for all steps, StPhaseSel, is used to specify the number of phase currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3. The sampled analogue phase currents are pre-processed in a pre-processing function blocks. By a parameter setting within the general settings for the TOC function it is then possible to select type of measurement which shall be used by TOC function for all overcurrent stages. It is possible to select either discrete Fourier filter (DFT) or true RMS filer (RMS). If DFT option is selected then only the RMS value of the fundamental frequency components of each phase current is derived. Influence of DC current component and higher harmonic current components are almost completely suppressed. If RMS option is selected then the true RMS values is used. The true RMS value in addition to the fundamental frequency component includes the contribution from the current DC component as well as from higher current harmonic. The selected current values are fed to the TOC function. In a comparator, for each phase current, the DFT or RMS values are compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If a phase current is larger than the set operation current a signal from the comparator for this phase and step is set to true. This signal will, without delay, activate the output signal Start for this phase/step, the Start signal REG 670 Technical reference manual 1MRK502013-UEN rev. B 209

Section 6 Current protection

common for all three phases for this step and a common Start signal. It shall be noted that the selection of measured value (i.e. DFT or RMS) do not influence the operation of directional part of TOC function. Service value for individually measured phase currents are available from the TOC function. This feature simplifies testing, commissioning and in service operational checking of the function. A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the phase currents and the relation is compared to a set restrain current level. The function can use a directional option. The direction of the fault current is given as current angle in relation to the voltage angle. The fault current and fault voltage for the directional function is dependent of the fault type. To enable directional measurement at close in faults, causing low measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a memory voltage (15%). The following combinations are used.
Phase-phase short circuit:

U refL1L 2 = U L1 - U L 2
U refL 2 L 3 = U L 2 - U L 3
U refL 3 L1 = U L 3 - U L1
Phase-earth short circuit:

I dirL1L 2 = I L1 - I L 2
I dirL 2 L 3 = I L 2 - I L 3
I dirL 3 L1 = I L 3 - I L1

U refL1 = U L1

I dirL1 = I L1

U refL 2 = U L 2
U refL 3 = U L 3

I dirL 2 = I L 2
I dirL 3 = I L 3

The directional setting is given as a characteristic angle AngleRCA for the function and an angle window AngleROA.

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Reverse

Uref RCA

ROA

ROA

Forward

Idir

en05000745.vsd

Figure 106:

Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is 65. The parameters AngleROA gives the angle sector from AngleRCA for directional borders. A minimum current for directional phase start current signal can be set: IminOpPhSel. If no blockings are given the start signals will start the timers of the step. The time characteristic for each step can be chosen as definite time delay or some type of inverse time characteristic. A wide range of standardized inverse time characteristics is available. It is also possible to create a tailor made time characteristic. The possibilities for inverse time characteristics are described in chapter "Time inverse characteristics". Different types of reset time can be selected as described in chapter "Time inverse characteristics". There is also a possibility to activate a preset change (IxMult, x= 1, 2, 3 or 4) of the set operation current via a binary input (enable multiplier). In some applications the operation value needs to be changed, for example due to changed network switching state. The function can be blocked from the binary input BLOCK. The start signals from the function can be blocked from the binary input BLKST. The trip signals from the function can be blocked from the binary input BLKTR.

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TOC1OC4PTOC_51_67 I3P U3P BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 TRIP TR1 TR2 TR3 TR4 TRL1 TRL2 TRL3 TR1L1 TR1L2 TR1L3 TR2L1 TR2L2 TR2L3 TR3L1 TR3L2 TR3L3 TR4L1 TR4L2 TR4L3 START ST1 ST2 ST3 ST4 STL1 STL2 STL3 ST1L1 ST1L2 ST1L3 ST2L1 ST2L2 ST2L3 ST3L1 ST3L2 ST3L3 ST4L1 ST4L2 ST4L3 2NDHARM DIRL1 DIRL2 DIRL3 en06000187.vsd

Figure 107:

TOC function block

6.2.4

Input and output signals


Table 110:
Signal I3P U3P BLOCK BLKTR BLKST1 Table continued on next page

Input signals for the OC4PTOC_51_67 (TOC1-) function block


Description Group signal for current input Group signal for voltage input Block of function Block of trip Block of Step1

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Signal BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 Description Block of Step2 Block of Step3 Block of Step4 When activated, the current multiplier is in use for step1 When activated, the current multiplier is in use for step2 When activated, the current multiplier is in use for step3 When activated, the current multiplier is in use for step4

Table 111:
Signal TRIP TR1 TR2 TR3 TR4 TRL1 TRL2 TRL3 TR1L1 TR1L2 TR1L3 TR2L1 TR2L2 TR2L3 TR3L1 TR3L2 TR3L3 TR4L1 TR4L2 TR4L3 START ST1 ST2 ST3 ST4 STL1 STL2 STL3

Output signals for the OC4PTOC_51_67 (TOC1-) function block


Description Trip Common trip signal from step1 Common trip signal from step2 Common trip signal from step3 Common trip signal from step4 Trip signal from phase L1 Trip signal from phase L2 Trip signal from phase L3 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 Trip signal from step3 phase L1 Trip signal from step3 phase L2 Trip signal from step3 phase L3 Trip signal from step4 phase L1 Trip signal from step4 phase L2 Trip signal from step4 phase L3 General start signal Common start signal from step1 Common start signal from step2 Common start signal from step3 Common start signal from step4 Start signal from phase L1 Start signal from phase L2 Start signal from phase L3

Table continued on next page

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Signal ST1L1 ST1L2 ST1L3 ST2L1 ST2L2 ST2L3 ST3L1 ST3L2 ST3L3 ST4L1 ST4L2 ST4L3 2NDHARM DIRL1 DIRL2 DIRL3 Description Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3 Start signal from step3 phase L1 Start signal from step3 phase L2 Start signal from step3 phase L3 Start signal from step4 phase L1 Start signal from step4 phase L2 Start signal from step4 phase L3 Block from second harmonic detection Direction for phase1 Direction for phase2 Direction for phase3

6.2.5

Setting parameters
Table 112:
Parameter MeasType

Basic general settings for the OC4PTOC_51_67 (TOC1-) function


Range DFT RMS Step Default DFT Unit Description Selection between DFT and RMS measurement

Table 113:
Parameter Operation IBase UBase AngleRCA AngleROA StartPhSel

Basic parameter group settings for the OC4PTOC_51_67 (TOC1-) function


Range Off On 1 - 99999 0.05 - 2000.00 40 - 65 40 - 89 Not Used 1 out of 3 2 out of 3 3 out of 3 Step 1 0.05 1 1 Default Off 3000 400.00 55 80 1 out of 3 Unit A kV Deg Deg Description Operation Off / On Base current Base voltage Relay characteristic angle (RCA) Relay operation angle (ROA) Number of phases required for op (1 of 3, 2 of 3, 3 of 3)

Table continued on next page

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Parameter DirMode1 Range Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 Step Default Non-directional Unit Description Directional mode of step 1 (off, nodir, forward, reverse) Selection of time delay curve type for step 1

Characterist1

ANSI Def. Time

I1>

1000

%IB

Phase current operate level for step1 in % of IBase Definitive time delay of step 1 Time multiplier for the inverse time delay for step 1 Minimum operate time for inverse curves for step 1 Multiplier for current operate level for step 1 Directional mode of step 2 (off, nodir, forward, reverse)

t1 k1

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.000 0.05

s -

t1Min

0.000 - 60.000

0.001

0.000

I1Mult

1.0 - 10.0

0.1

2.0

DirMode2

Off Non-directional Forward Reverse

Non-directional

Table continued on next page

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Parameter Characterist2 Range ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 Step Default ANSI Def. Time Unit Description Selection of time delay curve type for step 2

I2>

500

%IB

Phase current operate level for step2 in % of IBase Definitive time delay of step 2 Time multiplier for the inverse time delay for step 2 Multiplier for current operate level for step 2 Minimum operate time for inverse curves for step 2 Directional mode of step 3 (off, nodir, forward, reverse) Selection of time delay curve type for step 3

t2 k2

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.400 0.05

s -

I2Mult

1.0 - 10.0

0.1

2.0

t2Min

0.000 - 60.000

0.001

0.000

DirMode3

Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

Non-directional

Characterist3

ANSI Def. Time

I3>

250

%IB

Phase current operate level for step3 in % of IBase

Table continued on next page

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Parameter t3 k3 Range 0.000 - 60.000 0.05 - 999.00 Step 0.001 0.01 Default 0.800 0.05 Unit s Description Definitive time delay of step 3 Time multiplier for the inverse time delay for step 3 Minimum operate time for inverse curves for step 3 Multiplier for current operate level for step 3 Directional mode of step 4 (off, nodir, forward, reverse) Selection of time delay curve type for step 4

t3Min

0.000 - 60.000

0.001

0.000

I3Mult

1.0 - 10.0

0.1

2.0

DirMode4

Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

Non-directional

Characterist4

ANSI Def. Time

I4>

175

%IB

Phase current operate level for step4 in % of IBase Definitive time delay of step 4 Time multiplier for the inverse time delay for step 4 Minimum operate time for inverse curves for step 4 Multiplier for current operate level for step 4

t4 k4

0.000 - 60.000 0.05 - 999.00

0.001 0.01

2.000 0.05

s -

t4Min

0.000 - 60.000

0.001

0.000

I4Mult

1.0 - 10.0

0.1

2.0

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Table 114:
Parameter IMinOpPhSel

Advanced parameter group settings for the OC4PTOC_51_67 (TOC1-) function


Range 1 - 100 Step 1 Default 7 Unit %IB Description Minimum current for phase selection in % of IBase Operate level of 2nd harm restrain op in % of Fundamental Selection of reset curve type for step 1 Reset time delay used in IEC Definite Time curve step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Enable block of step 1 from harmonic restrain Selection of reset curve type for step 2 Reset time delay used in IEC Definite Time curve step 2 Parameter P for customer programmable curve for step 2

2ndHarmStab

5 - 100

20

%IB

ResetTypeCrv1

Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Instantaneous

tReset1

0.001

0.020

tPCrv1

0.005 - 3.000

0.001

1.000

tACrv1

0.005 - 200.000

0.001

13.500

tBCrv1

0.00 - 20.00

0.01

0.00

tCCrv1

0.1 - 10.0

0.1

1.0

tPRCrv1

0.005 - 3.000

0.001

0.500

tTRCrv1

0.005 - 100.000

0.001

13.500

tCRCrv1

0.1 - 10.0

0.1

1.0

HarmRestrain1

Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Off

ResetTypeCrv2

Instantaneous

tReset2

0.001

0.020

tPCrv2

0.005 - 3.000

0.001

1.000

Table continued on next page

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Parameter tACrv2 Range 0.005 - 200.000 Step 0.001 Default 13.500 Unit Description Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Enable block of step 2 from harmonic restrain Selection of reset curve type for step 3 Reset time delay used in IEC Definite Time curve step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve for step 3 Parameter PR for customer programmable curve for step 3

tBCrv2

0.00 - 20.00

0.01

0.00

tCCrv2

0.1 - 10.0

0.1

1.0

tPRCrv2

0.005 - 3.000

0.001

0.500

tTRCrv2

0.005 - 100.000

0.001

13.500

tCRCrv2

0.1 - 10.0

0.1

1.0

HarmRestrain2

Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Off

ResetTypeCrv3

Instantaneous

tReset3

0.001

0.020

tPCrv3

0.005 - 3.000

0.001

1.000

tACrv3

0.005 - 200.000

0.001

13.500

tBCrv3

0.00 - 20.00

0.01

0.00

tCCrv3

0.1 - 10.0

0.1

1.0

tPRCrv3

0.005 - 3.000

0.001

0.500

Table continued on next page

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Parameter tTRCrv3 Range 0.005 - 100.000 Step 0.001 Default 13.500 Unit Description Parameter TR for customer programmable curve for step 3 Parameter CR for customer programmable curve for step 3 Enable block of step3 from harmonic restrain Selection of reset curve type for step 4 Reset time delay used in IEC Definite Time curve step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve for step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve for step 4 Parameter PR for customer programmable curve for step 4 Parameter TR for customer programmable curve for step 4 Parameter CR for customer programmable curve for step 4 Enable block of step 4 from harmonic restrain

tCRCrv3

0.1 - 10.0

0.1

1.0

HarmRestrain3

Off On Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Off

ResetTypeCrv4

Instantaneous

tReset4

0.001

0.020

tPCrv4

0.005 - 3.000

0.001

1.000

tACrv4

0.005 - 200.000

0.001

13.500

tBCrv4

0.00 - 20.00

0.01

0.00

tCCrv4

0.1 - 10.0

0.1

1.0

tPRCrv4

0.005 - 3.000

0.001

0.500

tTRCrv4

0.005 - 100.000

0.001

13.500

tCRCrv4

0.1 - 10.0

0.1

1.0

HarmRestrain4

Off On

Off

6.2.6

Technical data

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Table 115:
Function Operate current Reset ratio

Four step phase overcurrent protection (POCM, 51/67)


Setting range (1-2500)% of lbase > 95% (1-100)% of lbase (-70.0 -50.0) degrees (40.070.0) degrees (75.090.0) degrees (5100)% of fundamental (0.000-60.000) s (0.000-60.000) s 19 curve types 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir 2.0 degrees 2.0 degrees 2.0 degrees 2.0% of Ir 0.5% 10 ms 0.5% 10 ms See table 517 and table 518 -

Min. operating current Relay characteristic angle (RCA) Maximum forward angle Minimum forward angle Second harmonic blocking Independent time delay Minimum operate time Inverse characteristics, see table 517 and table 518 Operate time, start function Reset time, start function Critical impulse time Impulse margin time

6.3

Instantaneous residual overcurrent protection (PIOC, 50N)


Function block name: IEFxANSI number: 50N IEC 61850 logical node name: EFPIOC IEC 60617 graphical symbol:

IN>>

6.3.1

Introduction
The single input overcurrent function has a low transient overreach and short tripping times to allow use for instantaneous earth fault protection, with the reach limited to less than typical eighty percent of the line at minimum source impedance. The function can be configured to measure the residual current from the three phase current inputs or the current from a separate current input.

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Section 6 Current protection 6.3.2 Principle of operation


The sampled analogue residual currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of the residual current the RMS value is derived. This current value is fed to the IEF function. In a comparator the RMS value is compared to the set operation current value of the function (IN>>). If the residual current is larger than the set operation current a signal from the comparator is set to true. This signal will, without delay, activate the output signal TRIP. There is also a possibility to activate a preset change of the set operation current via a binary input (enable multiplier MULTEN). In some applications the operation value needs to be changed, for example due to transformer inrush currents. The function can be blocked from the binary input BLOCK. The trip signals from the function can be blocked from the binary input BLKAR, that can be activated during single pole trip and autoreclosing sequences.

6.3.3

Function block
IEF1EFPIOC_50N I3P BLOCK BLKAR MULTEN TRIP

en06000269.vsd

Figure 108:

IEF function block

6.3.4

Input and output signals


Table 116:
Signal I3P BLOCK BLKAR MULTEN

Input signals for the EFPIOC_50N (IEF1-) function block


Description Three phase currents Block of function Block input for auto reclose Enable current multiplier

Table 117:
Signal TRIP

Output signals for the EFPIOC_50N (IEF1-) function block


Description Trip signal

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Table 118:
Parameter Operation IBase IN>>

Basic parameter group settings for the EFPIOC_50N (IEF1-) function


Range Off On 1 - 99999 1 - 2500 Step 1 1 Default Off 3000 200 Unit A %IB Description Operation Off / On Base current Operate residual current level in % of IBase

Table 119:
Parameter StValMult

Advanced parameter group settings for the EFPIOC_50N (IEF1-) function


Range 0.5 - 5.0 Step 0.1 Default 1.0 Unit Description Multiplier for operate current level

6.3.6

Technical data
Table 120:
Function Operate current Reset ratio Operate time Reset time Critical impulse time Operate time Reset time Critical impulse time Dynamic overreach

Instantaneous residual overcurrent protection (PIOC, 50N)


Range or value (1-2500)% of lbase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at t = 100 ms Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir -

6.4

Four step residual overcurrent protection (PTOC, 51N/67N)

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Function block name: TEFxANSI number:51N/ 67N IEC 61850 logical node name: EF4PTOC

IEC 60617 graphical symbol:

IN 4 4 alt

6.4.1

Introduction
The four step residual single input overcurrent function has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined characteristic. A second harmonic blocking can be set individually for each step. The function can be used as main protection for phase to earth faults. The function can be used to provide a system back-up e.g. in the case of the primary protection being out of service due to communication or voltage transformer circuit failure. Directional operation can be combined together with corresponding communication blocks into permissive or blocking teleprotection scheme. Current reversal and weakend infeed functionality are available as well. The function can be configured to measure the residual current from the three phase current inputs or the current from a separate current input.

6.4.2

Principle of operation
This function has the following three Analog Inputs on its function block in the configuration tool: 1. 2. 3. I3P, input for the function Operating Quantity. U3P, input for the function Voltage Polarizing Quantity. IP3P, input for the function Current Polarizing Quantity.

These inputs are connected from the corresponding pre-processing function blocks in the Configuration Tool within PCM.

6.4.2.1

Operating quantity within the function


The function always uses Residual Current (i.e. 3Io) for its operating quantity. The residual current can be:

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Section 6 Current protection

1.

directly measured (when a dedicated CT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF function input I3P). This dedicated IED 670 CT input can be for example connected to: parallel connection of current instrument transformers in all three phases (well known Holm-Green connection). one single core balance, current instrument transformer (i.e. cable CT). one single current instrument transformer located between power system star point and ground (i.e. current transformer located in the star point of a star connected transformer winding). one single current instrument transformer located between two parts of a protected object (i.e. current transformer located between two star points of double star shunt capacitor bank).

2.

calculated from three phase current input within IED 670 (when the fourth analog input into the pre-processing block connected to TEF function Analog Input I3P is not connected to a dedicated CT input of IED 670 in SMT tool). In such case the pre-processing block will calculate 3Io from the first three inputs into the pre-processing block by using the following formula:

I op = 3 Io = IL1 + IL2 + IL3


where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.

The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. The phasor magnitude is used within the TEF function to compare it with the set operation current value of the four stages (Pickup1, Pickup2, Pickup3 or Pickup4). If the residual current is larger than the set operation current and the step is used in non-directional mode a signal from the comparator for this step is set to true. This signal will, without delay, activate the output signal START for this step and a common START signal.

6.4.2.2

Internal polarizing facility of the function


A polarizing quantity is used within the function in order to determine the direction of the earth fault (i.e. Forward/Reverse). The function can be set to use voltage polarizing, current polarizing or dual polarizing. When Voltage Polarizing is selected the function will use the Residual Voltage (i.e. 3Uo) as polarizing quantity U3P. This voltage can be: 1. directly measured (when a dedicated VT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF

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Section 6 Current protection

2.

function input U3P). This dedicated IED 670 VT input shall be then connected to open delta winding of a three phase main VT. calculated from three phase voltage input within IED 670 (when the fourth analog input into the pre-processing block connected to TEF function Analogue Input U3P is NOT connected to a dedicated VT input of IED 670 in SMT tool). In such case the pre-processing block will calculate 3Uo from the first three inputs into the pre-processing block by using the following formula:

U VPol = 3 Uo = UL1 + UL 2 + UL3


where: UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages. Note! In order to use this all three phase-to-ground voltages must be connected to three IED 670 VT inputs.

The residual voltage is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual voltage is derived. This phasor is used, together with the phasor of the operating current, in order to determine the direction of the earth fault (i.e. Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter UpolMin. It shall be noted that 3Uo is used to determine the location of the earth fault.Thus the setting parameter ROT3U0, located under General Settings for Earth Fault function, has default value of ROT3U0=180 deg. This insures the required inversion of the polarizing voltage within the earth fault function. When Current Polarizing is selected the function will use the Residual Current (i.e. 3Io) as polarizing quantity IPol. This current can be: 1. directly measured (when a dedicated CT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF function input IP3P). This dedicated IED 670 CT input is then typically connected to one single current instrument transformer located between power system star point and ground (i.e. current transformer located in the star point of a star connected transformer winding). For some special line protection applications this dedicated IED 670 CT input can be connected to parallel connection of current instrument transformers in all three phases (well known Holm-Green connection)

2.

calculated from three phase current input within IED 670 (when the fourth analog input into the pre-processing block connected to TEF function Analog Input IP3P is NOT connected to a dedicated CT input of IED 670 in SMT tool). In such case

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the pre-processing block will calculate 3Io from the first three inputs into the pre-processing block by using the following formula:
I Pol = 3 Io = IL1 + IL 2 + IL 3
where: IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents. However this option can be as well only used for some special line protection applications as explained in the Application Manual. (Equation 70)

The residual polarizing current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. This phasor is then multiplied with pre-set equivalent Zero Sequence Source Impedance in order to calculate equivalent Polarizing Voltage UIPol in accordance with the following formula:
U IPol = ZoS I Pol = (RNPol+j XNPol) I Pol
(Equation 71)

which will be then used, together with the phasor of the operating current, in order to determine the direction of the earth fault (i.e. Forward/Reverse). In order to enable current polarizing the magnitude of polarizing current shall be bigger than a minimum level defined by setting parameter IPollMin. When Dual Polarizing is selected the function will use the vectorial sum of the voltage based and current based polarizing in accordance with the following formula:
U TotPol = U UPol + U IPol = 3Uo + ZoS I Pol = 3Uo + (RNPol+j XNPol) I Pol
(Equation 72)

Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor of the operating current, to determine the direction of the earth fault (i.e. Forward/Reverse).

6.4.2.3

External polarizing facility for EFGround Fault function


The individual stages within the function can be set as non-directional. When this setting is selected it is then possible via function binary input BLKSTx (where x indicates the relevant step within the function) to provide external directional control (i.e. torque control) by for example using one of the following functions available in IED 670:

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1. 2.

Distance protection directional unit. Negative sequence polarized General current and voltage multi purpose protection function.

6.4.2.4

Base quantities within the function


The base quantities shall be entered as setting parameters for every EF function. Base current shall be entered as rated phase current of the protected object in primary amperes. Base voltage shall be entered as rated phase-to-phase voltage of the protected object in primary kV.

6.4.2.5

Internal EFGround Fault function structure


The function is internally divided into the following parts: 1. 2. 3. 4. Four residual overcurrent stages. Directional supervision element for residual overcurrent stages with integrated Directional Comparison stage for communication based earth fault protection schemes (i.e. permissive or blocking). Second harmonic blocking element with additional feature for sealed-in blocking during switching of parallel transformers. Switch on to fault feature with integrated Under-Time logic for detection of breaker problems during breaker opening or closing sequence.

Each part is described separately in the following paragraphs.

6.4.2.6

Four residual overcurrent stages


Each overcurrent stage uses Operating Quantity IOp (i.e. Residual Current) as measuring quantity. Every of the four residual overcurrent stage has the following built-in facilities: Operating mode (i.e. Off / Non-directional / Forward / Reverse). By this parameter setting the operating mode of the stage is selected. It shall be noted that the directional decision (i.e. Forward/Reverse) is not made within residual overcurrent stage itself. The direction of the fault is determined in common Directional Supervision Element described in the next paragraph. Residual current pickup value. Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is possible to select Inverse or definite time delay for earth fault function. Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of available inverse curves please refer to Chapter "Time inverse characteristics" Type of reset characteristic (Instantaneous / IEC Reset /ANSI Rest). By this parameter setting it is possible to select the reset characteristic of the stage. For the complete list of available reset curves please refer to Chapter "Time inverse characteristics" REG 670

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Time delay related settings. By these parameter settings the properties like definite time delay, minimum operating time for inverse curves, reset time delay and parameters to define user programmable inverse curve are defined. Supervision by second harmonic blocking feature (i.e. On/Off). By this parameter setting it is possible to prevent operation of the stage if the second harmonic content in the residual current exceeds the pre-set level. Multiplier for scaling of the set residual current pickup value by external binary signal. By this parameter setting it is possible to increase residual current pickup value when function binary input ENMULTx has logical value 1.

Simplified logic diagram for one residual overcurrent stage is shown in the following figure:
BLKTR Characteristx=DefTime
a b a>b

|IOP| ENMULTx INxMult INx> BLKSTx BLOCK 2ndH_BLOCK_Int HarmRestrain1=Disabled DirModex=Off DirModex=Non-directional DirModex=Forward DirModex=Reverse

tx
OR

AND

TRINx

T F

AND

STINx

Inverse

Characteristx=Inverse

OR

OR

STAGEx_DIR_Int

FORWARD_Int

AND

OR

REVERSE_Int

AND

en07000064.vsd

Figure 109:

Simplified logic diagram for residual overcurrent stage x , where x=1, 2 ,3 or 4

The function can be completely blocked from the binary input BLOCK. The start signals from the function for each stage can be blocked from the binary input BLKSTx. The trip signals from the function can be blocked from the binary input BLKTR.

6.4.2.7

Directional supervision element with integrated directional comparision stage


It shall be noted that at least one of the four residual overcurrent stages shall be set as directional in order to enable execution of the

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Section 6 Current protection

directional supervision element and the integrated directional comparison stage. The function has integrated directional feature. As the operating quantity current IOp is always used. The polarizing method is determined by the parameter setting polMethod. The polarizing quantity will be selected by the function in one of the following three ways: 1. 2. 3. When polMethod=Voltage, UVPol will be used as polarizing quantity. When polMethod=Current, UIPol will be used as polarizing quantity. When polMethod=Dual, UTotPol will be used as polarizing quantity.

The operating and polarizing quantity are then used inside the directional element, as shown in the following figure, in order to determine the direction of the earth fault.

Reverse Area

0.4*IN>Dir

AngleRCA 0.4*IN>Dir

Upol=-3Uo

Forward Area Iop=3Io

en07000066.vsd

Figure 110:

Operating characteristic for earth fault directional element

Two relevant setting parameters for directional supervision element are:

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Operating Current Pickup IN>Dir. However it shall be noted that the directional element will be internally enabled to operate as soon as IOp cos( - AngleRCA) is bigger then 40% of IN>Dir. Relay characteristic angle AngleRCA which defines the position of Forward & Reverse areas in the operating characteristic.

Directional Comparison stage, built-in within directional supervision element, will set EF function output binary signal: 1. 2. STFW=1 when Operating Quantity magnitude is bigger than setting parameter IN>Dir and directional supervision element detects fault in forward direction. STRV=1 when Operating Quantity magnitude is bigger than 60% of setting parameter IN>Dir and directional supervision element detects fault in reverse direction.

These signals shall be used for communication based earth fault teleprotection schemes (i.e. permissive or blocking). Simplified logic diagram for directional supervision element with integrated directional comparison stage is shown in the following figure:

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Section 6 Current protection

|IOP|

a b

a>b

REVERSE_Int

AND

STRV

0.6

X
a a>b b

IN>Dir

FORWARD_Int

AND

STFW

0.4

FWD

PolMethod=Voltage PolMethod=Current PolMethod=Dual

OR

UPolMin UPol 0.0 IPolMin

OR

T F

IOP UTotPol

IPol RNPol XNPol

Directional Characteristic

AngleRCA

AND

FORWARD_Int

AND RVS COMPLEX NUMBER

REVERSE_Int

UIPol 0.0

T F
STAGE1_DIR_Int STAGE2_DIR_Int STAGE3_DIR_Int STAGE4_DIR_Int

OR

BLOCK

AND

en07000067.vsd

Figure 111:

Simplified logic diagram for directional supervision element with integrated directional comparison stage

6.4.2.8

Second harmonic blocking element


A harmonic restrain of the function can be chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency component in the residual current exceeds the pre-set level (defined by parameter setting 2ndHarmStab) any of the four residual overcurrent stages can be selectively blocked by a parameter setting HarmRestrainx. When 2nd harmonic restraint feature is active the EF function output signal 2NDHARMD will be set to logical value one. In addition to the basic functionality explained above the 2nd harmonic blocking can be set in such way to seal-in until residual current disappears. This feature might be required to stabilize the EF function during switching of parallel transformers in the station. In case of parallel transformers there is a risk of sympathetic inrush current. If one of the transformers is in operation, and the parallel transformer is switched in, the asymmetric inrush current of the switched in transformer will cause partial

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Section 6 Current protection

saturation of the transformer already in service. This is called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers will be in phase opposition. The summation of the two currents will thus give a small 2nd harmonic current. The residual fundamental current will however be significant. The inrush current of the transformer in service before the parallel transformer energizing, will be a little delayed compared to the first transformer. Therefore we will have high 2nd harmonic current component initially. After a short period this current will however be small and the normal 2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will be latched as long as the residual current measured by the relay is larger than a selected step current level. This feature has been called Block for Parallel Transformers. This 2nd harmonic sealin feature will be activated when all of the following three conditions are simultaneously fulfilled: 1. 2. 3. Feature is enabled by entering setting parameter BlkParTransf=On. Basic 2nd harmonic restraint feature has been active for at least 70 ms. Residual current magnitude is higher than the set start value for one of the four residual overcurrent stages. By a parameter setting UseStartValue it is possible to select which one of the four start values that will be used (i.e. IN1> or IN2> or IN3> or IN4>).

Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will be sealed-in until the residual current magnitude falls below a value defined by parameter setting UseStartValue (see condition 3 above). Simplified logic diagram for 2nd harmonic blocking feature is shown in the following figure:

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BLOCK 2ndHarmStab IOP

X
a b a>b OR

Extract second harmonic current component Extract fundamental current component t=70ms t BlkParTransf=On
|IOP|
a b a>b OR

2NDHARMD

q-1

AN D

OR

2ndH_BLOCK_Int

UseStartValue IN1> IN2> IN3> IN4>

en07000068.vsd

Figure 112:

Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers feature

6.4.2.9

Switch on to fault feature


Integrated in the four step residual overcurrent protection are Switch on to fault logic (SOTF) and Under-Time logic. The setting parameter SOTF is set to activate either SOTF or Under-Time logic or both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for example during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during such situations. The time during which SOTF and Under-Time logics will be active after activation is defined by the setting parameter t4U. The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker position or from circuit breaker close command pulse. The setting parameter ActivationSOTF can be set for activation of CB position open change, CB position closed change or CB close command. In case of a residual current start from step 2 or 3 (dependent on setting) the function will give a trip after a set delay tSOTF. This delay is normally set to a short time (default 100 ms). The Under-Time logic always uses the start signal from the step 4. The Under-Time logic will normally be set to operate for a lower current level than the SOTF function. The Under-Time logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB poles immediately

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after switching of the circuit breaker. The Under-Time logic is activated either from change in circuit breaker position or from circuit breaker close and open command pulses. This selection is done by setting parameter ActUnderTime. In case of a start from step 4 this logic will give a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit breaker pole-discordance protection, but it is only active immediately after breaker switching. The Under-Time logic can only be used in solidly or low impedance grounded systems.

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236
Setting tpulse posClsPls AND PwrMode tpulse SOTFActive operationMode AND AND closeCBPls OR TON IN Q PT ET AND AND Exec Exec NOT Setting Setting onOrOffPos PwrMode tpulse UTimeActive activationUnderTime switchOntoFaultDelayTime PwrMode block step2Or3in AND Setting False PwrMode start Exec NOT tpulse posOpnPls cbClosed activationSOTF

Figure 113:
SOTF

Exec

cbPosition

EF Logic Diagram Simplified logic diagram for the complete EF function is shown in the following Figure 1:
Under Time
OR OR opnOrClsCBPls AND Setting Exec Exec step4in AND harmonic2ndRestraint NOT cbSwitchingFaultDelayTime AND OR TON IN Q PT ET AND

Technical reference manual 1MRK502013-UEN rev. B

Exec

closeCB

operate

Exec

Exec

en06000643.vsd

Simplified logic diagram for SOTF and Under-Time features

REG 670

Section 6 Current protection

Directional Check Element

signal to communication scheme

INPol 3U0 3I0 DirMode enableDir

Direction Element

operatingCurrent earthFaultDirection angleValid

4 step over current element One element for each step

TRIP

3I0

Harmonic Restraint Element

harmRestrBlock

start step 2, 3 and 4 Blocking at parallel transformers SwitchOnToFault CB pos or cmd TRIP

Mode Selection

DirMode enableDir enableStep1-4 DirectionalMode1-4

en06000376.vsd

Figure 114:

Functional overview of TEF

6.4.3

Function block
TEF1EF4PTOC_51N67N I3P U3P I3PPOL BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 CBPOS CLOSECB OPENCB TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF STFW STRV 2NDHARMD

en06000424.vsd

Figure 115:

TEF1 function block

6.4.4
REG 670

Input and output signals


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Section 6 Current protection

Table 121:
Signal I3P U3P I3PPOL BLOCK BLKTR BLKST1 BLKST2 BLKST3 BLKST4 ENMULT1 ENMULT2 ENMULT3 ENMULT4 CBPOS CLOSECB OPENCB

Input signals for the EF4PTOC_51N67N (TEF1-) function block


Description Current connection Polarizing voltage connection Polarizing current connection Block of function Block of trip Block of step 1 (Start and trip) Block of step 2 (Start and trip) Block of step 3 (Start and trip) Block of step 4 (Start and trip) When activated, the current multiplier is in use for step1 When activated, the current multiplier is in use for step2 When activated, the current multiplier is in use for step3 When activated, the current multiplier is in use for step4 Breaker position Breaker close command Breaker open command

Table 122:
Signal TRIP TRIN1 TRIN2 TRIN3 TRIN4 TRSOTF START STIN1 STIN2 STIN3 STIN4 STSOTF STFW STRV 2NDHARMD

Output signals for the EF4PTOC_51N67N (TEF1-) function block


Description Trip Trip signal from step 1 Trip signal from step 2 Trip signal from step 3 Trip signal from step 4 Trip signal from earth fault switch onto fault function General start signal Start signal step 1 Start signal step 2 Start signal step 3 Start signal step 4 Start signal from earth fault switch onto fault function Forward directional start signal Reverse directional start signal 2nd harmonic block signal

6.4.5
238

Setting parameters
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Section 6 Current protection

Table 123:
Parameter Operation IBase UBase AngleRCA polMethod

Basic parameter group settings for the EF4PTOC_51N67N (TEF1-) function


Range Off On 1 - 99999 0.05 - 2000.00 -180 - 180 Voltage Current Dual 1 - 100 Step 1 0.05 1 Default Off 3000 400.00 65 Voltage Unit A kV Deg Description Operation Off / On Base value for current settings Base value for voltage settings Relay characteristic angle (RCA) Type of polarization

UPolMin

%UB

Minimum voltage level for polarization in % of UBase Minimum current level for polarization in % of IBase Real part of source Z to be used for current polarisation Imaginary part of source Z to be used for current polarisation Residual current level for Direction release in % of IBase Second harmonic restrain operation in % of IN amplitude Enable blocking at parallel transformers Current level blk at parallel transf (step1, 2, 3 or 4) SOTF operation mode (Off/SOTF/ Undertime/SOTF +undertime) Select signal that shall activate SOTF Selection of step used for SOTF Enable harmonic restrain function in SOTF Time delay for SOTF

IPolMin

2 - 100

%IB

RNPol

0.50 - 1000.00

0.01

5.00

ohm

XNPol

0.50 - 3000.00

0.01

40.00

ohm

IN>Dir

1 - 100

10

%IB

2ndHarmStab

5 - 100

20

BlkParTransf UseStartValue

Off On IN1> IN2> IN3> IN4> Off SOTF UnderTime SOTF +UnderTime Open Closed CloseCommand Step 2 Step 3 Off On 0.000 - 60.000

Off IN4>

SOTF

Off

ActivationSOTF

Open

StepForSOTF HarmResSOTF

Step 2 Off

tSOTF

0.001

0.200

Table continued on next page

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Section 6 Current protection


Parameter t4U DirMode1 Range 0.000 - 60.000 Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 Step 0.001 Default 1.000 Non-directional Unit s Description Switch-onto-fault active time Directional mode of step 1 (off, nodir, forward, reverse) Time delay curve type for step 1

Characterist1

ANSI Def. Time

IN1>

100

%IB

Operate residual current level for step 1 in % of IBase Independent (defenite) time delay of step 1 Time multiplier for the dependent time delay for step 1 Multiplier for scaling the current setting value for step 1 Minimum operate time for inverse curves for step 1 Enable block of step 1 from harmonic restrain Directional mode of step 2 (off, nodir, forward, reverse)

t1

0.000 - 60.000

0.001

0.000

k1

0.05 - 999.00

0.01

0.05

IN1Mult

1.0 - 10.0

0.1

2.0

t1Min

0.000 - 60.000

0.001

0.000

HarmRestrain1

Off On Off Non-directional Forward Reverse

On

DirMode2

Non-directional

Table continued on next page

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Section 6 Current protection


Parameter Characterist2 Range ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 Step Default ANSI Def. Time Unit Description Time delay curve type for step 2

IN2>

50

%IB

Operate residual current level for step 2 in % of IBase Independent (definitive) time delay of step 2 Time multiplier for the dependent time delay for step 2 Multiplier for scaling the current setting value for step 2 Minimum operate time for inverse curves step 2 Enable block of step 2 from harmonic restrain Directional mode of step 3 (off, nodir, forward, reverse) Time delay curve type for step 3

t2

0.000 - 60.000

0.001

0.400

k2

0.05 - 999.00

0.01

0.05

IN2Mult

1.0 - 10.0

0.1

2.0

t2Min

0.000 - 60.000

0.001

0.000

HarmRestrain2

Off On Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type

On

DirMode3

Non-directional

Characterist3

ANSI Def. Time

Table continued on next page

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Section 6 Current protection


Parameter IN3> Range 1 - 2500 Step 1 Default 33 Unit %IB Description Operate residual current level for step 3 in % of IBase Independent time delay of step 3 Time multiplier for the dependent time delay for step 3 Multiplier for scaling the current setting value for step 3 Minimum operate time for inverse curves for step 3 Enable block of step 3 from harmonic restrain Directional mode of step 4 (off, nodir, forward, reverse) Time delay curve type for step 4

t3 k3

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.800 0.05

s -

IN3Mult

1.0 - 10.0

0.1

2.0

t3Min

0.000 - 60.000

0.001

0.000

HarmRestrain3

Off On Off Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

On

DirMode4

Non-directional

Characterist4

ANSI Def. Time

IN4>

17

%IB

Operate residual current level for step 4 in % of IBase Independent (definitive) time delay of step 4 Time multiplier for the dependent time delay for step 4 Multiplier for scaling the current setting value for step 4 Minimum operate time in inverse curves step 4 Enable block of step 4 from harmonic restrain

t4

0.000 - 60.000

0.001

1.200

k4

0.05 - 999.00

0.01

0.05

IN4Mult

1.0 - 10.0

0.1

2.0

t4Min

0.000 - 60.000

0.001

0.000

HarmRestrain4

Off On

On

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Section 6 Current protection

Table 124:
Parameter ActUnderTime

Advanced parameter group settings for the EF4PTOC_51N67N (TEF1-) function


Range CB position CB command Step Default CB position Unit Description Select signal to activate under time (CB Pos/ CBCommand) Time delay for under time Reset curve type for step 1 Reset curve type for step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Reset curve type for step 2 Reset curve type for step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2

tUnderTime ResetTypeCrv1

0.000 - 60.000 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

0.001 -

0.300 Instantaneous

s -

tReset1 tPCrv1

0.001 0.001

0.020 1.000

s -

tACrv1

0.005 - 200.000

0.001

13.500

tBCrv1

0.00 - 20.00

0.01

0.00

tCCrv1

0.1 - 10.0

0.1

1.0

tPRCrv1

0.005 - 3.000

0.001

0.500

tTRCrv1

0.005 - 100.000

0.001

13.500

tCRCrv1

0.1 - 10.0

0.1

1.0

ResetTypeCrv2

Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

Instantaneous

tReset2 tPCrv2

0.001 0.001

0.020 1.000

s -

tACrv2

0.005 - 200.000

0.001

13.500

Table continued on next page

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Parameter tBCrv2 Range 0.00 - 20.00 Step 0.01 Default 0.00 Unit Description Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Reset curve type for step 3 Reset curve type for step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve step 3 Parameter PR for customer programmable curve step 3 Parameter TR for customer programmable curve step 3 Parameter CR for customer programmable curve for step 3

tCCrv2

0.1 - 10.0

0.1

1.0

tPRCrv2

0.005 - 3.000

0.001

0.500

tTRCrv2

0.005 - 100.000

0.001

13.500

tCRCrv2

0.1 - 10.0

0.1

1.0

ResetTypeCrv3

Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

Instantaneous

tReset3 tPCrv3

0.001 0.001

0.020 1.000

s -

tACrv3

0.005 - 200.000

0.001

13.500

tBCrv3

0.00 - 20.00

0.01

0.00

tCCrv3

0.1 - 10.0

0.1

1.0

tPRCrv3

0.005 - 3.000

0.001

0.500

tTRCrv3

0.005 - 100.000

0.001

13.500

tCRCrv3

0.1 - 10.0

0.1

1.0

Table continued on next page

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Parameter ResetTypeCrv4 Range Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000 Step Default Instantaneous Unit Description Reset curve type for step 4 Reset curve type for step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve step 4 Parameter PR for customer programmable curve step 4 Parameter TR for customer programmable curve step 4 Parameter CR for customer programmable curve step 4

tReset4 tPCrv4

0.001 0.001

0.020 1.000

s -

tACrv4

0.005 - 200.000

0.001

13.500

tBCrv4

0.00 - 20.00

0.01

0.00

tCCrv4

0.1 - 10.0

0.1

1.0

tPRCrv4

0.005 - 3.000

0.001

0.500

tTRCrv4

0.005 - 100.000

0.001

13.500

tCRCrv4

0.1 - 10.0

0.1

1.0

6.4.6

Technical data
Table 125:
Function Operate current Reset ratio Operate current for directional comparison Timers Inverse characteristics, see table 517 and table 518 Second harmonic restrain operation Relay characteristic angle Table continued on next page

Four step residual overcurrent protection (PEFM, 51N/67N)


Range or value (1-2500)% of lbase > 95% (1100)% of lbase (0.000-60.000) s 19 curve types (5100)% of fundamental (-180 to 180) degrees Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir 0.5% 10 ms See table 517 and table 518 2.0% of Ir 2.0 degrees

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Function Minimum polarizing voltage Minimum polarizing current RNS, XNS Operate time, start function Reset time, start function Critical impulse time Impulse margin time Range or value (1100)% of Ubase (130)% of Ibase (0.503000.00) W/phase 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically Accuracy 0.5% of Ur 0.25% of Ir -

6.5

Sensitive directional residual overcurrent and power protection (PSDE, 67N)


Function block name: SDExANSI number: 67N IEC 61850 logical node name: SDEPSDE IEC 60617 graphical symbol:

6.5.1

Introduction
In networks with high impedance earthing, the phase to earth fault current is significantly smaller than the short circuit currents. Another difficulty for earth fault protection is that the magnitude of the phase to earth fault current is almost independent of the fault location in the network. Directional residual current can be used to detect and give selective trip of phase to earth faults in high impedance earthed networks. The protection uses the residual current component 3I0 cos , where is the angle between the residual current and the residual voltage, compensated with a characteristic angle. Alternatively the function can be set to strict 3I0 level with an check of angle 3I0 and cos . Directional residual power can be used to detect and give selective trip of phase to earth faults in high impedance earthed networks. The protection uses the residual power component 3I03U0 cos , where is the angle between the residual current and the reference residual voltage, compensated with a characteristic angle. A normal undirectional residual current function can also be used and be with definite or inverse time delay. A back-up neutral point voltage function is also available for undirectional sensitive back-up protection.

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In an isolated network, i.e. the network is only coupled to earth via the capacitances between the phase conductors and earth, the residual current always has -90 phase shift compared to the reference residual voltage. The characteristic angle is chosen to -90 in such a network. In resistance earthed networks or in Petersen coil, with a parallel resistor, the active residual current component (in phase with the residual voltage) should be used for the earth fault detection. In such networks the characteristic angle is chosen to 0. As the amplitude of the residual current is independent of the fault location the selectivity of the earth fault protection is achieved by time selectivity. When should the sensitive directional residual overcurrent protection be used and when should the sensitive directional residual power protection be used? We have the following facts to consider: Sensitive directional residual overcurrent protection gives possibility for better sensitivity Sensitive directional residual power protection gives possibility to use inverse time characteristics. This is applicable in large high impedance earthed networks, with large capacitive earth fault current In some power systems a medium size neutral point resistor is used. Such a resistor will give a resistive earth fault current component of about 200 - 400 A at a zero resistive phase to earth fault. In such a system the directional residual power protection gives better possibilities for selectivity enabled by inverse time power characteristics.

6.5.2
6.5.2.1

Principle of operation
Introduction
The function is using phasors of the residual current and voltage. Group signals I3P and U3P containing phasors of residual current and voltage is taken from preprocessor blocks. The sensitive directional earth fault protection has the following sub-functions included:

Directional residual current protection measuring 3I0 cos

is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)-ang(Uref) ). Uref = -3U0 ejRCADir. RCAdir is normally set equal to 0 in a high impedance earthed network with a neutral point resistor as the active current component is appearing out on the faulted feeder only. RCAdir is set equal to -90 in an isolated

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network as all currents are mainly capacitive. The function operates when 3I0 cos gets larger than the set value.
Uref RCA = 0, ROA = 90

3I0

= ang(3I0) - ang(3Uref) 3I0 cos -3U0=Uref

en06000648.vsd

Figure 116:

RCADir set to 0
Uref RCA = -90, ROA = 90

3I0 3I0 cos = ang(3I0) ang(Uref) -3U0

en06000649.vsd

Figure 117:

RCADir set to -90

For trip, both the residual current 3I0 cos and the release voltage 3U0, shall be larger than the set levels: INCosPhi> and UNRel>. Trip from this function can be blocked from the binary input BLKTRDIR.

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When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The trip from this sub-function has definite time delay. There is a possibility to increase the operate level for currents where the angle is larger than a set value as shown in the figure below. This is equivalent to blocking of the function if > ROADir. This option is used to handle angle error for the instrument transformers.

3I0

Operate area

3I0 cos ROA

-3U0=Uref

RCA = 0

en06000650.vsd

Figure 118:

Characteristic with ROADir restriction

The function will indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 cos ( + 180) the set value. It shall also be possible to tilt the characteristic to compensate for current transformer angle error with a setting RCAComp as shown in the figure below:

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Operate area

-3U0=Uref

RCA = 0

Instrument transformer angle error

RCAcomp Characteristic after angle compensation

3I0 (prim)

3I0 (to prot)

en06000651.vsd

Figure 119:

Explanation of RCAcomp.

is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)ang(Uref) ). Uref = -3U0 ejRCA. The function operates when 3I0 3U0 cos gets larger than the set value. For trip, both the residual power 3I03U0 cos , the residual current 3I0 and the release voltage 3U0, shall be larger than the set levels (SN>, INRel> and UNRel>). Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef or after the inverse time delay (setting kSN) the binary output signals TRIP and TRDIRIN are activated. The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 3U0 cos ( + 180) the set value. This variant has the possibility of choice between definite time delay and inverse time delay. The inverse time delay is defined as: 250 Technical reference manual 1MRK502013-UEN rev. B REG 670

Directional residual power protection measuring 3I0 3U0 cos

Section 6 Current protection

t inv =

kSN (3I 0 3U 0 cos f (reference)) 3I 0 3U 0 cos f (measured)


(Equation 73)

Directional residual current protection measuring 3I0 and

The function will operate if the residual current is larger that the set value and the angle = ang(3I0)-ang(Uref) is within the sector RCADir ROADir
RCA = 0 ROA = 80

Operate area 3I0 80 -3U0

en06000652.vsd

Figure 120:

Example of characteristic

For trip, both the residual current 3I0 and the release voltage 3U0, shall be larger than the set levels (INDir> and UNREL>) and the angle shall be in the set sector (ROADir and RCADir). Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals START and STDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The function indicate forward/reverse direction to the fault. Reverse direction is defined as is within the angle sector: RCADir + 180 ROADir This variant shall have definite time delay.

Directional functions

For all the directional functions there are directional start signals STFW: fault in the forward direction, and STRV: start in the reverse direction. Even if the directional REG 670 Technical reference manual 1MRK502013-UEN rev. B 251

Section 6 Current protection

function is set to operate for faults in the forward direction a fault in the reverse direction will give the start signal STRV. Also if the directional function is set to operate for faults in the reverse direction a fault in the forward direction will give the start signal STFW.

Non-directional earthground fault current protection

This function will measure the residual current without checking the phase angle. The function will be used to detect cross-country faults. This function can serve as alternative or back-up to distance protection with phase preference logic. To assure selectivity the distance protection can block the non-directional earth fault current function via the input BLKNDN. If available the non-directional function is using the calculated residual current, derived as sum of the phase currents. This will give a better ability to detect crosscountry faults with high residual current, also when dedicated core balance CT for the sensitive earth fault protection will saturate. This variant shall have the possibility of choice between definite time delay and inverse time delay. The inverse time delay shall be according to IEC 60255-3. For trip, the residual current 3I0 shall be larger than the set levels (INNonDir>). Trip from this function can be blocked from the binary input BLKNDN. When the function is activated binary output signal STNDIN is activated. If the activation is active after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP and TRNDIN are activated.

Residual overvoltage release and protection

The directional function shall be released when the residual voltage gets higher than a set level. There shall also be a separate trip, with its own definite time delay, from this set voltage level. For trip, the residual voltage 3U0 shall be larger than the set levels (UN>). Trip from this function can be blocked from the binary input BLKUN. When the function is activated binary output signal STUN is activated. If the activation is active after the set delay tUNNonDir TRIP and TRUN are activated. A simplified logical diagram of the total function is shown in figure 121.

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Section 6 Current protection

INNonDir> t UN> t
OpMODE=INcosPhi

STNDIN TRNDIN STUN TRUN

IN> INcosPhi>
OpMODE=INUNcosPhi

&

& INUNcosPhi> Phi in RCA +- ROA


OpMODE=IN and Phi

&
t

STARTDIRIN

SN TimeChar = InvTime

&

TRDIRIN

&
TimeChar = DefTime

&

DirMode = Forw Forw DirMode = Rev Rev

&

1 STFW

& STRV
en06000653.vsd

Figure 121:

Simplified logical diagram of the sensitive earth fault current protection

6.5.3

Function block
SDE1SDEPSDE_67N I3P U3P BLOCK BLKTR BLKTRDIR BLKNDN BLKUN TRIP TRDIRIN TRNDIN TRUN START STDIRIN STNDIN STUN STFW STRV STDIR UNREL en07000032.vsd

Figure 122:

SDE function block

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Section 6 Current protection 6.5.4 Input and output signals


Table 126:
Signal I3P U3P BLOCK BLKTR BLKTRDIR BLKNDN BLKUN

Input signals for the SDEPSDE_67N (SDE1-) function block


Description Group signal for current Group signal for voltage Blocks all the outputs of the function Blocks the operate outputs of the function Blocks the directional operate outputs of the function Blocks the Non directional current residual outputs Blocks the Non directional voltage residual outputs

Table 127:
Parameter IBase UBase SBase

Basic general settings for the SDEPSDE_67N (SDE1-) function


Range 1 - 99999 0.05 - 2000.00 0.05 200000000.00 Step 1 0.05 0.05 Default 100 63.50 6350.00 Unit A kV kVA Description Base Current, in A Base Voltage, in kV Phase to Neutral Base Power, in kVA. IBase*UBase

Table 128:
Parameter Operation OpMode

Basic parameter group settings for the SDEPSDE_67N (SDE1-) function


Range Off On 3I0Cosfi 3I03U0Cosfi 3I0 and fi Forward Reverse -179 - 180 -10.0 - 10.0 0 - 90 Step Default Off 3I0Cosfi Unit Description Operation Off/On Selection of operation mode for protection Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03U0cosFi, starting inv time count, in %Sb

DirMode RCADir RCAComp ROADir

1 0.1 1

Forward -90 0.0 90

Deg Deg Deg

INCosPhi>

0.25 - 200.00

0.01

1.00

%IB

SN>

0.25 - 200.00

0.01

10.00

%SB

Table continued on next page

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Parameter INDir> Range 0.25 - 200.00 Step 0.01 Default 5.00 Unit %IB Description Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of nondirectional residual overcurrent protection Set level for non directional residual over current, in %Ib Time delay for nondirectional residual over current, in sec Operation curve selection for IDMT operation

tDef

0.000 - 60.000

0.001

0.100

SRef

0.03 - 200.00

0.01

10.00

%SB

kSN

0.00 - 2.00

0.01

0.10

OpINNonDir>

Off On

Off

INNonDir>

1.00 - 400.00

0.01

10.00

%IB

tINNonDir

0.000 - 60.000

0.001

1.000

TimeChar

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 0.000 - 60.000

IEC Norm. inv.

tMin

0.001

0.040

Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of nondirectional residual overvoltage protection Set level for nondirectional residual over voltage, in %Ub

kIN

0.00 - 2.00

0.01

1.00

OpUN>

Off On

Off

UN>

1.00 - 200.00

0.01

20.00

%UB

Table continued on next page

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Section 6 Current protection


Parameter tUNNonDir Range 0.000 - 60.000 Step 0.001 Default 0.100 Unit s Description Time delay for nondirectional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Ub

INRel>

0.25 - 200.00

0.01

1.00

%IB

UNRel>

0.01 - 200.00

0.01

3.00

%UB

Table 129:
Parameter RotResU

Advanced general settings for the SDEPSDE_67N (SDE1-) function


Range 0 deg 180 deg Step Default 180 deg Unit Description Setting for rotating polarizing quantity if necessary

Table 130:
Parameter tReset

Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function


Range 0.000 - 60.000 Step 0.001 Default 0.040 Unit s Description Time delay used for reset of definite timers, in sec Setting P for customer programmable curve Setting A for customer programmable curve Setting B for customer programmable curve Setting C for customer programmable curve Reset mode when current drops off. Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve

tPCrv tACrv tBCrv tCCrv

0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0

0.001 0.001 0.01 0.1

1.000 13.500 0.00 1.0

ResetTypeCrv

Immediate IEC Reset ANSI reset 0.005 - 3.000

IEC Reset

tPRCrv

0.001

0.500

tTRCrv

0.005 - 100.000

0.001

13.500

tCRCrv

0.1 - 10.0

0.1

1.0

6.5.5

Setting parameters

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Table 131:
Parameter IBase UBase SBase

Basic general settings for the SDEPSDE_67N (SDE1-) function


Range 1 - 99999 0.05 - 2000.00 0.05 200000000.00 Step 1 0.05 0.05 Default 100 63.50 6350.00 Unit A kV kVA Description Base Current, in A Base Voltage, in kV Phase to Neutral Base Power, in kVA. IBase*Ubase

Table 132:
Parameter Operation OpMode

Basic parameter group settings for the SDEPSDE_67N (SDE1-) function


Range Off On 3I0Cosfi 3I03U0Cosfi 3I0 and fi Forward Reverse -179 - 180 -10.0 - 10.0 0 - 90 Step Default Off 3I0Cosfi Unit Description Operation Off / On Selection of operation mode for protection Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03U0cosFi, starting inv time count, in %Sb Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of nondirectional residual overcurrent protection Set level for non directional residual over current, in %Ib

DirMode RCADir RCAComp ROADir

1 0.1 1

Forward -90 0.0 90

Deg Deg Deg

INCosPhi>

0.25 - 200.00

0.01

1.00

%IB

SN>

0.25 - 200.00

0.01

10.00

%SB

INDir>

0.25 - 200.00

0.01

5.00

%IB

tDef

0.000 - 60.000

0.001

0.100

SRef

0.03 - 200.00

0.01

10.00

%SB

kSN

0.00 - 2.00

0.01

0.10

OpINNonDir>

Off On

Off

INNonDir>

1.00 - 400.00

0.01

10.00

%IB

Table continued on next page

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Section 6 Current protection


Parameter tINNonDir Range 0.000 - 60.000 Step 0.001 Default 1.000 Unit s Description Time delay for nondirectional residual over current, in sec Operation curve selection for IDMT operation

TimeChar

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 0.000 - 60.000

IEC Norm. inv.

tMin

0.001

0.040

Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of nondirectional residual overvoltage protection Set level for nondirectional residual over voltage, in %Ub Time delay for nondirectional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Ub

kIN

0.00 - 2.00

0.01

1.00

OpUN>

Off On

Off

UN>

1.00 - 200.00

0.01

20.00

%UB

tUNNonDir

0.000 - 60.000

0.001

0.100

INRel>

0.25 - 200.00

0.01

1.00

%IB

UNRel>

0.01 - 200.00

0.01

3.00

%UB

Table 133:
Parameter RotResU

Advanced general settings for the SDEPSDE_67N (SDE1-) function


Range 0 deg 180 deg Step Default 180 deg Unit Description Setting for rotating polarizing quantity if necessary

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Table 134:
Parameter tReset

Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function


Range 0.000 - 60.000 Step 0.001 Default 0.040 Unit s Description Time delay used for reset of definite timers, in sec Setting P for customer programmable curve Setting A for customer programmable curve Setting B for customer programmable curve Setting C for customer programmable curve Reset mode when current drops off. Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve

tPCrv tACrv tBCrv tCCrv

0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0

0.001 0.001 0.01 0.1

1.000 13.500 0.00 1.0

ResetTypeCrv

Immediate IEC Reset ANSI reset 0.005 - 3.000

IEC Reset

tPRCrv

0.001

0.500

tTRCrv

0.005 - 100.000

0.001

13.500

tCRCrv

0.1 - 10.0

0.1

1.0

6.5.6

Technical data
Table 135:
Function Operate level for 3I0 cosj directional residual overcurrent

Sensitive directional residual overcurrent and power protection (PSDE, 67N)


Range or value (0.25-200.00)% of lbase At low setting: (2.5-10) mA (10-50) mA Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 1.0% of Sr at S Sr 1.0% of S at S > Sr 10% of set value 1.0% of Ir at Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA

Operate level for 3I03U0 cosj directional residual power

(0.25-200.00)% of Sbase At low setting: (0.25-5.00)% of Sbase

Operate level for 3I0 and j residual overcurrent

(0.25-200.00)% of Ibase At low setting: (2.5-10) mA (10-50) mA

Operate level for non directional overcurrent

(1.00-400.00)% of Ibase At low setting: (10-50) mA

Table continued on next page

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Section 6 Current protection


Function Operate level for non directional residual overvoltage Residual release current for all directional modes Range or value (1.00-200.00)% of Ubase (0.25-200.00)% of Ibase At low setting: (2.5-10) mA (10-50) mA Residual release voltage for all directional modes Reset ratio Timers Inverse characteristics, see table 517 and table 518 Relay characteristic angle RCA Relay open angle ROA Operate time, non directional residual over current Reset time, non directinal residual over current Operate time, start function Reset time, start function (0.01-200.00)% of Ubase > 95% (0.000-60.000) s 19 curve types (-179 to 180) degrees (0-90) degrees 60 ms typically at 0 to 2 x Iset 60 ms typically at 2 to 0 x Iset 150 ms typically at 0 to 2 x Iset 50 ms typically at 2 to 0 x Iset Accuracy 0.5% of Ur at UUr 0.5% of U at U > Ur 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0 mA 0.5 mA 0.5% of Ur at UUr 0.5% of U at > Ur 0.5% 10 ms See table 517 and table 518 2.0 degrees 2.0 degrees -

6.6

Thermal overload protection, two time constants (PTTR, 49)


Function block name: TTRxANSI number: 49 IEC 61850 logical node name: TRPTTR IEC 60617 graphical symbol:

6.6.1

Introduction
If the temperature of a power transformer/generator reaches too high values the equipment might be damaged. The insulation within the transformer/generator will have forced ageing. As a consequence of this the risk of internal phase to phase or phase to earth faults will increase. High temperature will degrade the quality of the transformer/generator oil.

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The thermal overload protection estimates the internal heat content of the transformer/ generator (temperature) continuously. This estimation is made by using a thermal model of the transformer/generator with two time constants, which is based on current measurement. Two warning levels are available. This enables actions in the power system to be done before dangerous temperatures are reached. If the temperature continues to increase to the trip value, the protection initiates trip of the protected transformer/generator.

6.6.2

Principle of operation
The sampled analogue phase currents are pre-processed and for each phase current the RMS value of each phase current is derived. These phase current values are fed to the THL function. From the largest of the three phase currents a relative final temperature (heat content) is calculated according to the expression:

Q final

I = I ref

(Equation 74)

where: I Iref is the largest phase current and is a given reference current

If this calculated relative temperature is larger than the relative temperature level corresponding to the set operate (trip) current a start output signal START is activated. The actual temperature at the actual execution cycle is calculated as:
If

Q final > Q n

Dt Qn = Qn -1 + ( Q final - Q n-1 ) 1 - e t

If

Q final < Qn

Table continued on next page

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Qn = Q final - ( Q final - Q n -1 ) e
where: Qn Qn-1 Qfinal Dt t

Dt

is the calculated present temperature, is the calculated temperature at the previous time step, is the calculated final (steady state) temperature with the actual current, is the time step between calculation of the actual temperature and is the set thermal time constant for the protected transformer

The calculated transformer relative temperature can be monitored as it is exported from the function as a real figure HEATCONT. When the transformer temperature reaches any of the set alarm levels Alarm1 or Alarm2 the corresponding output signal ALARM1 or ALARM2 is set. When the component temperature reaches the set trip level which corresponds to continuous current equal to ITrip the output signal TRIP is set. There is also a calculation of the present time to operation with the present current. This calculation is only performed if the final temperature is calculated to be above the operation temperature:

Q - Qoperate toperate = -t ln final Q final - Q n

(Equation 79)

The calculated time to trip can be monitored as it is exported from the function as a real figure TTRIP. After a trip, caused by the thermal overload protection function, there can be a lockout to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is above the set lockout release temperature setting ResLo. The time to lockout release is calculated, i.e. a calculation of the cooling time to a set value.

Q - Qlockout _ release tlockout _ release = -t ln final Q final - Q n

(Equation 80)

Here the final temperature is equal to the set or measured ambient temperature. The calculated component temperature can be monitored as it is exported from the function as a real figure. 262 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 6 Current protection

When the current is so high that it has given a start signal START, the estimated time to trip is continuously calculated and given as analogue output TTRIP. If this calculated time get less than the setting time Warning, set in minutes, the output WARNING is activated. In case of trip a pulse with a set duration tPulse is activated.

Final Temp > TripTemp

START

Calculation of heat content

actual heat comtent

I3P Calculation of final temperature

Actual Temp > Alarm1,Alarm2 Temp

ALARM1 ALARM2

Current base used TRIP Actual Temp > TripTemp Binary input: Forced cooling On/Off S R Actual Temp < Recl Temp LOCKOUT

Management of setting parameters: Tau, IBase

Tau used

Calculation of time to trip

time to trip warning if time to trip < set value

Calculation of time to reset of lockout

time to reset of lockout

en05000833.vsd

Figure 123:

Functional overview of TTR

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TTR1TRPTTR_49 I3P BLOCK COOLING ENMULT RESET TRIP START ALARM1 ALARM2 LOCKOUT WARNING en06000272.vsd

Figure 124:

TTR function block

6.6.4

Input and output signals


Table 136:
Signal I3P BLOCK COOLING ENMULT RESET

Input signals for the TRPTTR_49 (TTR1-) function block


Description Group signal for current input Block of function Cooling input Off / On. Changes Ib setting and time constant Enable Multiplier for currentReference setting Reset of function

Table 137:
Signal TRIP START ALARM1 ALARM2 LOCKOUT WARNING

Output signals for the TRPTTR_49 (TTR1-) function block


Description Trip Signal Start signal First level alarm signal Second level alarm signal Lockout signal Warning signal: Trip within set warning time

6.6.5

Setting parameters
Table 138:
Parameter Operation IBase IRef

Basic parameter group settings for the TRPTTR_49 (TTR1-) function


Range Off On 1 - 99999 10.0 - 1000.0 Step 1 1.0 Default Off 3000 100.0 Unit A %IB Description Operation Off / On Base current in A Reference current in % of IBASE

Table continued on next page

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Parameter IRefMult IBase1 Range 0.01 - 10.00 30.0 - 250.0 Step 0.01 1.0 Default 1.00 100.0 Unit %IB Description Multiplication Factor for reference current Base current,IBase1 without Cooling inpout in % of IBASE Base Current,IBase2, with Cooling input ON in % of IBASE Time constant without cooling input in min, with IBase1 Time constant with cooling input in min, with IBase2 Current Sett, in % of IBase1 for rescaling TC1 by TC1-IHIGH Multiplier in % to TC1 when current is > IHIGH-TC1 Current Set, in % of IBase1 for rescaling TC1 by TC1-ILOW Multiplier in % to TC1 when current is < ILOW-TC1 Current Set, in % of IBase2 for rescaling TC2 by TC2-IHIGH Multiplier in % to TC2 when current is >IHIGH-TC2 Current Set, in % of IBase2 for rescaling TC2 by TC2-ILOW Multiplier in % to TC2 when current is < ILOW-TC2 Steady state operate current level in % of IBasex First alarm level in % of heat content trip value Second alarm level in % of heat content trip value Lockout reset level in % of heat content trip value

IBase2

30.0 - 250.0

1.0

100.0

%IB

Tau1

1.0 - 500.0

1.0

60.0

Min

Tau2

1.0 - 500.0

1.0

60.0

Min

IHighTau1

30.0 - 250.0

1.0

100.0

%IB1

Tau1High

5 - 2000

100

%tC1

ILowTau1

30.0 - 250.0

1.0

100.0

%IB1

Tau1Low

5 - 2000

100

%tC1

IHighTau2

30.0 - 250.0

1.0

100.0

%IB2

Tau2High

5 - 2000

100

%tC2

ILowTau2

30.0 - 250.0

1.0

100.0

%IB2

Tau2Low

5 - 2000

100

%tC2

ITrip

50.0 - 250.0

1.0

110.0

%IBx

Alarm1

50.0 - 99.0

1.0

80.0

%Itr

Alarm2

50.0 - 99.0

1.0

90.0

%Itr

ResLo

10.0 - 95.0

1.0

60.0

%Itr

Table continued on next page

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Parameter ThetaInit Range 0.0 - 95.0 Step 1.0 Default 50.0 Unit % Description Initial Heat content, in % of heat content trip value Time setting, below which warning would be set (in min) Length of the pulse for trip signal (in msec).

Warning

1.0 - 500.0

0.1

30.0

Min

tPulse

0.01 - 0.30

0.01

0.10

6.6.6

Technical data
Table 139:
Function Base current 1 and 2 Operate time:

Thermal overload protection, two time constants (PTTR, 49)


Range or value (30250)% of Ibase Ip = load current before overload occurs Time constant = (1500) minutes Accuracy 1.0% of Ir IEC 602558, class 5 + 200 ms

I 2 - I p2 t = t ln 2 I - Ib 2
I = Imeasured Alarm level 1 and 2 Operate current

(5099)% of heat content trip value (50250)% of Ibase (1095)% of heat content trip

2.0% of heat content trip 1.0% of Ir 2.0% of heat content trip

Reset level temperature

6.7

Breaker failure protection (RBRF, 50BF)


Function block name: BFPxANSI number: 50BF IEC 61850 logical node name: CCRBRF IEC 60617 graphical symbol:

3I>BF

6.7.1

Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding breakers. The breaker failure protection operation can be current based, contact based or adaptive combination between these two principles.

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A current check with extremely short reset time is used as a check criteria to achieve a high security against unnecessary operation. The breaker failure protection can be single- or three-phase initiated to allow use with single phase tripping applications. For the three-phase version of the breaker failure protection the current criteria can be set to operate only if two out of four e.g. two phases or one phase plus the residual current starts. This gives a higher security to the back-up trip command. The function can be programmed to give a single- or three phase re-trip of the own breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during testing.

6.7.2

Principle of operation
The breaker failure protection function is initiated from protection trip command, either from protection functions within the protection terminal or from external protection devices. The start signal can be phase selective or general (for all three phases). Phase selective start signals enable single pole re-trip function. This means that a second attempt to open the breaker is done. The re-trip attempt can be made after a set time delay. For transmission lines single pole trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated from phase selective line protection. The retrip function can be done with or without current check. With the current check the re-trip is only performed if the current through the circuit breaker is larger than the operate current level. The start signal can be an internal or external protection trip signal. If this start signal gets high at the same time as current is detected through the circuit breaker, the backup trip timer is started. If the opening of the breaker is successful this is detected by the function, both by detection of low RMS current and by a special adapted algorithm. The special algorithm enables a very fast detection of successful breaker opening, i.e. fast resetting of the current measurement. If the current detection has not detected breaker opening before the back-up timer has run its time a back-up trip is initiated. There is also a possibility to have a second back-up trip output activated after an added settable time after the first back-up trip. Further the following possibilities are available: The minimum length of the re-trip pulse, the back-up trip pulse and the back-up trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the backup trip pulse 2 will however sustain as long as there is an indication of closed breaker. In the current detection it is possible to use three different options: 1 out of 3 where it is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to detect failure to open (high current) in one pole or high

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residual current and 2 out of 4 where at least two current (phase current and/or residual current) shall be high for breaker failure detection. The current detection for the residual current can be set different from the setting of phase current detection. It is possible to have different re-trip time delays for single phase faults and for multi-phase faults. The back-up trip can be made without current check. It is possible to have this option activated for small load currents only. It is possible to have instantaneous back-up trip function if a signal is high if the circuit breaker is insufficient to clear faults, for example at low gas pressure.

Current AND BLOCK Current & Contact t1 AND t tp TRRETL1

STIL1 AND START STL1 OR

OR TRRET

OR CBCLDL1 AND AND Contact L2 L3

en05000832.vsd

Figure 125:

Simplified logic scheme of the retrip function

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Figure 126:

Simplified logic scheme of the back-up trip function

Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in respective phase has magnitude larger than setting parameter IP>. Internal logical signal STN has logical value 1 when neutral current has magnitude larger than setting parameter IN>.

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More than 1 current high 1 of 3 AND

t2MPh t tp OR TRBU

1 of 4

OR

t2 t t3 t tp TRBU2

2 of 3 AND CBFLT CBALARM t CBALARM

en06000223.vsd

Figure 127:

Simplified logic scheme of the back-up trip function

6.7.3

Function block
BFP1CCRBRF_50BF I3P BLOCK START STL1 STL2 STL3 CBCLDL1 CBCLDL2 CBCLDL3 CBFLT TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM

en06000188.vsd

Figure 128:

BFP function block

6.7.4

Input and output signals


Table 140:
Signal I3P BLOCK START STL1 Table continued on next page

Input signals for the CCRBRF_50BF (BFP1-) function block


Description Current connection Block of function Three phase start of breaker failure protection function Start signal of phase L1

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Signal STL2 STL3 CBCLDL1 CBCLDL2 CBCLDL3 CBFLT Description Start signal of phase L2 Start signal of phase L3 Circuit breaker closed in phase L1 Circuit breaker closed in phase L2 Circuit breaker closed in phase L3 CB faulty, unable to trip. Back-up trip instantanously.

Table 141:
Signal TRBU TRBU2 TRRET TRRETL1 TRRETL2 TRRETL3 CBALARM

Output signals for the CCRBRF_50BF (BFP1-) function block


Description Back-up trip by breaker failure protection function Second back-up trip by breaker failure protection function Retrip by breaker failure protection function Retrip by breaker failure protection function phase L1 Retrip by breaker failure protection function phase L2 Retrip by breaker failure protection function phase L3 Alarm for faulty circuit breaker

6.7.5

Setting parameters
Table 142:
Parameter Operation IBase FunctionMode

Basic parameter group settings for the CCRBRF_50BF (BFP1-) function


Range Off On 1 - 99999 Current Contact Current&Contact 2 out of 4 1 out of 3 1 out of 4 Retrip Off CB Pos Check No CBPos Check 5 - 200 Step 1 Default Off 3000 Current Unit A Description Operation Off / On Base current Detection principle for back-up trip Back-up trip mode

BuTripMode

1 out of 3

RetripMode

Retrip Off

Operation mode of retrip logic Operate phase current level in % of IBase Operate residual current level in % of IBase Time delay of re-trip

IP>

10

%IB

IN>

2 - 200

10

%IB

t1

0.000 - 60.000

0.001

0.000

Table continued on next page

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Parameter t2 t2MPh Range 0.000 - 60.000 0.000 - 60.000 Step 0.001 0.001 Default 0.150 0.150 Unit s s Description Time delay of back-up trip Time delay of back-up trip at multi-phase start Trip pulse duration

tPulse

0.000 - 60.000

0.001

0.200

Table 143:
Parameter I>BlkCont

Advanced parameter group settings for the CCRBRF_50BF (BFP1-) function


Range 5 - 200 Step 1 Default 20 Unit %IB Description Current for blocking of CB contact operation in % of IBase Additional time delay to t2 for a second back-up trip Time delay for CB faulty signal

t3

0.000 - 60.000

0.001

0.030

tCBAlarm

0.000 - 60.000

0.001

5.000

6.7.6

Technical data
Table 144:
Function Operate phase current Reset ratio, phase current Operate residual current Reset ratio, residual current Phase current level for blocking of contact function Reset ratio Timers Operate time for current detection Reset time for current detection

Breaker failure protection (RBRF, 50BF)


Range or value (5-200)% of lbase > 95% (2-200)% of lbase > 95% (5-200)% of lbase > 95% (0.000-60.000) s 10 ms typically 15 ms maximum Accuracy 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir at I Ir 1.0% of I at I > Ir 1.0% of Ir at I Ir 1.0% of I at I > Ir 0.5% 10 ms -

6.8

Pole discordance protection (RPLD, 52PD)

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Function block name: PDx-ANSI number: 50PD IEC 61850 logical node name: CCRPLD

IEC 60617 graphical symbol:

PD

6.8.1

Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the different poles in different positions (close-open). This can cause negative and zero sequence currents which gives thermal stress on rotating machines and can cause unwanted operation of zero sequence or negative sequence current functions. Normally the own breaker is tripped to correct the positions. If the situation consists the remote end can be intertripped to clear the unsymmetrical load situation. The pole discordance function operates based on information from auxiliary contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase current when required.

6.8.2

Principle of operation
The detection of pole discordance can be made in two different ways. If the contact based function is used an external logic can be made by connecting the auxiliary contacts of the circuit breaker so that a pole discordance is indicated. This is shown in figure 129
C.B.

poleDiscordance Signal from C.B.


en05000287.vsd

Figure 129:

Pole discordance external detection logic

This single binary signal is connected to a binary input of the IED. The appearance of this signal will start a timer that will give a trip signal after the set delay.

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There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and phase contact closed) to binary inputs of the IED. This is shown in figure 130
C.B.

poleOneClosed from C.B. poleTwoClosed from C.B. poleThreeClosed from C.B. + poleOneOpened from C.B. poleTwoOpened from C.B. poleThreeOpened from C.B.
en05000288.vsd

Figure 130:

Pole discordance signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole discordance the trip timer is started. This timer will give a trip signal after the set delay. Pole discordance can also be detected by means of phase selective current measurement. The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to the PD (RPLD) function. The difference between the smallest and the largest phase current is derived. If this difference is larger than a set ratio the trip timer is started. This timer will give a trip signal after the set delay. The current based pole discordance function can be set to be active either continuously or only directly in connection to breaker open or close command. The function also has a binary input that can be configured from the autoreclosing function, so that the pole discordance function can be blocked during sequences with a single pole open if single pole autoreclosing is used. The simplified block diagram of the current and contact based pole discordance function is shown in figure 131.

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BLOCK BLKDBYAR OR

PolPosAuxCont POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL AND Discordance detection AND OR PD Signal from CB EXTPDIND CLOSECMD OPENCMD OR AND Unsymmetry current detection en05000747.vsd t+200 ms AND t t 150 ms TRIP

Figure 131:

Simplified block diagram of pole discordance function - contact and current based

The pole discordance function is blocked if: The terminal is in TEST mode (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockPD=Yes) The input signal BLOCK is high The input signal BLKDBYAR is high

The BLOCK signal is a general purpose blocking signal of the pole discordance function. It can be connected to a binary input of the terminal in order to receive a block command from external devices or can be software connected to other internal functions of the terminal itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The BLKDBYAR signal blocks the pole discordance operation when a single phase autoreclosing cycle is in progress. It can be connected to the output signal AR01-1PT1 if the autoreclosing function is integrated in the terminal; if the autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input of the terminal and this binary input is connected to a signalization 1phase autoreclosing in progress from the external autoreclosing device. If the pole discordance function is enabled, then two different criteria will generate a trip signal TRIP:

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Pole discordance signalling from the circuit breaker. Unsymmetrical current detection.

6.8.2.1

Pole discordance signalling from circuit breaker


If one or two poles of the circuit breaker have failed to open or to close (pole discordance status), then the function input EXTPDIND is activated from the pole discordance signal derived from the circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and in series with one NC contact for each phase connected in parallel) and, after a settable time interval t (0-60 s), a 150 ms trip pulse command TRIP is generated by the pole discordance function.

6.8.2.2

Unsymmetrical current detection


Unsymmetrical current detection is based on checking that: any phase current is lower than CurrUnsymLevel of the highest current in the remaining two phases the highest phase current is greater than CurrRelLevelof the rated current

If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is turned high. This detection is enabled to generate a trip after a set time delay t (0-60 s) if the detection occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during unsymmetrical load conditions. The pole discordance function is informed that a trip or close command has been given to the circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD (for opening command information). These inputs can be connected to terminal binary inputs if the information are generated from the field (i.e. from auxiliary contacts of the close and open push buttons) or may be software connected to the outputs of other integrated functions (i.e. close command from a control function or a general trip from integrated protections).

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Section 6 Current protection 6.8.3 Function block


PD01CCRPLD_52PD I3P BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL TRIP START

en06000275.vsd

Figure 132:

PD function block

6.8.4

Input and output signals


Table 145:
Signal I3P BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND POLE1OPN POLE1CL POLE2OPN POLE2CL POLE3OPN POLE3CL

Input signals for the CCRPLD_52PD (PD01-) function block


Description Group signal for current input Block of function Block of function at CB single phase auto re-closing cycle Close order to CB Open order to CB Pole discordance signal from CB logic Pole one opened indication from CB Pole one closed indication from CB Pole two opened indication from CB Pole two closed indication from CB Pole three opened indication from CB Pole three closed indication from CB

Table 146:
Signal TRIP START

Output signals for the CCRPLD_52PD (PD01-) function block


Description Trip signal to CB Trip condition TRUE, waiting for time delay

6.8.5

Setting parameters

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Table 147:
Parameter Operation IBase tTrip

Basic parameter group settings for the CCRPLD_52PD (PD01-) function


Range Off On 1 - 99999 0.000 - 60.000 Step 1 0.001 Default Off 3000 0.300 Unit s Description Operation Off / On Base current Time delay between trip condition and trip signal Contact function selection Current function selection

ContSel

Off PD signal from CB Pole pos aux cont. Off CB oper monitor Continuous monitor 0 - 100 -

Off

CurrSel

Off

CurrUnsymLevel

80

Unsym magn of lowest phase current compared to the highest. Current magnitude for release of the function in % of IBase

CurrRelLevel

0 - 100

10

%IB

6.8.6

Technical data
Table 148:
Function Operate current Time delay

Pole discordance protection (RPLD, 52PD)


Range or value (0100)% of Ibase (0.000-60.000) s Accuracy 1.0% of Ir 0.5% 10 ms

6.9

Directional underpower protection (PDUP, 32)


Function block name: ANSI number: 32 IEC 61850 logical node name: IEC 60617 graphical symbol:

P><

6.9.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy.

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Section 6 Current protection

Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 133 illustrates the reverse power protection with underpower relay and with overpower relay. The underpower relay gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower relay to trip if the active power from the generator is less than about 2%. One should set the overpower relay to trip if the power flow from the network to the generator is higher than 1% depending on the type of turbine.
Underpower Relay Q Overpower Relay Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

en06000315.vsd

Figure 133:

Protection with underpower relay and overpower relay

6.9.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 134. The function has two stages with individual settings.

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Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) < Power1 t Trip1 Start1

Chosen voltage phasors

S(angle) < Power2

Trip2 Start2

P = POWRE Q = POWIM

en06000438.vsd

Figure 134:

Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 149.
Table 149:
L1, L2, L3

Complex power calculation


Formula used for complex power calculation

Set value: measureMode

S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
S = U L1L 2 I L1* - U L 2 L 3 I L 3*
S = 3 U PosSeq I PosSeq *

Arone

PosSeq

L1L2

S = U L1L 2 ( I L1* - I L 2* )
S = U L 2 L 3 ( I L 2* - I L 3* )
S = U L 3 L1 ( I L 3* - I L1* )

L2L3

L3L1

L1

S = 3 U L1 I L1*

Table continued on next page

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Set value: measureMode L2 Formula used for complex power calculation

S = 3 U L 2 I L 2*
S = 3 U L 3 I L 3*
S = 3 U NegSeq I NegSeq *

L3

NegSeq

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). A start signal START1(2) is activated if the calculated power component is smaller than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low forward power protection the power setting is very low, normally down to 0.02 pu of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the stage will reset.

6.9.2.1

Low pass filtering


In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:

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S = k SOld + (1 - k ) SCalculated
Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle

(Equation 92)

SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (i.e. without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.

6.9.2.2

Calibration of analog inputs


Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 135.
% of Ir -10 IAmpComp5 IAmpComp30 IAmpComp100 -10 5 30 0-5%: Constant 5-30-100%: Linear >100%: Constant 100 Measured current % of Ir Amplitude compensation

Degrees -10 IAngComp30 IAngComp5 IAngComp100 -10

Angle compensation

Measured current 5 30 100 % of Ir

en05000652.vsd

Figure 135:

Calibration curves

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The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as a MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.

6.9.3

Function block
GUP1GUPPDUP_37 I3P U3P BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT en07000027.vsd

Figure 136:

GUP function block

6.9.4

Input and output signals


Table 150:
Signal I3P U3P BLOCK BLOCK1 BLOCK2

Input signals for the GUPPDUP_37 (GUP1-) function block


Description Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 151:
Signal TRIP TRIP1 TRIP2 START START1 START2 P

Output signals for the GUPPDUP_37 (GUP1-) function block


Description Common trip signal Trip of stage 1 Trip of stage 2 Common start Start of stage 1 Start of stage 2 Active Power in MW

Table continued on next page

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Signal PPERCENT Q QPERCENT Description Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

6.9.5

Setting parameters
Table 152:
Parameter IBase UBase Mode

Basic general settings for the GUPPDUP_37 (GUP1-) function


Range 1 - 99999 0.05 - 2000.00 L1, L2, L3 Arone Pos Seq L1L2 L2L3 L3L1 L1 L2 L3 Step 1 0.05 Default 3000 400.00 Pos Seq Unit A kV Description Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

Table 153:
Parameter Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2

Basic parameter group settings for the GUPPDUP_37 (GUP1-) function


Range Off On Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off UnderPower 1.0 0.0 1.000 0.060 UnderPower 1.0 0.0 1.000 0.060 Unit %SB Deg s s %SB Deg s s Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2

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Table 154:
Parameter k

Advanced parameter group settings for the GUPPDUP_37 (GUP1-) function


Range 0.00 - 0.99 Step 0.01 Default 0.00 Unit Description Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 Absolute hysteresis of stage 2 Amplitude factor to calibrate current at 5% of Ir Amplitude factor to calibrate current at 30% of Ir Amplitude factor to calibrate current at 100% of Ir Amplitude factor to calibrate voltage at 5% of Ur Amplitude factor to calibrate voltage at 30% of Ur Amplitude factor to calibrate voltage at 100% of Ur Angle calibration for current at 5% of Ir Angle calibration for current at 30% of Ir Angle calibration for current at 100% of Ir

Hysteresis1 Hysteresis2 IAmpComp5

0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000

0.1 0.1 0.001

0.5 0.5 0.000

pu pu %

IAmpComp30

-10.000 - 10.000

0.001

0.000

IAmpComp100

-10.000 - 10.000

0.001

0.000

UAmpComp5

-10.000 - 10.000

0.001

0.000

UAmpComp30

-10.000 - 10.000

0.001

0.000

UAmpComp100

-10.000 - 10.000

0.001

0.000

IAngComp5 IAngComp30 IAngComp100

-10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000

0.001 0.001 0.001

0.000 0.000 0.000

Deg Deg Deg

6.9.6

Technical data
Table 155:
Function Power level

Directional underpower protection (PDUP)


Range or value (0.0500.0)% of Sbase At low setting: (0.5-2.0)% of Sbase (2.0-10)% of Sbase Accuracy 1.0% of Sr at S < Sr 1.0% of S at S > Sr < 50% of set value < 20% of set value 2 degrees 0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

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6.10

Directional overpower protection (PDOP, 32)


Function block name: GOPx ANSI number: 32 IEC 61850 logical node name: GOPPDOP IEC 60617 graphical symbol:

P><

6.10.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 137 illustrates the reverse power protection with underpower relay and with overpower relay. The underpower relay gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower relay to trip if the active power from the generator is less than about 2%. One should set the overpower relay to trip if the power flow from the network to the generator is higher than 1%.

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Underpower Relay Q

Overpower Relay Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

en06000315.vsd

Figure 137:

Reverse power protection with underpower relay and overpower relay

6.10.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 138. The function has two stages with individual settings.

Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) > Power1 t Trip1 Start1

Chosen voltage phasors

S(angle) > Power2

Trip2 Start2

P = POWRE Q = POWIM

en06000567.vsd

Figure 138:

Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 156.

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Table 156:
L1, L2, L3

Complex power calculation


Formula used for complex power calculation

Set value: measureMode

S = U L1 I L1* + U L 2 I L 2* + U L 3 I L 3*
S = U L1L 2 I L1* - U L 2 L 3 I L 3*
S = 3 U PosSeq I PosSeq *

Arone

PosSeq

L1L2

S = U L1L 2 ( I L1* - I L 2* )

L2L3

S = U L 2 L 3 ( I L 2* - I L 3* )
S = U L 3 L1 ( I L 3* - I L1* )

L3L1

L1

S = 3 U L1 I L1*
S = 3 U L 2 I L 2*

L2

L3

S = 3 U L 3 I L 3*

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). A start signal START1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is still active. At activation of any of the two stages a common signal START will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) drop-power1(2)). For generator reverse power protection the power setting is very low, normally down to 0.02 pu of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) Hysteresis1(2)

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For small power1 values the hysteresis1 may not be too big, because the droppower1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of the stage will reset.

6.10.2.1

Low pass filtering


In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:
S = k SOld + (1 - k ) SCalculated
Where S Sold is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle (Equation 102)

SCalculated is the new calculated value in the present execution cycle k is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (i.e. without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.

6.10.2.2

Calibration of analog inputs


Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 139.

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% of Ir -10 IAmpComp5 IAmpComp30 IAmpComp100 -10

Amplitude compensation

Measured current 5 30 0-5%: Constant 5-30-100%: Linear >100%: Constant 100 % of Ir

Degrees -10 IAngComp30 IAngComp5 IAngComp100 -10

Angle compensation

Measured current 5 30 100 % of Ir

en05000652.vsd

Figure 139:

Calibration curves

The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as a MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.

6.10.3

Function block
GOP1GOPPDOP_32 I3P U3P BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT en07000028.vsd

Figure 140:

GOP function block

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Table 157:
Signal I3P U3P BLOCK BLOCK1 BLOCK2

Input signals for the GOPPDOP_32 (GOP1-) function block


Description Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 158:
Signal TRIP TRIP1 TRIP2 START START1 START2 P PPERCENT Q QPERCENT

Output signals for the GOPPDOP_32 (GOP1-) function block


Description Common trip signal Trip of stage 1 Trip of stage 2 Common start Start of stage 1 Start of stage 2 Active Power in MW Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

6.10.5

Setting parameters
Table 159:
Parameter IBase UBase Mode

Basic general settings for the GOPPDOP_32 (GOP1-) function


Range 1 - 99999 0.05 - 2000.00 L1, L2, L3 Arone Pos Seq L1L2 L2L3 L3L1 L1 L2 L3 Step 1 0.05 Default 3000 400.00 Pos Seq Unit A kV Description Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

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Table 160:
Parameter Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2

Basic parameter group settings for the GOPPDOP_32 (GOP1-) function


Range Off On Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Off OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Step 0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001 Default Off OverPower 120.0 0.0 1.000 0.060 OverPower 120.0 0.0 1.000 0.060 Unit %SB Deg s s %SB Deg s s Description Operation Off / On Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2

Table 161:
Parameter k

Advanced parameter group settings for the GOPPDOP_32 (GOP1-) function


Range 0.00 - 0.99 Step 0.01 Default 0.00 Unit Description Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 in % of Sbase Absolute hysteresis of stage 2 in % of Sbase Amplitude factor to calibrate current at 5% of Ir Amplitude factor to calibrate current at 30% of Ir Amplitude factor to calibrate current at 100% of Ir Amplitude factor to calibrate voltage at 5% of Ur Amplitude factor to calibrate voltage at 30% of Ur Amplitude factor to calibrate voltage at 100% of Ur

Hysteresis1 Hysteresis2 IAmpComp5

0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000

0.1 0.1 0.001

0.5 0.5 0.000

pu pu %

IAmpComp30

-10.000 - 10.000

0.001

0.000

IAmpComp100

-10.000 - 10.000

0.001

0.000

UAmpComp5

-10.000 - 10.000

0.001

0.000

UAmpComp30

-10.000 - 10.000

0.001

0.000

UAmpComp100

-10.000 - 10.000

0.001

0.000

Table continued on next page

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Parameter IAngComp5 IAngComp30 IAngComp100 Range -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000 Step 0.001 0.001 0.001 Default 0.000 0.000 0.000 Unit Deg Deg Deg Description Angle calibration for current at 5% of Ir Angle calibration for current at 30% of Ir Angle calibration for current at 100% of Ir

6.10.6

Technical data
Table 162:
Function Power level

Directional overpower protection (PDOP)


Range or value (0.0500.0)% of Sbase At low setting: (0.5-2.0)% of Sbase (2.0-10)% of Sbase Accuracy 1.0% of Sr at S < Sr 1.0% of S at S > Sr < 50% of set value < 20% of set value 2 degrees 0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

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Section 7 Voltage protection

Section 7

Voltage protection
About this chapter
This chapter describes voltage related protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

7.1

Two step undervoltage protection (PTUV, 27)


Function block name: TUVxANSI number: 27 IEC 61850 logical node name: UV2PTUV IEC 60617 graphical symbol:

3U<

7.1.1

Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. The function can be used to open circuit breakers to prepare for system restoration at power outages or as long-time delayed back-up to primary protection. The function has two voltage steps, each with inverse or definite time delay.

7.1.2

Principle of operation
The two-step undervoltage protection function (TUV) is used to detect low power system voltage. The function has two voltage measuring steps with separate time delays. If one, two or three phase voltages decrease below the set value, a corresponding start signal is issued. TUV can be set to start/trip based on "one out of three", "two out of three", or "three out of three" of the measured voltages, being below the set point. If the voltage remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to disconnection of the related high voltage equipment, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking level the function is blocked and no start or trip signal is issued. The time delay characteristic is individually chosen for each step and can be either definite time delay or inverse time delay.

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The undervoltage protection function can be set to measure phase to earth fundamental value, phase to phase fundamental value, phase to earth RMS value or phase to phase RMS value. The choise of the measuring is done by the parameter ConnType in PST or LHMI under Generall Settings/Voltage protection. The voltage related settings are made in percent of base voltage which is set i kV phase-phase voltage This means operation for phase to earth voltage under:

U < (%) UBase( kV ) 3


and operation for phase to phase voltage under:
U < (%) UBase(kV)
(Equation 104) (Equation 103)

7.1.2.1

Measurement principle
All the three phase to earth voltages are measured continuously, and compared with the set values, U1< and U2<. The parameters OpMode1 and OpMode2 influence the requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be lower than the corresponding set point to issue the corresponding start signal. To avoid oscillations of the output start signal, a hysteresis has been included.

7.1.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay three different modes are available; inverse curve A, inverse curve B, and a programmable inverse curve. The type A curve is described as:

t=

k U < -U U<

(Equation 105)

The type B curve is described as:

t=

k 480 U < -U - 0.5 32 U<


2.0

+ 0.055
(Equation 106)

The programmable curve can be created as:

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kA +D t= p U < -U -C B U<

(Equation 107)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 CrvSatn/100) the used voltage will be: U< *(1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100

(Equation 108)

The lowest voltage is always used for the inverse time delay integration. The details of the different inverse time characteristics are shown in section "Inverse characteristics". Trip signal issuing requires that the undervoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2pickup for the inverse time) the corresponding start output is reset. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. Note that for the undervoltage function the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 141 and figure 142.

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Voltage

START Hysteresis

tReset 1 TRIP

tReset 1 Measured Voltage

U1<

Time START TRIP


t1

Time Integrator t1

Froozen Timer

Instantaneous Reset

Time
Linear Decrease en05000010.vsd

Figure 141:

Voltage profile not causing a reset of the start signal for step 1, and definite time delay

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Voltage START

tReset1 tReset1 START Hysteresis TRIP Measured Voltage

U1<

Time START t1

TRIP

Time Integrator t1

Froozen Timer

Time Instantaneous Reset Linear Decrease en05000011.vsd

Figure 142:

Voltage profile causing a reset of the start signal for step 1, and definite time delay

7.1.2.3

Blocking
The undervoltage function can be partially or totally blocked, by binary input signals or by parameter settings, where:

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BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2:

blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2

If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of step 1, or both the trip and the start outputs of step 1, are blocked. The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to "off" resulting in no voltage based blocking. Corresponding settings and functionality are valid also for step 2. In case of disconnection of the high voltage component the measured voltage will get very low. The event will start both the under voltage function and the blocking function, as seen in figure 143. The delay of the blocking function must be set less than the time delay of under voltage function.

Disconnection

Normal voltage U1< U2<

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466.vsd

tBlkUV2 < t2,t2Min

Figure 143:

Blocking function.

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7.1.2.4 Design
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the three phase to phase voltages. Recursive Fourier filters or RMS filters based on one fundamental cycle filter the input voltage signals. The voltages are individually compared to the set value, and the lowest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start condition. The design of the TimeUnderVoltage function is schematically described in figure 144.
UL1 Comparator UL1 < U1< Comparator UL2 < U1< Comparator UL3 < U1< ST1L1 Voltage Phase Selector OpMode1 1 out of 3 2 out of 3 3 out of 3
Phase 1

UL2

ST1L2
Phase 2 Phase 3

UL3

START Time integrator t1 tReset1 ResetTypeCrv1

Start & Trip Output Logic Step 1

ST1L3 ST1 TR1L1 TR1L2 TR1L3 TR1

OR

MinVoltSelect or

TRIP

OR

Comparator UL1 < U2< Comparator UL2 < U2< Comparator UL3 < U2<

Voltage Phase Selector OpMode2 1 out of 3 2 outof 3 3 out of 3

Phase 1 Phase 2 Phase 3

ST2L1 ST2L2 ST2L3 ST2 TR2L1 TR2L2

START Time integrator t2 tReset2 ResetTypeCrv2

Start & Trip Output Logic Step 2

OR

MinVoltSelect or

TRIP

TR2L3
TR2 OR START

OR

OR

TRIP

en05000012.vsd

Figure 144:

Schematic design of the TUV function

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TUV1UV2PTUV_27 U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 en06000276.vsd

Figure 145:

TUV function block

7.1.4

Input and output signals


Table 163:
Signal U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

Input signals for the UV2PTUV_27 (TUV1-) function block


Description Three phase voltages Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 164:
Signal TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START

Output signals for the UV2PTUV_27 (TUV1-) function block


Description Trip Common trip signal from step1 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Common trip signal from step2 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 General start signal

Table continued on next page

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Signal ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 Description Common start signal from step1 Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Common start signal from step2 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3

7.1.5

Setting parameters
Table 165:
Parameter ConnType

Basic general settings for the UV2PTUV_27 (TUV1-) function


Range PhN DFT PhPh RMS PhN RMS PhPh DFT Step Default PhN DFT Unit Description Group selector for connection type

Table 166:
Parameter Operation UBase OperationStep1 Characterist1

Basic parameter group settings for the UV2PTUV_27 (TUV1-) function


Range Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100 Step 0.05 Default Off 400.00 On Definite time Unit kV Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1 Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1

OpMode1

1 out of 3

U1<

70

%UB

t1 t1Min

0.00 - 6000.00 0.000 - 60.000

0.01 0.001

5.00 5.000

s s

k1

0.05

0.01

0.05 - 1.10

Table continued on next page

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Parameter IntBlkSel1 Range Off Block of trip Block all 1 - 100 Step Default Off Unit Description Internal (low level) blocking mode, step 1 Voltage setting for internal blocking in % of UBase, step 1 Time delay of internal (low level) blocking for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2 Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Internal (low level) blocking mode, step 2 Voltage setting for internal blocking in % of UBase, step 2 Time delay of internal (low level) blocking for step 2 Absolute hysteresis in % of UBase, step 2

IntBlkStVal1

20

%UB

tBlkUV1

0.000 - 60.000

0.001

0.000

HystAbs1 OperationStep2 Characterist2

0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100

0.1 -

0.5 On Definite time

%UB -

OpMode2

1 out of 3

U2<

50

%UB

t2 t2Min

0.000 - 60.000 0.000 - 60.000

0.001 0.001

5.000 5.000

s s

k2

0.05

0.01

0.05 - 1.10

IntBlkSel2

Off Block of trip Block all 1 - 100

Off

IntBlkStVal2

20

%UB

tBlkUV2

0.000 - 60.000

0.001

0.000

HystAbs2

0.0 - 100.0

0.1

0.5

%UB

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Table 167:
Parameter tReset1

Advanced parameter group settings for the UV2PTUV_27 (TUV1-) function


Range 0.000 - 60.000 Step 0.001 Default 0.025 Unit s Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 1.000

Instantaneous

tIReset1 ACrv1

0.001 0.001

0.025 0.005 - 200.000

s -

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. under voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2

BCrv1

1.00

0.01

0.50 - 100.00

CCrv1

0.0

0.1

0.0 - 1.0

DCrv1

0.000

0.001

0.000 - 60.000

PCrv1

1.000

0.001

0.000 - 3.000

CrvSat1

0 - 100

tReset2

0.000 - 60.000

0.001

0.025

ResetTypeCrv2

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 1.000

Instantaneous

tIReset2 ACrv2

0.001 0.001

0.025 0.005 - 200.000

s -

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2

BCrv2

1.00

0.01

0.50 - 100.00

CCrv2

0.0

0.1

0.0 - 1.0

Table continued on next page

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Parameter DCrv2 Range 0.000 Step 0.001 Default 0.000 - 60.000 Unit Description Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. under voltage IDMT curve, step 2

PCrv2

1.000

0.001

0.000 - 3.000

CrvSat2

0 - 100

7.1.6

Technical data
Table 168:
Function Operate voltage, low and high step Absolute hysteresis Internal blocking level, low and high step Inverse time characteristics for low and high step, see table 519 Definite time delays Minimum operate time, inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time

Two step undervoltage protection (PUVM, 27)


Range or value (1100)% of Ubase (0100)% of Ubase (1100)% of Ubase (0.000-60.000) s (0.00060.000) s 25 ms typically at 2 to 0 x Uset 25 ms typically at 0 to 2 x Uset 10 ms typically at 2 to 0 x Uset 15 ms typically Accuracy 1.0% of Ur 1.0% of Ur 1.0% of Ur See table 519 0.5% 10 ms 0.5% 10 ms -

7.2

Two step overvoltage protection (PTOV, 59)


Function block name: TOVxANSI number: 59 IEC 61850 logical node name: OV2PTOV IEC 60617 graphical symbol:

3U>

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Section 7 Voltage protection 7.2.1 Introduction


Overvoltages will occur in the power system during abnormal conditions such as sudden power loss, tap changer regulating failures, open line ends on long lines. The function can be used as open line end detector, normally then combined with directional reactive over-power function or as system voltage supervision, normally then giving alarm only or switching in reactors or switch out capacitor banks to control the voltage. The function has two voltage steps, each of them with inverse or definite time delayed. The overvoltage function has an extremely high reset ratio to allow setting close to system service voltage.

7.2.2

Principle of operation
The two-step overvoltage protection function (TOV) is used to detect high power system voltage. The function has two steps with separate time delays. If one, two or three phase voltages increase above the set value, a corresponding start signal is issued. TOV can be set to start/trip based on "one out of three", "two out of three", or "three out of three" of the measured voltages, being above the set point. If the voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either definite time delay or inverse time delay. The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase. The overvoltage protection function can be set to measure phase to earth fundamental value, phase to phase fundamental value, phase to earth RMS value or phase to phase RMS value. The choise of measuring is done by the parameter ConnType in PST or LHMI under Generall Settings/Voltage protection. The setting of the analog inputs are given as primary phase to phase voltage and secondary phase to phase voltage. The function will operate if the voltage gets higher than the set percentage of the set base voltage UBase. This means operation for phase to earth voltage over:

U > (%) UBase( kV ) 3


and operation for phase for phase voltage over:
U > (%) UBase(kV)
(Equation 109)

Vpickup > (%) VBase(kV)

(Equation 110)

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7.2.2.1 Measurement principle
All the three phase voltages are measured continuously, and compared with the set values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be higher than the corresponding set point to issue the corresponding start signal. To avoid oscillations of the output start signal, a hysteresis has been included.

7.2.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available; inverse curve A, inverse curve B, inverse curve C, and a programmable inverse curve. The type A curve is described as:
t= TD

V - Vpickup Vpickup

(Equation 111)

The type B curve is described as:

t=

k 480 U -U > - 0.5 32 U>


2.0

- 0.035
(Equation 112)

The type C curve is described as:

t=

k 480 U -U > - 0.5 32 U>


TD 480 V - Vpickup 32 Vpickup - 0.5 - 0.035
3.0

3.0

- 0.035

t=

(Equation 113)

The programmable curve can be created as:

t=

kA U -U > -C B U>
p

+D
(Equation 114)

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Section 7 Voltage protection

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 CrvSatn/100) the used voltage will be: U< *(1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100

(Equation 115)

The highest phase (or phase to phase) voltage is always used for the inverse time delay integration, see figure 146. The details of the different inverse time characteristics are shown in section "Inverse characteristics"

Voltage IDMT Voltage

UL1 UL2 UL3

Time
en05000016.vsd

Figure 146:

Voltage used for the inverse time characteristic integration

Trip signal issuing requires that the overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by selected voltage level dependent time curves for the inverse time mode (IDMT). If the start condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding start output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. The hysteresis value for each step is settable (HystAbs2) to allow an high and accurate reset of the function. It is also remarkable that for the overvoltage function the IDMT reset time is constant and does not depend on the REG 670 Technical reference manual 1MRK502013-UEN rev. B 309

Section 7 Voltage protection

voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time..

7.2.2.3

Blocking
The overvoltage function can be partially or totally blocked, by binary input signals where:
BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2: blocks all outputs blocks all trip outputs of step 1 blocks all start and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip outputs related to step 2

7.2.2.4

Design
The voltage measuring elements continuously measure the three phase-to-earth voltages or the three phase to phasel voltages. Recursive Fourier filters filter the input voltage signals. The phase voltages are individually compared to the set value, and the highest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start condition. The design of the TimeOverVoltage function is schematically described in figure 147.

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UL1

Comparator UL1 > U1> Comparator UL2 > U1> Comparator UL3 > U1>

ST1L1 Voltage Phase Selector OpMode1 1 out of 3 2 outof 3 3 out of 3


Phase 1

UL2

ST1L2
Phase 2 Phase 3

UL3

START Time integrator t1 tReset1 ResetTypeCrv1

Start & Trip Output Logic Step 1

ST1L3 ST1 TR1L1 TR1L2 TR1L3 TR1

OR

MaxVoltSelect or

TRIP

OR

Comparator UL1 > U2> Comparator UL2 > U2> Comparator UL3 > U2>

Voltage Phase Selector OpMode2 1 out of 3 2 outof 3 3 out of 3

Phase 1 Phase 2 Phase 3

ST2L1 ST2L2 ST2L3 ST2 TR2L1 TR2L2

START Time integrator t2 tReset2 ResetTypeCrv2

Start & Trip Output Logic Step 2

OR

MaxVoltSelect or

TRIP TR2L3 TR2


START

OR OR

OR

TRIP

en05000013.vsd

Figure 147:

Schematic design of the TimeOverVoltage function

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Section 7 Voltage protection 7.2.3 Function block


TOV1OV2PTOV_59 U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 en06000277.vsd

Figure 148:

TOV function block

7.2.4

Input and output signals


Table 169:
Signal U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

Input signals for the OV2PTOV_59 (TOV1-) function block


Description Group signal for three phase voltage input Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 170:
Signal TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START

Output signals for the OV2PTOV_59 (TOV1-) function block


Description Trip Common trip signal from step1 Trip signal from step1 phase L1 Trip signal from step1 phase L2 Trip signal from step1 phase L3 Common trip signal from step2 Trip signal from step2 phase L1 Trip signal from step2 phase L2 Trip signal from step2 phase L3 General start signal

Table continued on next page

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Signal ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 Description Common start signal from step1 Start signal from step1 phase L1 Start signal from step1 phase L2 Start signal from step1 phase L3 Common start signal from step2 Start signal from step2 phase L1 Start signal from step2 phase L2 Start signal from step2 phase L3

7.2.5

Setting parameters
Table 171:
Parameter ConnType

Basic general settings for the OV2PTOV_59 (TOV1-) function


Range PhG PhPh PhG RMS PhPh RMS Step Default PhG Unit Description TBD

Table 172:
Parameter Operation UBase OperationStep1 Characterist1

Basic parameter group settings for the OV2PTOV_59 (TOV1-) function


Range Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 Step 0.05 Default Off 400.00 On Definite time Unit kV Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

OpMode1

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage setting/start val (DT & IDMT) in % of UBase, step 1 Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1

U1>

120

%UB

t1 t1Min

0.00 - 6000.00 0.000 - 60.000

0.01 0.001

5.00 5.000

s s

k1

0.05 - 1.10

0.01

0.05

Table continued on next page

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Parameter HystAbs1 OperationStep2 Characterist2 Range 0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200 Step 0.1 Default 0.5 On Definite time Unit %UB Description Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

OpMode2

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage setting/start val (DT & IDMT) in % of UBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of UBase, step 2

U2>

150

%UB

t2 t2Min

0.000 - 60.000 0.000 - 60.000

0.001 0.001

5.000 5.000

s s

k2

0.05 - 1.10

0.01

0.05

HystAbs2

0.0 - 100.0

0.1

0.5

%UB

Table 173:
Parameter tReset1

Advanced parameter group settings for the OV2PTOV_59 (TOV1-) function


Range 0.000 - 60.000 Step 0.001 Default 0.025 Unit s Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000

Instantaneous

tIReset1 ACrv1

0.001 0.001

0.025 1.000

s -

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1

BCrv1

0.50 - 100.00

0.01

1.00

CCrv1

0.0 - 1.0

0.1

0.0

Table continued on next page

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Parameter DCrv1 Range 0.000 - 60.000 Step 0.001 Default 0.000 Unit Description Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2

PCrv1

0.000 - 3.000

0.001

1.000

CrvSat1

0 - 100

tReset2

0.000 - 60.000

0.001

0.025

ResetTypeCrv2

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000

Instantaneous

tIReset2 ACrv2

0.001 0.001

0.025 1.000

s -

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2

BCrv2

0.50 - 100.00

0.01

1.00

CCrv2

0.0 - 1.0

0.1

0.0

DCrv2

0.000 - 60.000

0.001

0.000

PCrv2

0.000 - 3.000

0.001

1.000

CrvSat2

0 - 100

7.2.6

Technical data

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Table 174:
Function

Two step overvoltage protection (POVM, 59)


Range or value (1-200)% of Ubase (0100)% of Ubase (0.000-60.000) s (0.000-60.000) s 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 10 ms typically at 0 to 2 x Uset 15 ms typically Accuracy 1.0% of Ur at U < Ur 1.0% of U at U > Ur 1.0% of Ur at U < Ur 1.0% of U at U > Ur See table 520 0.5% 10 ms 0.5% 10 ms -

Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 520 Definite time delays Minimum operate time, Inverse characteristics Operate time, start function Reset time, start function Critical impulse time Impulse margin time

7.3

Two step residual overvoltage protection (PTOV, 59N)


Function block name: TRVxANSI number: 59N IEC 61850 logical node name: ROV2PTOV IEC 60617 graphical symbol:

3U0

7.3.1

Introduction
Residual voltages will occur in the power system during earth faults. The function can be configured to calculate the residual voltage from the three phase voltage input transformers or from a single phase voltage input transformer fed from an open delta or neutral point voltage transformer. The function has two voltage steps, each with inverse or definite time delayed.

7.3.2

Principle of operation
The two-step residual overvoltage protection function (TRV) is used to detect high single-phase voltage, such as high residual voltage, also called 3U0. The residual voltage can be measured directly from a voltage transformer in the neutral of a power transformer or from a three-phase voltage transformer, where the secondary windings are connected in an open delta. Another possibility is to measure the three phase

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Section 7 Voltage protection

voltages and internally in the protection terminal calculate the corresponding residual voltage and connect this calculated residual voltage to the TRV function block. The function has two steps with separate time delays. If the single-phase (residual) voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either definite time delay or inverse time delay The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase.

7.3.2.1

Measurement principle
The residual voltage is measured continuously, and compared with the set values, U1> and U2>. To avoid oscillations of the output start signal, a hysteresis has been included.

7.3.2.2

Time delay
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (IDMT). For the inverse time delay four different modes are available; inverse curve A, inverse curve B, inverse curve C, and a programmable inverse curve. The type A curve is described as:
t= TD

V - Vpickup Vpickup

(Equation 116)

The type B curve is described as:

t=

k 480 U -U > - 0.5 32 U>


2.0

- 0.035
(Equation 117)

The type C curve is described as:

t=

k 480 U -U > - 0.5 32 U>


3.0

- 0.035
(Equation 118)

The programmable curve can be created as:

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t=

kA U -U > -C B U>
TD A
p

+D

t=

V - Vpickup -C B Vpickup

+D
(Equation 119)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval U> up to U> *(1.0 + CrvSatn/100) the used voltage will be: U> *(1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn -C > 0 100

(Equation 120)

The details of the different inverse time characteristics are shown in chapter "Inverse characteristics". Trip signal issuing requires that the residual overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (IDMT). If the start condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding start output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. It is also remarkable that for the overvoltage function the IDMT reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 149 and figure 150.

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Section 7 Voltage protection

tReset 1 Voltage START tReset1 TRIP

U1>

Hysteresis

Measured Voltage

Time START t1

TRIP

Time Integrator Froozen Timer t1

Linear Decrease

Instantaneous Reset

Time en05000019.vsd

Figure 149:

Voltage profile not causing a reset of the start signal for step 1, and definite time delay

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Voltage START

tReset1 START Hysteresis TRIP

tReset1

U1> Measured Voltage

Time START t1

TRIP

Time Integrator

Froozen Timer

t1

Time Instantaneous Reset Linear Decrease en05000020.vsd

Figure 150:

Voltage profile causing a reset of the start signal for step 1, and definite time delay

7.3.2.3

Blocking
The residual overvoltage function can be partially or totally blocked, by binary input signals where:

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Section 7 Voltage protection

BLOCK: BLKTR1: BLKST1: BLKTR2: BLKST2:

blocks all outputs blocks all trip outputs of step 1 blocks all startrip outputs related to step 1 blocks all trip outputs of step 2 blocks all start and trip inputs related to step 2

7.3.2.4

Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters filter the input voltage signal. The single input voltage is compared to the set value, and is also used for the inverse time characteristic integration. The design of the TRV function is schematically described in figure 151.

UN

Comparator UN > U1> START

Phase 1 Start & Trip Output Logic Step 1

ST1 TR1

Time integrator t1 tReset1 ResetTypeCrv1

TRIP

Comparator UN > U2> START Time integrator t2 tReset2 ResetTypeCrv2

Phase 1 Start & Trip Output Logic Step 2 OR

ST2 TR2

OR

START

TRIP

TRIP

en05000748.vsd

Figure 151:

Schematic design of the TRV function

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Section 7 Voltage protection 7.3.3 Function block


TRV1ROV2PTOV_59N U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2 TRIP TR1 TR2 START ST1 ST2 en06000278.vsd

Figure 152:

TRV function block

7.3.4

Input and output signals


Table 175:
Signal U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

Input signals for the ROV2PTOV_59N (TRV1-) function block


Description Three phase voltages Block of function Block of operate signal, step 1 Block of step 1 Block of operate signal, step 2 Block of step 2

Table 176:
Signal TRIP TR1 TR2 START ST1 ST2

Output signals for the ROV2PTOV_59N (TRV1-) function block


Description Trip Common trip signal from step1 Common trip signal from step2 General start signal Common start signal from step1 Common start signal from step2

7.3.5

Setting parameters

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Table 177:
Parameter Operation UBase OperationStep1 Characterist1

Basic parameter group settings for the ROV2PTOV_59N (TRV1-) function


Range Off On 0.05 - 2000.00 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 200 Step 0.05 Default Off 400.00 On Definite time Unit kV Description Operation Off / On Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

U1>

30

%UB

Voltage setting/start val (DT & IDMT), step 1 in % of UBase Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of UBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

t1 t1Min

0.00 - 6000.00 0.000 - 60.000

0.01 0.001

5.00 5.000

s s

k1

0.05 - 1.10

0.01

0.05

HystAbs1 OperationStep2 Characterist2

0.0 - 100.0 Off On Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 100

0.1 -

0.5 On Definite time

%UB -

U2>

45

%UB

Voltage setting/start val (DT & IDMT), step 2 in % of UBase Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of UBase, step 2

t2 t2Min

0.000 - 60.000 0.000 - 60.000

0.001 0.001

5.000 5.000

s s

k2

0.05 - 1.10

0.01

0.05

HystAbs2

0.0 - 100.0

0.1

0.5

%UB

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Table 178:
Parameter tReset1

Advanced parameter group settings for the ROV2PTOV_59N (TRV1-) function


Range 0.000 - 60.000 Step 0.001 Default 0.025 Unit s Description Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000

Instantaneous

tIReset1 ACrv1

0.001 0.001

0.025 1.000

s -

Time delay in IDMT reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. over voltage IDMT curve, step 1 Time delay in DT reset (s), step 2 Selection of reset curve type for step 2

BCrv1

0.50 - 100.00

0.01

1.00

CCrv1

0.0 - 1.0

0.1

0.0

DCrv1

0.000 - 60.000

0.001

0.000

PCrv1

0.000 - 3.000

0.001

1.000

CrvSat1

0 - 100

tReset2 ResetTypeCrv2

0.000 - 60.000 Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.005 - 200.000

0.001 -

0.025 Instantaneous

s -

tIReset2 ACrv2

0.001 0.001

0.025 1.000

s -

Time delay in IDMT reset (s), step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2

BCrv2

0.50 - 100.00

0.01

1.00

CCrv2

0.0 - 1.0

0.1

0.0

Table continued on next page

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Parameter DCrv2 Range 0.000 - 60.000 Step 0.001 Default 0.000 Unit Description Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. over voltage IDMT curve, step 2

PCrv2

0.000 - 3.000

0.001

1.000

CrvSat2

0 - 100

7.3.6

Technical data
Table 179:
Function Operate voltage, low and high step Absolute hysteresis Inverse time characteristics for low and high step, see table 521 Definite time setting Minimum operate time Operate time, start function Reset time, start function Critical impulse time Impulse margin time

Two step residual overvoltage protection (PTOV, 59N)


Range or value (1-200)% of Ubase (0100)% of Ubase (0.00060.000) s (0.000-60.000) s 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 10 ms typically at 0 to 2 x Uset 15 ms typically Accuracy 1.0% of Ur at U < Ur 1.0% of U at U > Ur 1.0% of Ur at U < Ur 1.0% of U at U > Ur See table 521 0.5% 10 ms 0.5% 10 ms -

7.4

Overexcitation protection (PVPH, 24)


Function block name: OEXxANSI number: 24 IEC 61850 logical node name: OEXPVPH IEC 60617 graphical symbol:

U/f >

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When the laminated core of a power transformer or generator is subjected to a magnetic flux density beyond its design limits, stray flux will flow into non-laminated components not designed to carry flux and cause eddy currents to flow. The eddy currents can cause excessive heating and severe damage to insulation and adjacent parts in a relatively short time. Function has settable inverse operating curve and independent alarm stage.

7.4.2

Principle of operation
The importance of overexcitation protection is growing as the power transformers as well as other power system elements today operate most of the time near their designated limits. Modern design transformers are more sensitive to overexcitation than earlier types. This is a result of the more efficient designs and designs which rely on the improvement in the uniformity of the excitation level of modern systems. Thus, if emergency that includes overexcitation does occur, transformers may be damaged unless corrective action is promptly taken. Transformer manufacturers recommend an overexcitation protection as a part of the transformer protection system. Overexcitation results from excessive applied voltage, possibly in combination with below-normal frequency. Such condition may occur when a unit is on load, but are more likely to arise when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to generators are in particular danger to experience overexcitation condition. It follows from the fundamental transformer equation, see equation 121, that peak flux density Bmax is directly proportional to induced voltage E, and inversely proportional to frequency f, and turns n.
E = 4.44 f n B max A

(Equation 121)

The relative excitation M (relative V/Hz) is therefore according to equation 122.


V- Ef ---------------------------M = relative Hz = ( Ur ) ( fr )
(Equation 122)

Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer be contained within the core only but will extend into other (non-laminated) parts of the power transformer and give rise to Eddy current circulations. Overexcitation will result in: 326 overheating of the non-laminated metal parts, a large increase in magnetizing currents, an increase in core and winding temperature, an increase in transformer vibration and noise. REG 670

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Protection against overexcitation is based on calculation of the relative Volts per Hertz (V / Hz) ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes, typically 5 - 10 seconds. Overexcitation protection may be of particular concern on directly connected generator unit transformers. Directly connected generator-transformers are subjected to a wide range of frequencies during the acceleration and deceleration of the turbine. In such cases, the overexcitation protection may trip the field breaker during a startup of a machine, by means of the overexcitation ALARM signal from the transformer terminal. If this is not possible, the power transformer can be disconnected from the source, after a delay, by the TRIP signal. The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a sustained basis, see equation 123.
E --- 1.1 Ur ----f fr

(Equation 123)

or equivalently, with 1.1 Ur = V/Hz> according to equation 124.


E V/Hz> --- --------------------f fr

(Equation 124)

where:

V/Hz>

is the maximum continuously allowed voltage at no load, and rated frequency.

V/Hz> is an OEX setting parameter. The setting range is 100% to 150%. If the user does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value V/Hz> = 1.10 pu shall be used. In OEX protection function the relative excitation M (relative V/Hz) is expressed according to equation 125.
Ef V- -----M = relative Hz = ------------Ur fr
(Equation 125)

It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f, where the ratio E / f is equal to Ur / fr. A power transformer is not overexcited as long as the relative excitation is M V/Hz>, V/Hz> expressed in %. The relative overexcitation is thus defined as shown in equation 126.
overexcitation = M V/Hz>
(Equation 126)

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The overexcitation protection algorithm is fed with an input voltage U which is in general not the induced voltage E from the fundamental transformer equation. For no load condition, these two voltages are the same, but for a loaded power transformer the internally induced voltage E may be lower or higher than the voltage U which is measured and fed to OEX, depending on the direction of the power flow through the power transformer, the power transformer side where OEX is applied, and the power transformer leakage reactance of the winding. It is important to specify on the OEX function block in CAP 531 configuration tool worksheet on which side of the power transformer OEX is placed As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be significantly different from that at the 110% voltage, no load, rated frequency, provided that the short circuit impedance X can be equally divided between the primary and the secondary winding: Xleak = Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu.. OEX calculates the internal induced voltage E if Xleak (meaning the leakage reactance of the winding where OEX is connected) is known to the user. The assumption taken for 2-winding power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For a 2-winding power transformer the leakage reactances of the two windings depend on how the windings are located on the core with respect to each other. In the case of three-winding power transformers the situation is still more complex. If a user has the knowledge on the leakage reactance, then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. The OEX protection will then take the given measured terminal voltage U, as the induced voltage E. It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss of load, etc. It will be observed that a high phase-to-earth voltage does not mean overexcitation. For example, in an unearthed power system, a single-phase-toearth fault means high voltages of the healthy two phases to earth, but no overexcitation on any winding. The phase-to-phase voltages will remain essentially unchanged. The important voltage is the voltage between the two ends of each winding.

7.4.2.1

Measured voltage
If one phase-to-phase voltage is available from the side where OEX protection is applied, then OEX protection function block shall be set to measure this voltage, MeasuredU. The particular voltage which is used determines the two currents that must be used.This must be chosen with the setting MeasuredI. It is extremely important that MeasuredU and MeasuredI is set to same value! If, for example, voltage Uab is fed to OEX, then currents Ia, and Ib must be applied, etc. From these two input currents, current Iab = Ia - Ib is calculated internally by the

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OEX protection algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the OEX protection algorithm is exited without calculating the excitation. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows 0.000. If three phase-to-earth voltages are available from the side where OEX is connected, then OEX protection function block shall be set to measure positive sequence voltage. In this case the positive sequence voltage and the positive sequence current are used by OEX protection. A check is made within OEX protection if the positive sequence voltage is higher than 70% rated phase-to-earth voltage; below this value, OEX is exited immediately, and no excitation is calculated. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows 0.000. The frequency value is received from the pre-processing block. The function is in operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively. OEX protection function can be connected to any power transformer side, independent from the power flow. The side with a possible On-Load-Tap-Changer (OLTC) must not be used.

7.4.2.2

Operate time of the overexcitation protection.


The operate time of the overexcitation protection is a function of the relative overexcitation. Basically there are two different delay laws available to choose between: the so called IEEE law, and a tailor-made law.

The so called IEEE law approximates a square law and has been chosen based on analysis of the various transformers overexcitation capability characteristics. They can match well a transformer core capability. The square law is according to equation 127.
0.18 k 0.18 k - = -------------------------------------t o p = -------------------------------------------2 2 overexcitation ( M V/Hz> )

(Equation 127)

where: M is excitation, mean value in the interval from t = 0 to t = top is maximum continuously allowed voltage at no load, and rated frequency, in pu and is time multiplier setting for inverse time functions, see figure 154. Parameter k (time multiplier setting) selects one delay curve from the family of curves.

V/Hz>
k

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An analog overexcitation relay would have to evaluate the following integral expression, which means to look for the instant of time t = top according to equation 128.
t op

( M(t) V/Hz> )
0

dt 0.18 k
(Equation 128)

A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes true that:
n

Dt

( M(j)
j=k

V/Hz> ) 0.18 k
(Equation 129)

where: Dt is the time interval between two successive executions of overexcitation function and M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as Ur/fr.

As long as M > V/Hz> (i.e. overexcitation condition), the above sum can only be larger with time, and if the overexcitation persists, the protected transformer will be tripped at j = n. Inverse delays as per figure 154, can be modified (limited) by two special definite delay settings, namely tMax and tMin, see figure 153.
delay in s tMax

under excitation

inverse delay law

overexcitation tMin 0 M=V/Hz> V/Hz> Mmax - V/Hz> Overexcitation M-V/Hz> Mmax Emax Excitation M E (only if f = fr = const) 99001067.vsd

Figure 153:

Restrictions imposed on inverse delays by tMax, and tMin

A definite maximum time, tMax, can be used to limit the operate time at low degrees of overexcitation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is longer than tMax, OEX trips after tMaxt_MaxTripDelay seconds. 330 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 7 Voltage protection

A definite minimum time, tMin, can be used to limit the operate time at high degrees of overexcitation. In case the inverse delay is shorter than tMin, OEX function trips after tMint_MinTripDelay seconds. Also, the inverse delay law is no more valid beyond excitation Mmax. Beyond Mmax (beyond overexcitation Mmax - V/Hz>), the delay will always be tMin, no matter what overexcitation.
Time (s) IEEE OVEREXCITATION CURVES

1000

100 k = 60

k = 20

10

k = 10 k=9 k=8 k=7 k=6 k=5 k=4 k=3 k=2

k=1 1 2 3 4 5 10 20 30 40

OVEREXCITATION IN %

(M-Emaxcont)*100)
en01000373.vsd

Figure 154:

Delays inversely proportional to the square of the overexcitation.

The critical value of excitation Mmax is determined indirectly via OEX protection function setting V/Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency voltage, where the inverse law should be replaced by a short definite delay, tMin. If, for example, V/Hz>> = 140 %, then Mmax is according to equation 130.
(V/Hz>>) f - = 1.40 Mmax = ------------------------Ur fr

(Equation 130)

The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the interval between M = V/Hz>, and M = Mmax is automatically divided into

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five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in the figure 155. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.
delay in s

tMax

underexcitation 0 Emaxcont

tMin Overexcitation M-Emaxcont Mmax - Emaxcont Excitation M Mmax 99001068.vsd

Figure 155:

An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear interpolation. Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would be tMax. Above Mmax, the delay can only be tMin.

7.4.2.3

Cooling
The overexcitation protection OEX is basically a thermal protection; therefore a cooling process has been introduced. Exponential cooling process is applied. Parameter Tcool is an OEX setting, with a default time constant tCooling of 20 minutes. This means that if the voltage and frequency return to their previous normal values (no more overexcitation), the normal temperature is assumed to be reached not before approximately 5 times tCooling minutes. If an overexcitation condition would return before that, the time to trip will be shorter than it would be otherwise.

7.4.2.4

OEX protection function measurands


A service value data item called Time to trip, and designated on the display by tTRIP is available in seconds on the local HMI, or monitoring tool. This value is an estimation of the remaining time to trip if the overexcitation remained on the level it had when the estimation was done. This information can be useful with small or moderate overexcitations. If the overexcitation is so low that the valid delay is tMax, then the estimation of the remaining time to trip is done against tMax. The displayed relative excitation M, designated on the display by V/Hz is calculated from the expression:
V Ef - = ------------M = relative ----- Hz Uf fr

(Equation 131)

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If less than V / Hz = V/Hz> (in pu) is shown on the HMI display (or read via SM/ RET521), the power transformer is underexcited. If the value of V/Hz is shown which is equal to V/Hz> (in pu), it means that the excitation is exactly equal to the power transformer continuous capability. If a value higher than the value of V/Hz> is shown, the protected power transformer is overexcited. For example, if V/Hz = 1.100 is shown, while V/Hz> = 110 %, then the power transformer is exactly on its maximum continuous excitation limit. The third item of the OEX protection service report is the thermal status of the protected power transformer iron core, designated on the display by ThermalStatus. This gives the thermal status in % of the trip value which corresponds to 100%. Thermal Status should reach 100% at the same time, when tTRIP reaches 0 seconds. If the protected power transformer is then for some reason not switched off, the ThermalStaus shall go over 100%. If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or TMin, then the Thermal Status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay is limited by tMax, then the OEX TRIP output signal will be set to 1 before the Thermal status reaches 100%.

7.4.2.5

Overexcitation alarm
A separate step, AlarmLevel, is provided for alarming purpose. The voltages are normally set 2% lower and has a definite time delay, tAlarm. This will give the operator an early abnormal voltages warning.
OVEX: FS = 1 = 2*SI + SU BLOCK SIDE Prepool I SI1
V/Hz> M>V/Hz>

AlarmLevel

t
tAlarm

t>tAlarm

&

ALARM

t
Calculation of internal induced voltage Ei tMin k M

t>tMin

&

TRIP

SI2 Prepool O SU1 2

Ei

M= (Ei / f) (Ur / fr)

IEEE law

M Tailor-made law M>V/Hz>> Xleak

t
tMax

ERROR V/Hz>>

M = relative V/Hz as service value

en05000162.vsd

Figure 156:

A logic diagram over Overexcitation protection function.

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7.4.2.6 Logic diagram

Figure 157:

A simplified diagram of the OEX protection function

Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The cooling process is not shown. It is not shown that voltage and frequency are separately checked against their respective limit values.

7.4.3

Function block
OEX1OEXPVPH_24 I3P U3P BLOCK RESET TRIP START ALARM

en05000329.vs d

Figure 158:

OEX function block

7.4.4

Input and output signals


Table 180:
Signal I3P U3P BLOCK RESET

Input signals for the OEXPVPH_24 (OEX1-) function block


Description Current connection Voltage connection Block of function Reset operation

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Table 181:
Signal TRIP START ALARM

Output signals for the OEXPVPH_24 (OEX1-) function block


Description Trip from overexcitation function Overexcitation above set operate level (instantaneous) Overexcitation above set alarm level (delayed)

7.4.5

Setting parameters
Table 182:
Parameter MeasuredU

Basic general settings for the OEXPVPH_24 (OEX1-) function


Range PosSeq L1L2 L2L3 L3L1 L1L2 L2L3 L3L1 PosSeq Step Default L1L2 Unit Description Selection of measured voltage

MeasuredI

L1L2

Selection of measured current

Table 183:
Parameter Operation IBase UBase V/Hz>

Basic parameter group settings for the OEXPVPH_24 (OEX1-) function


Range Off On 1 - 99999 0.05 - 2000.00 100.0 - 180.0 Step 1 0.05 0.1 Default Off 3000 400.00 110.0 Unit A kV %UB/f Description Operation Off / On Base current (rated phase current) in A Base voltage (main voltage) in kV Operate level of V/Hz at no load and rated freq in % of (Ubase/ frated) High level of V/Hz above which tMin is used, in % of (Ubase/ frated) Winding leakage reactance in primary ohms Length of the pulse for trip signal (in sec) Minimum trip delay for V/Hz inverse curve, in sec Maximum trip delay for V/Hz inverse curve, in sec

V/Hz>>

100.0 - 200.0

0.1

140.0

%UB/f

XLeak

0.000 - 200.000

0.001

0.000

ohm

TrPulse tMin

0.000 - 60.000 0.000 - 60.000

0.001 0.001

0.100 7.000

s s

tMax

0.00 - 9000.00

0.01

1800.00

Table continued on next page

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Parameter tCooling Range 0.10 - 9000.00 Step 0.01 Default 1200.00 Unit s Description Transformer magnetic core cooling time constant, in sec Inverse time curve selection, IEEE/Tailor made Time multiplier for IEEE inverse type curve Alarm operate level as % of operate level Alarm time delay, in sec

CurveType

IEEE Tailor made 1 - 60

IEEE

kForIEEE

AlarmLevel tAlarm

50.0 - 120.0 0.00 - 9000.00

0.1 0.01

100.0 5.00

% s

Table 184:
Parameter t1Tailor

Advanced parameter group settings for the OEXPVPH_24 (OEX1-) function


Range 0.00 - 9000.00 Step 0.01 Default 7200.00 Unit s Description Time delay t1 (longest) for tailor made curve, in sec Time delay t2 for tailor made curve, in sec Time delay t3 for tailor made curve, in sec Time delay t4 for tailor made curve, in sec Time delay t5 for tailor made curve, in sec Time delay t6 (shortest) for tailor made curve, in sec

t2Tailor t3Tailor t4Tailor t5Tailor t6Tailor

0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00

0.01 0.01 0.01 0.01 0.01

3600.00 1800.00 900.00 450.00 225.00

s s s s s

7.4.6

Technical data
Table 185:
Function Operate value, start Operate value, alarm Operate value, high level Table continued on next page

Overexcitation protection (PVPH, 24)


Range or value (100180)% of (Ubase/frated) (50120)% of start level (100200)% of (Ubase/frated) Accuracy 1.0% of U 1.0% of Ur at U Ur 1.0% of U at U > Ur 1.0% of U

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Function Curve type Range or value IEEE or customer defined Accuracy Class 5 + 40 ms

IEEE : t =

(0.18 k ) ( M - 1) 2

where M = relative (V/Hz) = (E/f)/ (Ur/fr) Minimum time delay for inverse function Maximum time delay for inverse function Alarm time delay (0.00060.000) s (0.009000.00) s (0.00060.000) s 0.5% 10 ms 0.5% 10 ms 0.5% 10 ms

7.5

Voltage differential protection (PTOV, 60)


Function block name: VDC ANSI number: 60 IEC 61850 logical node name: VDCPTOV IEC 60617 graphical symbol:

7.5.1

Introduction
A voltage differential monitoring function is available. It compares the voltages from two three phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be used to supervise the voltage from two fuse groups or two different voltage transformers fuses as a fuse/MCB supervision function.

7.5.2

Principle of operation
The function is based on comparison of the amplitudes of the two voltages connected in each phase. Possible differences between the ratios of the two Voltage/Capacitive voltage transformers can be compensated for with a ratio correction factors RFLx The voltage difference is evaluated and if it exceeds the alarm level UDAlarm or trip level UDTrip signals for alarm (ALARM output) or trip (TRIP output) is given after definite time delay tAlarm respectively tTrip. The two three phase voltage supplies are also supervised with undervoltage settings U1Low and U2Low. The outputs for loss of voltage U1LOW resp U2LOW will be activated. The U1 voltage is supervised for loss of individual phases whereas the U2 voltage is supervised for loss of all three phases. Loss of one U1or all U2 voltages will block the differential measurement. This blocking can be switched off with setting BlkDiffAtULow=No.

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The function can be blocked from an external condition with the binary BLOCK input. It can e.g. be activated from a fuse failure supervision function block. To allow easy commissioning the measured differential voltage is available as service value. This allows simple setting of the ratio correction factor to achieve full balance in normal service. The principle logic diagram is shown in figure 159.
UDTripL1>

AND O R tReset tTrip t t

UDTripL1>

AND

AND

TRIP

UDTripL1>

AND AND

START

UDAlarmL1>

AND O R tAlarm

UDAlarmL1>

AND

AND

ALARM

UDAlarmL1>

AND

U1<L1 U1<L2 U1<L3 BlkDiffAtULow U2<L1 U2<L2 U2<L3 BLOCK AND t1 t AND U2LOW OR OR tAlarm t AND U1LOW

AND

en06000382.vsd

Figure 159:

Principle logic for voltage differential function

7.5.3

Function block
VDC1VDCPTOV_60 U3P1 U3P2 BLOCK TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF en06000528.vsd

Figure 160:

VDC function block

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Section 7 Voltage protection 7.5.4 Input and output signals


Table 186:
Signal U3P1 U3P2 BLOCK

Input signals for the VDCPTOV_60 (VDC1-) function block


Description Bus voltage Capacitor voltage Block of function

Table 187:
Signal TRIP START ALARM U1LOW U2LOW UL1DIFF UL2DIFF UL3DIFF

Output signals for the VDCPTOV_60 (VDC1-) function block


Description Voltage differential protection operated Start of voltage differential protection Voltage differential protection alarm Loss of U1 voltage Loss of U2 voltage Differential Voltage phase L1 Differential Voltage phase L2 Differential Voltage phase L3

7.5.5

Setting parameters
Table 188:
Parameter Operation UBase BlkDiffAtULow UDTrip tTrip

Basic parameter group settings for the VDCPTOV_60 (VDC1-) function


Range Off On 0.50 - 2000.00 No Yes 0.0 - 100.0 0.000 - 60.000 Step 0.01 0.1 0.001 Default Off 400.00 Yes 5.0 1.000 Unit kV %UB s Description Operation Off/On Base Voltage Block operation at low voltage Operate level, in % of UBase Time delay for voltage differential operate, in milliseconds Time delay for voltage differential reset, in seconds Input 1 undervoltage level, in % of UBase Input 2 undervoltage level, in % of UBase

tReset

0.000 - 60.000

0.001

0.000

U1Low U2Low

0.0 - 100.0 0.0 - 100.0

0.1 0.1

70.0 70.0

%UB %UB

Table continued on next page

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Parameter tBlock UDAlarm tAlarm Range 0.000 - 60.000 0.0 - 100.0 0.000 - 60.000 Step 0.001 0.1 0.001 Default 0.000 2.0 2.000 Unit s %UB s Description Reset time for undervoltage block Alarm level, in % of UBase Time delay for voltage differential alarm, in seconds

Table 189:
Parameter RFL1

Advanced parameter group settings for the VDCPTOV_60 (VDC1-) function


Range 0.000 - 3.000 Step 0.001 Default 1.000 Unit Description Ratio compensation factor phase L1 UCap*RFL1=UL1Bus Ratio compensation factor phase L2 UCap*RFL2=UL2Bus Ratio compensation factor phase L3 UCap*RFL3=UL3Bus

RFL2

0.000 - 3.000

0.001

1.000

RFL3

0.000 - 3.000

0.001

1.000

7.5.6

Technical data
Table 190:
Function Voltage difference for alarm and trip Under voltage level Timers

Voltage differential protection (PTOV)


Range or value (0.0100.0) % of Ubase (0.0100.0) % of Ubase (0.00060.000)s Accuracy 0.5 % of Ur 0.5% of Ur 0.5% 10 ms

7.6

95% and 100% Stator earthground fault protection based on 3rd harmonic
Function block name: ANSI number: 64S IEC 61850 logical node name: IEC 60617 graphical symbol:

UN> / U0d(3rd harm)

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Section 7 Voltage protection 7.6.1 Introduction


Stator earth fault is a fault type having relatively high fault rate. The generator systems normally have high impedance earthing, i.e. earthing via a neutral point resistor. This resistor is normally dimensioned to give an earth fault current in the range 5 15 A at a solid earth fault directly at the generator high voltage terminal. The relatively small earth fault currents give much less thermal and mechanical stress on the generator, compared to the short circuit case. Anyhow, the earth faults in the generator have to be detected and the generator has to be tripped, even if longer fault time compared to short circuits, can be allowed. In normal non-faulted operation of the generating unit the neutral point voltage is close to zero, and there is no zero sequence current flow in the generator. When a phase-to-earth fault occurs the neutral point voltage will increase and there will be a current flow through the neutral point resistor. To detect an earth fault on the windings of a generating unit one may use a neutral point overvoltage relay, a neutral point overcurrent relay, a zero sequence overvoltage relay or a residual differential protection. These protection schemes are simple and have served well during many years. However, at best these simple schemes protect only 95% of the stator winding. They leave 5% at the neutral end unprotected. Under unfavourable conditions the blind zone may extend to 20% from the neutral. The 95% stator earth fault typically measures the fundamental frequency voltage component in the generator star point and it operates when it exceeds the preset value. By using this principle earth fault protection for approximately 95% of the stator winding can be protected. In order to protect the last 5% of the stator winding close to the neutral end the third harmonic voltage measurement can be performed. In REG 670 either third harmonic differential principle of neutral point third harmonic undervoltage principle can be provided. Combination of these two measuring principles provide coverage for entire stator winding against earth faults.

7.6.2

Principle of operation
The protection is a combination of a 95% fundamental frequency earth fault protection and a 100% 3rd harmonic base earth fault protection. The 3rd harmonic based 100% stator earth fault protection is using the 3rd harmonic voltage generated by the generator itself. To assure reliable function of the protection it is necessary that the 3rd harmonic voltage generation is at least 1% of the generator rated voltage. The third harmonic voltage generated by the generator has the same phase angle in the three phases. It has the characteristic of a zero sequence component. If the generator is connected to the power system via a block transformer that cannot transform zero sequence voltages between the voltage levels, the 3rd harmonic voltage in the generator system will not influence nor be influenced by the external power system. At normal operation the generator third harmonic voltage characteristic can be described as in figure 161.

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- DU 3 +

U3

+ U3T,L
1

U3N

+ U3T,L2 -

+ U3T,L3 -

U3T

U3N

en06000448.vsd

Figure 161:

Generator third harmonic voltage characteristic at normal operation

The generator is modelled as parts of a winding where a 3rd harmonic voltage is induced along the winding, represented by the voltage U3 in the figure. Via the winding capacitances to earth and the neutral point resistor there will be a small 3rd harmonic current flow, giving the voltages U3N and U3T. It can easily be seen that the 3rd harmonic voltage in the generator neutral point (U3N) will be close to zero in case of a stator earth fault close to the neutral. This fact alone can be used as an indication of stator earth fault. To enable better sensitivity and stability also measurement of the terminal 3rd harmonic zero sequence voltage is used. In addition to the decrease of U3N the terminal voltage U3T will increase at the stator earth fault close to the generator neutral point. Therefore the 3rd harmonic zero sequence voltage U3T is used in the protection. In the protection algorithm equation 133 is used:
U 3N + U 3T b U 3N
(Equation 133)

The factor b must be set not to risk operation at non-faulted conditions. The voltage U3N is measured via a voltage transformer between the generator neutral point and earth. The voltage U3T can be measured in different ways. The setting 342 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 7 Voltage protection

TVoltType defines how the protection function is fed from voltage transformers at the high voltage side of the generator. If UT3 is lower than the set level UT3Blk Level, the function is blocked. 0: There is no voltage measured from the generator terminal side. This can be the case when there are only phase-to-phase voltage transformers available at the generator terminal side. In this case the protection will operate as a simple neutral point 3rd harmonic undervoltage protection, which must be blocked externally during generator start-up and shut-down. 1: The function is fed from an open delta connection of the phase to earth connected voltage transformers at the generator terminal side, U3T=(1/3)*U_Open_Delta. 2: The function is fed from the three phase to earth connected voltage transformers at the generator terminal side. The 3rd harmonic voltage U3T is calculated in the IED, U3T=(1/3)*(U3L1+U3L2+U3L3). 35: The function is fed from one phase voltage transformer only. The 3rd harmonic zero sequence voltage is assumed to be equal to any of the phase voltages, as the third harmonic voltage is of zero sequence type, U3T=U3Lx. A simplified block diagram describing the stator earth fault protection function shown in figure 162.

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Samples: Generator terminal voltage

3rd harmonic Fourier filtering giving UT3

TRIP Complex UT3 Stator Earth Fault detection 100 % Start Start and trip logic TRIP3H TRIPUN START3H STARTUN

Samples: Generator neutral point voltage

3rd harmonic Fourier filtering giving UN3

Complex UN3

Fundamental frequency residual voltage

Stator Earth Fault detection 90 %

Start

CB Status Block

en06000449.vsd

Figure 162:

Simplified logic diagram for stator earth fault protection

The function can be described in a simplified logical diagram as shown in figure 163.

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Figure 163:

Simplified logical diagram of the 100 % stator earth fault protection

There are two different cases of generator block configuration; with or without generator circuit breaker. If there is no generator breaker the capacitive coupling to earth is the same at all operating conditions. When there is a generator breaker the capacitive coupling to earth differ between the operating conditions when the generator is running with the generator breaker open (before synchronization) and with the circuit breaker open. This can be shown as in figure 164.
- DU 3 + + U3T,L1 U3 +

U3N

+ U3T,L2 -

+ U3T,L3 -

en07000002.vsd

Figure 164:

Generator block with generator circuit breaker

With the circuit breaker open the total capacitance will be smaller compared to normal operating conditions. This means that the neutral point third harmonic voltage will be reduced compared to the normal operating condition. Therefore there is a

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possibility to reduce the sensitivity of the protection when the generator circuit breaker is open. With the setting CBExists change of the sensitivity is enabled. If the binary input signal CBCLOSED is activated the set sensitivity is valid. If the generator circuit breaker is opened the binary input CBCLOSED is deactivated and the sensitivity is changed. This is done by changing the factor b with a set constant FactorCBOpen. In addition to the binary outputs also some analog outputs are available from the protection function: E3: the magnitude of the 3rd harmonic voltage induced in the stator given in primary volts UN3: the magnitude of the 3rd harmonic voltage measured in the neutral point of the generator UT3: the magnitude of the 3rd harmonic voltage measured in the terminal point of the generator ANGLE: the angle between the phasors UN3 and UT3 given in radians DU3: the magnitude of the 3rd harmonic differential voltage BU3: the magnitude of the 3rd harmonic bias voltage UN: the fundamental frequency voltage measured in the neutral point of the generator

7.6.3

Function block
STE1STEFPHIZ_59THD NEUTVOLT TRIP UT3HL1RE TRIP3H TERMVOLT TRIPUN UT3HL1IM START UT3HL2RE START3H UT3HL2IM STARTUN UT3HL3RE UT3 UT3HL3IM UN3 UT3RESRE E3 UT3RESIM ANGLE UN3HRE DU3 UN3HIM BU3 UNFUNDH UN CBCLOSED BLOCK BLOCK3RD BLOCKUN en07000033.vsd

Figure 165:

STE function block

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Section 7 Voltage protection 7.6.4 Input and output signals


Table 191:
Signal NEUTVOLT UT3HL1RE TERMVOLT UT3HL1IM UT3HL2RE UT3HL2IM UT3HL3RE UT3HL3IM UT3RESRE UT3RESIM UN3HRE UN3HIM UNFUNDH CBCLOSED BLOCK BLOCK3RD BLOCKUN

Input signals for the STEFPHIZ_59THD (STE1-) function block


Description Voltage connection neutral side Voltage, terminal side, 3rd harmonic L1, real part Open-Delta connection on Terminal side Voltage, terminal side, 3rd harmonic L1, imag part Voltage, terminal side, 3rd harmonic L2, real part Voltage, terminal side, 3rd harmonic L2, imag part Voltage, terminal side, 3rd harmonic L3, real part Voltage, terminal side, 3rd harmonic L3, imag part Voltage, terminal side, 3rd harmonic residual, real part Voltage, terminal side, 3rd harmonic residual, imag part 3rd harmonic voltage, neutral side, real part 3rd harmonic voltage, neutral side, imaginary part Voltage neutral side fundamental harmonic, magnitude Input 1 (TRUE) means breaker between gen. & tr. is closed Complete block of the stator earth fault protecion function Block of the 3rd harmonic-based parts of the protection Block of the fund. harmonic-based part of the protection

Table 192:
Signal TRIP TRIP3H TRIPUN START START3H STARTUN UT3 UN3 E3 ANGLE DU3 BU3 UN

Output signals for the STEFPHIZ_59THD (STE1-) function block


Description Main, common trip command Trip by one of two 3rd harmonic voltage-based prot. Trip by fund. freq. neutral over-voltage protection Main, common start signal Start by one of two 3rd harmonic voltage-based prot. Start signal by fund. freq. neutral over-voltage prot. Mag. of 3rd harm. voltage at generator terminal side, Volts Mag. of 3rd harm. voltage at generator neutral side, Volts Total induced stator 3rd harmonic voltage, primary Volts Angle between 3rd harmonic votage phasors, radians Diff. between 3rd harm. volt. at both sides of gen., Volts Bias voltage, a part of voltN3rdHarmonic, primary Volts Fund. frequency voltage at generator neutral, primary Volts

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Section 7 Voltage protection 7.6.5 Setting parameters


Table 193:
Parameter GenRatedVolt

Basic general settings for the STEFPHIZ_59THD (STE1-) function


Range 1.0 - 100.0 Step 0.1 Default 10.0 Unit kV Description Generator rated (nominal) phase-tophase voltage in kV Used connection type for gen. terminal voltage transformer

TVoltType

NoVoltage ResidualVoltage AllThreePhases PhaseL1 PhaseL2 PhaseL3

ResidualVoltage

Table 194:
Parameter Operation Beta

Basic parameter group settings for the STEFPHIZ_59THD (STE1-) function


Range Off On 0.50 - 10.00 Step 0.01 Default Off 1.00 Unit Description Operation Off / On Portion of voltN3rdHarmonic used as bias Defines if generator CB exists (between Gen & Transformer) Beta is multiplied by this factor when CB is open Pickup 3rd Harm U< protection (when activated) % of UB/ 1,732 If UT3 is below limit 3rdH Diff is blocked, in % of UB/1,732 Pickup fundamental UN> protection (95% SEF), % of UB/1,732 Operation delay of 3rd harm-based protection (100% SEF) in s Operation delay of fundamental UN> protection (95% SEF) in s

CBexists

No Yes 1.00 - 10.00

No

FactorCBopen

0.01

1.00

UN3rdH<

0.5 - 10.0

0.1

2.0

UT3BlkLevel

0.1 - 10.0

0.1

1.0

UNFund>

1.0 - 50.0

0.1

5.0

t3rdH

0.020 - 60.000

0.001

1.000

tUNFund

0.020 - 60.000

0.001

0.500

7.6.6

Technical data

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Section 7 Voltage protection

Table 195:
Function

100% stator earth fault protection (PHIZ, 59THD)


Range or value (1.050.0)% of Ubase (0.510.0)% of Ubase (0.110.0)% of Ubase (0.02060.000) s Reject third harmonic by 140 Reject fundamental harmonic by 140 Accuracy 0.5% of Ur 0.5% of Ur 0.5% of Ur 0.5% 10 ms -

Fundamental frequency level UN (95% Stator EF) Third harmonic differential level Third harmonic differential block level Timers Filter characteristic: Fundamental Third harmonic

7.7

Rotor earthground fault protection


Function block name: ANSI number: 64R IEC 61850 logical node name: IEC 60617 graphical symbol:

IN> Rotor

7.7.1
7.7.1.1

Introduction
Rotor earthground fault (GAPC, 64R)
The field winding, including the rotor winding and the non-rotating excitation equipment, is always insulated from the metallic parts of the rotor. The insulation resistance is high if the rotor is cooled by air or by hydrogen. The insulation resistance is much lower if the rotor winding is cooled by water. This is true even if the insulation is intact. A fault in the insulation of the field circuit will result in a conducting path from the field winding to earth. This means that the fault has caused a field earth fault. The field circuit of a synchronous generator is normally unearthed. Therefore, a single earth fault on the field winding will cause only a very small fault current. Thus the earth fault does not produce any damage in the generator. Furthermore, it will not affect the operation of a generating unit in any way. However, the existence of a single earth fault increases the electric stress at other points in the field circuit. This means that the risk for a second earth fault at another point on the field winding has increased considerably. A second earth fault will cause a field short-circuit with severe consequences. The rotor earth fault protection is based on injection of an AC voltage to the isolated field circuit. In non-faulted conditions there will be no current flow associated to this injected voltage. If a rotor earth fault occurs, this condition will be detected by the

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Section 7 Voltage protection

rotor earth fault protection. Depending on the generator owner philosophy this operational state will be alarmed and/or the generator will be tripped.

7.7.2
7.7.2.1

Principle of operation
Rotor earthground fault
The protection function uses injection of an ac voltage to the generator field circuit. The COMBIFLEX voltage injection unit RXTTE4, Part No 1MRK 002 108-AB contains a voltage transformer with a primary winding for connection to 120 or 230 V, 50 or 60 Hz supply voltage. From the secondary winding of this internal voltage transformer approximately 40 V AC is injected via series capacitors and resistors into the rotor circuit. The injected voltage and current are fed to one voltage input and one current input of the REG 670 IED. 1A rated current input into REG 670 must be used for this function.

The current caused by the injection is fed to a current input of the REG 670 IED via injection unit RXTTE4, as shown in figure 166.

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Section 7 Voltage protection

Generator rotor winding

Connection to be done by the panel builder / field contractor


RXTTE 4 REG 670 221

Optional external resistor


222

421 I 428

313 314 324 U 325 321 315

230 V AC 120 V AC 0

en07000185.vsd

Figure 166:

Connection of rotor earth fault protection

By using a two stage directional current measurement in the general application multipurpose function (GAPC), as shown in figure 167, the earth fault current on the DC side of the excitation is detected. The protection operates when the resistive component of the measured injected current exceeds the pre-set operate level. Stage one provides an alarm signal and stage two trips the generator after a short time delay for fully developed rotor earth faults.

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Operating Region

IINJECTED

UINJECTED

en06000447.vsd

Figure 167:

Two stage directional current measurement in the general application multipurpose function

The sensitivity of the rotor earth fault protection is dependent of the rotor winding capacitance to earth and the set pick-up current level of the measurement multipurpose function (GAPC). The sensitivity is shown in figure 168.

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REG 670 : 50 Hz : Raxle=0


10 0

10

ko hm

0 ,1 0 1 2 uF 3 0 mA 4 0 mA 50 mA 70 mA 10 0 mA 150 mA 2 0 0 mA 3 0 0 mA 3 4 5

en06000445.vsd

Figure 168:

Sensitivity dependence of winding capacitance at different current settings

The undervoltage stage of the general application multipurpose function (GAPC) can be used to monitor the injection voltage and give alarm if the injection voltage is absent. It shall be set to 80% of the rated value of the rated value of the injected voltage with a time delay of about 10 s. An additional instance of the general application multipurpose function (GAPC) can be used to provide a third non-directional overcurrent stage which can be used to detect earth faults on the AC side of the rectifier in case of a static excitation system. It shall be set to operate when the magnitude of the injected current into the rotor circuit exceeds 125 mA and with a delay of 5 s. As the CT in RXTTE4 has a ratio 10:1 the current measured by REG 670 will be at least 1.25 A for this fault.

7.7.3

Technical data
Table 196:
Function Permitted field voltage maximum Supply voltage 120 or 230 V Operate earth fault resistance value Table continued on next page

Rotor earth fault protection (PHIZ, 59THD) Based on General current and voltage protection (GAPC) and (RXTTE4)
Range or value 1200 V DC 50/60 Hz Approx. 120 k Accuracy -

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Function Influence of harmonics in the DC field voltage Permitted leakage capacitance Permitted shaft earthing resistance Protective resistor Range or value Negligible influence of 50 V, 150 Hz or 50 V, 300 Hz (15) F Maximum 200 220 , 100 W, plate 135 x 160 mm Accuracy -

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Section 8 Frequency protection

Section 8

Frequency protection
About this chapter
This chapter describes the frequency protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

8.1

Underfrequency protection (PTUF, 81)


Function block name: TUFxANSI number: 81 IEC 61850 logical node name: SAPTUF IEC 60617 graphical symbol:

f<

8.1.1

Introduction
Underfrequency occurs as a result of lack of generation in the network. The function can be used for load shedding systems, remedial action schemes, gas turbine start-up etc. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement. Up to independent under frequency steps are available.

8.1.2

Principle of operation
The underfrequency (TUF) function is used to detect low power system frequency. The function can either have a definite time delay or a voltage magnitude dependent time delay. If the voltage magnitude dependent time delay is applied the time delay will be longer if the voltage is higher and shorter if the voltage is lower. If the frequency remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage the function is blocked and no start or trip signal is issued.

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Section 8 Frequency protection

8.1.2.1

Measurement principle
The fundamental frequency of the measured input voltage is measured continuously, and compared with the set value, StartFrequency. The frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases the setting IntBlkStVal, the underfrequency function is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the setting UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output start signal, a hysteresis has been included.

8.1.2.2

Time delay
The time delay for the underfrequency function can be either a settable definite time delay or a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the definite time delay, the setting tTrip sets the time delay For the voltage dependent time delay the measured voltage level and the settings UNom, UMin, Exponent, tMax and tMin set the time delay according to figure 169 and equation 134. The setting TimerOperation is used to decide what type of time delay to apply. The output STARTDUR, gives the time elapsed from the issue of the start output, in percent of the total operation time available in PST. Trip signal issuing requires that the underfrequency condition continues for at least the user set time delay. If the start condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. On the output of the underfrequency function a 100 ms pulse is issued, after a time delay corresponding to the setting of TimeDlyRestore, when the measured frequency returns to the level corresponding to the setting RestoreFreq.

8.1.2.3

Voltage dependent time delay


Since the fundamental frequency in a power system is the same all over the system, except some deviations during power oscillations, another criterion is needed to decide, where to take actions, based on low frequency. In many applications the voltage level is very suitable, and in most cases is load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay has been introduced, to make sure that load shedding, or other actions, take place at the right location. At constant voltage, U, the voltage dependent time delay is calculated according to equation 134. At non-constant voltage, the actual time delay is integrated in a similar

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Section 8 Frequency protection

way as for the inverse time characteristic for the undervoltage and overvoltage functions.
U - UMin t= UNom - UMin
Exponent

( tMax - tMin ) + tMin

(Equation 134)

where: t U Exponent tMax, tMin is the voltage dependent time delay (at constant voltage), is the measured voltage is a setting, are time settings.

UMin, UNom are voltage settings corresponding to

The inverse time characteristics are shown in figure 169, for:


UMin UNom tMax tMin Exponent = 90% = 100% = 1.0 s = 0.0 s = 0, 1, 2, 3 and 4

TimeDlyOperate [s]

Exponenent 3
0.5

1 2

90

95

100

U [% of UBase]
en05000075.vsd

Figure 169:

Voltage dependent inverse time characteristics for the underfrequency function. The time delay to operate is plotted as a function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.

8.1.2.4

Blocking
The underfrequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:

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Section 8 Frequency protection

BLOCK: BLKTRIP: BLKREST:

blocks all outputs blocks the TRIP output blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the trip outputs, are blocked.

8.1.2.5

Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults. The time integrator can operate either due to a definite delay time or to the special voltage dependent delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRestore. The design of the underfrequency function is schematically described in figure 170.

Block OR Comparator U < IntBlockLevel BLOCK BLKDMAGN

Voltage

Time integrator TimerOperation Mode Selector TimeDlyOperate TimeDlyReset START TRIP Start & Trip Output Logic START

Frequency

Comparator f < StartFrequency

TRIP

100 ms Comparator f > RestoreFreq TimeDlyRestore RESTORE

en05000726.vsd

Figure 170:

Schematic design of the underfrequency function

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Section 8 Frequency protection 8.1.3 Function block


TUF1SAPTUF_81 U3P BLOCK BLKTRIP BLKREST TRIP START RESTORE BLKDMAGN Frequency en06000279.vsd

Figure 171:

TUF function block

8.1.4

Input and output signals


Table 197:
Signal U3P BLOCK BLKTRIP BLKREST

Input signals for the SAPTUF_81 (TUF1-) function block


Description Voltage connection Block of function Blocking operate output. Blocking restore output.

Table 198:
Signal TRIP START RESTORE BLKDMAGN Frequency

Output signals for the SAPTUF_81 (TUF1-) function block


Description Operate/trip signal for frequency. Start/pick-up signal for frequency. Restore signal for load restoring purposes. Blocking indication due to low amplitude. Measured frequency

8.1.5

Setting parameters
Table 199:
Parameter Operation UBase StartFrequency IntBlockLevel

Basic parameter group settings for the SAPTUF_81 (TUF1-) function


Range Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 Step 0.05 0.01 1 Default Off 400.00 48.80 50 Unit kV Hz %UB Description Operation Off / On Base voltage Frequency setting/ start value. Internal blocking level in % of UBase.

Table continued on next page

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Section 8 Frequency protection


Parameter TimeDlyOperate Range 0.000 - 60.000 Step 0.001 Default 0.200 Unit s Description Operate time delay in over/under-frequency mode. Time delay for reset. Restore time delay. Restore frequency if frequency is above frequency value. Setting for choosing timer mode. Nominal voltage in % of UBase for voltage based timer. Lower operation limit in % of UBase for voltage based timer. For calculation of the curve form for voltage based timer. Maximum time operation limit for voltage based timer. Minimum time operation limit for voltage based timer.

TimeDlyReset TimeDlyRestore RestoreFreq

0.000 - 60.000 0.000 - 60.000 45.00 - 65.00

0.001 0.001 0.01

0.000 0.000 50.10

s s Hz

TimerOperation UNom

Definite timer Volt based timer 50 - 150

Definite timer 100

%UB

UMin

50 - 150

90

%UB

Exponent

1.0

0.1

0.0 - 5.0

tMax

0.010 - 60.000

0.001

1.000

tMin

0.010 - 60.000

0.001

1.000

8.1.6

Technical data
Table 200:
Function Operate value, start function Operate time, start function Reset time, start function Operate time, definite time function Reset time, definite time function Voltage dependent time delay
U - UMin t= UNom - UMin
Exponent

Underfrequency protection (PTUF, 81)


Range or value (35.00-75.00) Hz 100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s Settings: UNom=(50-150)% of Ubase UMin=(50-150)% of Ubase Exponent=0.0-5.0 tMax=(0.000-60.000)s tMin=(0.000-60.000)s Accuracy 2.0 mHz 0.5% + 10 ms 0.5% + 10 ms Class 5 + 200 ms

( tMax - tMin ) + tMin

U=Umeasured

8.2
360

Overfrequency protection (PTOF, 81)


Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 8 Frequency protection

Function block name: TOFxANSI number: 81 IEC 61850 logical node name: SAPTOF

IEC 60617 graphical symbol:

f>

8.2.1

Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network. In some cases close to generating part governor problems can also cause overfrequency. The function can be used for generation shedding, remedial action schemes etc. It can also be used as a sub-nominal frequency stage initiating load restoring. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement.

8.2.2

Principle of operation
The Overfrequency (TOF) function is used to detect high power system frequency. The function has a settable definite time delay. If the frequency remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage the function is blocked and no start or trip signal is issued.

8.2.2.1

Measurement principle
The fundamental frequency of the positive sequence voltage is measured continuously, and compared with the set value, StartFrequency. The frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlkStVal, the overfrequency function is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output start signal, a hysteresis has been included.

8.2.2.2

Time delay
The time delay for the overfrequency function is a settable definite time delay, specified by the setting tTrip. The output STARTDUR, gives the time elapsed from the issue of the start output, in percent of the total operation time available in PST.

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Section 8 Frequency protection

Trip signal issuing requires that the overfrequency condition continues for at least the user set time delay. If the start condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.

8.2.2.3

Blocking
The overfrequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:
TOF-BLOCK: TOF-BLKTRIP: blocks all outputs blocks the TOF-TRIP output

If the measured voltage level decreases below the setting of IntBlkStVal, both the start and the trip outputs, are blocked.

8.2.2.4

Design
The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting StartFrequency. The frequency signal is filtered to avoid transients due to switchings and faults in the power system. The time integrator operates due to a definite delay time. The design of the overfrequency function is schematically described in figure 172.

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BLOCK BLKTRIP Comparator U < IntBlockLevel OR BLOCK BLKDMAGN

Voltage

Time integrator Definite Time Delay START Comparator f > StartFrequency

Start & Trip Output Logic

START

Frequency

TimeDlyOperate TRIP TimeDlyReset TRIP

en05000735.vsd

Figure 172:

Schematic design of the overfrequency function

8.2.3

Function block
TOF1SAPTOF_81 U3P BLOCK BLKTRIP TRIP START BLKDMAGN Frequency en06000280.vsd

Figure 173:

TOF function block

8.2.4

Input and output signals


Table 201:
Signal U3P BLOCK BLKTRIP

Input signals for the SAPTOF_81 (TOF1-) function block


Description Voltage connection Block of function Blocking operate output.

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Table 202:
Signal TRIP START BLKDMAGN Frequency

Output signals for the SAPTOF_81 (TOF1-) function block


Description Operate/trip signal for frequency. Start/pick-up signal for frequency. Blocking indication due to low amplitude. Measured frequency

8.2.5

Setting parameters
Table 203:
Parameter Operation UBase StartFrequency IntBlockLevel TimeDlyOperate

Basic parameter group settings for the SAPTOF_81 (TOF1-) function


Range Off On 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000 Step 0.05 0.01 1 0.001 Default Off 400.00 51.20 50 0.000 Unit kV Hz %UB s Description Operation Off / On Base voltage Frequency setting/ start value. Internal blocking level in % of UBase. Operate time delay in over/under-frequency mode. Time delay for reset.

TimeDlyReset

0.000 - 60.000

0.001

0.000

8.2.6

Technical data
Table 204:
Function Operate value, start function Operate time, start function Reset time, start function Operate time, definite time function Reset time, definite time function

Overfrequency protection (PTOF, 81)


Range or value (35.00-75.00) Hz 100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s Accuracy 2.0 mHz 0.5% + 10 ms 0.5% + 10 ms

8.3

Rate-of-change frequency protection (PFRC, 81)

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Function block name: RCFxANSI number: 81 IEC 61850 logical node name: SAPFRC

IEC 60617 graphical symbol:

df/dt > <

8.3.1

Introduction
Rate of change of frequency function gives an early indication of a main disturbance in the system. The function can be used for generation shedding, load shedding, remedial action schemes etc. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement. Each step can discriminate between positive or negative change of frequency.

8.3.2

Principle of operation
The rate-of-change of frequency (RCF) function is used to detect fast power system frequency changes, increase as well as decrease, at an early stage. The function has a settable definite time delay. If the rate-of-change of frequency remains below the set value, for negative rate-of-change, for a time period equal to the chosen time delay, the trip signal is issued. If the rate-of-change of frequency remains above the set value, for positive rate-of-change, for a time period equal to the chosen time delay, the trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage, the function is blocked and no start or trip signal is issued. If the frequency recovers, after a frequency decrease, a restore signal is issued.

8.3.2.1

Measurement principle
The rate-of-change of the fundamental frequency of the selected voltage is measured continuously, and compared with the set value, StartFreqGrad. The rate-of-change of frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, the rate-of-change of frequency function is blocked, and the output BLKDMAGN is issued. The sign of the setting StartFreqGrad, controls if the rate-of-change of frequency function reacts on a positive or on a negative change in frequency. If the rate-of-change of frequency function is used for decreasing frequency, i.e. the setting StartFreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE output, when the frequency recovers to a value higher than the

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setting RestoreFreq. A positive setting of StartFreqGrad, sets the rate-of-change of frequency function to start and trip for frequency increases. To avoid oscillations of the output start signal, a hysteresis has been included.

8.3.2.2

Time delay
The rate-of-change of frequency function has a settable definite time delay, tTrip. The output STARTDUR, gives the time elapsed from the issue of the start output, in percent of the total operation time. Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the user set time delay, tTrip. If the start condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the start output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the start condition must be fulfilled again and it is not sufficient for the signal to only return back into the hysteresis area. The RESTORE output of the rate-of-change of frequency function is set, after a time delay equal to the setting of tRestore, when the measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will be given. The restore functionality is only active for lowering frequency conditions and the restore sequence is disabled if a new negative frequency gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.

8.3.2.3

Blocking
The rate-of-change of frequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlockLevel, both the start and the trip outputs, are blocked.

8.3.2.4

Design
The rate-of-change of frequency measuring element continuously measures the frequency of the selected voltage and compares it to the setting StartFreqGrad. The frequency signal is filtered to avoid transients due to power system switchings and faults. The time integrator operates with a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued. The sign of the

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setting StartFreqGrad is essential, and controls if the function is used for raising or lowering frequency conditions. The design of the rate-of-change of frequency function is schematically described in figure 174.
BLOCK BLKTRIP BLKRESET OR Comparator U < IntBlockLevel Start & Trip Output Logic BLOCK BLKDMAGN

Voltage

Rate-of-Change of Frequency

Comparator If [StartFreqGrad<0 START AND df/dt < StartFreqGrad] OR [StartFreqGrad>0 AND df/dt > StartFreqGrad] Then START

Time integrator Definite Time Delay TimeDlyOperate TimeDlyReset

START

TRIP

100 ms Frequency Comparator f > RestoreFreq TimeDlyRestore RESTORE

en05000835.vsd

Figure 174:

Schematic design of the rate-of-change of frequency function

8.3.3

Function block
RCF1SAPFRC_81 U3P BLOCK BLKTRIP BLKREST TRIP START RESTORE BLKDMAGN en06000281.vsd

Figure 175:

RCF function block

8.3.4

Input and output signals

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Table 205:
Signal U3P BLOCK BLKTRIP BLKREST

Input signals for the SAPFRC_81 (RCF1-) function block


Description Group signal for voltage input Block of function Blocking operate output. Blocking restore output.

Table 206:
Signal TRIP START RESTORE BLKDMAGN

Output signals for the SAPFRC_81 (RCF1-) function block


Description Operate/trip signal for frequencyGradient Start/pick-up signal for frequencyGradient Restore signal for load restoring purposes. Blocking indication due to low amplitude.

8.3.5

Setting parameters
Table 207:
Parameter Operation UBase

Basic parameter group settings for the SAPFRC_81 (RCF1-) function


Range Off On 0.05 - 2000.00 Step 0.05 Default Off 400.00 Unit kV Description Operation Off / On Base setting for the phase-phase voltage in kV Frequency gradient start value. Sign defines direction. Internal blocking level in % of UBase. Operate time delay in pos./neg. frequency gradient mode. Restore frequency if frequency is above frequency value (Hz) Restore time delay. Time delay for reset.

StartFreqGrad

-10.00 - 10.00

0.01

0.50

Hz/s

IntBlockLevel tTrip

0 - 100 0.000 - 60.000

1 0.001

50 0.200

%UB s

RestoreFreq

45.00 - 65.00

0.01

49.90

Hz

tRestore tReset

0.000 - 60.000 0.000 - 60.000

0.001 0.001

0.000 0.000

s s

8.3.6

Technical data

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Table 208:
Function

Rate-of-change frequency protection (PFRC, 81)


Range or value (-10.00-10.00) Hz/s (0-100)% of Ubase 100 ms typically Accuracy 10.0 mHz/s 1.0% of Ur -

Operate value, start function Operate value, internal blocking level Operate time, start function

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Section 9

Multipurpose protection
About this chapter
This chapter describes Multipurpose protection and includes the General current and voltage function. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

9.1

General current and voltage protection (GAPC)


Function block name: GFxxANSI number: 46, 51, 67, 51N, 67N, 27, 59, 21, 40 IEC 60617 graphical symbol:

I<

I>

IEC 61850 logical node name: CVGAPC

U<

U>

9.1.1

Introduction
The protection module is recommended as a general backup protection with many possible application areas due to its flexible measuring and setting facilities. The built-in overcurrent protection feature has two settable current levels. Both of them can be used either with definite time or inverse time characteristic. The overcurrent protection steps can be made directional with selectable voltage polarizing quantity. Additionally they can be voltage and/or current controlled/ restrained. 2nd harmonic restraining facility is available as well. At too low polarizing voltage the overcurrent feature can be either blocked, made non directional or ordered to use voltage memory in accordance with a parameter setting. Additionally two overvoltage and two undervoltage steps, either with definite time or inverse time characteristic, are available within each function. The general function suits applications with underimpedance and voltage controlled overcurrent solutions. The general function can also be utilized for generator

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transformer protection applications where positive, negative or zero sequence components of current and voltage quantities is typically required. Additionally generator applications such as loss of field, inadvertent energizing, stator or rotor overload, circuit breaker head flash-over and open phase detection are just a few of possible protection arrangements with these functions.

9.1.1.1

Inadvertent generator energization


When the generator is taken out of service, and non-rotating, there is a risk that the generator circuit breaker flashes over or is closed by mistake. To prevent damages on the generator or turbine, it is essential that high speed tripping is provided in case of inadvertent energization of the generator. This tripping should be almost instantaneous (< 100 ms). There is a risk that the current into the generator at inadvertent energization will be limited so that the normal overcurrent or underimpedance protection will not detect the dangerous situation. The delay of these protection functions might be too long. For big and important machines, fast protection against inadvertent energizing should, therefore, be included in the protective scheme.

9.1.2
9.1.2.1

Principle of operation
Measured quantities within the function
The function is always connected to three-phase current and three-phase voltage input in the configuration tool, but it will always measure only one current and one voltage quantity selected by the end user in the setting tool. The user can select to measure one of the current quantities shown in table 209.
Table 209: Current selection for the GF function

Set value for the parameter CurrentInput Comment 1 2 3 4 5 6 7 8 Phase1 Phase2 Phase3 PosSeq NegSeq 3ZeroSeq MaxPh MinPh GF function will measure the phase L1 current phasor GF function will measure the phase L2 current phasor GF function will measure the phase L3 current phasor GF function will measure internally calculated positive sequence current phasor GF function will measure internally calculated negative sequence current phasor GF function will measure internally calculated zero sequence current phasor multiplied by factor 3 GF function will measure current phasor of the phase with maximum magnitude GF function will measure current phasor of the phase with minimum magnitude

Table continued on next page

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Set value for the parameter CurrentInput Comment 9 UnbalancePh GF function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the current phasor of the phase with maximum magnitude and current phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time GF function will measure the current phasor internally calculated as the vector difference between the phase L1 current phasor and phase L2 current phasor (i.e. IL1-IL2) GF function will measure the current phasor internally calculated as the vector difference between the phase L2 current phasor and phase L3 current phasor (i.e. IL2-IL3) GF function will measure the current phasor internally calculated as the vector difference between the phase L3 current phasor and phase L1 current phasor (i.e. IL3-IL1) GF function will measure ph-ph current phasor with the maximum magnitude GF function will measure ph-ph current phasor with the minimum magnitude GF function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the ph-ph current phasor with maximum magnitude and ph-ph current phasor with minimum magnitude. Phase angle will be set to 0 all the time

10

Phase1-Phase2

11

Phase2-Phase3

12

Phase3-Phase1

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

The user can select to measure one of the voltage quantities shown in table 210:
Table 210: Voltage selection for the GF function
Comment GF function will measure the phase L1 voltage phasor GF function will measure the phase L2 voltage phasor GF function will measure the phase L3 voltage phasor GF function will measure internally calculated positive sequence voltage phasor GF function will measure internally calculated negative sequence voltage phasor. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. GF function will measure internally calculated zero sequence voltage phasor multiplied by factor 3. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. GF function will measure voltage phasor of the phase with maximum magnitude GF function will measure voltage phasor of the phase with minimum magnitude GF function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the voltage phasor of the phase with maximum magnitude and voltage phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time

VoltageInput
1 2 3 4 5 Phase1 Phase2 Phase3 PosSeq -NegSeq

Set value for the parameter

-3ZeroSeq

7 8 9

MaxPh MinPh UnbalancePh

Table continued on next page

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Set value for the parameter Phase1-Phase2

VoltageInput
10

Comment GF function will measure the voltage phasor internally calculated as the vector difference between the phase L1 voltage phasor and phase L2 voltage phasor (i.e. UL1-UL2) GF function will measure the voltage phasor internally calculated as the vector difference between the phase L2 voltage phasor and phase L3 voltage phasor (i.e. UL2-UL3) GF function will measure the voltage phasor internally calculated as the vector difference between the phase L3 voltage phasor and phase L1 voltage phasor (i.e. UL3-UL1) GF function will measure ph-ph voltage phasor with the maximum magnitude GF function will measure ph-ph voltage phasor with the minimum magnitude GF function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the ph-ph voltage phasor with maximum magnitude and ph-ph voltage phasor with minimum magnitude. Phase angle will be set to 0 all the time

11

Phase2-Phase3

12

Phase3-Phase1

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

It is important to notice that the voltage selection from table 210 is always applicable regardless the actual external VT connections. The three-phase VT inputs can be connected to IED as either three phase-to-ground voltages UL1, UL2 & UL3 or three phase-to-phase voltages UL1L2, UL2L3 & UL3L1). This information about actual VT connection is entered as a setting parameter for the pre-processing block, which will then take automatic care about it. The user can select one of the current quantities shown in table 211 for built-in current restraint feature:
Table 211: Restraint current selection for the GF function
Comment GF function will measure internally calculated positive sequence current phasor GF function will measure internally calculated negative sequence current phasor GF function will measure internally calculated zero sequence current phasor multiplied by factor 3 GF function will measure current phasor of the phase with maximum magnitude

Set value for the parameter RestrCurr 1 2 3 4 PosSeq NegSeq 3ZeroSeq MaxPh

9.1.2.2

Base quantities for GF function


The parameter settings for the base quantities, which represent the base (i.e. 100%) for pickup levels of all measuring stages shall be entered as setting parameters for every GF function.

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Base current shall be entered as: 1. 2. rated phase current of the protected object in primary amperes, when the measured Current Quantity is selected from 1 to 9, as shown in table 209. rated phase current of the protected object in primary amperes multiplied by 3 (i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in table 209.

Base voltage shall be entered as: 1. 2. rated phase-to-ground voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 1 to 9, as shown in table 210. rated phase-to-phase voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 10 to 15, as shown in table 210.

9.1.2.3

Built-in overcurrent protection steps


Two overcurrent protection steps are available. They are absolutely identical and therefore only one will be explained here. Overcurrent step simply compares the magnitude of the measured current quantity (see table 209) with the set pickup level. Non-directional overcurrent step will pickup if the magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable, with default value of 0.96. However depending on other enabled built-in features this overcurrent pickup might not cause the overcurrent step start signal. Start signal will only come if all of the enabled built-in features in the overcurrent step are fulfilled at the same time.

Second harmonic feature

The overcurrent protection step can be restrained by a second harmonic component in the measured current quantity (see table 209). However it shall be noted that this feature is not applicable when one of the following measured currents is selected: PosSeq (i.e. positive sequence current) NegSeq (i.e. negative sequence current) UnbalancePh (i.e. unbalance phase current) UnbalancePh-Ph (i.e. unbalance ph-ph current)

This feature will simple prevent overcurrent step start if the second-to-first harmonic ratio in the measured current exceeds the set level. The overcurrent protection step operation can be can be made dependent on the relevant phase angle between measured current phasor (see table 209) and measured voltage phasor (see table 210). In protection terminology it means that the PGPF function can be made directional by enabling this built-in feature. In that case overcurrent protection step will only operate if the current flow is in accordance with the set direction (i.e. Forward, which means towards the protected object, or REG 670 Technical reference manual 1MRK502013-UEN rev. B 375

Directional feature

Section 9 Multipurpose protection

Reverse, which means from the protected object). For this feature it is of the outmost importance to understand that the measured voltage phasor (see table 210) and measured current phasor (see table 209) will be used for directional decision. Therefore it is the sole responsibility of the end user to select the appropriate current and voltage signals in order to get a proper directional decision. The PGPF function will NOT do this automatically. It will just simply use the current and voltage phasors selected by the end user to check for the directional criteria. Table 212 gives an overview of the typical choices (but not the only possible ones) for these two quantities for traditional directional relays.
Table 212: Typical current and voltage choices for directional feature
Comment Directional positive sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power Directional negative sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power system voltage level (i.e. X/R ratio) Directional zero sequence overcurrent function is obtained. Typical setting for RCADir is from 0 to -90 depending on the power system earthing (i.e. solidly earthed, earthed via resistor, etc.) Directional overcurrent function for the first phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the second phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the third phase is obtained. Typical setting for RCADir is +30 or +45

Set value for the Set value for the parameter CurrentInput parameter

VoltageInput
PosSeq

PosSeq

NegSeq

-NegSeq

3ZeroSeq

-3ZeroSeq

Phase1 Phase2 Phase3

Phase2-Phase3 Phase3-Phase1 Phase1-Phase2

Unbalance current or voltage measurement shall not be used when the directional feature is enabled. Two types of directional measurement principles are available, I & U and IcosPhi&U. The first principle, referred to as "I & U" in the parameter setting tool, checks that:

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the magnitude of the measured current is bigger than the set pick-up level the phasor of the measured current is within the operating region (defined by the relay operate angle, ROADir parameter setting; see figure 176).

RCADir Ipickup ROADir I=3Io

U=-3U0

Operate region mta line


en05000252.vsd

Figure 176:
where:

I & U directional operating principle for the GF function

RCADir is -75 ROADir is 50

The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:

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that the product Icos() is bigger than the set pick-up level, where is angle between the current phasor and the mta line that the phasor of the measured current is within the operating region (defined by the Icos() straight line and the relay operate angle, ROADir parameter setting; see figure 176).

RCADir Ipickup ROADir F I=3Io

U=-3U0

Operate region mta line

en05000253.vsd

Figure 177:
where: RCADir is -75 ROADir is 50

GF, IcosPhi&U directional operating principle

Note that it is possible to decide by a parameter setting how the directional feature shall behave when the magnitude of the measured voltage phasor falls below the preset value. User can select one of the following three options: Non-directional (i.e. operation allowed for low magnitude of the reference voltage) Block (i.e. operation prevented for low magnitude of the reference voltage) Memory (i.e. memory voltage shall be used to determine direction of the current)

It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that time the current direction will be locked to the one determined during memory time and it will re-set only if the current fails below set pickup level or voltage goes above set voltage memory limit.

Voltage restraint/control feature

The overcurrent protection step operation can be can be made dependent of a measured voltage quantity (see table 210). Practically then the pickup level of the overcurrent step is not constant but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two different types of dependencies are available:

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Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)


OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

ULowLimit_OC1

UHighLimit_OC1 Selected Voltage Magnitude


en05000324.vsd

Figure 178:

Example for OC1 step current pickup level variation as function of measured voltage magnitude in Slope mode of operation

Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step has value = step)
OC1 Stage Pickup Level

StartCurr_OC1

VDepFact_OC1 * StartCurr_OC1

UHighLimit_OC1

Selected Voltage Magnitude


en05000323.vsd

Figure 179:

Example for OC1 step current pickup level variation as function of measured voltage magnitude in Step mode of operation

This feature will simple change the set overcurrent pickup level in accordance with magnitude variations of the measured voltage. It shall be noted that this feature will REG 670 Technical reference manual 1MRK502013-UEN rev. B 379

Section 9 Multipurpose protection

as well affect the pickup current value for calculation of operate times for IDMT curves (i.e. overcurrent with IDMT curve will operate faster during low voltage conditions).

Current restraint feature

The overcurrent protection step operation can be can be made dependent of a restraining current quantity (see table 211). Practically then the pickup level of the overcurrent step is not constant but instead increases with the increase in the magnitude of the restraining current.

IMeasured

pe O
IsetHigh

te ra

ea ar
eff Co r t es I>R

tr es *Ir

ain

IsetLow

atan(RestrCoeff) Restraint
en05000255.vsd

Figure 180:

Current pickup variation with restraint current magnitude

This feature will simple prevent overcurrent step to start if the magnitude of the measured current quantity is smaller than the set percentage of the restrain current magnitude. However this feature will not affect the pickup current value for calculation of operate times for IDMT curves. This means that the IDMT curve operate time will not be influenced by the restrain current magnitude. When set, the start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

9.1.2.4

Built-in undercurrent protection steps


Two undercurrent protection steps are available. They are absolutely identical and therefore only one will be explained here. Undercurrent step simply compares the magnitude of the measured current quantity (see table 209) with the set pickup level. The undercurrent step will pickup and set its start signal to one if the magnitude of the measured current quantity is smaller than this set level. The start signal will start definite time delay with set time delay. If the start signal has value one for longer

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time than the set time delay the undercurrent step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the setting.

9.1.2.5

Built-in overvoltage protection steps


Two overvoltage protection steps are available. They are absolutely identical and therefore only one will be explained here. Overvoltage step simply compares the magnitude of the measured voltage quantity (see table 210) with the set pickup level. The overvoltage step will pickup if the magnitude of the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default value of 0.99. The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the overvoltage step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

9.1.2.6

Built-in undervoltage protection steps


Two undervoltage protection steps are available. They are absolutely identical and therefore only one will be explained here. Undervoltage step simply compares the magnitude of the measured voltage quantity (see table 210 with the set pickup level. The undervoltage step will pickup if the magnitude of the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default value of 1.01. The start signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the start signal has value one for longer time than the set time delay, the undervoltage step will set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay in accordance with the end user setting.

9.1.2.7

Inadvertent generator energization


The inadvertent energization function is realized by means of the general current and voltage protection function (CAGVPC). The function is configured as shown in figure 181.

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CVGAPC 3IP 3UP TROC1

TROV1 1 TRUV1 BLKOC1

en06000497.vsd

Figure 181:

Configuration of the inadvertent energization function

The setting of the general current and voltage function (typical values) is done as shown in table 213.
Table 213: The setting of the general current and voltage function
Measured Quantity Undervoltage U< Overvoltage U> Overcurrent I> Maximum generator Phase to Phase voltage Maximum generator Phase to Phase voltage Maximum generator Phase current Pickup in % of generator Time delay in seconds rating < 70% > 85% > 50% 10.0 s 1.0 s 0.05 s

In normal operation the overvoltage trip signal is activated and the undervotage trip signal is deactivated. This means that the overcurrent function is blocked. When the generator is taken out of service the generator voltage gets low. The overvoltage trip signal will be deactivated and the undervoltage trip signal will be activated after the set delay. At this moment the block signal to the overcurrent function will be deactivated.

382

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It the generator is energized at stand still conditions, i.e. when the voltage is zero, the overcurrent function will operate after the short set delay if the generator current is larger than the set value. When the generator is started the overvoltage trip signal will be activared the set time delay after the moment when the voltage has reached the set value. At this moment the blocking of the overcurrent function is activated. The delay of the undervoltage function will prevent false operation at short circuits in the external power grid.

9.1.2.8

Logic diagram
The simplified internal logics, for the PGPF function are shown in the following figures.
REx670
ADM PGPF function
Current and voltage selection settings

Phasor calculation of individual currents

A/D conversion scaling with CT ratio

Phasors & samples

Selection of which current and voltage shall be given to the built-in protection elements

Selected current Selected voltage

Restraint current selection

A/D conversion scaling with CT ratio

Phasor calculation of individual voltages

Selection of restraint current

Selected restraint current

Phasors & samples

en05000169.vsd

Figure 182:

Treatment of measured currents within IED for PGPF function

Figure 182 shows how internal treatment of measured currents is done for multipurpose protection function The following currents and voltages are inputs to the multipurpose protection function. They must all be expressed in true power system (primary) Amperes and kilovolts.

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Section 9 Multipurpose protection

1. 2. 3.

Instantaneous values (samples) of currents & voltages from one three-phase current and one three-phase voltage input. Fundamental frequency phasors from one three-phase current and one threephase voltage input calculated by the pre-processing modules. Sequence currents & voltages from one three-phase current and one three-phase voltage input calculated by the pre-processing modules.

The multipurpose protection function: 1. 2. 3. Selects one current from the three phase input system (see table "") for internally measured current. Selects one voltage from the three phase input system (see table "") for internally measured voltage. Selects one current from the three phase input system (see table "") for internally measured restraint current.

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CURRENT

UC1 2
Selected current
nd

Harmonic restraint

TRUC1

UC2 2nd Harmonic restraint OC1 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1

STUC2 TRUC2

STOC1 TROC1 BLK2ND DIROC1

Selected restraint current

OC2 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1

STOC2 TROC2

UDIRLOW DIROC2

STOV1

OV1

TROV1 STOV2

OV2
Selected voltage

TROV2 STUV1

UV1

TRUV1 STUV2

UV2

TRUV2

VOLTAGE

en05000170.vsd

Figure 183:

PGPF function main logic diagram for built in protection elements

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Section 9 Multipurpose protection

Logic in figure 183 can be summarized as follows: 1. 2. 3. The selected currents and voltage are given to built-in protection elements. Each protection element and step makes independent decision about status of its START and TRIP output signals. More detailed internal logic for every protection element is given in the following four figures Common START and TRIP signals from all built-in protection elements & steps (internal OR logic) are available from multipurpose function as well.

Enable second harmonic

Second harmonic check

DEF time selected

DEF
OR

BLKTROC 1

AND

TROC1

Selected current

a b

a>b

OC1=On BLKOC1

StartCurr_OC1

AND

STOC1

Inverse Voltage control or restraint feature Directionality check DIR_OK Inverse time selected

Selected voltage

Selected restrain current

Current Restraint Feature Imeasured > k Irestraint

en05000831.vsd

Figure 184:

Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step OC2 has the same internal logic)

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Bin input: BLKUC1TR

Selected current

a b

b>a

DEF

AND

TRUC1

StartCurr_UC1

AND

Operation_UC1=On Bin input: BLKUC1

STUC1

en05000750.vsd

Figure 185:

Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step UC2 has the same internal logic)

DEF time selected Selected voltage


a b

DEF

BLKTROV1

AND

TROV1

OR
a>b

StartVolt_OV1

AND
Inverse

STOV1

Operation_OV1=On BLKOV1 Inverse time selected

en05000751.vsd

Figure 186:

Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step OV2 has the same internal logic)

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Section 9 Multipurpose protection

DEF time selected Selected voltage


a b

DEF OR

BLKTRUV 1

AND

TRUV1

b>a

StartVolt_UV1

AND Inverse

STUV1

Operation_UV1=On BLKUV1 Inverse time selected

en05000752.vsd

Figure 187:

Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step UV2 has the same internal logic)

9.1.3

Function block
GF01CVGAPC I3P U3P BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 START STOC1 STOC2 STUC1 STUC2 STOV1 STOV2 STUV1 STUV2 BLK2ND DIROC1 DIROC2 UDIRLOW CURRENT ICOSFI VOLTAGE UIANGLE en05000372.vsd

Figure 188:

GF function block

9.1.4

Input and output signals

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Table 214:
Signal I3P U3P BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR

Input signals for the CVGAPC (GF01-) function block


Description Group signal for current input Group signal for voltage input Block of function Block of over current function OC1 Block of trip for over current function OC1 When activated, the current multiplier is in use for OC1 Block of over current function OC2 Block of trip for over current function OC2 When activated, the current multiplier is in use for OC2 Block of under current function UC1 Block of trip for under current function UC1 Block of under current function UC2 Block of trip for under current function UC2 Block of over voltage function OV1 Block of trip for over voltage function OV1 Block of over voltage function OV2 Block of trip for over voltage function OV2 Block of under voltage function UV1 Block of trip for under voltage function UV1 Block of under voltage function UV2 Block of trip for under voltage function UV2

Table 215:
Signal TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 START STOC1 STOC2 STUC1

Output signals for the CVGAPC (GF01-) function block


Description General trip signal Trip signal from overcurrent function OC1 Trip signal from overcurrent function OC2 Trip signal from undercurrent function UC1 Trip signal from undercurrent function UC2 Trip signal from overvoltage function OV1 Trip signal from overvoltage function OV2 Trip signal from undervoltage function UV1 Trip signal from undervoltage function UV2 General start signal Start signal from overcurrent function OC1 Start signal from overcurrent function OC2 Start signal from undercurrent function UC1

Table continued on next page

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Signal STUC2 STOV1 STOV2 STUV1 STUV2 BLK2ND DIROC1 DIROC2 UDIRLOW CURRENT ICOSFI VOLTAGE UIANGLE Description Start signal from undercurrent function UC2 Start signal from overvoltage function OV1 Start signal from overvoltage function OV2 Start signal from undervoltage function UV1 Start signal from undervoltage function UV2 Block from second harmonic detection Directional mode of OC1 (nondir, forward,reverse) Directional mode of OC2 (nondir, forward,reverse) Low voltage for directional polarization Measured current value Measured current multiplied with cos (Phi) Measured voltage value Angle between voltage and current

9.1.5

Setting parameters
Table 216:
Parameter Operation CurrentInput

Basic parameter group settings for the CVGAPC (GF01-) function


Range Off On phase1 phase2 phase3 PosSeq NegSeq 3*ZeroSeq MaxPh MinPh UnbalancePh phase1-phase2 phase2-phase3 phase3-phase1 MaxPh-Ph MinPh-Ph UnbalancePh-Ph 1 - 99999 Step Default Off MaxPh Unit Description Operation Off / On Select current signal which will be measured inside function

IBase

3000

Base Current

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Parameter VoltageInput Range phase1 phase2 phase3 PosSeq -NegSeq -3*ZeroSeq MaxPh MinPh UnbalancePh phase1-phase2 phase2-phase3 phase3-phase1 MaxPh-Ph MinPh-Ph UnbalancePh-Ph 0.05 - 2000.00 Off On 10.0 - 50.0 Step Default MaxPh Unit Description Select voltage signal which will be measured inside function

UBase OperHarmRestr

0.05 -

400.00 Off

kV -

Base Voltage Operation of 2nd harmonic restrain Off / On Ratio of second to fundamental current harmonic in % Harm analyse disabled above this current level in % of Ibase Enable current restrain function On / Off Select current signal which will be used for curr restrain Restraining current coefficient Relay Characteristic Angle Relay Operate Angle Below this level in % of Ubase setting ActLowVolt takes over Operation OC1 Off / On Operate current level for OC1 in % of Ibase

l_2nd/l_fund

1.0

20.0

BlkLevel2nd

10 - 5000

5000

%IB

EnRestrainCurr

Off On PosSeq NegSeq 3*ZeroSeq Max 0.00 -180 - 180 1 - 90 0.0 - 5.0

Off

RestrCurrInput

PosSeq

RestrCurrCoeff RCADir ROADir LowVolt_VM

0.01 1 1 0.1

0.00 - 5.00 -75 75 0.5

Deg Deg %UB

Operation_OC1 StartCurr_OC1

Off On 2.0 - 5000.0

1.0

Off 120.0

%IB

Table continued on next page

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Parameter CurveType_OC1 Range ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.00 - 6000.00 Step Default ANSI Def. Time Unit Description Selection of time delay curve type for OC1

tDef_OC1

0.01

0.50

Independent (definitive) time delay of OC1 Time multiplier for the dependent time delay for OC1 Minimum operate time for IEC IDMT curves for OC1 Control mode for voltage controlled OC1 function Voltage dependent mode OC1 (step, slope) Multiplying factor for I pickup when OC1 is U dependent Voltage low limit setting OC1 in % of Ubase Voltage high limit setting OC1 in % of Ubase Enable block of OC1 by 2nd harmonic restrain Directional mode of OC1 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC1 Low voltage level action for Dir_OC1 (Nodir, Blk, Mem)

k_OC1

0.30

0.01

0.05 - 999.00

tMin_OC1

0.00 - 6000.00

0.01

0.05

VCntrlMode_OC1

Voltage control Input control Volt/Input control Off Step Slope 1.00

Off

VDepMode_OC1

Step

VDepFact_OC1

0.01

0.02 - 5.00

ULowLimit_OC1

1.0 - 200.0

0.1

50.0

%UB

UHighLimit_OC1

1.0 - 200.0

0.1

100.0

%UB

HarmRestr_OC1

Off On Non-directional Forward Reverse I&U IcosPhi&U Non-directional Block Memory

Off

DirMode_OC1

Non-directional

DirPrinc_OC1

I&U

ActLowVolt1_VM

Non-directional

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Parameter Operation_OC2 StartCurr_OC2 CurveType_OC2 Range Off On 2.0 - 5000.0 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.00 - 6000.00 Step 1.0 Default Off 120.0 ANSI Def. Time Unit %IB Description Operation OC2 Off / On Operate current level for OC2 in % of Ibase Selection of time delay curve type for OC2

tDef_OC2

0.01

0.50

Independent (definitive) time delay of OC2 Time multiplier for the dependent time delay for OC2 Minimum operate time for IEC IDMT curves for OC2 Control mode for voltage controlled OC2 function Voltage dependent mode OC2 (step, slope) Multiplying factor for I pickup when OC2 is U dependent Voltage low limit setting OC2 in % of Ubase Voltage high limit setting OC2 in % of Ubase Enable block of OC2 by 2nd harmonic restrain Directional mode of OC2 (nondir, forward,reverse) Measuring on IandU or IcosPhiandU for OC2

k_OC2

0.30

0.01

0.05 - 999.00

tMin_OC2

0.00 - 6000.00

0.01

0.05

VCntrlMode_OC2

Voltage control Input control Volt/Input control Off Step Slope 1.00

Off

VDepMode_OC2

Step

VDepFact_OC2

0.01

0.02 - 5.00

ULowLimit_OC2

1.0 - 200.0

0.1

50.0

%UB

UHighLimit_OC2

1.0 - 200.0

0.1

100.0

%UB

HarmRestr_OC2

Off On Non-directional Forward Reverse I&U IcosPhi&U

Off

DirMode_OC2

Non-directional

DirPrinc_OC2

I&U

Table continued on next page

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Parameter ActLowVolt2_VM Range Non-directional Block Memory Off On Off On 0 - 150 Step Default Non-directional Unit Description Low voltage level action for Dir_OC2 (Nodir, Blk, Mem) Operation UC1 Off / On Enable internal low current level blocking for UC1 Internal low current blocking level for UC1 in % of Ibase Operate undercurrent level for UC1 in % of Ibase Independent (definitive) time delay of UC1 Reset time delay used in IEC Definite Time curve UC1 Enable block of UC1 by 2nd harmonic restrain Operation UC2 Off / On Enable internal low current level blocking for UC2 Internal low current blocking level for UC2 in % of Ibase Operate undercurrent level for UC2 in % of Ibase Independent (definitive) time delay of UC2 Enable block of UC2 by 2nd harmonic restrain Operation OV1 Off / On Operate voltage level for OV1 in % of Ubase Selection of time delay curve type for OV1

Operation_UC1 EnBlkLowI_UC1

Off Off

BlkLowCurr_UC1

20

%IB

StartCurr_UC1

2.0 - 150.0

1.0

70.0

%IB

tDef_UC1

0.00 - 6000.00

0.01

0.50

tResetDef_UC1

0.00 - 6000.00

0.01

0.00

HarmRestr_UC1

Off On Off On Off On 0 - 150

Off

Operation_UC2 EnBlkLowI_UC2

Off Off

BlkLowCurr_UC2

20

%IB

StartCurr_UC2

2.0 - 150.0

1.0

70.0

%IB

tDef_UC2

0.00 - 6000.00

0.01

0.50

HarmRestr_UC2

Off On Off On 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00

Off

Operation_OV1 StartVolt_OV1 CurveType_OV1

0.1 -

Off 150.0 Definite time

%UB -

tDef_OV1

0.01

1.00

Operate time delay in sec for definite time use of OV1

Table continued on next page

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Parameter tMin_OV1 Range 0.00 - 6000.00 Step 0.01 Default 0.05 Unit s Description Minimum operate time for IDMT curves for OV1 Time multiplier for the dependent time delay for OV1 Operation OV2 Off / On Operate voltage level for OV2 in % of Ubase Selection of time delay curve type for OV2

k_OV1

0.30

0.01

0.05 - 999.00

Operation_OV2 StartVolt_OV2 CurveType_OV2

Off On 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00

0.1 -

Off 150.0 Definite time

%UB -

tDef_OV2

0.01

1.00

Operate time delay in sec for definite time use of OV2 Minimum operate time for IDMT curves for OV2 Time multiplier for the dependent time delay for OV2 Operation UV1 Off / On Operate undervoltage level for UV1 in % of Ubase Selection of time delay curve type for UV1 Operate time delay in sec for definite time use of UV1 Minimum operate time for IDMT curves for UV1 Time multiplier for the dependent time delay for UV1 Enable internal low voltage level blocking for UV1 Internal low voltage blocking level for UV1 in % of Ubase Operation UV2 Off / On Operate undervoltage level for UV2 in % of Ubase

tMin_OV2

0.00 - 6000.00

0.01

0.05

k_OV2

0.30

0.01

0.05 - 999.00

Operation_UV1 StartVolt_UV1

Off On 2.0 - 150.0

0.1

Off 50.0

%UB

CurveType_UV1

Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00

Definite time

tDef_UV1

0.01

1.00

tMin_UV1

0.00 - 6000.00

0.01

0.05

k_UV1

0.30

0.01

0.05 - 999.00

EnBlkLowV_UV1

Off On 0.0 - 5.0

On

BlkLowVolt_UV1

0.1

0.5

%UB

Operation_UV2 StartVolt_UV2

Off On 2.0 - 150.0

0.1

Off 50.0

%UB

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Parameter CurveType_UV2 Range Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00 Step Default Definite time Unit Description Selection of time delay curve type for UV2 Operate time delay in sec for definite time use of UV2 Minimum operate time for IDMT curves for UV2 Time multiplier for the dependent time delay for UV2 Enable internal low voltage level blocking for UV2 Internal low voltage blocking level for UV2 in % of Ubase

tDef_UV2

0.01

1.00

tMin_UV2

0.00 - 6000.00

0.01

0.05

k_UV2

0.30

0.01

0.05 - 999.00

EnBlkLowV_UV2

Off On 0.0 - 5.0

On

BlkLowVolt_UV2

0.1

0.5

%UB

Table 217:
Parameter CurrMult_OC1

Advanced parameter group settings for the CVGAPC (GF01-) function


Range 2.0 Step 0.1 Default 1.0 - 10.0 Unit Description Multiplier for scaling the current setting value for OC1 Selection of reset curve type for OC1 Reset time delay used in IEC Definite Time curve OC1 Parameter P for customer programmable curve for OC1 Parameter A for customer programmable curve for OC1 Parameter B for customer programmable curve for OC1 Parameter C for customer programmable curve for OC1 Parameter PR for customer programmable curve for OC1

ResCrvType_OC1

Instantaneous IEC Reset ANSI reset 0.00 - 6000.00

Instantaneous

tResetDef_OC1

0.01

0.00

P_OC1

0.020

0.001

0.001 - 10.000

A_OC1

0.140

0.001

0.000 - 999.000

B_OC1

0.000

0.001

0.000 - 99.000

C_OC1

1.000

0.001

0.000 - 1.000

PR_OC1

0.500

0.001

0.005 - 3.000

Table continued on next page

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Parameter TR_OC1 Range 13.500 Step 0.001 Default 0.005 - 600.000 Unit Description Parameter TR for customer programmable curve for OC1 Parameter CR for customer programmable curve for OC1 Multiplier for scaling the current setting value for OC2 Selection of reset curve type for OC2 Reset time delay used in IEC Definite Time curve OC2 Parameter P for customer programmable curve for OC2 Parameter A for customer programmable curve for OC2 Parameter B for customer programmable curve for OC2 Parameter C for customer programmable curve for OC2 Parameter PR for customer programmable curve for OC2 Parameter TR for customer programmable curve for OC2 Parameter CR for customer programmable curve for OC2 Reset time delay used in IEC Definite Time curve UC2 Selection of reset curve type for OV1

CR_OC1

1.0

0.1

0.1 - 10.0

CurrMult_OC2

2.0

0.1

1.0 - 10.0

ResCrvType_OC2

Instantaneous IEC Reset ANSI reset 0.00 - 6000.00

Instantaneous

tResetDef_OC2

0.01

0.00

P_OC2

0.020

0.001

0.001 - 10.000

A_OC2

0.140

0.001

0.000 - 999.000

B_OC2

0.000

0.001

0.000 - 99.000

C_OC2

1.000

0.001

0.000 - 1.000

PR_OC2

0.500

0.001

0.005 - 3.000

TR_OC2

13.500

0.001

0.005 - 600.000

CR_OC2

1.0

0.1

0.1 - 10.0

tResetDef_UC2

0.00 - 6000.00

0.01

0.00

ResCrvType_OV1

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00

Instantaneous

tResetDef_OV1

0.01

0.00

Reset time delay in sec for definite time use of OV1

Table continued on next page

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Parameter tResetIDMT_OV1 Range 0.00 - 6000.00 Step 0.01 Default 0.00 Unit s Description Reset time delay in sec for IDMT curves for OV1 Parameter A for customer programmable curve for OV1 Parameter B for customer programmable curve for OV1 Parameter C for customer programmable curve for OV1 Parameter D for customer programmable curve for OV1 Parameter P for customer programmable curve for OV1 Selection of reset curve type for OV2

A_OV1

0.140

0.001

0.005 - 999.000

B_OV1

1.000

0.001

0.500 - 99.000

C_OV1

1.000

0.001

0.000 - 1.000

D_OV1

0.000

0.001

0.000 - 10.000

P_OV1

0.020

0.001

0.001 - 10.000

ResCrvType_OV2

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00

Instantaneous

tResetDef_OV2

0.01

0.00

Reset time delay in sec for definite time use of OV2 Reset time delay in sec for IDMT curves for OV2 Parameter A for customer programmable curve for OV2 Parameter B for customer programmable curve for OV2 Parameter C for customer programmable curve for OV2 Parameter D for customer programmable curve for OV2 Parameter P for customer programmable curve for OV2

tResetIDMT_OV2

0.00 - 6000.00

0.01

0.00

A_OV2

0.140

0.001

0.005 - 999.000

B_OV2

1.000

0.001

0.500 - 99.000

C_OV2

1.000

0.001

0.000 - 1.000

D_OV2

0.000

0.001

0.000 - 10.000

P_OV2

0.020

0.001

0.001 - 10.000

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Parameter ResCrvType_UV1 Range Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 Step Default Instantaneous Unit Description Selection of reset curve type for UV1

tResetDef_UV1

0.01

0.00

Reset time delay in sec for definite time use of UV1 Reset time delay in sec for IDMT curves for UV1 Parameter A for customer programmable curve for UV1 Parameter B for customer programmable curve for UV1 Parameter C for customer programmable curve for UV1 Parameter D for customer programmable curve for UV1 Parameter P for customer programmable curve for UV1 Selection of reset curve type for UV2

tResetIDMT_UV1

0.00 - 6000.00

0.01

0.00

A_UV1

0.140

0.001

0.005 - 999.000

B_UV1

1.000

0.001

0.500 - 99.000

C_UV1

1.000

0.001

0.000 - 1.000

D_UV1

0.000

0.001

0.000 - 10.000

P_UV1

0.020

0.001

0.001 - 10.000

ResCrvType_UV2

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00

Instantaneous

tResetDef_UV2

0.01

0.00

Reset time delay in sec for definite time use of UV2 Reset time delay in sec for IDMT curves for UV2 Parameter A for customer programmable curve for UV2 Parameter B for customer programmable curve for UV2

tResetIDMT_UV2

0.00 - 6000.00

0.01

0.00

A_UV2

0.140

0.001

0.005 - 999.000

B_UV2

1.000

0.001

0.500 - 99.000

Table continued on next page

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Section 9 Multipurpose protection


Parameter C_UV2 Range 1.000 Step 0.001 Default 0.000 - 1.000 Unit Description Parameter C for customer programmable curve for UV2 Parameter D for customer programmable curve for UV2 Parameter P for customer programmable curve for UV2

D_UV2

0.000

0.001

0.000 - 10.000

P_UV2

0.020

0.001

0.001 - 10.000

9.1.6

Technical data
Table 218:
Function Measuring current input

General current and voltage protection (GAPC)


Range or value phase1, phase2, phase3, PosSeq, NegSeq, 3*ZeroSeq, MaxPh, MinPh, UnbalancePh, phase1-phase2, phase2phase3, phase3-phase1, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (1 - 99999) A phase1, phase2, phase3, PosSeq, -NegSeq, -3*ZeroSeq, MaxPh, MinPh, UnbalancePh, phase1-phase2, phase2phase3, phase3-phase1, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (0.05 - 2000.00) kV (2 - 5000)% of Ibase (2 - 150)% of Ibase (0.00 - 6000.00) s 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 25 ms typically at 2 to 0 x Iset 25 ms typically at 0 to 2 x Iset Accuracy -

Base current Measuring voltage input

Base voltage Start overcurrent, step 1 and 2 Start undercurrent, step 1 and 2 Definite time delay Operate time start overcurrent Reset time start overcurrent Operate time start undercurrent Reset time start undercurrent Table continued on next page

1.0% of Ir for I<Ir 1.0% of I for I>Ir 1.0% of Ir for I<Ir 1.0% of I for I>Ir 0.5% 10 ms -

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Function See table 517 and table 518 Range or value Parameter ranges for customer defined characteristic no 17: k: 0.05 - 999.00 A: 0.0000 - 999.0000 B: 0.0000 - 99.0000 C: 0.0000 - 1.0000 P: 0.0001 - 10.0000 PR: 0.005 - 3.000 TR: 0.005 - 600.000 CR: 0.1 - 10.0 (0.0 - 5.0)% of Ubase (2.0 - 200.0)% of Ubase (2.0 - 150.0)% of Ubase 25 ms typically at 0 to 2 x Uset 25 ms typically at 2 to 0 x Uset 25 ms typically 2 to 0 x Uset 25 ms typically at 0 to 2 x Uset (1.0 - 200.0)% of Ubase Settable: NonDir, forward and reverse (-180 to +180) degrees (1 to 90) degrees > 95% < 105% > 95% < 105% Accuracy See table 517 and table 518

Voltage level where voltage memory takes over Start overvoltage, step 1 and 2 Start undervoltage, step 1 and 2 Operate time, start overvoltage Reset time, start overvoltage Operate time start undervoltage Reset time start undervoltage High and low voltage limit, voltage dependent operation Directional function Relay characteristic angle Relay operate angle Reset ratio, overcurrent Reset ratio, undercurrent Reset ratio, overvoltage Reset ratio, undervoltage Overcurrent: Critical impulse time Impulse margin time Undercurrent: Critical impulse time Impulse margin time Overvoltage: Critical impulse time Impulse margin time Undervoltage: Critical impulse time Impulse margin time

1.0% of Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 1.0% of Ur for U<Ur 1.0% of U for U>Ur 2.0 degrees 2.0 degrees -

10 ms typically at 0 to 2 x Iset 15 ms typically

10 ms typically at 2 to 0 x Iset 15 ms typically

10 ms typically at 0 to 2 x Uset 15 ms typically

10 ms typically at 2 to 0 x Uset 15 ms typically

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Section 10 Secondary system supervision


About this chapter
This chapter describes functions like Current circuit supervision and Fuse failure supervision. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

10.1

Current circuit supervision (RDIF)


Function block name: CCSxANSI number: IEC 61850 logical node name: CCSRDIF IEC 60617 graphical symbol:

10.1.1

Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protection functions such as differential, earth fault current and negative sequence current functions. It must be remembered that a blocking of protection functions at an occurring open CT circuit will mean that the situation will remain and extremely high voltages will stress the secondary circuit. The current circuit supervision function compares the residual current from a three phase set of current transformer cores with the neutral point current on a separate input taken from another set of cores on the current transformer. A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection functions expected to give unwanted tripping.

10.1.2

Principle of operation
The supervision function compares the absolute value of the vectorial sum of the three phase currents |Iphase| and the numerical value of the residual current |Iref| from another current transformer set, see figure 189. The FAIL output will be set to a logical one when the following criteria are fulfilled:

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The numerical value of the difference |Iphase| |Iref| is higher than 80% of the numerical value of the sum |Iphase| + |Iref|. The numerical value of the current |Iphase| |Iref| is equal to or higher than the set operate value IMinOp. No phase current has exceeded Ip>Block during the last 10 ms. The current circuit supervision is enabled by setting Operation = On.

The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will be issued. In this case the FAIL and ALARM will remain activated 1 s after the ANDgate resets. This prevents unwanted resetting of the blocking function when phase current supervision element(s) operate, e.g. during a fault.

Figure 189:

Simplified logic diagram for the current circuit supervision

The operate characteristic is percentage restrained, see figure 190.

| I phase | - | I ref |

Slope = 1

Slope = 0.8 I MinOp

Operation area

| I phase | + | I ref |
99000068.vsd

Figure 190:

Operate characteristics

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Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref | respectively, the slope can not be above 2.

10.1.3

Function block
CCS1CCSRDIF I3P IREF BLOCK FAIL ALARM

en05000389.vsd

Figure 191:

CCS function block

10.1.4

Input and output signals


Table 219:
Signal I3P IREF BLOCK

Input signals for the CCSRDIF (CCS1-) function block


Description Group signal for three phase current input TBD Block of function

Table 220:
Signal FAIL ALARM

Output signals for the CCSRDIF (CCS1-) function block


Description Detection of current circuit failure Alarm for current circuit failure

10.1.5

Setting parameters
Table 221:
Parameter Operation IBase

Parameter group settings for the CCSRDIF (CCS1-) function


Range Off On 1 - 99999 Step 1 Default Off 3000 Unit A Description Operation Off / On IBase value for current level detectors Block of the function at high phase current, in % of IBase Minimum operate current differential level in % of IBase

Ip>Block

5 - 500

150

%IB

IMinOp

5 - 200

20

%IB

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Table 222:
Function Operate current Block current

Current circuit supervision (RDIF)


Range or value (5-200)% of Ir (5-500)% of Ir Accuracy 10.0% of Ir at I Ir 10.0% of I at I > Ir 5.0% of Ir at I Ir 5.0% of I at I > Ir

10.2

Fuse failure supervision (RFUF)


Function block name: FSDxANSI number: IEC 61850 logical node name: SDDRFUF IEC 60617 graphical symbol:

10.2.1

Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring functions at failures in the secondary circuits between the voltage transformer and the IED in order to avoid unwanted operations that otherwise might occur. The fuse failure supervision function basically has two different algorithms, negative sequence and zero sequence based algorithm and an additional delta voltage and delta current algorithm. The negative sequence detection algorithm is recommended for IEDs used in isolated or high-impedance earthed networks. It is based on the negative-sequence measuring quantities, a high value of voltage 3U2 without the presence of the negative-sequence current 3I2. The zero sequence detection algorithm is recommended for IEDs used in directly or low impedance earthed networks. It is based on the zero sequence measuring quantities, a high value of voltage 3U0 without the presence of the residual current 3I0. A criterion based on delta current and delta voltage measurements can be added to the fuse failure supervision function in order to detect a three phase fuse failure, which in practice is more associated with voltage transformer switching during station operations. For better adaptation to system requirements, an operation mode setting has been introduced which makes it possible to select the operating conditions for negative sequence and zero sequence based function. The selection of different operation

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modes makes it possible to choose different interaction possibilities between the negative sequence and zero sequence based algorithm.

10.2.2
10.2.2.1

Principle of operation
Zero sequence
The function can be set in five different modes by setting the parameter OpMode. The zero sequence function continuously measure the internal currents and voltages in all three phases and calculate: the zero-sequence voltage 3U0 the zero-sequence current 3I0.

The measured signals are compared with their respective set values 3U0< and 3I0>. The function enable the internal signal fuseFailDetected if the measured zero sequence voltage is higher than the set value 3U0>, the measured zero sequence current is below the set value 3I0< and the operation mode selector (OpMode is set to 2 (zero sequence mode). This will activate the output signal BLKU, intended to block voltage related protection functions in the IED. The output signal BLKZ will be activated as well if not the internal dead line detection is activaded at the same time. If the fuseFailDetected signal is present for more than 5 seconds at the same time as all phase voltages are below the set value UPh> and the setting parameter ISealIn is set to On, the function will activate the output signals 3PH, BLKU and BLKZ. The same signals will aslo be activated if all phase voltages are below the value UPh>, SealIn=On and any of the phase voltages below the setting value for more than 5 seconds. It is recommended to always set SealIn to On since this will secure that no unwanted operation of fuse failure will occur at closing command of breaker when the line is already energized from the other end. The system voltages shall be normal before fuse failure is allowed to be activated and initiate block of different protection functions. The output signal BLKU can also be activated if no phase voltages is below the setting UPh> for more than 60 seconds at the same time as the zero sequence voltage is above the set value 3U0> for more than 5 seconds, all phase currents are below the setting IDLD< (operate level for dead line detection) and the circuit breaker is closed (input CBCLOSED is activated). This condition covers for fuse failure at open breaker position. Fuse failure condition is unlatched when the normal voltage conditions are restored.

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Fuse failure condition is stored in the non volatile memory in the IED. In the new start-up procedure the IED checks the stored value in its non volatile memory and establishes the corresponding starting conditions.
TEST
TEST ACTIVE BlocFuse = Yes AND

BLOCK BLKTRIP fufailStarted AND

OR

OR All UL less than Uph> AND 3PH

SealIn = On AND 5s t

AND

Any UL less than Uph> Fuse fail detected (3U0 high and 3I0 low for t>3 ms)

OR

fuseFaildetected AND OR AND BLKU

OpMode = 2 setLatch U I deadLineCondition 200 ms t AND OR AND BLKZ

MCBOP

150 ms t 60 sec t AND UN > 3U0> for t>5 s All IL < IDLD< AND

All UL> UPh>

CBCLOSED DISCPOS

en06000394.vsd

Figure 192:

Simplified logic diagram for fuse failure supervision function, zero sequence based

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Input and output signals

The output signals 3PH, BLKU and BLKZ can be blocked in the following conditions: The input BLOCK is activated The input BLKTRIP is activated at the same time as the internal signal fufailStarted is not present The operation mode selector OpMode is set to Off. The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)

The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKSP is intended to be connected to the trip output at any of the protection functions included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate. The output signal BLKZ will also be blocked if the internal dead line detection is activated. The block signal has a 200 ms drop-off time delay. The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpMode selector. The additional drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function is not affected by the position of the line disconnector since there will be no line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies that the line is connected to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system and the block signal BLKU is generated. The output BLKU can be used for blocking the voltage related measuring functions (undervoltage protection, synchro-check etc.) except for the impedance protection. The function output BLKZ can be used for blocking the impedance protection function.

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The BLKZ will only be activated if not the internal dead line detection is activated at the same time. The fuse failure condition is unlatched when the normal voltage conditions are restored. When the output 3PH is activated, all three voltage are low.

10.2.2.2

Negative sequence
The negative sequence operates in the same way as the zero sequence, but it calculates the negative sequence component of current and voltage. the negative sequence current 3I2 the negative sequence voltage 3U2

The function enable the internal signal fuseFailDetected if the measured negative sequence voltage is higher than the set value 3U2>, the measured negative sequence current is below the value 3I2< and the operation mode selector (OpMode) is set to 1 (negative sequence mode).

10.2.2.3

du/dt and di/dt


The delta function can be activated by setting the parameter OperationDUDI to On. When it is selected On it operates in parallel with the sequence based algorithm. The current and voltage is continuously measured in all three phases and the following quantities are calculated: The change of voltage DU/Dt The change of current DI/Dt

The calculated delta quantities are compared with their respective set values DI< and DU>. The delta current and delta voltage algorithm, detects a fuse failure if a sufficient negative change in voltage amplitude without a sufficient change in current amplitude is detected in each phase separately. This check is performed if the circuit breaker is closed. Information about the circuit breaker position is brought to the function input CBCLOSED through a binary input of the IED. There are two conditions for activating the internal STDU signal and set the latch:

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The magnitude of U is higher than the corresponding setting DU> and I is below the setting DI> in any phase at the same time as the circuit breaker is closed (CBCLOSED = 1) The magnitude U is higher than the setting DU> and the magnitude of I is below the setting DI> in any phase at the same time as the magnitude of the phase current in the same phase is higher than the setting IPh>.

The first criterion requires that the delta condition shall be fulfilled in any phase at the same time as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other end onto a fault could lead to wrong start of the fuse failure function at the end with the open breaker. If this is considering to bee an important disadvantage, connect the CBCLOSED input to FALSE. In this way only the second criterion can activate the delta function. The second criterion means that detection of failure in one phase together with high current for the same phase will set the latch. The measured phase current is used to reduce the risk of false fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not caused by fuse failure) is not by certain followed by current change and a false fuse failure might occur. To prevent that the phase current criterion is introduced. If the signal setLatchUI is set (see figure 192) and if all measured voltages are low (lower than the setting UPh>) the output 3PH will be activated indicating fuse failure in all three phases. The output BLKU and BLKZ will be activated as well. If the signal setLatchUI is activated but not all three phases are below the setting UPh> only BLKU will be activated. The BLKZ will be activated as well if not the internal dead line detection is activated.

10.2.2.4

Operation modes
The fuse failure supervision function can be switched on or off by the setting parameter Operation to On or Off.

Negative and zero sequence algorithm

For increased flexibility and adaptation to system requirements, an operation mode selector, OperationMode has been introduced to make it possible to select different operating modes for the negative and zero sequence based algorithm. The different operation modes are: OpMode = 0, the negative and zero sequence function is switched off OpMode = 1; Negative sequence is selected OpMode = 2; Zero sequence is selected

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OMode = 3; Both negative and zero sequence is activated and working in parallel in an OR-condition OpMode = 4; Both negative and zero sequence is activated and working in series (AND-condition for operation) OpMode = 5; Optimum of negative and zero sequence (the function that has the highest magnitude of measured negative and zero sequence current will be activated).

du/dt and di/dt algorithm

The DU and DI function can be switched on or off by the setting parameter OpDUDI to On or Off.

10.2.2.5

Dead line detection


The function input signal deadLineCondition (see figure 192) is related to the internal dead line detection function. This signal is activated from the dead line condition function when the voltage and the current in at least one phase is below their respective setting values UDLD< and IDLD<. It prevents the blocking of the impedance protection by a fuse failure detection during dead line condition (that occurs also during single pole auto-reclosing). The 200 ms drop-off timer prolongs the dead line condition after the line-energization in order to prevent the blocking of the impedance protection for unequal pole closing.

10.2.3

Function block
FSD1SDDRFUF I3P U3P BLOCK CBCLOSED MCBOP DISCPOS BLKTRIP BLKZ BLKU 3PH DLD1PH DLD3PH

en05000700.vsd

Figure 193:

FSD function block

10.2.4

Input and output signals


Table 223:
Signal I3P U3P BLOCK CBCLOSED Table continued on next page

Input signals for the SDDRFUF (FSD1-) function block


Description Current connection Voltage connection Block of function Active when circuit breaker is closed

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Signal MCBOP DISCPOS BLKTRIP Description Active when external MCB opens protected voltage circuit Active when line disconnector is open Blocks operation of function when active

Table 224:
Signal BLKZ BLKU 3PH DLD1PH DLD3PH

Output signals for the SDDRFUF (FSD1-) function block


Description Start of current and voltage controlled function General start of function Three-phase start of function Dead line condition in at least one phase Dead line condition in all three phases

10.2.5

Setting parameters
Table 225:
Parameter Operation IBase UBase OpMode

Basic parameter group settings for the SDDRFUF (FSD1-) function


Range Off On 1 - 99999 0.05 - 2000.00 Off UNsINs UZsIZs UZsIZs OR UNsINs UZsIZs AND UNsINs OptimZsNs 1 - 100 Step 1 0.05 Default On 3000 400.00 UZsIZs Unit A kV Description Operation Off / On Base current Base voltage Operating mode selection

3U0>

30

%UB

Operate level of residual overvoltage element in % of UBase Operate level of residual undercurrent element in % of IBase Operate level of neg seq overvoltage element in % of UBase Operate level of neg seq undercurrent element in % of IBase Operation of change based function Off/On

3I0<

1 - 100

10

%IB

3U2>

1 - 100

30

%UB

3I2<

1 - 100

10

%IB

OpDUDI

Off On

Off

Table continued on next page

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Parameter DU> Range 1 - 100 Step 1 Default 60 Unit %UB Description Operate level of change in phase voltage in % of UBase Operate level of change in phase current in % of IBase Operate level of phase voltage in % of UBase Operate level of phase current in % of IBase Seal in functionality Off/On Operate level of sealin phase voltage in % of UBase Operate level for open phase current detection in % of IBase Operate level for open phase voltage detection in % of UBase

DI<

1 - 100

15

%IB

UPh>

1 - 100

70

%UB

IPh>

1 - 100

10

%IB

SealIn USealln<

Off On 1 - 100

On 70

%UB

IDLD<

1 - 100

%IB

UDLD<

1 - 100

60

%UB

10.2.6

Technical data
Table 226:
Function Operate voltage, zero sequence Operate current, zero sequence Operate voltage, negative sequence Operate current, negative sequence Operate voltage change level Operate current change level

Fuse failure supervision (RFUF)


Range or value (1-100)% of Ubase (1100)% of Ibase (1100)% of Ubase (1100)% of Ibase (1100)% of Ubase (1100)% of Ibase Accuracy 1.0% of Ur 1.0% of Ir 1.0% of Ur 1.0% of Ir 5.0% of Ur 5.0% of Ir

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Section 11 Control
About this chapter
This chapter describes the control functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

11.1

Synchronizing, synchrocheck and energizing check (RSYN, 25)


Function block name: SYNxANSI number: 25 IEC 61850 logical node name: SESRSYN IEC 60617 graphical symbol:

sc/vc

11.1.1

Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment including the breaker closing time. The systems can thus be reconnected after an auto-reclose or manual closing which improves the network stability. The synchrocheck function checks that the voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that closing can be done safely. The function includes a built-in voltage selection scheme for double bus and one- and a half or ring busbar arrangements. Manual closing as well as automatic reclosing can be checked by the function and can have different settings. For systems which are running asynchronous a synchronizing function is provided. The main purpose of the synchronizing function is to provide controlled closing of circuit breakers when two asynchronous systems are going to be connected. It is used for slip frequencies that are larger than those for synchrocheck and lower than a set maximum level for the synchronizing function.

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11.1.2.1

Principle of operation
Basic functionality
The synchronism check function measures the conditions across the circuit breaker and compares them to set limits. The output is only given when all measured quantities are simultaneously within their set limits. The energizing check function measures the bus and line voltages and compares them to both high and low threshold detectors. The output is only given when the actual measured quantities match the set conditions. The synchronizing measures the conditions across the circuit breaker, and it also determines the angle change occurring during the closing delay of the circuit breaker, from the measured slip frequency. The output is only given when all measured conditions are simultaneously within their set limits. The issue of the output is timed to give closure at the optimal time including the time for the circuit breaker and the closing circuit. For single circuit breaker and 1 1/2 circuit breaker arrangements, the SYN function blocks have the capability to make the necessary voltage selection. For single circuit breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For 1 1/2 circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of the bus disconnectors as well as the circuit breakers The internal logic for each function block as well as the Input and Outputs and the setting parameters with default setting and setting ranges is described in this document. For application related information, please refer to the Application manual.

11.1.2.2

Logic diagrams
The logic diagrams that follow illustrate the main principles of the Synchrocheck function components such as Synchronism check, Energizing check and Voltage selection, and are intended to simplify the understanding of the function.

Synchronism check

The voltage difference, frequency difference and phase angle difference values are measured in the IED centrally and are available for the Synchrocheck function for evaluation. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need to be compensated. This is done with a setting, which scales up the line voltage to a level equal to the bus voltage. When the function is set to OperationSC = On, the measuring will start. The function will compare the bus and line voltage values with the set values for UHighBusSC and UHighLineSC.

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If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, phase angle and voltage difference FreqDiff, PhaseDiff and UDiff. If a compensation factor is set due to the use of different voltages on the Bus and Line, the factor is deducted from the line voltage before the comparison of the phase angle values. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and may not exceed the set value. Two sets of settings for frequency difference and phase angle difference are available and used for the Manual closing and Auto-Reclose functions respectively as required. The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck function and block of the Synchronism check function respectively. TSTSC will allow testing of the function where the fulfilled conditions are connected to a separate test output Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured conditions match the set conditions for the respective output. The output signal can be delayed independently for MANSYOK conditions and for AUTOSYOK. A number of outputs are available as information about fulfilled checking conditions. UOKSC shows that the voltages are high, UDIFFSC, FRDIFFM/A, PHDIFFM/A shows when the voltage difference, frequency difference and phase angle difference conditions are met.

Synchronizing

When the function is set to OperationSynch=On the measuring will be performed. The function will compare the values for the bus and line voltage with the set values for UHighBusSynch and UHighLineSynch which is a supervision that the voltages are both live. If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and UDiffSynch. Measured frequencies between the settings for the maximum and minimum frequency will initiate the measuring and the evaluation of the angle change to allow operation to be sent in the right moment including the set tBreaker time. There is a phase angle release internally to block any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse tClosePulse and the function reset. The function will also reset if the syncronizing conditions are not fulfilled within the set tMaxSynch time. This will then prevent that the functions is by mistake maintained in operation a long time waiting for conditions to be fulfilled. The inputs BLOCK and BLKSYNCH are available for total block of the complete function resp. of the Synchronizing part.

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SYN1 OPERATION SYNCH OFF ON TEST MODE OFF ON


STARTSYN
AND

BLKSYNCH OR

S R

AND

SYNPROGR

UDiffSynch
50 ms

UHighBusSynch UHighLineSynch FreqDiffMax FreqDiffMin

AND

AND

SYNOK

OR AND OR

TSTSYNOK

FreqRateChange fBus&fLine 5 Hz PhaseDiff < 15 deg PhaseDiff=closing angle


AND

AND

tClose Pulse

tMax Synch

SYNFAIL

en06000636.vsd

Figure 194:

Simplified logic diagram for the synchronizing function

Energizing check

Voltage values are measured in the IED centrally and are available for evaluation by the Synchrocheck function. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which scales the line voltage to a level equal to the bus voltage. The function measures voltages on the busbar and the line to verify whether they are live or dead. This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for bus energizing and UHighBusEnergand ULowBusEnerg for line energizing. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and shall not exceed a set value. The Energizing direction can be selected individually for the Manual and the Automatic functions respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed independently for MANENOK conditions and for AUTOENOK. The Energizing direction can also be 418 Technical reference manual 1MRK502013-UEN rev. B REG 670

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selected by an integer input AENMODE resp MENMODE, which e.g. can be connected to a Binary to Integer function block BI 16 (BAxx or BBxx). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZERO output from Fixed Signals function block will mean that the setting is done from PST tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both. The inputs BLOCK and BLKENERG are available for total block of the complete Synchrocheck function resp. block of the Energizing check function. TSTENOK will allow testing of the function where the fulfilled conditions are connected to a separate test output.
Note! Similar logic for Manual Synchrocheck.

OperationSC = On
AND AND

TSTAUTOSY

TSTSC BLKSC BLOCK


OR AND AND 0-60 s t tSCA AND

AUTOSYOK

UDiffSC
AND

50 ms t

UHighBusSC UHighLineSC
AND 1

UOKSC UDIFFSC FRDIFFA PHDIFFA UDIFFME FRDIFFME

FreqDiffA PhaseDiffA voltageDifferenceValue frequencyDifferenceValue phaseAngleDifferenceValue

1 1

PHDIFFME

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Figure 195:

Simplified logic diagram for the Synchrocheck function

Voltage selection

The voltage selection module including supervision of included voltage transformer fuses for the different arrangements is a basic part of the Synchrocheck function and determines the parameters fed to the Synchronism check and Energizing check functions. This includes the selection of the appropriate Line and Bus voltages and fuse supervision.

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The voltage selection type to be used is set with the parameter CBConfig. The different alternatives are described below. If NoVoltageSel is set the default voltages used will be ULine1 and UBus1. This is also the case when external voltage selection is provided. Fuse failure supervision for the used inputs must also be connected. The voltage selection function selected voltages and fuse conditions are the Synchronism check and Energizing check inputs. For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply Disconnector Open and Closed positions but it is of course also possible to use an inverter for one of the positions.

Fuse failure supervision

External fuse-failure signals or signals from a tripped fuse switch/MCB are connected to binary inputs that are configured to the inputs of the Synchrocheck functions in the terminal. Alternatively the internal signals from fuse failure supervision can be used when available. There are two alternative connection possibilities. Inputs labelled OK must be connected if the available contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if the available contact indicates that the voltage circuit is faulty. The SYN1(2)-UB1/2OK and SYN1(2)-UB1/2FF inputs are related to the busbar voltage and the SYN1(2)-ULN1/2OK and SYN1(2)-ULN1/2FF inputs are related to the line voltage. Configure them to the binary inputs or function outputs that indicate the status of the external fuse failure of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are blocked. The synchronism check requires full voltage on both sides and will be blocked automatically in the event of fuse failures.

Voltage selection for a single circuit breaker with double busbars

This function uses the binary input from the disconnectors auxiliary contacts B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL respectively indicate the selected Bus voltage. The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers. Inputs UB1OK-UB1FF supervise the fuse for Bus 1. UB2OK-UB2FF supervises the fuse for Bus 2 and ULNOK-ULNFF supervises the fuse for the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively be used dependent on the available signal. If a fuse-failure is detected in the selected voltage source an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function logic diagram is shown in figure 196.

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B1QOPEN B1QCLD B2QOPEN B2QCLD


AND AND

B1SEL B2SEL

1
AND

invalidSelection busVoltage

bus1Voltage bus2Voltage

UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF

OR

AND OR AND AND AND

selectedFuseOK USELFAIL

OR

OR

BLOCK

en05000779.vsd

Figure 196:

Logic diagram for the voltage selection function of a single circuit breaker with double busbars

Voltage selection for a 1 1/2 circuit breaker arrangement

Note that with 1 breaker schemes two Synchrocheck functions must be used in the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus breaker and the Tie breakers is described. This voltage selection function uses the binary inputs from the disconnectors and circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Energizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to the busbar and the other side is connected either to line 1, line 2 or the other busbar depending on the arrangement. Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD, LN2QOPEN-LN2QCLD are inputs for the position of the Line disconnectors respectively the Bus and Tie breakers. The Outputs LN1SEL, LN2SEL and B2SEL will give indication of the selected Line voltage as a reference to the fixed Bus 1 voltage. The fuse supervision is connected to ULNOK-ULNFF etc. and with alternative Healthy or Failing fuse signals depending on what is available for each of fuse (MCB). The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is connected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus to line, line to bus and line to line.

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The line 1 voltage is selected if the line 1 disconnector is closed. The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is closed. The line 2 voltage is selected if the line 2 disconnector is closed. The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 Circuit breaker is closed.

The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-failure is detected in the selected voltage an output signal USELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK.The function block diagram for the voltage selection of a bus circuit breaker is shown in 197 and for the tie circuit breaker in 198

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LN1QOPEN LN1QCLD B1QOPEN B1QCLD LN2QOPEN LN2QCLD B2QOPEN B2QCLD


AND AND AND AND AND OR AND AND

LN1SEL

LN2SEL B2SEL invalidSelection

line1Voltage line2Voltage bus2Voltage UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF


OR OR OR AND AND

lineVoltage

selectedFuseOK USELFAIL

OR

AND

AND

ULN2OK ULN2FF BLOCK

OR

AND

en05000780.vsd

Figure 197:

Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2 breaker arrangement.

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LN1QOPEN LN1QCLD
AND

LN1SEL 1 B1SEL
AND

B1QOPEN B1QCLD
AND

AND

line1Voltage bus1Voltage LN2QOPEN LN2QCLD


AND

busVoltage

LN2SEL 1 B2SEL
AND OR

B2QOPEN B2QCLD
AND

invalidSelection

AND

line2Voltage bus2Voltage UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF BLOCK

lineVoltage

OR

AND OR AND

OR

AND

selectedFuseOK USELFAIL

OR

AND

AND

OR

AND

en05000781.vsd

Figure 198:

Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2 breaker arrangement.

11.1.3

Function block
The Synchrocheck function block is shown in 199. Tables describing the inputs, outputs and setting parameters of this function are presented in the following sections of this document. Refer to the Application manual for the use of inputs and outputs in your particular application.

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SYN1SESRSYN_25 U3PBB1 U3PBB2 U3PLN1 U3PLN2 BLOCK BLKSYNCH BLKSC BLKENERG B1QOPEN B1QCLD B2QOPEN B2QCLD LN1QOPEN LN1QCLD LN2QOPEN LN2QCLD UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK TSTSYNOK TSTAUTSY TSTMANSY TSTENOK USELFAIL B1SEL B2SEL LN1SEL LN2SEL SYNPROGR SYNFAIL UOKSYN UDIFFSYN FRDIFSYN FRDIFFOK FRDERIVA UOKSC UDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM UDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN en06000534.vsd

Figure 199:

SYN function block

11.1.4

Input and output signals


Table 227:
Signal U3PBB1 U3PBB2 U3PLN1 U3PLN2 BLOCK BLKSYNCH BLKSC BLKENERG B1QOPEN B1QCLD B2QOPEN B2QCLD LN1QOPEN Table continued on next page

Input signals for the SESRSYN_25 (SYN1-) function block


Description Group signal for voltage input busbar 1 Group signal for voltage input busbar 2 Group signal for voltage input line 1 Group signal for voltage input line 2 General block Block synchronizing Block synchro check Block energizing check Open status for CB or disconnector connected to bus1 Close status for CB or disconnector connected to bus1 Open status for CB or disconnector connected to bus2 Close status for CB or disconnector connected to bus2 Open status for CB or disconnector connected to line1

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Signal LN1QCLD LN2QOPEN LN2QCLD UB1OK UB1FF UB2OK UB2FF ULN1OK ULN1FF ULN2OK ULN2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE Description Close status for CB or disconnector connected to line1 Open status for CB or disconnector connected to line2 Close status for CB or disconnector connected to line2 Bus1 voltage transformer OK Bus1 voltage transformer fuse failure Bus2 voltage transformer OK Bus2 voltage transformer fuse failure Line1 voltage transformer OK Line1 voltage transformer fuse failure Line2 voltage transformer OK Line2 voltage transformer fuse failure Start synchronizing Set synchronizing in test mode Set synchro check in test mode Set energizing check in test mode Input for setting of automatic energizing mode Input for setting of manual energizing mode

Table 228:
Signal SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK TSTSYNOK TSTAUTSY TSTMANSY TSTENOK USELFAIL B1SEL B2SEL LN1SEL LN2SEL SYNPROGR SYNFAIL UOKSYN UDIFFSYN

Output signals for the SESRSYN_25 (SYN1-) function block


Description Synchronizing OK output Auto synchro check OK Automatic energizing check OK Manual synchro check OK Manual energizing check OK Synchronizing OK test output Auto synchro check OK test output Manual synchro check OK test output Energizing check OK test output Selected voltage transformer fuse failed Bus1 selected Bus2 selected Line1 selected Line2 selected Synchronizing in progress Synchronizing failed Voltage amplitudes for synchronizing above set limits Voltage difference out of limit for synchronizing

Table continued on next page

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Signal FRDIFSYN FRDIFFOK FRDERIVA UOKSC UDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM UDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN Description Frequency difference out of limit for synchronizing Frequency difference in band for synchronizing Frequency derivative out of limit for synchronizing Voltage amplitudes above set limits Voltage difference out of limit Frequency difference out of limit for Auto operation Phase angle difference out of limit for Auto operation Frequency difference out of limit for Manual operation Phase angle difference out of limit for Manual Operation Calculated difference in voltage Calculated difference in frequency Calculated difference of phase angle Selected mode for automatic energizing Selected mode for manual energizing

11.1.5

Setting parameters
Table 229:
Parameter Operation SelPhaseBus1

Basic parameter group settings for the SESRSYN_25 (SYN1-) function


Range Off On phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 phase1 phase2 phase3 phase1-phase2 phase2-phase3 phase3-phase1 Step Default Off phase2 Unit Description Operation Off / On Select phase for bus1

SelPhaseBus2

phase2

Select phase for bus2

SelPhaseLine1

phase2

Select phase for line1

SelPhaseLine2

phase2

Select phase for line2

Table continued on next page

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Parameter CBConfig Range No voltage sel. Double bus 1 1/2 bus CB 1 1/2 bus alt. CB Tie CB 0.001 - 9999.999 -180 - 180 1.000 Off On 50.0 - 120.0 Step Default No voltage sel. Unit Description Select CB configuration

UBase PhaseShift URatio OperationSynch

0.001 5 0.001 -

400.000 0 0.040 - 25.000 Off

kV Deg -

Base voltage in kV Phase shift Voltage ratio Operation for synchronizing function Off/On Voltage high limit bus for synchronizing in % of UBase Voltage high limit line for synchronizing in % of UBase Voltage difference limit for synchronizing in % of UBase Minimum frequency difference limit for synchronizing Maximum frequency difference limit for synchronizing Maximum allowed frequency rate of change Closing time of the breaker Breaker closing pulse duration Resets synch if no close has been made before set time Minimum time to accept synchronizing conditions Operation for synchronism check function Off/On Voltage high limit bus for synchrocheck in % of UBase Voltage high limit line for synchrocheck in % of UBase Voltage difference limit in % of UBase

UHighBusSynch

1.0

80.0

%UB

UHighLineSynch

50.0 - 120.0

1.0

80.0

%UB

UDiffSynch

2.0 - 50.0

1.0

10.0

%UB

FreqDiffMin

0.003 - 0.250

0.001

0.010

Hz

FreqDiffMax

0.050 - 0.250

0.001

0.200

Hz

FreqRateChange

0.000 - 0.500

0.001

0.300

Hz/s

tBreaker tClosePulse tMaxSynch

0.000 - 60.000 0.050 - 60.000 0.00 - 6000.00

0.001 0.001 0.01

0.080 0.200 600.00

s s s

tMinSynch

0.000 - 60.000

0.001

2.000

OperationSC

Off On 50.0 - 120.0

On

UHighBusSC

1.0

80.0

%UB

UHighLineSC

50.0 - 120.0

1.0

80.0

%UB

UDiffSC

2.0 - 50.0

1.0

15.0

%UB

Table continued on next page

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Parameter FreqDiffA Range 0.003 - 1.000 Step 0.001 Default 0.010 Unit Hz Description Frequency difference limit between bus and line Auto Frequency difference limit between bus and line Manual Phase angle difference limit between bus and line Auto Phase angle difference limit between bus and line Manual Time delay output for synchrocheck Auto Time delay output for synchrocheck Manual Automatic energizing check mode

FreqDiffM

0.003 - 1.000

0.001

0.010

Hz

PhaseDiffA

5.0 - 90.0

1.0

25.0

Deg

PhaseDiffM

5.0 - 90.0

1.0

25.0

Deg

tSCA tSCM AutoEnerg

0.000 - 60.000 0.000 - 60.000 Off DLLB DBLL Both Off DLLB DBLL Both Off On 50.0 - 120.0

0.001 0.001 -

0.100 0.100 DBLL

s s -

ManEnerg

Both

Manual energizing check mode

ManEnergDBDL UHighBusEnerg

1.0

Off 80.0

%UB

Manual dead bus, dead line energizing Voltage high limit bus for energizing check in % of UBase Voltage high limit line for energizing check in % of UBase Voltage low limit bus for energizing check in % of UBase Voltage low limit line for energizing check in % of UBase Maximum voltage for energizing in % of UBase Time delay for automatic energizing check Time delay for manual energizing check

UHighLineEnerg

50.0 - 120.0

1.0

80.0

%UB

ULowBusEnerg

10.0 - 80.0

1.0

40.0

%UB

ULowLineEnerg

10.0 - 80.0

1.0

40.0

%UB

UMaxEnerg

50.0 - 180.0

1.0

115.0

%UB

tAutoEnerg

0.000 - 60.000

0.001

0.100

tManEnerg

0.000 - 60.000

0.001

0.100

11.1.6

Technical data

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Table 230:
Function

Synchronizing, synchrocheck check and energizing check (RSYN, 25)


Range or value (-180 to 180) degrees (0.20-5.00)% of Ubase (50.0-120.0)% of Ubase > 95% (0.003-1.000) Hz (5.0-90.0) degrees (2.0-50.0)% of Ubase (0.000-60.000) s (50.0-120.0)% of Ubase > 95% (10.0-80.0)% of Ubase < 105% (80.0-140.0)% of Ubase (0.000-60.000) s 160 ms typically 80 ms typically Accuracy 1.0% of Ur at U Ur 1.0% of U at U >Ur 2.0 mHz 2.0 degrees 1.0% of Ur 0.5% 10 ms 1.0% of Ur at U Ur 1.0% of U at U >Ur 1.0% of Ur 1.0% of Ur at U Ur 1.0% of U at U >Ur 0.5% 10 ms -

Phase shift, jline - jbus Voltage ratio, Ubus/Uline Voltage high limit for synchrocheck Reset ratio, synchrocheck Frequency difference limit between bus and line Phase angle difference limit between bus and line Voltage difference limit between bus and line Time delay output for synchrocheck Voltage high limit for energizing check Reset ratio, voltage high limit Voltage low limit for energizing check Reset ratio, voltage low limit Maximum voltage for energizing Time delay for energizing check Operate time for synchrocheck function Operate time for energizing function

11.2
11.2.1

Autorecloser (RREC, 79)


Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for single or multi-breaker applications. Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or three phase for single phase or multi-phase faults respectively. Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit allows one circuit breaker to close first and the second will only close if the fault proved to be transient. Each autoreclosing function can be configured to co-operate with a synchrocheck function.

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11.3
11.3.1

Apparatus control (APC)


Introduction
The apparatus control is a function for control and supervision of circuit breakers, disconnectors and earthing switches within a bay. Permission to operate is given after evaluation of conditions from other functions such as interlocking, synchrocheck, operator place selection and external or internal blockings.

11.3.2
11.3.2.1

Bay control (QCBAY)


Introduction
This function is used to handle the selection of the operator place per bay. The bay control function also provides blocking functions that can be distributed to different apparatuses within the bay.

11.3.2.2

Function block
CB01QCBAY LR_OFF LR_LOC LR_REM LR_VALID BL_UPD BL_CMD PSTO UPD_BLKD CMD_BLKD

en05000796.vsd

Figure 200:

CB function block

11.3.2.3

Input and output signals


Table 231:
Signal LR_OFF LR_LOC LR_REM LR_VALID BL_UPD BL_CMD

Input signals for the QCBAY (CB01-) function block


Description External Local/Remote switch is in Off position External Local/Remote switch is in Local position External Local/Remote switch is in Remote position Data representing the L/R switch position is valid Steady signal to block the position updates Steady signal to block the command

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Table 232:
Signal PSTO UPD_BLKD CMD_BLKD

Output signals for the QCBAY (CB01-) function block


Description The value for the operator place allocation The update of position is blocked The function is blocked for commands

11.3.2.4

Setting parameters
Table 233:
Parameter AllPSTOValid

General settings for the QCBAY (CB01-) function


Range Priority No priority Step Default Priority Unit Description The priority of originators

11.3.3
11.3.3.1

Local/Remote switch (LocalRemote, LocRemControl)


Introduction
The signals from the local LCD HMI or from an external local/remote switch are applied via function blocks LocalRemote and LocRemControl to the Bay control QCBAY function block. A parameter in function block LocalRemote is set to choose if the switch signals are coming from the local LCD HMI or from an external hardware switch connected via binary inputs.

11.3.3.2

Principle of operation
The function block LocalRemote handles the signals coming from the local/remote switch. The connections are seen in figure 201, where the inputs on function block LocalRemote are connected to binary inputs if an external switch is used. When a local LCD HMI is used, the inputs are not used and are set to FALSE in the configuration. The outputs from the LocalRemote function block control the output PSTO (Permitted Source To Operate) on QCBAY.

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LR01LocalRemote CTRLOFF OFF LOCCTRL LOCAL REMCTRL REMOTE LHMICTRL VALID

CB01QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD CB02QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD

LR02LocalRemote CTRLOFF OFF LOCCTRL LOCAL REMCTRL REMOTE LHMICTRL VALID

LRC1LocRemControl PSTO1 HMICTR1 PSTO2 HMICTR2 PSTO3 HMICTR3 PSTO4 HMICTR4 PSTO5 HMICTR5 PSTO6 HMICTR6 PSTO7 HMICTR7 PSTO8 HMICTR8 PSTO9 HMICTR9 PSTO10 HMICTR10 PSTO11 HMICTR11 PSTO12 HMICTR12 en05000250.vsd

Figure 201:

Configuration for the local/remote handling for a local LCD HMI with two bays and two screen pages

If the IED contains control functions for several bays, the local/remote position can be different for the included bays. When the local LCD HMI is used the position of the local/remote switch can be different depending on which single line diagram screen page that is presented on the local HMI. The function block LocRemControl controls the presentation of the LEDs for the local/remote position to applicable bay and screen page. The switching of the Local/Remote switch requires at least system operator level. The password will be requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users and passwords are defined with the UMT.

11.3.3.3

Function block

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LR01LocalRemote CT RLOFF OFF LOCCT RL LOCAL REMCT RL REMOT E LHMICT RL VALID en05000360.vsd

Figure 202:

LR function block

LRC1LocRemControl PST O1 HMICT R1 PST O2 HMICT R2 PST O3 HMICT R3 PST O4 HMICT R4 PST O5 HMICT R5 PST O6 HMICT R6 PST O7 HMICT R7 PST O8 HMICT R8 PST O9 HMICT R9 PST O10 HMICT R10 PST O11 HMICT R11 PST O12 HMICT R12 en05000361.vsd

Figure 203:

LRC function block

11.3.3.4

Input and output signals


Table 234:
Signal CTRLOFF LOCCTRL REMCTRL LHMICTRL

Input signals for the LocalRemote (LR01-) function block


Description Disable control Local in control Remote in control LHMI control

Table 235:
Signal OFF LOCAL REMOTE VALID

Output signals for the LocalRemote (LR01-) function block


Description Control is disabled Local control is activated Remote control is activated Outputs are valid

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Table 236:
Signal PSTO1 PSTO2 PSTO3 PSTO4 PSTO5 PSTO6 PSTO7 PSTO8 PSTO9 PSTO10 PSTO11 PSTO12

Input signals for the LocRemControl (LRC1-) function block


Description PSTO input channel 1 PSTO input channel 2 PSTO input channel 3 PSTO input channel 4 PSTO input channel 5 PSTO input channel 6 PSTO input channel 7 PSTO input channel 8 PSTO input channel 9 PSTO input channel 10 PSTO input channel 11 PSTO input channel 12

Table 237:
Signal HMICTR1 HMICTR2 HMICTR3 HMICTR4 HMICTR5 HMICTR6 HMICTR7 HMICTR8 HMICTR9 HMICTR10 HMICTR11 HMICTR12

Output signals for the LocRemControl (LRC1-) function block


Description Bitmask output 1 to local remote LHMI input Bitmask output 2 to local remote LHMI input Bitmask output 3 to local remote LHMI input Bitmask output 4 to local remote LHMI input Bitmask output 5 to local remote LHMI input Bitmask output 6 to local remote LHMI input Bitmask output 7 to local remote LHMI input Bitmask output 8 to local remote LHMI input Bitmask output 9 to local remote LHMI input Bitmask output 10 to local remote LHMI input Bitmask output 11 to local remote LHMI input Bitmask output 12 to local remote LHMI input

11.3.3.5

Setting parameters
Table 238:
Parameter ControlMode

Basic general settings for the LocalRemote (LR01-) function


Range Internal LR-switch External LRswitch Step Default Internal LR-switch Unit Description Control mode for internal/external LRswitch

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11.3.4.1

Switch controller (SCSWI)


Introduction
The Switch controller (SCSWI) initializes and supervises all functions to properly select and operate switching primary apparatuses. The Switch controller may handle and operate on one three-phase device or three one-phase switching devices.

11.3.4.2

Principle of operation
The function is provided with verification checks for the select - execute sequence, i.e. checks the conditions prior each step of the operation. The involved functions for these condition verifications are interlocking, reservation, blockings and synchrocheck.

Command handling

Two types of command models can be used. The two command models are "direct with enhanced security" and "SBO (Select-Before-Operate) with enhanced security". Which one of these two command models that are used is defined by the parameter CtlModel. The meaning with "direct with enhanced security" model is that no select is required. The meaning with "SBO with enhanced security" model is that a select is required before execute. In this function only commands with enhanced security is supported regarding changing of the position. With enhanced security means that the command sequence is supervised in three steps, the selection, command evaluation and the supervision of position. Each step ends up with a pulsed signal to indicate that the respective step in the command sequence is finished. If an error occurs in one of the steps in the command sequence, the sequence is terminated and the error is mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal for the IEC61850 communication. The last cause L_CAUSE can be read from the function block and used for example at commissioning. The meaning of the cause signals can be found in table 2. There is not any relation between the command direction and the actual position. For example, if the switch is in close position it is possible to execute a close command. Before an executing command, an evaluation of the position is done. If the parameter PosDependent is true and the position is in intermediate state or in bad state no executing command is send. If the parameter is false the execution command is send independent of the position value.

Evaluation of position

In the case when there are three one-phase switches connected to the switch control function, the switch control will "merge" the position of the three switches to the

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resulting three-phase position. In the case when the position differ between the onephase switches, following principles will be applied:
All switches in open position: All switches in close position: One switch =open, two switches= close (or inversely): Any switch in intermediate position: Any switch in bad state: switch control position = open switch control position = close switch control position = intermediate switch control position = intermediate switch control position = bad state

The time stamp of the output three-phase position from switch control will have the time stamp of the last changed phase when it goes to end position. When it goes to intermediate position or bad state, it will get the time stamp of the first changed phase. In addition, there is also the possibility that one of the one-phase switches will change position at any time due to a trip. Such situation is here called pole discordance and is supervised by this function. In case of a pole discordance situation, i.e. the position of the one-phase switches are not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set. In the supervision phase, the switch controller function evaluates the "cause" values from the switch modules XCBR/XSWI. At error the "cause" value with highest priority is shown.

Blocking principles

The blocking signals are normally coming from the bay control function (QCBAY) and via the IEC61850 communication from the operator place. The different blocking possibilities are: Block/deblock of command. It is used to block command for operation of position. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible. The different block conditions will only affect the operation of this function, i.e. no blocking signals will be "forwarded" to other functions. The above blocking outputs are stored in a non-volatile memory.

Interaction with synchrochecksynchronism-check and synchronizing functions

The switch controller works in conjunction with the synchrocheck and the synchronizing function SECRSYN. It is assumed that the synchrocheck function is REG 670 Technical reference manual 1MRK502013-UEN rev. B 437

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continuously in operation and gives the result to the SCSWI. The result from the synchrocheck function is evaluated during the close execution. If the operator performs an override of the synchrocheck, the evaluation of the synchrocheck state is omitted. When there is a positive confirmation from the synchrocheck function, the switch controller SCSWI will send the close signal EXE_CL to the switch function SXCBR. When there is no positive confirmation from the synchrocheck function, the SCSWI will send a start signal START_SY to the synchronizing function, which will send the closing command to the SXCBR when the synchronizing conditions are fulfilled, see figure 204. If no synchronizing function is included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which means no start of the synchronizing function. The SCSWI will then set the attribute "blocked-bysynchrocheck" in the "cause" signal. See also the time diagram in figure 208.
SCSWI EXE_CL OR SXCBR CLOSE

SYNC_OK START_SY SY_INPRO SECRSYN . CB CLOSE Synchro Check Synchronizing function

en05000091.vsd

Figure 204:

Example of interaction between SCSWI, SECRSYN (synchrocheck and synchronizing function) and SXCBR function

Time diagrams

The SCSWI function has timers for evaluating different time supervision conditions. These timers are explained here. The timer tSelect is used for supervising the time between the select and the execute command signal, i.e. the time the operator has to perform the command execution after the selection of the object to operate.

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select execute command tSelect timer t1 t1>tSelect, then longoperation-time in 'cause' is set
en05000092.vsd

Figure 205:

tSelect

The parameter tResResponse is used to set the maximum allowed time to make the reservation, i.e. the time between reservation request and the feedback reservation granted from all bays involved in the reservation function.
select reservation request RES_RQ reservation granted RES_GRT command termination tResResponse timer t1 t1>tResResponse, then 1-of-n-control in 'cause' is set
en05000093.vsd

Figure 206:

tResResponse

The timer tExecutionFB supervises the time between the execute command and the command termination, see figure 207.

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execute command position L1 open close position L2 open close position L3 open close cmd termination L1 cmd termination L2 cmd termination L3 cmd termination position open close tExecutionFB timer t1>tExecutionFB, then long-operation-time in 'cause' is set *

t1

* The cmd termination will be delayed one execution sample.


en05000094.vsd

Figure 207:

tExecutionFB

The parameter tSynchrocheck is used to define the maximum allowed time between the execute command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute command signal is received, the timer "tSynchrocheck" will not start. The start signal for the synchronizing is obtained if the synchrocheck conditions are not fulfilled.
execute command SYNC_OK tSynchrocheck START_SY SY_INPRO tSynchronizing t2 t2>tSynchronizing, then blocked-by-synchrocheck in 'cause' is set
en05000095.vsd

t1

Figure 208:

tSynchroCheck and tSynchronizing

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Error handling

Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 239 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 239:
Apparatus control function 22 23 24 25 30 31 32 33 34 35

Values for "cause" signal in priority order


Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

11.3.4.3

Function block
CS01SCSWI BLOCK PSTO L_SEL L_OPEN L_CLOSE AU_OPEN AU_CLOSE BL_CMD RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3 EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT

en05000337.vsd

Figure 209:

CS function block

11.3.4.4

Input and output signals

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Table 240:
Signal BLOCK PSTO L_SEL L_OPEN L_CLOSE AU_OPEN AU_CLOSE BL_CMD RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3

Input signals for the SCSWI (CS01-) function block


Description Block of function Operator place selection Select signal from local panel Open signal from local panel Close signal from local panel Used for local automation function Used for local automation function Steady signal for block of the command Positive acknowledge that all reservations are made Reservation is made externally Synchronizing function in progress Closing is permitted at set to true by the synchrocheck Enables open operation Enables close operation Group signal for XCBR input Group signal for XCBR input Group signal for XCBR input

Table 241:
Signal EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT

Output signals for the SCSWI (CS01-) function block


Description Execute command for open direction Execute command for close direction The select conditions are fulfilled Request signal to the reservation function Starts the synchronizing function Position indication Open position indication Closed position indication The positions for poles L1-L3 are not equal after a set time Commands are blocked Latest value of the error indication during command Execution information to XCBR/XSWI

11.3.4.5

Setting parameters

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Table 242:
Parameter CtlModel

Basic general settings for the SCSWI (CS01-) function


Range Dir Norm SBO Enh (ABB) Dir Norm (ABB) SBO Enh Always permitted Not perm at 00/11 0.000 - 60.000 Step Default SBO Enh Unit Description Specifies the type for control model according to IEC 61850 Permission to operate depending on the position Max time between select and execute signals Allowed time from reservation request to reservation granted Allowed time for synchrocheck to fulfil close conditions Supervision time to get the signal synchronizing in progress Max time from command execution to termination Allowed time to have discrepancy between the poles

PosDependent

Always permitted

tSelect

0.001

30.000

tResResponse

0.000 - 60.000

0.001

5.000

tSynchrocheck

0.00 - 6000.00

0.01

10.00

tSynchronizing

0.000 - 60.000

0.001

0.000

tExecutionFB

0.000 - 60.000

0.001

30.000

tPoleDiscord

0.000 - 60.000

0.001

2.000

11.3.5
11.3.5.1

Circuit breaker (SXCBR)


Introduction
The purpose of this function is to provide the actual status of positions and to perform the control operations, i.e. pass all the commands to primary apparatuses in the form of circuit breakers via output boards and to supervise the switching operation and position.

11.3.5.2

Principle of operation
The intended user of this function is other functions such as e.g. Switch controller, protection functions, autorecloser function or an IEC 61850 client residing in another IED or the operator place. This switch function executes commands, evaluate block conditions and evaluate different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, the function performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value.

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The function has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place. One binary input signal LR_SWI is included in this function to indicate the local/ remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 210.
Local= Operation at switch yard level

Local/Remote switch

TR

UE

From I/O

switchLR
FAL SE

Remote= Operation at IED or higher level


en05000096.vsd

Figure 210:

Local/Remote switch

Blocking principles

The function includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients e.g. operators place, protection functions, autoreclosure etc. The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command. Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.

The above blocking outputs are stored in a non-volatile memory.

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Substitution

The substitution part in this function is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because that the real process value is erroneous of some reason. The function will then use the manually entered value instead of the value for positions determined by the process. It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory.

There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 211 explains these two timers during the execute phase.
EXE_CL Close pulse duration AdaptivePulse = TRUE

Time diagrams

OPENPOS

CLOSEPOS

tStartMove timer t1 tStartMove

if t1 > tStartMove then "switch-not-start-moving" attribute in 'cause' is set

tIntermediate timer t2 tIntermediate

if t2 > tIntermediate then "persisting-intermediate-state" attribute in 'cause' is set

en05000097.vsd

Figure 211:

The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 212 shows the principle of the execute output pulse. The adaptively parameter will have affect on both execute output pulses.

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OPENPOS

CLOSEPOS

EXE_CL tClosePulse

AdaptivePulse=FALSE

EXE_CL tClosePulse

AdaptivePulse=TRUE

en05000098.vsd

Figure 212:

Execute output pulse

If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when: the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, i.e. tStartMove has elapsed. If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has elapsed. There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in close position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. An example of when a primary device is open and an open command is executed is shown in figure 213 .

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OPENPOS

CLOSEPOS

EXE_OP tOpenPulse EXE_OP tOpenPulse tStartMove timer

AdaptivePulse=FALSE

AdaptivePulse=TRUE

en05000099.vsd

Figure 213:

Open command with open position indication

Error handling

Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 243 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 243:
Apparatus control function 22 23 24 25 30 31 32 33 34 35

Vendor specific cause values for Apparatus control in priority order


Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

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11.3.5.3 Function block
XC01SXCBR GRPConABS1 EXE_OP GRPConABS2 EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE

BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN TERVALUE OSEVALUE PENVALUE

en05000338.vsd

Figure 214:

XC function block

11.3.5.4

Input and output signals


Table 244:
Signal BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN

Input signals for the SXCBR (XC01-) function block


Description Block of function Local/Remote switch indication from switchyard Pulsed signal used to immediately open the switch Pulsed signal used to immediately close the switch Signal to block the open command Signal to block the close command Steady signal for block of the position updating Signal for open position of apparatus from I/O Signal for close position of apparatus from I/O Signal for open position of truck from I/O Signal for close position of truck from I/O Resets the operation counter Execution information from CSWI

Table 245:
Signal XPOS EXE_OP EXE_CL

Output signals for the SXCBR (XC01-) function block


Description Group signal for XCBR output Executes the command for open direction Executes the command for close direction

Table continued on next page

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Signal SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE Description Indication that the position is substituted Indication that the function is blocked for open commands Indication that the function is blocked for close commands The update of position indication is blocked Apparatus position indication Apparatus open position Apparatus closed position Truck position indication The value of the operation counter Latest value of the error indication during command

11.3.5.5

Setting parameters
Table 246:
Parameter tStartMove

Basic general settings for the SXCBR (XC01-) function


Range 0.000 - 60.000 Step 0.001 Default 0.100 Unit s Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command

tIntermediate AdaptivePulse

0.000 - 60.000 Not adaptive Adaptive

0.001 -

0.150 Not adaptive

s -

tOpenPulse tClosePulse

0.000 - 60.000 0.000 - 60.000

0.001 0.001

0.200 0.200

s s

11.3.6
11.3.6.1

Circuit switch (SXSWI)


Introduction
The purpose of this function is to provide the actual status of positions and to perform the control operations, i.e. pass all the commands to primary apparatuses in the form of disconnectors or earthing switches via output boards and to supervise the switching operation and position.

11.3.6.2

Principle of operation
The intended user of this function is other functions such as e.g. Switch controller, protection functions, autorecloser function or a 61850 client residing in another IED

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or the operator place. This switch function executes commands, evaluate block conditions and evaluate different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, the function performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value. The function has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place. One binary input signal LR_SWI is included in this function to indicate the local/ remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 215.
Local= Operation at switch yard level

Local/Remote switch

TR

UE

From I/O

switchLR
FAL SE

Remote= Operation at IED or higher level


en05000096.vsd

Figure 215:

Local/Remote switch

Blocking principles

The function includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients e.g. operators place, protection functions, autoreclosure etc. The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command. Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible. REG 670

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The above blocking outputs are stored in a non-volatile memory.

Substitution

The substitution part in this function is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because that the real process value is erroneous of some reason. The function will then use the manually entered value instead of the value for positions determined by the process. It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory.

There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 216 explains these two timers during the execute phase.
EXE_CL Close pulse duration AdaptivePulse = TRUE

Time diagrams

OPENPOS

CLOSEPOS

tStartMove timer t1 tStartMove

if t1 > tStartMove then "switch-not-start-moving" attribute in 'cause' is set

tIntermediate timer t2 tIntermediate

if t2 > tIntermediate then "persisting-intermediate-state" attribute in 'cause' is set

en05000097.vsd

Figure 216:

The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 217 shows the principle of

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the execute output pulse. The adaptively parameter will have affect on both execute output pulses.
OPENPOS

CLOSEPOS

EXE_CL tClosePulse

AdaptivePulse=FALSE

EXE_CL tClosePulse

AdaptivePulse=TRUE

en05000098.vsd

Figure 217:

Execute output pulse

If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when: the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, i.e. tStartMove has elapsed. If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has elapsed. There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in close position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. An example when a primary device is open and an open command is executed is shown in figure 218.

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OPENPOS

CLOSEPOS

EXE_OP tOpenPulse EXE_OP tOpenPulse tStartMove timer

AdaptivePulse=FALSE

AdaptivePulse=TRUE

en05000099.vsd

Figure 218:

Open command with open position indication

Error handling

Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 247 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 247:
Apparatus control function 22 23 24 25 30 31 32 33 34 35

Values for "cause" signal in priority order


Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

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11.3.6.3 Function block
XS01SXSWI BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE RS_CNT XIN XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS CNT_VAL L_CAUSE en05000339.vsd

Figure 219:

XS function block

11.3.6.4

Input and output signals


Table 248:
Signal BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE RS_CNT XIN

Input signals for the SXSWI (XS01-) function block


Description Block of function Local/Remote switch indication from switchyard Pulsed signal used to immediately open the switch Pulsed signal used to immediately close the switch Signal to block the open command Signal to block the close command Steady signal for block of the position updating Signal for open position of apparatus from I/O Signal for close position of apparatus from I/O Resets the operation counter Execution information from CSWI

Table 249:
Signal XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD

Output signals for the SXSWI (XS01-) function block


Description Group signal for XSWI output Executes the command for open direction Executes the command for close direction Indication that the position is substituted Indication that the function is blocked for open commands Indication that the function is blocked for close commands The update of position indication is blocked

Table continued on next page

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Signal POSITION OPENPOS CLOSEPOS CNT_VAL L_CAUSE Description Apparatus position indication Apparatus open position Apparatus closed position The value of the operation counter Latest value of the error indication during command

11.3.6.5

Setting parameters
Table 250:
Parameter tStartMove

Basic general settings for the SXSWI (XS01-) function


Range 0.000 - 60.000 Step 0.001 Default 3.000 Unit s Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command Switch Type

tIntermediate AdaptivePulse

0.000 - 60.000 Not adaptive Adaptive

0.001 -

15.000 Not adaptive

s -

tOpenPulse tClosePulse SwitchType

0.000 - 60.000 0.000 - 60.000 Load Break Disconnector Earthing Switch HS Earthing Switch

0.001 0.001 -

0.200 0.200 Disconnector

s s -

11.3.7
11.3.7.1

Bay reserve (QCRSV)


Introduction
The purpose of the reservation function is primarily to transfer interlocking information between IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete substation.

11.3.7.2

Principle of operation
The function block QCRSV handles the reservation. The function starts to operate in two ways. It starts when there is a request for reservation of the own bay or if there is a request for reservation from another bay. It is only possible to reserve the function if it is not currently reserved. The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from switch controller SCWI. The signals for

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request from another bay are the outputs RE_RQ_B and V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV. The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is created.

Reservation request of own bay

If the reservation request comes from the own bay, the function QCRSV has to know which apparatus the request comes from. This information is available with the input signal RES_RQx and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order to decide if a reservation request of the current bay can be permitted QCRSV has to know whether the own bay already is reserved by itself or another bay. This information is available in the output signal RESERVED. If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-n-control" in the "cause" signal.

Reservation of other bays

When the function QCRSV receives a request from an apparatus in the own bay that requires other bays to be reserved as well, it checks if it already is reserved. If not, it will send a request to the other bays that are predefined (to be reserved) and wait for their response (acknowledge). The request of reserving other bays is done by activating the output RES_BAYS. When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-ncontrol" in the "cause" signal.

Reservation request from another bay

When another bay requests for reservation, the input BAY_RES in corresponding function block RESIN is activated. The signal for reservation request is grouped into the output signal EXCH_OUT in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not reserved, the bay will be reserved and the acknowledgment from output ACK_T_B is sent back to the requested bay. If the bay already is reserved the reservation is kept and no acknowledgment is sent.

Blocking and overriding of reservation

If the function QCRSV is blocked (input BLK_RES is set to true) the reservation is blocked. That is, no reservation can be made from the own bay or any other bay. This can be set, for example, via a binary input from an external device to prevent operations from another operator place at the same time. The reservation function can also be overridden in the own bay with the OVERRIDE input signal, i.e. reserving the own bay without waiting for the external acknowledge. 456 Technical reference manual 1MRK502013-UEN rev. B REG 670

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Bay with more than eight apparatuses

If only one instance of QCRSV is used for a bay i.e. use of up to eight apparatuses, the input EXCH_IN must be set to FALSE. If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The both functions QCRSV have to communicate and this is done through the input EXCH_IN and EXCH_OUT according to figure 10. If more then one QCRSV are used, the execution order is very important. The execution order must be in the way that the first QCRSV has a lower number than the next one.
CR01QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT

CR02QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT

1 1 1

RES_BAYS

ACK_TO_B

RESERVED

en05000088.vsd

Figure 220:

Connection of two QCRSV function blocks

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11.3.7.3 Function block
CR01QCRSV EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DAT A RES_GRT 1 RES_GRT 2 RES_GRT 3 RES_GRT 4 RES_GRT 5 RES_GRT 6 RES_GRT 7 RES_GRT 8 RES_BAYS ACK_T O_B RESERVED EXCH_OUT en05000340.vsd

Figure 221:

CR function block

11.3.7.4

Input and output signals


Table 251:
Signal EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DATA

Input signals for the QCRSV (CR01-) function block


Description Used for exchange signals between different BayRes blocks Signal for app. 1 that requests to do a reservation Signal for app. 2 that requests to do a reservation Signal for app. 3 that requests to do a reservation Signal for app. 4 that requests to do a reservation Signal for app. 5 that requests to do a reservation Signal for app. 6 that requests to do a reservation Signal for app. 7 that requests to do a reservation Signal for app. 8 that requests to do a reservation Reservation is not possible and the output signals are reset Signal to override the reservation Reservation data coming from function block ResIn

Table 252:
Signal RES_GRT1 RES_GRT2 RES_GRT3 RES_GRT4 RES_GRT5 RES_GRT6 RES_GRT7

Output signals for the QCRSV (CR01-) function block


Description Reservation is made and the app. 1 is allowed to operate Reservation is made and the app. 2 is allowed to operate Reservation is made and the app. 3 is allowed to operate Reservation is made and the app. 4 is allowed to operate Reservation is made and the app. 5 is allowed to operate Reservation is made and the app. 6 is allowed to operate Reservation is made and the app. 7 is allowed to operate

Table continued on next page

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Signal RES_GRT8 RES_BAYS ACK_TO_B RESERVED EXCH_OUT Description Reservation is made and the app. 8 is allowed to operate Request for reservation of other bays Acknowledge to other bays that this bay is reserved Indicates that the bay is reserved Used for exchange signals between different BayRes blocks

11.3.7.5

Setting parameters
Table 253:
Parameter tCancelRes

General settings for the QCRSV (CR01-) function


Range 0.000 - 60.000 Step 0.001 Default 10.000 Unit s Description Supervision time for canceling the reservation Reservation of the own bay only, at selection of apparatus 1 Reservation of the own bay only, at selection of apparatus 2 Reservation of the own bay only, at selection of apparatus 3 Reservation of the own bay only, at selection of apparatus 4 Reservation of the own bay only, at selection of apparatus 5 Reservation of the own bay only, at selection of apparatus 6 Reservation of the own bay only, at selection of apparatus 7 Reservation of the own bay only, at selection of apparatus 8

ParamRequest1

Other bays res. Only own bay res.

Only own bay res.

ParamRequest2

Other bays res. Only own bay res.

Only own bay res.

ParamRequest3

Other bays res. Only own bay res.

Only own bay res.

ParamRequest4

Other bays res. Only own bay res.

Only own bay res.

ParamRequest5

Other bays res. Only own bay res.

Only own bay res.

ParamRequest6

Other bays res. Only own bay res.

Only own bay res.

ParamRequest7

Other bays res. Only own bay res.

Only own bay res.

ParamRequest8

Other bays res. Only own bay res.

Only own bay res.

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11.3.8.1

Reservation input (RESIN)


Introduction
The function block RESIN receives the reservation information from other bays. The number of instances is the same as the number of involved bays (up to 60 instances are available).

11.3.8.2

Principle of operation
The reservation input function is based purely on Boolean logic conditions. The logic diagram in figure 222 shows how the output signals are created. The inputs of the function block are connected to a receive function block representing signals transferred over the station bus from another bay.
EXCH_IN INT BIN

& FutureUse 1

ACK_F_B

BAY_ACK

ANY_ACK

& BAY_VAL 1

VALID_TX

RE_RQ_B

BAY_RES

& 1 V _RE_RQ

BIN INT

EXCH_OUT

en05000089.vsd

Figure 222:

Logic diagram for RESIN

Figure 223 describes the principle of the data exchange between all RESIN modules in the current bay. There is one RESIN function block per "other bay" used in the reservation mechanism. The output signal EXCH_OUT in the last RESIN functions block are connected to the module QCRSV that handles the reservation function in the own bay. The value to the input EXCH_IN on the first RESIN module in the chain 460 Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 11 Control

has the integer value 5. This is provided by the use of instance number one of the function block RESIN (RE01-), where the input EXCH_IN is set to #5, but is hidden for the user.
RE01RESIN BAY_ACK ACK_F_B BAY_VAL ANY_ACK BAY_RES VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT

Bay 1

Bay 2

RE02RESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT REnnRESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT

Bay n

CR01QCRSV RES_DATA

en05000090.vsd

Figure 223:

Diagram of the chaining principle for RESIN

11.3.8.3

Function block
RE01RESIN BAY_ACK BAY_VAL BAY_RES ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT en05000341.vsd

Figure 224:

RE function block

11.3.8.4

Input and output signals


Table 254:
Signal BAY_ACK BAY_VAL BAY_RES

Input signals for the RESIN (RE01-) function block


Description Another bay has acknow. the reservation req. from this bay The reserv. and acknow. signals from another bay are valid Request from other bay to reserve this bay

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Table 255:
Signal ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT

Output signals for the RESIN (RE01-) function block


Description All other bays have acknow. the reserv. req. from this bay Any other bay has acknow. the reserv. req. from this bay The reserv. and acknow. signals from other bays are valid Request from other bay to reserve this bay Check if the request of reserving this bay is valid Used for exchange signals between different ResIn blocks

11.3.8.5

Setting parameters
Table 256:
Parameter FutureUse

Basic general settings for the RESIN (RE01-) function


Range Bay in use Bay future use Step Default Bay in use Unit Description The bay for this ResIn block is for future use

11.4
11.4.1

Interlocking
Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for instance when a disconnector is under load, in order to prevent material damage and/or accidental human injury. Each control IED has interlocking functions for different switchyard arrangements, each handling the interlocking of one bay. The function is distributed to each control IED and not dependent on any central function. For the station-wide interlocking, the IEDs communicate via the station bus or by using hard wired binary inputs/outputs. The interlocking conditions depend on the circuit configuration and status of the installation at any given time.

11.4.2

Principle of operation
The interlocking function consists of software modules located in each control IED. The function is distributed and not dependent on any central function. Communication between modules in different bays is performed via the station bus. The reservation function (see section "Apparatus control (APC)") is used to ensure that HV apparatuses that might affect the interlock are blocked during the time gap, which arises between position updates. This can be done by means of the communication system, reserving all HV apparatuses that might influence the

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interlocking condition of the intended operation. The reservation is maintained until the operation is performed. After the selection and reservation of an apparatus, the function has complete data on the status of all apparatuses in the switchyard that are affected by the selection. Other operators cannot interfere with the reserved apparatus or the status of switching devices that may affect it. The open or closed positions of the HV apparatuses are inputs to software modules distributed in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a module is different, depending on the bay function and the switchyard arrangements, that is, double-breaker or 1 1/2 breaker bays have different modules. Specific interlocking conditions and connections between standard interlocking modules are performed with an engineering tool. Bay-level interlocking signals can include the following kind of information: Positions of HV apparatuses (sometimes per phase) Valid positions (if evaluated in the control module) External release (to add special conditions for release) Line voltage (to block operation of line earthing switch) Output signals to release the HV apparatus

The interlocking module is connected to the surrounding functions within a bay as shown in figure 225.
Interlocking modules in other bays Apparatus control modules
SCILO SCSWI SXSWI

Interlocking module

Apparatus control modules


SCILO SCSWI SXCBR

Apparatus control modules


en04000526.vsd SCILO SCSWI SXSWI

Figure 225:

Interlocking module on bay level.

Bays communicate via the station bus and can convey information regarding the following: Unearthed busbars Busbars connected together Other bays connected to a busbar Received data from other bays is valid

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Figure 226 illustrates the data exchange principle.


Station bus
Bay 1 Disc QB1 and QB2 closed Bay n Disc QB1 and QB2 closed Bus coupler WA1 unearthed WA1 unearthed WA1 and WA2 interconn WA1 and WA2 interconn in other bay

WA1 not earthed WA2 not earthed WA1 and WA2 interconn

... ..

WA1 not earthed WA2 not earthed WA1 and WA2 interconn

WA1 WA2 QB1 QB2 QA1 QB9 QB1 QB2 QA1 QB9
en05000494.vsd

QB1

QB2

QC1

QC2

QA1

Figure 226:

Data exchange between interlocking modules.

When invalid data such as intermediate position, loss of a control terminal, or input board error are used as conditions for the interlocking condition in a bay, a release for execution of the function will not be given. On the station HMI an override function exists, which can be used to bypass the interlocking function in cases where not all the data required for the condition is valid. For all interlocking modules these general rules apply: The interlocking conditions for opening or closing of disconnectors and earthing switches are always identical. Earthing switches on the line feeder end, e.g. rapid earthing switches, are normally interlocked only with reference to the conditions in the bay where they are located, not with reference to switches on the other side of the line. So a line voltage indication may be included into line interlocking modules. If there is no line voltage supervision within the bay, then the appropriate inputs must be set to no voltage, and the operator must consider this when operating. Earthing switches can only be operated on isolated sections e.g. without load/ voltage. Circuit breaker contacts cannot be used to isolate a section, i.e. the status of the circuit breaker is irrelevant as far as the earthing switch operation is concerned. Disconnectors cannot break power current or connect different voltage systems. Disconnectors in series with a circuit breaker can only be operated if the circuit breaker is open, or if the disconnectors operate in parallel with other closed connections. Other disconnectors can be operated if one side is completely isolated, or if the disconnectors operate in parallel to other closed connections, or if they are earthed on both sides. Circuit breaker closing is only interlocked against running disconnectors in its bay or additionally in a transformer bay against the disconnectors and earthing

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switch on the other side of the transformer, if there is no disconnector between CB and transformer. Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in progress.

To make the implementation of the interlocking function easier, a number of standardized and tested software interlocking modules containing logic for the interlocking conditions are available: Line for double and transfer busbars, ABC_LINE Bus for double and transfer busbars, ABC_BC Transformer bay for double busbars, AB_TRAFO Bus-section breaker for double busbars, A1A2_BS Bus-section disconnector for double busbars, A1A2_DC Busbar earthing switch, BB_ES Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B

The interlocking conditions can be altered, to meet the customers specific requirements, by adding configurable logic by means of the graphical configuration tool PCM 600. The inputs Qx_EXy on the interlocking modules are used to add these specific conditions. The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of information from other bays. Required signals with designations ending in TR are intended for transfer to other bays.

11.4.3
11.4.3.1

Logical node for interlocking (SCILO)


Introduction
The function SCILO is used to enable a switching operation if the interlocking conditions permit. The function itself does not provide any interlocking functionality. The interlocking conditions are generated in separate function blocks containing the interlocking logic.

11.4.3.2

Principle of operation
The function contains logic to enable the open and close commands respectively if the interlocking conditions are fulfilled. That means also, if the switch has a defined end position e.g. open, then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate and bad position state and if they are enabled by the interlocking function. The position inputs come from the logical nodes Circuit breaker/switch SXCBR/SXSWI and the enable signals come from the interlocking logic. The outputs are connected to the logical node Switch controller SCSWI. One instance per switching device is needed.

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POSOPEN POSCLOSE

SCILO =1
1 &

EN_OPEN >1

&

OPEN_EN CLOSE_EN
& &

>1

EN_CLOSE
en04000525.vsd

Figure 227:

SCILO function logic diagram

11.4.3.3

Function block
CI01SCILO POSOPEN POSCLOSE OPEN_EN CLOSE_EN EN_OPEN EN_CLOSE

en05000359.vsd

Figure 228:

CI function block

11.4.3.4

Input and output signals


Table 257:
Signal POSOPEN POSCLOSE OPEN_EN CLOSE_EN

Input signals for the SCILO (CI01-) function block


Description Open position of switch device Closed position of switch device Open operation from interlocking logic is enabled Close operation from interlocking logic is enabled

Table 258:
Signal EN_OPEN EN_CLOSE

Output signals for the SCILO (CI01-) function block


Description Open operation at closed or interm. or bad pos. is enabled Close operation at open or interm. or bad pos. is enabled

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11.4.4.1

Interlocking for line bay (ABC_LINE)


Introduction
The interlocking module ABC_LINE is used for a line connected to a double busbar arrangement with a transfer busbar according to figure 229. The module can also be used for a double busbar arrangement without transfer busbar or a single busbar arrangement with/without transfer busbar.
WA1 (A) WA2 (B) WA7 (C) QB1 QB2 QC1 QA1 QC2 QB9 QC9 QB7

en04000478.vsd

Figure 229:

Switchyard layout ABC_LINE

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11.4.4.2 Function block
IF01ABC_LINE QA1_OP QA1CLREL QA1_CL QA1CLIT L QB9_OP QB9REL QB9_CL QB9IT L QB1_OP QB1REL QB1_CL QB1IT L QB2_OP QB2REL QB2_CL QB2IT L QB7_OP QB7REL QB7_CL QB7IT L QC1_OP QC1REL QC1_CL QC1IT L QC2_OP QC2REL QC2_CL QC2IT L QC9_OP QC9REL QC9_CL QC9IT L QC11_OP QB1OPT R QC11_CL QB1CLT R QC21_OP QB2OPT R QC21_CL QB2CLT R QC71_OP QB7OPT R QC71_CL QB7CLT R BB7_D_OP QB12OPT R BC_12_CL QB12CLT R BC_17_OP VPQB1T R BC_17_CL VPQB2T R BC_27_OP VPQB7T R BC_27_CL VPQB12T R VOLT _OFF VOLT _ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_ES EXDU_BPB EXDU_BC QB9_EX1 QB9_EX2 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB7_EX1 QB7_EX2 QB7_EX3 QB7_EX4 en05000357.vsd

Figure 230:

IF function block

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11.4.4.3 Logic diagram
QA1_OP QA1_CL QB9_OP QB9_CL QB1_OP QB1_CL QB2_OP QB2_CL QB7_OP QB7_CL QC1_OP QC1_CL QC2_OP QC2_CL QC9_OP QC9_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL VOLT_OFF VOLT_ON VPQA1 VPQC1 VPQC2 VPQC9 QA1_OP QC1_OP QC2_OP QC9_OP QB9_EX1 VPQC2 VPQC9 QC2_CL QC9_CL QB9_EX2 ABC_LINE =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & >1
1

VPQA1 VPQB9 VPQB1 VPQB2 VPQB7 VPQC1 VPQC2 VPQC9 VPQC11 VPQC21 VPQC71 VPVOLT QB9REL QB9ITL &
1

QA1CLREL QA1CLITL

&

en04000527.vsd

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VPQA1 VPQB2 VPQC1 VPQC2 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1

&

1
1

QB1REL QB1ITL

VPQB2 VP_BC_12 QB2_CL BC_12_CL EXDU_BC QB1_EX2

&

VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1EX3

&

en04000528.vsd

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VPQA1 VPQB1 VPQC1 VPQC2 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC21_OP EXDU_ES

&

1
1

QB2REL QB2ITL

QB2_EX1

VPQB1 VP_BC_12 QB1_CL BC_12_CL EXDU_BC QB2_EX2

&

VPQC1 VPQC21 QC1_CL QC21_CL EXDU_ES QB2_EX3

&

en04000529.vsd

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VPQC9 VPQC71 VP_BB7_D VP_BC_17 VP_BC_27 QC9_OP QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_17_OP BC_27_OP EXDU_BC QB7_EX1 VPQA1 VPQB1 VPQC9 VPQB9 VPQC71 VP_BB7_D VP_BC_17 QA1_CL QB1_CL QC9_OP QB9_CL QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_17_CL EXDU_BC QB7_EX2

&

>1
1

QB7REL QB7ITL

&

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VPQA1 VPQB2 VPQC9 VPQB9 VPQC71 VP_BB7_D VP_BC_27 QA1_CL QB2_CL QC9_OP QB9_CL QC71_OP EXDU_ES BB7_D_OP EXDU_BPB BC_27_CL EXDU_BC QB7_EX3 VPQC9 VPQC71 QC9_CL QC71_CL EXDU_ES QB7_EX4 VPQB1 VPQB2 VPQB9 QB1_OP QB2_OP QB9_OP VPQB7 VPQB9 VPVOLT QB7_OP QB9_OP VOLT_OFF

&

>1

&

&

1 1

QC1REL QC1ITL QC2REL QC2ITL

&
1

QC9REL QC9ITL

en04000531.vsd

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QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB7_OP QB7_CL VPQB7 QB1_OP QB2_OP VPQB1 VPQB2 >1 &

QB1OPTR QB1CLTR VPQB1TR QB2OPTR QB2CLTR VPQB2TR QB7OPTR QB7CLTR VPQB7TR QB12OPTR QB12CLTR VPQB12TR
en04000532.vsd

11.4.4.4

Input and output signals


Table 259:
Signal QA1_OP QA1_CL QB9_OP QB9_CL QB1_OP QB1_CL QB2_OP QB2_CL QB7_OP QB7_CL QC1_OP QC1_CL QC2_OP QC2_CL QC9_OP QC9_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP Table continued on next page

Input signals for the ABC_LINE (IF01-) function block


Description QA1 is in open position QA1 is in closed position QB9 is in open position QB9 is in closed position QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position QB7 is in open position QB7 is in closed position QC1 is in open position QC1 is in closed position QC2 is in open position QC2 is in closed position QC9 is in open position QC9 is in closed position Earthing switch QC11 on busbar WA1 is in open position Earthing switch QC11 on busbar WA1 is in closed position Earthing switch QC21 on busbar WA2 is in open position Earthing switch QC21 on busbar WA2 is in closed position Earthing switch QC71 on busbar WA7 is in open position

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Signal QC71_CL BB7_D_OP BC_12_CL BC_17_OP BC_17_CL BC_27_OP BC_27_CL VOLT_OFF VOLT_ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_ES EXDU_BPB EXDU_BC QB9_EX1 QB9_EX2 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB7_EX1 QB7_EX2 QB7_EX3 QB7_EX4 Description Earthing switch QC71 on busbar WA7 is in closed position Disconnectors on busbar WA7 except in the own bay are open A bus coupler connection exists between busbar WA1 and WA2 No bus coupler connection exists between busbar WA1 and WA7 A bus coupler connection exists between busbar WA1 and WA7 No bus coupler connection exists between busbar WA2 and WA7 A bus coupler connection exists between busbar WA2 and WA7 There is no voltage on the line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure Switch status of the disconnectors on busbar WA7 are valid Status of the bus coupler app. between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid No transm error from any bay containing earthing switches No transm error from any bay with disconnectors on WA7 No transmission error from any bus coupler bay External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB7 External condition for apparatus QB7 External condition for apparatus QB7 External condition for apparatus QB7

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Table 260:
Signal QA1CLREL QA1CLITL QB9REL QB9ITL QB1REL QB1ITL QB2REL QB2ITL QB7REL QB7ITL QC1REL QC1ITL QC2REL QC2ITL QC9REL QC9ITL QB1OPTR QB1CLTR QB2OPTR QB2CLTR QB7OPTR QB7CLTR QB12OPTR QB12CLTR VPQB1TR VPQB2TR VPQB7TR VPQB12TR

Output signals for the ABC_LINE (IF01-) function block


Description Closing of QA1 is allowed Closing of QA1 is forbidden Switching of QB9 is allowed Switching of QB9 is forbidden Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QB7 is allowed Switching of QB7 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden Switching of QC9 is allowed Switching of QC9 is forbidden QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position QB7 is in open position QB7 is in closed position QB1 or QB2 or both are in open position QB1 and QB2 are not in open position Switch status of QB1 is valid (open or closed) Switch status of QB2 is valid (open or closed) Switch status of QB7 is valid (open or closed) Switch status of QB1 and QB2 are valid (open or closed)

11.4.5
11.4.5.1

Interlocking for bus-coupler bay (ABC_BC)


Introduction
The interlocking module ABC_BC is used for a bus-coupler bay connected to a double busbar arrangement according to figure 231. The module can also be used for a single busbar arrangement with transfer busbar or double busbar arrangement without transfer busbar.

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WA1 (A) WA2 (B) WA7 (C) QB1 QB2 QC1 QA1 QB20 QB7

QC2

en04000514.vsd

Figure 231:

Switchyard layout ABC_BC

11.4.5.2

Function block
IG01ABC_BC QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QB7_OP QB7_CL QB20_OP QB20_CL QC1_OP QC1_CL QC2_OP QC2_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL BBT R_OP BC_12_CL VP_BBT R VP_BC_12 EXDU_ES EXDU_12 EXDU_BC QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB20_EX1 QB20_EX2 QB7_EX1 QB7_EX2 QA1OPREL QA1OPIT L QA1CLREL QA1CLIT L QB1REL QB1IT L QB2REL QB2IT L QB7REL QB7IT L QB20REL QB20IT L QC1REL QC1IT L QC2REL QC2IT L QB1OPT R QB1CLT R QB220OT R QB220CT R QB7OPT R QB7CLT R QB12OPT R QB12CLT R BC12OPT R BC12CLT R BC17OPT R BC17CLT R BC27OPT R BC27CLT R VPQB1T R VQB220T R VPQB7T R VPQB12T R VPBC12T R VPBC17T R VPBC27T R

en05000350.vsd

Figure 232:

IG function block

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Section 11 Control
11.4.5.3 Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB20_OP QB20_CL QB7_OP QB7_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL VPQB1 QB1_OP QA1O_EX1 VPQB20 QB20_OP QA1O_EX2 VP_BBTR BBTR_OP EXDU_12 QA1O_EX3 VPQB1 VPQB2 VPQB7 VPQB20 QA1CLREL QA1CLITL ABC_BC =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & & & >1
1

VPQA1 VPQB1 VPQB20 VPQB7 VPQB2 VPQC1 VPQC2 VPQC11 VPQC21 VPQC71 QA1OPREL QA1OPITL

&

en04000533.vsd

478

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

VPQA1 VPQB2 VPQC1 VPQC2 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQB2 VP_BC_12 QB2_CL BC_12_CL EXDU_BC QB1_EX2 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX3

&

>1
1

QB1REL QB1ITL

&

&

en04000534.vsd

REG 670

Technical reference manual 1MRK502013-UEN rev. B

479

Section 11 Control

VPQA1 VPQB1 VPQC1 VPQC2 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB2_EX1 VPQB1 VP_BC_12 QB1_CL BC_12_CL EXDU_BC QB2_EX2 VPQC1 VPQC21 QC1_CL QC21_CL EXDU_ES QB2_EX3

&

>1
1

QB2REL QB2ITL

&

&

en04000535.vsd

480

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

VPQA1 VPQB20 VPQC1 VPQC2 VPQC71 QA1_OP QB20_OP QC1_OP QC2_OP QC71_OP EXDU_ES QB7_EX1 VPQC2 VPQC71 QC2_CL QC71_CL EXDU_ES QB7_EX2 VPQA1 VPQB7 VPQC1 VPQC2 VPQC21 QA1_OP QB7_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB20_EX1 VPQC2 VPQC21 QC2_CL QC21_CL EXDU_ES QB20_EX2

&

>1
1

QB7REL QB7ITL

&

&

>1
1

QB20REL QB20ITL

&

en04000536.vsd

REG 670

Technical reference manual 1MRK502013-UEN rev. B

481

Section 11 Control

VPQB1 VPQB20 VPQB7 VPQB2 QB1_OP QB20_OP QB7_OP QB2_OP QB1_OP QB1_CL VPQB1 QB20_OP QB2_OP VPQB20 VPQB2 QB7_OP QB7_CL VPQB7 QB1_OP QB2_OP VPQB1 VPQB2 QA1_OP QB1_OP QB20_OP VPQA1 VPQB1 VPQB20 QA1_OP QB1_OP QB7_OP VPQA1 VPQB1 VPQB7 QA1_OP QB2_OP QB7_OP VPQA1 VPQB2 VPQB7

&

1 1

QC1REL QC1ITL QC2REL QC2ITL

& &

QB1OPTR QB1CLTR VPQB1TR QB220OTR QB220CTR VQB220TR QB7OPTR QB7CLTR VPQB7TR QB12OPTR QB12CLTR VPQB12TR BC12OPTR BC12CLTR VPBC12TR BC17OPTR BC17CLTR VPBC17TR BC27OPTR BC27CLTR VPBC27TR
en04000537.vsd

>1 & >1 & >1 & >1 &

11.4.5.4

Input and output signals


Table 261:
Signal QA1_OP QA1_CL QB1_OP QB1_CL Table continued on next page

Input signals for the ABC_BC (IG01-) function block


Description QA1 is in open position QA1 is in closed position QB1 is in open position QB1 is in closed position

482

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
Signal QB2_OP QB2_CL QB7_OP QB7_CL QB20_OP QB20_CL QC1_OP QC1_CL QC2_OP QC2_CL QC11_OP QC11_CL QC21_OP QC21_CL QC71_OP QC71_CL BBTR_OP BC_12_CL VP_BBTR VP_BC_12 EXDU_ES EXDU_12 EXDU_BC QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 QB20_EX1 QB20_EX2 QB7_EX1 QB7_EX2 Description QB2 is in open position QB2 is in closed position QB7 is in open position QB7 is in closed position QB20 is in open position QB20 is in closed position QC1 is in open position QC1 is in closed position QC2 is in open position QC2 is in closed position Earthing switch QC11 on busbar WA1 is in open position Earthing switch QC11 on busbar WA1 is in closed position Earthing switch QC21 on busbar WA2 is in open position Earthing switch QC21 on busbar WA2 is in closed position Earthing switch QC71 on busbar WA7 is in open position Earthing switch QC71 on busbar WA7 is in closed position No busbar transfer is in progress A bus coupler connection exists between busbar WA1 and WA2 Status are valid for app. involved in the busbar transfer Status of the bus coupler app. between WA1 and WA2 are valid No transm error from any bay containing earthing switches No transm error from any bay connected to WA1/WA2 busbars No transmission error from any other bus coupler bay External open condition for apparatus QA1 External open condition for apparatus QA1 External open condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB20 External condition for apparatus QB20 External condition for apparatus QB7 External condition for apparatus QB7

REG 670

Technical reference manual 1MRK502013-UEN rev. B

483

Section 11 Control

Table 262:
Signal QA1OPREL QA1OPITL QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QB7REL QB7ITL QB20REL QB20ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR QB220OTR QB220CTR QB7OPTR QB7CLTR QB12OPTR QB12CLTR BC12OPTR BC12CLTR BC17OPTR BC17CLTR BC27OPTR BC27CLTR VPQB1TR VQB220TR VPQB7TR VPQB12TR

Output signals for the ABC_BC (IG01-) function block


Description Opening of QA1 is allowed Opening of QA1 is forbidden Closing of QA1 is allowed Closing of QA1 is forbidden Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QB7 is allowed Switching of QB7 is forbidden Switching of QB20 is allowed Switching of QB20 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position QB2 and QB20 are in open position QB2 or QB20 or both are not in open position QB7 is in open position QB7 is in closed position QB1 or QB2 or both are in open position QB1 and QB2 are not in open position No connection via the own bus coupler between WA1 and WA2 Conn. exists via the own bus coupler between WA1 and WA2 No connection via the own bus coupler between WA1 and WA7 Conn. exists via the own bus coupler between WA1 and WA7 No connection via the own bus coupler between WA2 and WA7 Conn. exists via the own bus coupler between WA2 and WA7 Switch status of QB1 is valid (open or closed) Switch status of QB2 and QB20 are valid (open or closed) Switch status of QB7 is valid (open or closed) Switch status of QB1 and QB2 are valid (open or closed)

Table continued on next page

484

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
Signal VPBC12TR VPBC17TR VPBC27TR Description Status of the bus coupler app. between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid

11.4.6
11.4.6.1

Interlocking for transformer bay (AB_TRAFO)


Introduction
The interlocking module AB_TRAFO is used for a transformer bay connected to a double busbar arrangement according to figure 233. The module is used when there is no disconnector between circuit breaker and transformer. Otherwise, the module ABC_LINE can be used. This module can also be used in single busbar arrangements.
WA1 (A) WA2 (B) QB1 QB2 QC1 QA1 AB_TRAFO QC2

T QC3 QA2 QC4 QB3 QB4


QA2 and QC4 are not used in this interlocking

en04000515.vsd

Figure 233:

Switchyard layout AB_TRAFO

REG 670

Technical reference manual 1MRK502013-UEN rev. B

485

Section 11 Control
11.4.6.2 Function block
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QB3_OP QB3_CL QB4_OP QB4_CL QC3_OP QC3_CL QC11_OP QC11_CL QC21_OP QC21_CL BC_12_CL VP_BC_12 EXDU_ES EXDU_BC QA1_EX1 QA1_EX2 QA1_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 IE01AB_TRAFO QA1CLREL QA1CLIT L QB1REL QB1IT L QB2REL QB2IT L QC1REL QC1IT L QC2REL QC2IT L QB1OPT R QB1CLT R QB2OPT R QB2CLT R QB12OPT R QB12CLT R VPQB1T R VPQB2T R VPQB12T R

en05000358.vsd

Figure 234:

IE function block

486

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
11.4.6.3 Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QB3_OP QB3_CL QB4_OP QB4_CL QC3_OP QC3_CL QC11_OP QC11_CL QC21_OP QC21_CL VPQB1 VPQB2 VPQC1 VPQC2 VPQB3 VPQB4 VPQC3 QA1_EX2 QC3_OP QA1_EX3 QC1_CL QC2_CL QC3_CL QA1_EX1 AB_TRAFO =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 &
1

VPQA1 VPQB1 VPQB2 VPQC1 VPQC2 VPQB3 VPQB4 VPQC3 VPQC11 VPQC21 QA1CLREL QA1CLITL

>1 &

en04000538.vsd

REG 670

Technical reference manual 1MRK502013-UEN rev. B

487

Section 11 Control

VPQA1 VPQB2 VPQC1 VPQC2 VPQC3 VPQC11 QA1_OP QB2_OP QC1_OP QC2_OP QC3_OP QC11_OP EXDU_ES QB1_EX1 VPQB2 VPQC3 VP_BC_12 QB2_CL QC3_OP BC_12_CL EXDU_BC QB1_EX2 VPQC1 VPQC2 VPQC3 VPQC11 QC1_CL QC2_CL QC3_CL QC11_CL EXDU_ES QB1_EX3

&

>1
1

QB1REL QB1ITL

&

&

en04000539.vsd

488

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

VPQA1 VPQB1 VPQC1 VPQC2 VPQC3 VPQC21 QA1_OP QB1_OP QC1_OP QC2_OP QC3_OP QC21_OP EXDU_ES QB2_EX1 VPQB1 VPQC3 VP_BC_12 QB1_CL QC3_OP BC_12_CL EXDU_BC QB2_EX2 VPQC1 VPQC2 VPQC3 VPQC21 QC1_CL QC2_CL QC3_CL QC21_CL EXDU_ES QB2_EX3

&

>1
1

QB2REL QB2ITL

&

&

en04000540.vsd

REG 670

Technical reference manual 1MRK502013-UEN rev. B

489

Section 11 Control

VPQB1 VPQB2 VPQB3 VPQB4 QB1_OP QB2_OP QB3_OP QB4_OP QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB1_OP QB2_OP VPQB1 VPQB2

&

1 1

QC1REL QC1ITL QC2REL QC2ITL

QB1OPTR QB1CLTR VPQB1TR QB2OPTR QB2CLTR VPQB2TR QB12OPTR QB12CLTR VPQB12TR


en04000541.vsd

>1 &

11.4.6.4

Input and output signals


Table 263:
Signal QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC1_OP QC1_CL QC2_OP QC2_CL QB3_OP QB3_CL QB4_OP QB4_CL QC3_OP QC3_CL QC11_OP QC11_CL QC21_OP QC21_CL Table continued on next page

Input signals for the AB_TRAFO (IE01-) function block


Description QA1 is in open position QA1 is in closed position QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position QC1 is in open position QC1 is in closed position QC2 is in open position QC2 is in closed position QB3 is in open position QB3 is in closed position QB4 is in open position QB4 is in closed position QC3 is in open position QC3 is in closed position QC11 on busbar WA1 is in open position QC11 on busbar WA1 is in closed position QC21 on busbar WA2 is in open position QC21 on busbar WA2 is in closed position

490

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
Signal BC_12_CL VP_BC_12 EXDU_ES EXDU_BC QA1_EX1 QA1_EX2 QA1_EX3 QB1_EX1 QB1_EX2 QB1_EX3 QB2_EX1 QB2_EX2 QB2_EX3 Description A bus coupler connection exists between busbar WA1 and WA2 Status of the bus coupler app. between WA1 and WA2 are valid No transm error from any bay containing earthing switches No transmission error from any bus coupler bay External condition for apparatus QA1 External condition for apparatus QA1 External condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2 External condition for apparatus QB2

Table 264:
Signal QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR QB2OPTR QB2CLTR QB12OPTR QB12CLTR VPQB1TR VPQB2TR VPQB12TR

Output signals for the AB_TRAFO (IE01-) function block


Description Closing of QA1 is allowed Closing of QA1 is forbidden Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position QB1 or QB2 or both are in open position QB1 and QB2 are not in open position Switch status of QB1 is valid (open or closed) Switch status of QB2 is valid (open or closed) Switch status of QB1 and QB2 are valid (open or closed)

REG 670

Technical reference manual 1MRK502013-UEN rev. B

491

Section 11 Control 11.4.7


11.4.7.1

Interlocking for bus-section breaker (A1A2_BS)


Introduction
The interlocking module A1A2_BS is used for one bus-section circuit breaker between section 1 and 2 according to figure 235. The module can be used for different busbars, which includes a bus-section circuit breaker.
WA1 (A1) WA2 (A2)

QC1

QB1 QA1

QB2

QC2

QC3

QC4

A1A2_BS

en04000516.vsd

Figure 235:

Switchyard layout A1A2_BS

11.4.7.2

Function block
IH01A1A2_BS QA1_OP QA1OPREL QA1_CL QA1OPIT L QB1_OP QA1CLREL QB1_CL QA1CLIT L QB2_OP QB1REL QB2_CL QB1IT L QC3_OP QB2REL QC3_CL QB2IT L QC4_OP QC3REL QC4_CL QC3IT L S1QC1_OP QC4REL S1QC1_CL QC4IT L S2QC2_OP S1S2OPT R S2QC2_CL S1S2CLT R BBT R_OP QB1OPT R VP_BBT R QB1CLT R EXDU_12 QB2OPT R EXDU_ES QB2CLT R QA1O_EX1 VPS1S2T R QA1O_EX2 VPQB1T R QA1O_EX3 VPQB2T R QB1_EX1 QB1_EX2 QB2_EX1 QB2_EX2 en05000348.vsd

Figure 236:

IH function block

492

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
11.4.7.3 Logic diagram
QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL QC3_OP QC3_CL QC4_OP QC4_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL VPQB1 QB1_OP QA1O_EX1 VPQB2 QB2_OP QA1O_EX2 VP_BBTR BBTR_OP EXDU_12 QA1O_EX3 VPQB1 VPQB2 VPQA1 VPQC3 VPQC4 VPS1QC1 QA1_OP QC3_OP QC4_OP S1QC1_OP EXDU_ES QB1_EX1 VPQC3 VPS1QC1 QC3_CL S1QC1_CL EXDU_ES QB1_EX2 A1A2_BS =1 =1 =1 =1 =1 =1 =1 & & & >1
1

VPQA1 VPQB1 VPQB2 VPQC3 VPQC4 VPS1QC1 VPS2QC2 QA1OPREL QA1OPITL

& & >1

QA1CLREL QA1CLITL QB1REL QB1ITL

&

en04000542.vsd

REG 670

Technical reference manual 1MRK502013-UEN rev. B

493

Section 11 Control

VPQA1 VPQC3 VPQC4 VPS2QC2 QA1_OP QC3_OP QC4_OP S2QC2_OP EXDU_ES QB2_EX1 VPQC4 VPS2QC2 QC4_CL S2QC2_CL EXDU_ES QB2_EX2 VPQB1 VPQB2 QB1_OP QB2_OP QB1_OP QB1_CL VPQB1 QB2_OP QB2_CL VPQB2 QB1_OP QB2_OP QA1_OP VPQB1 VPQB2 VPQA1

&

>1
1

QB2REL QB2ITL

&

&

1 1

QC3REL QC3ITL QC4REL QC4ITL QB1OPTR QB1CLTR VPQB1TR QB2OPTR QB2CLTR VPQB2TR

>1 &

S1S2OPTR S1S2CLTR VPS1S2TR


en04000543.vsd

11.4.7.4

Input and output signals


Table 265:
Signal QA1_OP QA1_CL QB1_OP QB1_CL QB2_OP QB2_CL Table continued on next page

Input signals for the A1A2_BS (IH01-) function block


Description QA1 is in open position QA1 is in closed position QB1 is in open position QB1 is in closed position QB2 is in open position QB2 is in closed position

494

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
Signal QC3_OP QC3_CL QC4_OP QC4_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL BBTR_OP VP_BBTR EXDU_12 EXDU_ES QA1O_EX1 QA1O_EX2 QA1O_EX3 QB1_EX1 QB1_EX2 QB2_EX1 QB2_EX2 Description QC3 is in open position QC3 is in closed position QC4 is in open position QC4 is in closed position QC1 on bus section 1 is in open position QC1 on bus section 1 is in closed position QC2 on bus section 2 is in open position QC2 on bus section 2 is in closed position No busbar transfer is in progress Status are valid for app. involved in the busbar transfer No transm error from any bay connected to busbar 1 and 2 No transm error from bays containing earth. sw. QC1 or QC2 External open condition for apparatus QA1 External open condition for apparatus QA1 External open condition for apparatus QA1 External condition for apparatus QB1 External condition for apparatus QB1 External condition for apparatus QB2 External condition for apparatus QB2

Table 266:
Signal QA1OPREL QA1OPITL QA1CLREL QA1CLITL QB1REL QB1ITL QB2REL QB2ITL QC3REL QC3ITL QC4REL QC4ITL S1S2OPTR S1S2CLTR QB1OPTR QB1CLTR

Output signals for the A1A2_BS (IH01-) function block


Description Opening of QA1 is allowed Opening of QA1 is forbidden Closing of QA1 is allowed Closing of QA1 is forbidden Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QC3 is allowed Switching of QC3 is forbidden Switching of QC4 is allowed Switching of QC4 is forbidden No bus section connection between bus section 1 and 2 Bus coupler connection between bus section 1 and 2 exists QB1 is in open position QB1 is in closed position

Table continued on next page

REG 670

Technical reference manual 1MRK502013-UEN rev. B

495

Section 11 Control
Signal QB2OPTR QB2CLTR VPS1S2TR VPQB1TR VPQB2TR Description QB2 is in open position QB2 is in closed position Status of the app. between bus section 1 and 2 are valid Switch status of QB1 is valid (open or closed) Switch status of QB2 is valid (open or closed)

11.4.8
11.4.8.1

Interlocking for bus-section disconnector (A1A2_DC)


Introduction
The interlocking module A1A2_DC is used for one bus-section disconnector between section 1 and 2 according to figure 237. The module can be used for different busbars, which includes a bus-section disconnector.
QB WA1 (A1) WA2 (A2)

QC1

QC2

A1A2_DC

en04000492.vsd

Figure 237:

Switchyard layout A1A2_DC

11.4.8.2

Function block
II01A1A2_DC QB_OP QB_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL S1DC_OP S2DC_OP VPS1_DC VPS2_DC EXDU_ES EXDU_BB QBCL_EX1 QBCL_EX2 QBOP_EX1 QBOP_EX2 QBOP_EX3 QBOPREL QBOPIT L QBCLREL QBCLIT L DCOPT R DCCLT R VPDCT R

en05000349.vsd

Figure 238:

II function block

496

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
11.4.8.3 Logic diagram

REG 670

Technical reference manual 1MRK502013-UEN rev. B

497

Section 11 Control

A1A2_DC QB_OP QB_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL VPS1QC1 VPS2QC2 VPS1_DC S1QC1_OP S2QC2_OP S1DC_OP EXDU_ES EXDU_BB QBOP_EX1 VPS1QC1 VPS2QC2 VPS2_DC S1QC1_OP S2QC2_OP S2DC_OP EXDU_ES EXDU_BB QBOP_EX2 VPS1QC1 VPS2QC2 S1QC1_CL S2QC2_CL EXDU_ES QBOP_EX3 =1 VPQB VPDCTR DCOPTR DCCLTR =1 =1 VPS1QC1 VPS2QC2

&

>1
1

QBOPREL QBOPITL

&

&

en04000544.vsd

498

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

11.4.8.4

Input and output signals


Table 267:
Signal QB_OP QB_CL S1QC1_OP S1QC1_CL S2QC2_OP S2QC2_CL S1DC_OP S2DC_OP VPS1_DC VPS2_DC EXDU_ES EXDU_BB QBCL_EX1 QBCL_EX2 QBOP_EX1 QBOP_EX2 QBOP_EX3

Input signals for the A1A2_DC (II01-) function block


Description QB is in open position QB is in closed position QC1 on bus section 1 is in open position QC1 on bus section 1 is in closed position QC2 on bus section 2 is in open position QC2 on bus section 2 is in closed position All disconnectors on bus section 1 are in open position All disconnectors on bus section 2 are in open position Switch status of disconnectors on bus section 1 are valid Switch status of disconnectors on bus section 2 are valid No transm error from bays containing earth. sw. QC1 or QC2 No transm error from bays with disc conn to section 1 and 2 External close condition for section disconnector QB External close condition for section disconnector QB External open condition for section disconnector QB External open condition for section disconnector QB External open condition for section disconnector QB

REG 670

Technical reference manual 1MRK502013-UEN rev. B

499

Section 11 Control

Table 268:
Signal QBOPREL QBOPITL QBCLREL QBCLITL DCOPTR DCCLTR VPDCTR

Output signals for the A1A2_DC (II01-) function block


Description Opening of QB is allowed Opening of QB is forbidden Closing of QB is allowed Closing of QB is forbidden The bus section disconnector is in open position The bus section disconnector is in closed position Switch status of QB is valid (open or closed)

11.4.9
11.4.9.1

Interlocking for busbar earthinggrounding switch (BB_ES)


Introduction
The interlocking module BB_ES is used for one busbar earthing switch on any busbar parts according to figure 239.

QC

en04000504.vsd

Figure 239:

Switchyard layout BB_ES

11.4.9.2

Function block
IJ01BB_ES QC_OP QC_CL BB_DC_OP VP_BB_DC EXDU_BB QCREL QCITL BBESOPTR BBESCLTR

en05000347.vsd

Figure 240:

IJ function block

500

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control
11.4.9.3 Logic diagram

BB_ES VP_BB_DC BB_DC_OP EXDU_BB QC_OP QC_CL QCREL QCITL BBESOPTR BBESCLTR
en04000546.vsd

&

11.4.9.4

Input and output signals


Table 269:
Signal QC_OP QC_CL BB_DC_OP VP_BB_DC EXDU_BB

Input signals for the BB_ES (IJ01-) function block


Description Busbar earthing switch QC is in open position Busbar earthing switch QC is in closed position All disconnectors on this busbar part are open Status for all disconnectors on this busbar part are valid No transm error from bays with disc on this busbar part

Table 270:
Signal QCREL QCITL BBESOPTR BBESCLTR

Output signals for the BB_ES (IJ01-) function block


Description Switching of QC is allowed Switching of QC is forbidden QC on this busbar part is in open position QC on this busbar part is in closed position

11.4.10
11.4.10.1

Interlocking for double CB bay (DB)


Introduction
The interlocking modules DB_BUS_A, DB_LINE and DB_BUS_B are used for a line connected to a double circuit breaker arrangement according to figure 241.

REG 670

Technical reference manual 1MRK502013-UEN rev. B

501

Section 11 Control

WA1 (A) WA2 (B) QB1 QC1 QA1 DB_BUS_A QC2 QB61 QB62 QC3 QB9 QC9 QC5 QA2 DB_BUS_B QB2 QC4

DB_LINE

en04000518.vsd

Figure 241:

Switchyard layout double circuit breaker.

Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the connection from the line to the circuit breaker parts that are connected to the busbars. DB_BUS_A and DB_BUS_B are the connections from the line to the busbars.

11.4.10.2

Function block
IB01DB_BUS_A QA1_OP QA1CLREL QA1_CL QA1CLITL QB1_OP QB61REL QB1_CL QB61ITL QB61_OP QB1REL QB61_CL QB1ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC3_OP QB1OPTR QC3_CL QB1CLTR QC11_OP VPQB1TR QC11_CL EXDU_ES QB61_EX1 QB61_EX2 QB1_EX1 QB1_EX2 en05000354.vsd

Figure 242:

IB function block

502

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

IA01DB_LINE QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9REL QB9ITL QC3REL QC3ITL QC9REL QC9ITL

en05000356.vsd

Figure 243:

IA function block

IC01DB_BUS_B QA2_OP QA2CLREL QA2_CL QA2CLITL QB2_OP QB62REL QB2_CL QB62ITL QB62_OP QB2REL QB62_CL QB2ITL QC4_OP QC4REL QC4_CL QC4ITL QC5_OP QC5REL QC5_CL QC5ITL QC3_OP QB2OPTR QC3_CL QB2CLTR QC21_OP VPQB2TR QC21_CL EXDU_ES QB62_EX1 QB62_EX2 QB2_EX1 QB2_EX2 en05000355.vsd

Figure 244:

IC function block

11.4.10.3

Logic diagrams

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QA1_OP QA1_CL QB61_OP QB61_CL QB1_OP QB1_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL QC11_OP QC11_CL VPQB61 VPQB1 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB61_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB61_EX2 VPQA1 VPQC1 VPQC2 VPQC11 QA1_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX2

DB_BUS_A =1 =1 =1 =1 =1 =1 =1 & & >1


1 1

VPQA1 VPQB61 VPQB1 VPQC1 VPQC2 VPQC3 VPQC11 QA1CLREL QA1CLITL QB61REL QB61ITL

&

&

>1
1

QB1REL QB1ITL

&

en04000547.vsd

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VPQB61 VPQB1 QB61_OP QB1_OP QB1_OP QB1_CL VPQB1

&

1 1

QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR VPQB1TR


en04000548.vsd

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Section 11 Control

QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON VPQA1 VPQA2 VPQC1 VPQC2 VPQC3 VPQC4 VPQC5 VPQC9 QA1_OP QA2_OP QC1_OP QC2_OP QC3_OP QC4_OP QC5_OP QC9_OP QB9_EX1

DB_LINE =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & >1


1

VPQA1 VPQA2 VPQB61 VPQC1 VPQC2 VPQB62 VPQC4 VPQC5 VPQB9 VPQC3 VPQC9 VPVOLT QB9REL QB9ITL

&

en04000549.vsd

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VPQA1 VPQC1 VPQC2 VPQC3 VPQC9 VPQB62 QA1_OP QC1_OP QC2_OP QC3_OP QC9_OP QB62_OP QB9_EX2 VPQA2 VPQB61 VPQC3 VPQC4 VPQC5 VPQC9 QA2_OP QB61_OP QC3_OP QC4_OP QC5_OP QC9_OP QB9_EX3 VPQC3 VPQC9 VPQB61 VPQB62 QC3_OP QC9_OP QB61_OP QB62_OP QB9_EX4 VPQC3 VPQC9 QC3_CL QC9_CL QB9_EX5

&

>1

&

&

&

en04000550.vsd

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VPQB61 VPQB62 VPQB9 QB61_OP QB62_OP QB9_OP VPQB9 VPVOLT QB9_OP VOLT_OFF

&
1

QC3REL QC3ITL

&
1

QC9REL QC9ITL
en04000551.vsd

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Section 11 Control

QA2_OP QA2_CL QB62_OP QB62_CL QB2_OP QB2_CL QC4_OP QC4_CL QC5_OP QC5_CL QC3_OP QC3_CL QC21_OP QC21_CL VPQB62 VPQB2 VPQA2 VPQC4 VPQC5 VPQC3 QA2_OP QC4_OP QC5_OP QC3_OP QB62_EX1 VPQC5 VPQC3 QC5_CL QC3_CL QB62_EX2 VPQA2 VPQC4 VPQC5 VPQC21 QA2_OP QC4_OP QC5_OP QC21_OP EXDU_ES QB2_EX1 VPQC4 VPQC21 QC4_CL QC21_CL EXDU_ES QB2_EX2

DB_BUS_B =1 =1 =1 =1 =1 =1 =1 & & >1


1 1

VPQA2 VPQB62 VPQB2 VPQC4 VPQC5 VPQC3 VPQC21 QA2CLREL QA2CLITL QB62REL QB62ITL

&

&

>1
1

QB2REL QB2ITL

&

en04000552.vsd

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Section 11 Control

VPQB62 VPQB2 QB62_OP QB2_OP QB2_OP QB2_CL VPQB2

&

1 1

QC4REL QC4ITL QC5REL QC5ITL QB2OPTR QB2CLTR VPQB2TR


en04000553.vsd

11.4.10.4

Input and output signals


Table 271:
Signal QA1_OP QA1_CL QB1_OP QB1_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL QC11_OP QC11_CL EXDU_ES QB61_EX1 QB61_EX2 QB1_EX1 QB1_EX2

Input signals for the DB_BUS_A (IB01-) function block


Description QA1 is in open position QA1 is in closed position QB1 is in open position QB1 is in closed position QB61 is in open position QB61 is in closed position QC1 is in open position QC1 is in closed position QC2 is in open position QC2 is in closed position QC3 is in open position QC3 is in closed position Earthing switch QC11 on busbar WA1 is in open position Earthing switch QC11 on busbar WA1 is in closed position No transm error from bay containing earthing switch QC11 External condition for apparatus QB61 External condition for apparatus QB61 External condition for apparatus QB1 External condition for apparatus QB1

Table 272:
Signal QA1CLREL QA1CLITL QB61REL

Output signals for the DB_BUS_A (IB01-) function block


Description Closing of QA1 is allowed Closing of QA1 is forbidden Switching of QB61 is allowed

Table continued on next page

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Signal QB61ITL QB1REL QB1ITL QC1REL QC1ITL QC2REL QC2ITL QB1OPTR QB1CLTR VPQB1TR Description Switching of QB61 is forbidden Switching of QB1 is allowed Switching of QB1 is forbidden Switching of QC1 is allowed Switching of QC1 is forbidden Switching of QC2 is allowed Switching of QC2 is forbidden QB1 is in open position QB1 is in closed position Switch status of QB1 is valid (open or closed)

Table 273:
Signal QA1_OP QA1_CL QA2_OP QA2_CL QB61_OP QB61_CL QC1_OP QC1_CL QC2_OP QC2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QB9_OP QB9_CL QC3_OP QC3_CL QC9_OP QC9_CL VOLT_OFF VOLT_ON QB9_EX1

Input signals for the DB_LINE (IA01-) function block


Description QA1 is in open position QA1 is in closed position QA2 is in open position QA2 is in closed position QB61 is in open position QB61 is in closed position QC1 is in open position QC1 is in closed position QC2 is in open position QC2 is in closed position QB62 is in open position QB62 is in closed position QC4 is in open position QC4 is in closed position QC5 is in open position QC5 is in closed position QB9 is in open position QB9 is in closed position QC3 is in open position QC3 is in closed position QC9 is in open position QC9 is in closed position There is no voltage on the line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure External condition for apparatus QB9

Table continued on next page

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Signal QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 Description External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9 External condition for apparatus QB9

Table 274:
Signal QB9REL QB9ITL QC3REL QC3ITL QC9REL QC9ITL

Output signals for the DB_LINE (IA01-) function block


Description Switching of QB9 is allowed Switching of QB9 is forbidden Switching of QC3 is allowed Switching of QC3 is forbidden Switching of QC9 is allowed Switching of QC9 is forbidden

Table 275:
Signal QA2_OP QA2_CL QB2_OP QB2_CL QB62_OP QB62_CL QC4_OP QC4_CL QC5_OP QC5_CL QC3_OP QC3_CL QC21_OP QC21_CL EXDU_ES QB62_EX1 QB62_EX2 QB2_EX1 QB2_EX2

Input signals for the DB_BUS_B (IC01-) function block


Description QA2 is in open position QA2 is in closed position QB2 is in open position QB2 is in closed position QB62 is in open position QB62 is in closed position QC4 is in open position QC4 is in closed position QC5 is in open position QC5 is in closed position QC3 is in open position QC3 is in closed position Earthing switch QC21 on busbar WA2 is in open position Earthing switch QC21 on busbar WA2 is in closed position No transm error from bay containing earthing switch QC21 External condition for apparatus QB62 External condition for apparatus QB62 External condition for apparatus QB2 External condition for apparatus QB2

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Table 276:
Signal QA2CLREL QA2CLITL QB62REL QB62ITL QB2REL QB2ITL QC4REL QC4ITL QC5REL QC5ITL QB2OPTR QB2CLTR VPQB2TR

Output signals for the DB_BUS_B (IC01-) function block


Description Closing of QA2 is allowed Closing of QA2 is forbidden Switching of QB62 is allowed Switching of QB62 is forbidden Switching of QB2 is allowed Switching of QB2 is forbidden Switching of QC4 is allowed Switching of QC4 is forbidden Switching of QC5 is allowed Switching of QC5 is forbidden QB2 is in open position QB2 is in closed position Switch status of QB2 is valid (open or closed)

11.4.11
11.4.11.1

Interlocking for 1 1/2 CB (BH)


Introduction
The interlocking modules BH_LINE_A, BH_CONN and BH_LINE_B are used for lines connected to a breaker-and-a-half diameter according to figure 245.

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WA1 (A) WA2 (B) QB1 QC1 QA1 QC2 QB6 BH_LINE_A QC3 QB6 QC3 BH_LINE_B QA1 QC2 QB2 QC1

QB61

QA1

QB62

QB9 QC1 QC9 QC2

QB9 QC9

BH_CONN en04000513.vsd

Figure 245:

Switchyard layout breaker-and-a-half

Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B are the connections from a line to a busbar. BH_CONN is the connection between the two lines of the diameter in the breaker and a half switchyard layout.

11.4.11.2

Function blocks

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IL01BH_LINE_A QA1_OP QA1CLREL QA1_CL QA1CLITL QB6_OP QB6REL QB6_CL QB6ITL QB1_OP QB1REL QB1_CL QB1ITL QC1_OP QC1REL QC1_CL QC1ITL QC2_OP QC2REL QC2_CL QC2ITL QC3_OP QC3REL QC3_CL QC3ITL QB9_OP QB9REL QB9_CL QB9ITL QC9_OP QC9REL QC9_CL QC9ITL CQA1_OP QB1OPTR CQA1_CL QB1CLTR CQB61_OP VPQB1TR CQB61_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC11_OP QC11_CL VOLT_OFF VOLT_ON EXDU_ES QB6_EX1 QB6_EX2 QB1_EX1 QB1_EX2 QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 en05000352.vsd

Figure 246:

IL function block

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IM01BH_LINE_B QA1_OP QA1CLREL QA1_CL QA1CLIT L QB6_OP QB6REL QB6_CL QB6IT L QB2_OP QB2REL QB2_CL QB2IT L QC1_OP QC1REL QC1_CL QC1IT L QC2_OP QC2REL QC2_CL QC2IT L QC3_OP QC3REL QC3_CL QC3IT L QB9_OP QB9REL QB9_CL QB9IT L QC9_OP QC9REL QC9_CL QC9IT L CQA1_OP QB2OPT R CQA1_CL QB2CLT R CQB62_OP VPQB2T R CQB62_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL QC21_OP QC21_CL VOLT _OFF VOLT _ON EXDU_ES QB6_EX1 QB6_EX2 QB2_EX1 QB2_EX2 QB9_EX1 QB9_EX2 QB9_EX3 QB9_EX4 QB9_EX5 QB9_EX6 QB9_EX7 en05000353.vsd

Figure 247:

IM function block

QA1_OP QA1_CL QB61_OP QB61_CL QB62_OP QB62_CL QC1_OP QC1_CL QC2_OP QC2_CL 1QC3_OP 1QC3_CL 2QC3_OP 2QC3_CL QB61_EX1 QB61_EX2 QB62_EX1 QB62_EX2

IK01BH_CONN QA1CLREL QA1CLITL QB61REL QB61ITL QB62REL QB62ITL QC1REL QC1ITL QC2REL QC2ITL

en05000351.vsd

Figure 248:

IK function block

11.4.11.3
516

Logic diagrams
Technical reference manual 1MRK502013-UEN rev. B REG 670

Section 11 Control

QA1_OP QA1_CL QB1_OP QB1_CL QB6_OP QB6_CL QC9_OP QC9_CL QB9_OP QB9_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL CQA1_OP CQA1_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL CQB61_OP CQB61_CL QC11_OP QC11_CL VOLT_OFF VOLT_ON VPQB1 VPQB6 VPQB9 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB6_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB6_EX2

BH_LINE_A =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & & >1


1 1

VPQA1 VPQB1 VPQB6 VPQC9 VPQB9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQC1 VPCQC2 VPCQB61 VPQC11 VPVOLT QA1CLREL QA1CLITL QB6REL QB6ITL

&

en04000554.vsd

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517

Section 11 Control

VPQA1 VPQC1 VPQC2 VPQC11 QA1_OP QC1_OP QC2_OP QC11_OP EXDU_ES QB1_EX1 VPQC1 VPQC11 QC1_CL QC11_CL EXDU_ES QB1_EX2 VPQB1 VPQB6 QB1_OP QB6_OP VPQB6 VPQB9 VPCQB61 QB6_OP QB9_OP CQB61_OP VPQA1 VPQB6 VPQC9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQB61 VPCQC1 VPCQC2 QB9_EX1 QB6_OP QB9_EX2 QA1_OP QC1_OP QC2_OP QB9_EX3

&

>1
1

QB1REL QB1ITL

&

&

1 1

QC1REL QC1ITL QC2REL QC2ITL QC3REL QC3ITL

&
1

&

>1

QB9REL QB9ITL

>1 &

en04000555.vsd

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CQB61_OP QB9_EX4 CQA1_OP CQC1_OP CQC2_OP QB9_EX5 QC9_OP QC3_OP QB9_EX6 VPQC9 VPQC3 QC9_CL QC3_CL QB9_EX7 VPQB9 VPVOLT QB9_OP VOLT_OFF QB1_OP QB1_CL VPQB1

>1 &

&

>1

&

&

QC9REL QC9ITL QB1OPTR QB1CLTR VPQB1TR


en04000556.vsd

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Section 11 Control

QA1_OP QA1_CL QB2_OP QB2_CL QB6_OP QB6_CL QC9_OP QC9_CL QB9_OP QB9_CL QC1_OP QC1_CL QC2_OP QC2_CL QC3_OP QC3_CL CQA1_OP CQA1_CL CQC1_OP CQC1_CL CQC2_OP CQC2_CL CQB62_OP CQB62_CL QC21_OP QC21_CL VOLT_OFF VOLT_ON VPQB2 VPQB6 VPQB9 VPQA1 VPQC1 VPQC2 VPQC3 QA1_OP QC1_OP QC2_OP QC3_OP QB6_EX1 VPQC2 VPQC3 QC2_CL QC3_CL QB6_EX2

BH_LINE_B =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 =1 & & >1


1 1

VPQA1 VPQB2 VPQB6 VPQC9 VPQB9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQC1 VPCQC2 VPCQB62 VPQC21 VPVOLT QA1CLREL QA1CLITL QB6REL QB6ITL

&

en04000557.vsd

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Technical reference manual 1MRK502013-UEN rev. B

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VPQA1 VPQC1 VPQC2 VPQC21 QA1_OP QC1_OP QC2_OP QC21_OP EXDU_ES QB2_EX1 VPQC1 VPQC21 QC1_CL QC21_CL EXDU_ES QB2_EX2 VPQB2 VPQB6 QB2_OP QB6_OP VPQB6 VPQB9 VPCQB62 QB6_OP QB9_OP CQB62_OP VPQA1 VPQB6 VPQC9 VPQC1 VPQC2 VPQC3 VPCQA1 VPCQB62 VPCQC1 VPCQC2 QB9_EX1 QB6_OP QB9_EX2 QA1_OP QC1_OP QC2_OP QB9_EX3

&

>1
1

QB2REL QB2ITL

&

&

1 1

QC1REL QC1ITL QC2REL QC2ITL QC3REL QC3ITL

&
1

&

>1

QB9REL QB9ITL

>1 &

en04000558.vsd

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Section 11 Control

CQB62_OP QB9_EX4 CQA1_OP CQC1_OP CQC2_OP QB9_EX5 QC9_OP QC3_OP QB9_EX6 VPQC9 VPQC3 QC9_CL QC3_CL QB9_EX7 VPQB9 VPVOLT QB9_OP VOLT_OFF QB2_OP QB2_CL VPQB2

>1 &

&

>1

&

&

QC9REL QC9ITL QB2OPTR QB2CLTR VPQB2TR


en04000559.vsd

522

Technical reference manual 1MRK502013-UEN rev. B

REG 670

Section 11 Control

QA1_OP QA1_CL QB61_OP QB61_CL QB62_OP QB62_CL QC1_OP QC1_CL QC2_OP QC2_CL 1QC3_OP 1QC3_CL 2QC3_OP 2QC3_CL VPQB61 VPQB62 VPQA1 VPQC1 VPQC2 VP1QC3 QA1_OP QC1_OP QC2_OP 1QC3_OP QB61_EX1 VPQC1 VP1QC3 QC1_CL 1QC3_CL QB61_EX2 VPQA1 VPQC1 VPQC2 VP2QC3 QA1_OP QC1_OP QC2_OP 2QC3_OP QB62_EX1 VPQC2 VP2QC3 QC2_CL 2QC3_CL QB62_EX2 VPQB61 VPQB62 QB61_OP QB62_OP

BH_CONN =1 =1 =1 =1 =1 =1 =1 & & >1


1 1

VPQA1 VPQB61 VPQB62 VPQC1 VPQC2 VP1QC3 VP2QC3 QA1CLREL QA1CLITL QB61REL QB61ITL