Vous êtes sur la page 1sur 14

SERVICE MANUAL 5N11&5N07 CHASSIS

Design and specifications are subject to change without prior notice. ( ONLY REFERRENCE)

ENGINEER BY:

_____

CHECKED BY:

_____

PPROVED BY:

_____

Contents
Safety Notice--------------------------------------------------------2 Technical specification--------------------------------------------3-4 Chassis Block Diagram---------------------------------------------5 IC Block Diagram --------------------------------------------------6-12 Transistor mark ----------------------------------------------------13 Chassis wiring diagram --------------------------------------------14 PCB Top layer --------------------------------------------------15-17 Service Adjustments ---------------------------------------------18-21 Purity and Convergence Adjustment ---------------------------22 Control Location ---------------------------------------------------23 Input and Output Terminals----------------------------------------24 Operation Instructions---------------------------------------25-27 Mechanical Disassemblies---------------------------------------28 Cabinet parts List ---------------------------------------------------29 Circuit Diagram-----------------------------------------------------30

Safety Notice
SAFETY PRECAUTIONS
1:An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set. 2:Comply with all caution and safety-related notes provided on the cabinet back, inside the cabinet, on the chassis or the picture tube. 3:When replacing a chassis in the cabinet, always be certain that all the protective devices are installed properly,such as,control knobs, adjustment covers or shields, barriers,isolation resistor-capacitor networks etc.. Before returning any television to the customer,the service technician must be sure that it is completely safe to operate without danger of electrical shock.

X-RADIATION PRECAUTION
The primary source of X-RADIATION in television receiver is the picture tube. The picture tube is specially constructed to limit X-RADIATION emissions. For continued X-RADIATION protection, the replacement tube must be the same type as the original including suffix letter. Excessive high voltage may produce potentially hazardous X-RADIATION. To avoid such hazards, the high voltage must be maintained within specified limit. Refer to this service manual, high voltage adjustment for specific high voltage limit. If high voltage exceeds specfied limits, take necessary corrective action. Carefully follow the instructions for +B1 volt power supply adjustment, and high voltage check to maintain the high voltage within the specified limits.

PRODUCT SAFETY NOTICE


Product safety should be considered when a component replacement is made in any area of a receiver. Components indicated by mark ! in the parts list and the schematic diagram designate components in which safety can be of special significance. It is particularly recommended that only parts designated on the parts list in this manual be used for component replacement designated by mark ! . No deviations fromresistance wattage or voltage ratings may be made for replacement items designated by mark ! .
-2-

-3-

-4-

PICTURE SAW PRE-AMP SOUND SAW IIC I C201 N N5198 I C404 MSP3413 I C301 T A8859 I C403 A N5891 I C401 T A8256 CRT BOARD I C204 T A8427 Q302 T302 LV

TUNER

Chassis Block Diagram

I C002 EEPROM

-5-

KEY

I C001

S3P8849

REMOTE

I C701 STV5348

LH

I C205 A N5613 POWER

+140V +24V +14V +70V (FOR STANDBY)

FBT

+200V +12V 29V HEATER

IC Block Diagram
IC 001 (MULTI
SYSTEM COLOR TV CPU) S3P8849

P0.0 - P0.7

P1.0 - P1.7

RESET INT0 - INT3

Port 0

Port 1 Test

XIN XOUT

Main Osc

SAM87 Bus Timer A Port I/O and Interrupt Control

OSC IN OSC OUT H-sync V-sync Vred Vgreen Vblue Vblank OSDHT

L-C Osc Timer 0

TO T0CK

OnScreen Display

SAM87 CPU

PWM Block PWM Counter and Data Capture 14-Bit PWM

CAPA

ADC0 ADC1 ADC2 ADC3

24/32-KByte 4-Bit ADC ROM

272-Byte Register File

PWM0 PWM1 PWM2 PWM3 PWM4 PWM5

SAM87 Bus 8-Bit PWM

Port 2

Port 3

P2.0 - P2.7

P3.0 - P3.1

-6-

9V Hor. Sync 9V 3.58MHz in Exta BPF (exp.5.74MHz) Q Det out H out H Vcc Vcc2 6.3V Video out SIF in Yin Ver. Sync in AFC1 Saw Tooth Decoupling Vcc3 4.7V (DAC) Vcc1 9V (Chroma) Audio monitor Buffer Black Level VIF DeEXT Det out Det out Audio out Audio in emphasis

IC 201 (MULTI

V DD1 SV S C P (CMOS) Vss Ver.AGC CW out (CMOS) X-ray FBP in S D A V out

52 46 45 42 39 38
VSW Amp SIF SW ASW Deemphasis Trap
S

51 44 40 37 36 35 34 29 28 33 32 31 30
Hor. Sync Sep CV Clamp AFC1 HBLK HVBLK Hor. Count down BGP Tune
P N

50
Ver. Out Ver Count down HVCO AFC2 50/60Hz Detect BPF SIF fs Detect Limiter VCO Pre-Amp Trap Delay ACC Amp Sharpness Killer1 (PAL) Ident CW Generate Tint Pedestal Clamp Sync. Sep. APC Black Expansion Video Amp VCO Tune VCXO SIF Detect Hor. Lock Det CSW Ver. Sync Sep SCP Hor. Out Hor. Reg.

49 43 41

48

47

27
BPF SW BPF

IC Block Diagram

Power On Reset B-Y I H Amp FF R-Y Demod +/B-Y Demod ACC Det Limiter Tune De-emph Killer2 (NTSC) SECAM Demod VCO Brightness B Clamp B Cut off Drive G Cut off R Cut off Drive VCXO (4.43MHz) G Clamp R Clamp VCXO (3.58MHz) IH FF Bell Killer3 (SECAM) Amp Ident

PN/S SW

SYSTEM COLOR TV SIGNAL PROCESSOR) Nn5198

-7Noise Inverter Phase Shift PCP SW QS Sync.Sep VIF Detect IF Amp IF AGC

R-Y

B-Y

R-Y Amp

IIC BUS Interface

DAC/SW

1H Delay Line

Pedestal Adjust

QSS SW Q Det QAGC QIF Amp APC

512bit EEPROM

Saturation

G-Y

Contrast

Y/B-Y Matrix

B SW

B Contrast

Y/G-Y Matrix

G SW

G Contrast

VIF Lock Det RF AGC

AFT

Y/R-Y Matrix

R SW

R Contrast

1 7
G B R

2 8 9 10 11

12

13

14

15
+

16

17
+

18
SAW

19

20

21
GND QSS (IF) in

22

23

24

25
+

26
VAFC

+ G B GND (VCJ)

SCL 9V Vcc1 (VCJ)

Ys

Test

ABC L

CAPCI

9V Vcc1 4.43MHz SECAM (IF) SECAM PLL ref Bell ref

RFAGC AFT Out out

IF AGC EXT Video/Cin

9V

IC Block Diagram
IC403(AN5891)
[Application Circuit]
Vcc 10u + 23 MODE V cc 24 Rin 0.68u 0.1u 10u + 10u + + + 10n 22 RIN 21 V ref 20 BB 19 RB 18 RT Rout 10u + 10u + 10u + 17 BLD 16 15 14 ROUT SDA TD + AGC + SURR Tone Control Volume Control 2.2k + 13 SCL SDA SCL

Control

Balance /MUTE

PFI 1 33n

10u

10u

39n 15n

33n

10n

0.1u

10u

10u

10u Lout

Lin

[ Application Circuit to get L + R output instead of Super Bass Boos]t


Vcc 10u + 23 MODE V cc 24 L+R Out 0.1u 10u + 10u + 10u + + 10n 22 RIN 21 V ref 20 BB 19 RB 18 RT Rin Rout 10u + 10u + 10u + 17 BLD 16 15 14 TD ROUT SDA + AGC + SURR Tone Control Volume Control 2.2k + 13 SCL SDA SCL

Control

Balance /MUTE

PFI 1 33n

10u

10u

39n 15n

33n

10n

0.1u

10u

10u

10u Lout

Lin

-8-

220k

AGC 2 +

LIN 3 +

PF2 4

PF3 5

PF4 GND 6 7

LT 8

LB 9

BD 10

VD LOUT 12 11

220k

AGC 2 +

LIN 3 +

PF2 4

PF3 5

PF4 GND 6 7

LT 8

LB 9

BD 10

VD LOUT 12 11

IC Block Diagram
IC404(MSP3413)

-9-

IC Block Diagram
IC301(TA8859)
+ 16 + 15
RAMP AGC CORRECT TRIGER IN BUS CONTROL LINE SCL SDA

NC

14
PULSE GENE

13
TRIGER

12

11

10

BUS INTERFACE

LINEARITY CORRECT

S CORRECT

PARABOLA CORRECT

ETH CRCT

ETH CRCT

+ 1
ETH INPUT

+ 4 5 6 7 8
V DRIVE V NC FEED BACK

2
EW DRIVE

3
V CC

EW FEED BACK

IC601 <POWER > STR-G6456


4 VIN

1 D
START O.V.P LATCH DRIVE

2
REG. O.S.C

+ Vth(1)
Comp1

S 5 O.C.P/F.B

T.S.D

+
Comp2

Vth(2)

3 GND

-10-

IC Block Diagram
IC401(TA8256)
-

INPUT1

- +

6 Ripple Filter 4k + AMP 1 30k 350 20k V18

9 OUT1

Vcc

+ RL

2.1V

Pre-GND

PW-GND10

350
INPUT2 - +

20k
OUT2 + -

RL 12

4k 30k

AMP 2 +

INPUT3

- + 1

4k 30k

350
5

+ AMP 3 20k

OUT3

11

+ RL

MUTE SW MUTE

MUTE OFF

IC205(AN5613)<YUV>(Option)
Vcc
18 17 16

R-Y
15 14 13

-+

7 MUTE T C

B-Y
12 11

GND
10

G-Y Color Matrix Control

Pedestal Clamp R-Y G-Y B-Y

Picture Contrast Control

Pedestal Clamp

R , G ,B Matrix Blanking

Pedestal Clamp Pulse

BLK Pulse

-11-

IC Block Diagram
IC701(STV5348)<TELETEXT>(Option)
0.1uF 1 CVBS +5V +5V 1uF +5V SL 2 MA/SL 3 V DDA + 4 POL 0.1uF CBLK 28 TEST 27 V SSA 26 V SSO 25 C1 XTI 24 XTO 23 V DDD 22 VCR/TV 21 20 19 18 SDA 17 SCL 16 Y 15 47k TV VCR +5V 1uF10nF C2 13.875MHz +5V

MA

+5V 0.1uF

3.9k

S T 6 FFB V 7 V 5 8 R 3 9 G 4 10 B 11 RGB REF 8


5 STTV/LFB
SSD

1k

12 BLAN 13 COR 14 ODD/EVEN

D613<PHOTO TRANSISTOR> TLP621


TLP621 1 2 1:ANODE 2:CATHODE 3:EMITTER 4:COLLECTOT 4 3

-12-

Transistor Mark

PNP

NPN

NPN

NPN PNP
B42 1

C2230

E C

A10 13
B PNP
A1015

C24 82

NPN
C18 15

C27 03

E C

E C

E C

E C

E C

PNP
B77 4
E C B

NPN
B42 0

PNP
C21 20

NPN
C22 16
B E C

NPN
C27 17
B E C

E C

E C

E C B

A1499
C5148

L7812

L7805

INPUT B C E GND

OUTPUT

INPUT GND

OUTPUT

Se140

L7809

INPUT Vout SENSE GROUND GND

OUTPUT

COLLECTOR

-13-

Chassis wiring diagram

-14-

Vous aimerez peut-être aussi