OPAM

3.
Operational Amplifier
3. Operational Amplifier
3-1
Overview

Terminology and history The Differential Amplifier The Ideal Operational Amplifier Analysis of Circuits Containing Ideal Operational Amplifiers
-
Inverting and Noninverting Amplifier Voltage Follower Summing Amplifier, Difference Amplifier, Instrumentation-Amplifier Configuration, Low-Pass Filter, Integrator Comparator, Schmitt Trigger, Astable Multivribator, Monostable Multivibrator
Amplifier Terminology Review Nonideal Operational Amplifiers Frequency Response and Bandwidth of Operational Amplifiers Large-Signal Limitations Slew Rate and Full-Power Bandwidth
3-2
Terminology and History
The operational amplifier or op amp is a fundamental building block of analog circuit design. The name operational amplifier originates from the use of this type of amplifier to perform specific electronic circuit functions or operations, such as scaling, summation, and integration, in analog computers. The A-709, introduced by Fairchild Semiconductors in 1965, was one of the first widely used general-purpose IC operational amplifiers. The now classic A-741 amplifier by Fairchild Semiconductors, which appeared in the late 1960s, is a robust amplifier with excellent characteristics for most general-purpose applications.
3-3
Differential Amplifier (1)

+VCC
+
v+
+
v-
+ vID -
+
A
+ vO
VCC
+
-V
EE
EE
Basic differential amplifier, including power supplies
In most applications, VCC 0 and VEE 0, and the voltages are often symmetric that is, 5V, 12V, 15V, and so on. These power supply voltages limit the output voltage range: -VEE vO VCC
3-4
Differential Amplifier (2) - Simplifications
+ v id
+
A + vo
+ vid
+
A + vo (b)
(a)
(a) Amplifier without power supplies explicitly included
(b) Differential amplifier with implied ground connections
But we must always remember that the power and ground terminals are always present in the implementation of a real circuit!
3-5
Differential Amplifier (3) Equivalent Circuit

i+ v+ + v id vi+ R ID + Av
id
RO
Simplified g-parameter two-port representation of the differential amplifier (g12=0)
open-ciruit voltage gain or open-loop gain (v+ - v- ) = differential input signal voltage amplifier open-loop input resistance amplifier open-loop output resistance
3-6
vid = RID = RO =
Differential Amplifier (4) Signal Analysis
A is the maximum gain available from the device.

The signal voltage developed at the output of the amplifier is in phase with the voltage applied to the + input terminal and 180 out of phase with the signal applied to the input terminal. The v+ and v- terminals are therefore referred to as noninverting input and inverting input, respectively. Operational amplifiers are most often dc-coupled amplifiers, i.e. they amplify dc signals or signals at very low frequencies. ( In MES you will learn how such amplifiers are realized with transistors! )
3-7
Differential Amplifier (5) Voltage Gain

In a typical application, the amplifier is driven by a signal source having a Thvenin equivalent voltage vs and resistance Rs and is connected to a load RL. Analysis by two voltage dividers:
vo = Avid vid = vs
RL RO + RL
RID RID + RS
RS + + vs vid RID + -
AV =
RO
vo RID RL =A RID + RS Ro + RL vs
vo
Av id
RL
Amplifier with source and load attached

3-8
Ideal Differential Amplifier (1)

An ideal differential amplifier would produce an output that depends only on the voltage difference vid between its two input terminals, and this voltage would be independent of source and load resistances. This behavior can be achieved if the input resistance of the amplifier is infinite (RID -> ) and the output resistance is zero (RO -> 0 ). Then AV from the last slide reduces to:
vo = Avid
or
AV =
vo =A vid
Reminder: A was referred to as either the open-circuit voltage gain or open-loop gain of the amplifier and represented the maximum voltage gain available from the device.
3-9
Ideal Differential Amplifier (2)
The case of infinite input resistance RID>>RS and zero output resistance RO<<RL corresponds to a fully mismatched condition.
For this mismatched case, the overall amplifier gain is independent of the source and load resistances, and multiple amplifier stages can be cascaded without concern for interaction between stages.
3-10
Ideal Operational Amplifier (1) - Assumptions

An ideal operational amplifier is an ideal differential amplifier with infinite voltage gain A:
R ID RO = 0 A
Infinite gain leads to the first of two central assumption in analyzing circuits containing op amps:
v id =
vo lim vid = 0 A A
(1) If A is infinite, then the input voltage vid will be forced to zero for any finite output voltage:
vID = 0
3-11
Ideal Operational Amplifier (2) - Analysis
(2) If the input resistance RID is infinite, then the two input currents i+ and i- will be forced to zero:
i+ = 0
and
i = 0
These two results, combined with Kirchhoffs voltage (KVL) and current laws (KCL), form the basis for analysis of ALL ideal op amp circuits.
3-12
Ideal Operational Amplifier (3)

The ideal operational amplifier actually has quite a number of additional implicit properties which are:

Infinite common-mode rejection Infinite power supply rejection Infinite output voltage range (not limited by VEE vO VCC) Infinite output current capability Infinite open-loop bandwidth Infinite slew-rate Zero output resistance Zero input-bias currents and offset currents Zero input-offset voltage
3-13
The Inverting Amplifier (1)

The connecting resistors R1 and R2 are called the feedback network, between the inverting input and the signal source and amplifier output node, respectively. We are now looking for the closed-loop parameters of the overall amplifier: R2 overall voltage gain AV input resistance RIN output resistance ROUT
i
s
R1
vo vs
+ Inverting amplifier-circuit
3-14
The Inverting Amplifier (2)
R2
loop
i
s
R1
i-
vs
v id
+
vo
virtual ground node
loop:
vs is R1 i2R2 vo = 0
node:
is = i +i2
3-15
The Inverting Amplifier (3) - Voltage Gain

vs is R1 i2 R2 vo = 0
is = i + i2 is = i2 because i = 0
vs is R1 is R2 vo = 0
and because of virtual ground:
(1)
vid =v+ v =0 v+ =0
(2) (3)
is =
vs v vs = R1 R1 R2 vo = 0 R1
v =0
(2) in (1): vs
from (3) we finally obtain:
AV =
vo vs
AV =
R2 R1
180 phase shift

3-16
The Inverting Amplifier (4) Alternative Calculation

input loop: output loop:
v s is R1 + vid = 0 vo + i2 R2 vid = 0
v id = 0
(1) (2)
inverting-amplifier input node: is = i2 Assumption 1:
Dividing equation (1) through (2) yields:
AV =
vo R = 2 vs R1
3-17
The Inverting Amplifier (5) Input Resistance & Virtual Ground

The input resistance RIN of the overall amplifier is found directly from equation (2) on the last slide:
is =
RIN =
vs R1 vs = R1 is
(2)
Virtual ground: the operational amplifier adjusts its output to whatever voltage is necessary to force v- to be zero. But: a virtual ground is NOT connected directly to ground, so there is no direct dc path for current to reach ground. ( virtual!)
3-18
Calculation of the Output Resistance

The output resistance ROUT is the Thvenin equivalent resistance looking into the output port. 1. the input source vs is set to zero 2. all other independent voltage or current sources in the circuit are turned off 3. a test source vx (or a signal current source ix) is applied to the output of the amplifier, 4. and the current (or the voltage) is determined for the calculation of the output resistance v
ROUT =
ix
3-19
The Inverting Amplifier (6) - Output Resistance

ROUT = vx ix
i1 R2 R1 ivi2
+
ix
+
vx
loop
loop: v x = i2 R2 + i1 R1
v x = i1 ( R2 + R1 ) i1 = 0 because v = 0
i1 = i2 because i = 0
( (
Assumption 2) Assumption 1)
Thus, vx=0 independent of the value of ix, and finally
ROUT = 0
3-20
The Noninverting Amplifier (1)

The operational amplifier can also be used to construct a noninverting amplifier. The input signal is applied to the positive (noninverting) input terminal, and a portion of the output signal is fed back to the negative input terminal.
i
+
+ vs v id -
R2 i -
v1
R1
3-21
The Noninverting Amplifier (2) - Voltage Gain

voltage divider: loop:
R1 v1 = vo R1 + R2 vs vid = v1
assumption 1:
i+ = 0
vs
+ vid -
+
R2
vo
vid = 0 v s = v1 v o = v s
R1 + R 2 R1
i = 0
v 1 R1
AV =
vo R = 1+ 2 vs R1
Note that AV 1, because R1 and R2 are positive numbers for real resistors.
3-22
The Noninverting Amplifier (3) Input and Output Resistance

RIN = vs i+
RIN = because i+ = 0
To find the output resistance, a test current is applied to the output terminal and the source vs is set to 0.
ROUT =
vx ix
i+ + vid -
+
vx iR2 v 1 R1
ix
see loop equation on last slide : vid = v1 = 0 v x = R2i ROUT = 0 because i = 0.

vx
virtual ground
3-23
Unity-Gain Buffer, or Voltage Follower (1)

+ v id -
+
+ vo -
vs
The unity-gain buffer, or voltage follower (as shown above) is a special case of the noninverting amplifier with R1 = and R2 = 0. Writing a loop equation:
vs vid = vo or vo = vs
vid = 0
we find for the voltage gain:
AV = 1
3-24
Unity-Gain Buffer, or Voltage Follower (2)

Why is such an amplifier useful?
The ideal unity-gain buffer provides a gain of 1 with infinite input resistance and zero output resistance and therefore provides a tremendous impedance-level transformation while maintaining the level of the signal voltage. Many transducers represent high-source impedances and cannot supply any significant current to drive a load. The ideal unity-gain buffer, however, does not require any input current, yet can drive any desired load resistance without loss of signal voltage. Thus, the unity-gain buffer is found in many sensor and data acqusition applications.
3-25
Summary of Ideal Inverting and Noninverting Amplifier Characteristics

Inverting Amplifier Non-Inverting Amplifier
Voltage Gain AV
R2 R1
1+
R2 R1
Input Resistance R IN Output Resistance R OUT
R1
0
3-26
The Summing Amplifier

Two input sources v1 and v2 are connected to the inverting input through resistors R1 and R2.
v1 R1 i = 0 i1 =
vo =
v v2 i3 = o R2 R3 node : i3 = i1 + i2 i2 =
i1 v1 i2
R3 i3 ivo
R3 R v1 3 v2 R1 R2
R1
Any number of inputs can be put to the summing junction.
+
R2
v2 Application: Simple D/A-converter

summing junction & virtual ground

3-27
The Difference Amplifier (1) Input and Output Resistances R2

RIN 2 = R1 + R2 RIN 1 = R1 for v2 = 0
else more complicated:
v1 v2 i3 R IN2 R2 R1 v+ RIN1 i1 R1 v ii+ vo i2
io
RIN1 =
R1 1 v2 R2 v1 R1 + R2
ROUT = 0 (remember the inverting opamp)

The operational amplifier may itself be used in a difference amplifier configuration, which amplifies the difference between two input signals.
3-28
The Difference Amplifier (2) Output Voltage

The output loop v o = v i2 R 2 = v i1 R 2 and give
i1 =
vo = v
R2 (v1 v ) = R1 + R2 v R2 v1 R1 R1 R1
v1 v R1
where
v = v+ .
Finally, with the voltage divider we obtain
v+ =
R2 v2 R1 + R2
R1 + R2 R2 R2 vo = v v1 2 R R + R R 1 2 1 1 R2 vo = (v1 v2 ) R 1
If R2=R1, then the circuit is sometimes called differential subtractor.
3-29
The Instrumentation-Amplifier Configuration (1)
We often need to amplify the difference in two signals but cannot use the difference amplifier presented on the last slide, because its input resistance is too low.
In such a case, we can combine two noninverting amplifiers with a difference amplifier to form the high-performance composite instrumentation amplifier.
As we will see, the instrumentation amplifier has a voltage gain that is equivalent to the product of the gains of the noninverting and difference amplifiers.
3-30

loop
v1
+
1
va R R2
3
Difference Amplifier
i- = 0
i i 2R1
v1 3 vo
+
i v2
i- = 0 R2
R v2
vb
3-31

From the differential amplifier we use the relation for the output voltage:
R4 vo = R (va vb ) 3
and using the loop equation
vb = va iR2 i(2 R1 ) iR2

or
v v2 where i = 1 2 R1
vo =
va vb = 2i( R1 + R2 )
The input resistance presented to both input sources is infinite because the input current to op- amps is zero, and the output resistance is forced to zero by the difference
we get
R4 R2 1 + (v1 v2 ) R3 R 1
from the difference amplifier
from the noninverting amplifier
3-32
General Feedback Network

The general case of the inverting configuration with passive feedback is shown on this slide. Resistors R1 and R2 have been replaced by general impedances Z1(s) and Z2(s), which may now be a function of frequency.
AV (s ) =
Vo (s ) Z (s ) = 2 Vs (s ) Z1 ( s )
Z2 (s)
Z 1(s) vs
+
Generalized inverting-amplifier configuration
3-33
Single-Pole, Low-Pass Filter (1) Voltage Gain

Z1 (s ) = R1 and 1 sC = R2 Z 2 (s ) = 1 sCR2 + 1 R2 + sC R 1 AV (s ) = 2 R1 sCR2 + 1 R2 AV (s ) = R2 1 R1 s + 1
vs
yield
Z2 (s)
1 sC R2 vo
R1
+
Inverting amplifier with frequency-dependent feedback
where H = 2 f H =
1 R2C
3-34
Single-Pole, Low-Pass Filter (2) Bode Plot

A dB 20 log R2 R
1
-20 dB/dec
log f fH Frequency
3-35
Integrator
This circuit provides an opportunity to explore op amp circuit analysis in the time domain. Input loop with virtual ground:
vs dv and ic = C o R dt i = 0 ic = is is =
and integration yields:
1 = dv o RC vs d
with initial capacitor value
1 t vs ( ) d + vo (0 ) vo (t ) = RC 0
i v(t)
c
vo (0) = Vc (0)
is
R i-
vs (a)
vo (b)
vo
virtual ground
Output voltage for a stepfunction input with VC(0)=0

3-36
Amplifier Terminology Review (1)

Open-loop parameters describe the operational amplifier as a two-port itself with no external elements connected. Closed-loop parameters describe the overall amplifier as well as composite amplifiers. Summary:
Open-loop amplifier Closed-loop amplifier Voltage Gain A AV Input Resistance RID RIN Output Resistance RO ROUT
3-37
Amplifier Terminology Review (2)

Closed-Loop Feedback Amplifier R2
R1
+
v1
A, R , R O
ID
+
v2
(a)
AV , R IN, R OUT ROUT
+
v1
+ v id (b) Closed-Loop Feedback Amplifier RIN AV v

id
+
v2
(a) Inverting amplifier using an operational amplifier (b) Two-port representation of the overall amplifier
3-38
The Comparator and Schmitt Trigger (I)

V CC
+
v
S
V
REF
-V
EE
It is often useful to compare a voltage to a known reference level. This can be done electronically using the comparator circuit shown above.
3-39
The Comparator and Schmitt Trigger (II)

v
For input signals exceeding the reference voltage VREF, the output saturates at VCC; for input signals less than VREF, the output saturates a -VEE, as indicated in the voltage transfer characteristic shown on the right.
-V
V CC
v V
REF
EE
3-40
The Comparator and Schmitt Trigger (II)

v
S
REF
Noisy Input Signal (Expanded Scale) t vO V CC Comparator Output t
However, a problem occurs when high-speed comparators are used with noisy signals. As the input signal crosses the reference level, multiple transitions may occur due to the noise present on the input.
-V
EE
3-41
The Comparator and Schmitt Trigger (III)

R1 vREF R2
In digital systems, we often want to detect this threshold crossing cleanly by generating only a single transition, and the Schmitttrigger circuit helps solve this problem. The Schmitt trigger uses a comparator whose reference voltage is derived from a voltage divider across the output (positive feedback).
VCC
+
vO vS -V EE
( is defined as the fraction of the output voltage that is fed back from the output to the input and called the feedback factor)
3-42
R1 R1 + R2
The Comparator and Schmitt Trigger (IV)

The reference voltage changes when the output switches state:
v O VCC
for vo > 0 V VREF = CC VEE for vo < 0

Consider the case for an input voltage increasing from below VREF, as in the figure on the right hand. The output is at VCC and VREF=VCC. As the input voltage crosses through VREF, the output switches state to -VEE.
V CC 0
vS
-V EE
3-43
The Comparator and Schmitt Trigger (V)

v O
Now consider the case for an input voltage decreasing from a high level, as in the figure on the right hand on this slide. The output is at -VEE and VREF=-VEE. As the input voltage crosses through VREF, the output switches state to VCC.
VCC
V EE 0 vS
-V
EE
The Schmitt trigger with positive feedback is an example of an circuit with two stable states: a bistable circuit,or bistable multivibrator.
3-44
The Comparator and Schmitt Trigger (VI)

The voltage transfer characteristics from the last two slides are combined to yield the overall characteristic for the Schmitt trigger given here. The Schmitt trigger is said to exhibit hysteresis in its VTC, and will not respond to input noise that has a magnitude -VEE VN smaller than the difference between the two threshold voltages:
vO VCC Hysteresis V EE 0 VCC
vS
VN < [VCC ( VEE )] = (VCC + VEE )

3-45
Bistable Circuits
Ball balanced on top of fence is analogous to a Schmitt trigger with an output voltage of zero
3-46
The Astable Multivibrator (I)

Another type of multivibrator circuit employs a combination of positive and negative feedback and is designed to oscillate and generate a rectangular output waveform. The output of this circuit has no stable state and is referred to as an astable circuit, or astable multivibrator.
R2
R1
v+
VCC
+
v+ -VEE vO -
3-47
The Astable Multivibrator (II)

v V
O
t'
CC
T1 t T2 -V
The output voltage switches periodically (oscillates) between the two output VCC and -VEE. Let us assume that the output has just switched to vo=VCC at t=0. The voltage at the inverting-input terminal of the op amp charges exponentially toward a final value of VCC with a time constant =RC. The voltage on the capacitor at the time of the output transition is vC=-VEE. Thus:
EE
vV
CC
To VCC
EE
To -V
EE
vC (t ) = VCC (VCC + VEE )e
t RC
3-48
The Astable Multivibrator (III)

The comparator changes state again at time T1 when vc(t) just reaches VCC:
VCC = VCC (VCC + VEE )e

Solving for T1 yields:
T1 RC
V 1 + EE VCC T1 = RC ln 1
The same procedure during time interval T2 yields:
vC (t ' ) = VEE + (VEE + VCC )e
t' RC
3-49
The Astable Multivibrator (IV)

and
V 1 + CC VEE T2 = RC ln 1
T = T1 + T2
And finally for the common case of symmetrical power supply voltages VCC=VEE:
T = 2 RC ln
1+ 1
3-50
The Astable Multivibrator (V): Application as an inexpensive function generator
R2
C4
C6
R 1 R
+
R
3
+
Square Wave Output Triangle Wave Output Sine Wave Output
C3
Astable Multivibrator
Integrator
Low Pass Filter
3-51
The Monostable Multivibrator or One Shot (I)

A third type of multivibrator operates with one stable state and is used to generate a single pulse of known duration v following application of a t trigger signal. The circuit rests quiescently in its stable state, but can be triggered to generate a single transient pulse of fixed duration T. This monostable circuit is variously called a monostable multivibrator, a single shot, or a one shot.
R D1 2
CC
+
R1 -V 3 R
EE
vO
3-52
The Monostable Multivibrator or One Shot (II)
R D1 v t R1 2
CC
+
vO -V 3 R
EE
Diode D1 has been added to the astable multivibrator to couple the triggering signal vT into the circuit, and clamping diode D2 has been added to limit the negative voltage excursion on capacitor C.
3-53
The Monostable Multivibrator or One Shot (III)

The circuit rests in its quiescent state with vo=-VEE. If the trigger signal voltage vT is less than the voltage at node 2,
vT <
diode D1is cut off. Capacitor C discharges through R until diode D2 turns on, clamping the capacitor voltage at one diode-drop VD below ground potential. In this condition, the differentialinput voltage vID to the comparator is given by:
R1 VEE = VEE R1 + R2
vID = VEE ( VD ) = VEE + VD
As long as the value of the voltage divider is chosen so that
vID < 0 or VEE > VD
where =
then the output of the circuit will have one stable state.
R1 R1 + R2
3-54
The Monostable Multivibrator or One Shot (IV)

The monostable multivibrator can be triggered by applying a positive pulse to the trigger input. As the trigger pulse level exceeds a voltage of -VEE, diode D1 turns on and subsequently pulls the voltage at node 2 above that of node 3. At this point, the comparator output changes state, and the voltage at the noninverting-input terminal rises abruptly to a voltage equal to +VCC. Diode D1 cuts off, isolating the comparator input from any further changes on the trigger input.
VD V
EE
v V
CC
t T -VEE vV To VCC
CC
VD T T To -V r
EE
3-55
The Monostable Multivibrator or One Shot (V)

The voltage on the capacitor now begins to charge from its initial voltage -VD toward a final voltage of VCC and can be expressed mathematically as t
vc (t ) = VCC (VCC + VD )e
RC
where the time origin (t=0) coincides with the start of the trigger pulse. However, the comparator changes state when the capacitor voltage reaches +VCC. Thus, the pulse width T is given by
VCC = VCC (VCC + VD )e

or
T RC
V 1+ D V T = RC ln CC 1
3-56
Ideal Operational Amplifier (Summary)

The ideal operational amplifier actually has quite a number of additional implicit properties:

Infinite common-mode rejection Infinite power supply rejection Infinite output voltage range (not limited by -VEE vO VCC) Infinite output current capability Infinite open-loop bandwidth Infinite slew-rate Zero output resistance Zero input-bias currents and offset currents Zero input-offset voltage
3-57
Nonideal Operational Amplifiers
We explore the effects of the removal of the various explicit and implicit assumptions mentioned at the beginning. Using the two-port model for the operational amplifier, we explore the effects of only one nonideal parameter at a time. Method of approach: Express the nonideal parameter Analyze the circuit by taking this nonideality into consideration
3-58
Nonidealities and Limitations of an Operational Amplifier

Finite Open-Loop Gain Gain Error Nonzero Output Resistance Finite Input Resistance Finite Common-Mode Rejection Ratio Finite Power Supply Rejection Ratio Common-Mode Input Resistance DC Error Sources Nonzero input-offset voltage Nonzero input-bias currents Nonzero input-offset currents Output Voltage and Current Limits Finite open-loop bandwidth Large-signal response limitations: Finite slew-rate Full-power bandwidth
A
GE
ROUT RIN
CMRR PSRR
RIC VOS IB1 , IB2 IOS vO , iO

B SR
fM
3-59
Finite Open-Loop Gain A (1)

The finite open-loop gain contributes to deviations of the closed-loop gain AV, input resistance RIN , and output resistance ROUT from those presented for the ideal op amp.
A -> means vid = v+ - v- 0

i
s
+
v
Example: noninverting amplifier with finite open-loop gain A
+ id -
+ Av
id
vo R2 Feedback Network v i
1
vs
We will define the feedback factor which represents the fraction of the output voltage that is fed back from the output to the input.
R1
3-60
Finite Open-Loop Gain A (2)

Statement:
vo = Av id = A(v s v1 )
because i- = 0
(1) (2)
v1 =
R1 vo = vo R1 + R2
Combining (2) and (1) and solving for vo yields the classic feedback amplifier voltage-gain formula
AV =
vo A 1 R AV ,ideal = = 1 + 2 for A >> 1 = R1 vs 1+ A

vs 0 1 + A
vid = vs v1 = vs vo =
where T=A is called the loop gain or loop transmission.
3-61
Gain Error (GE)

gain error: fractional gain error:
GE = (ideal gain) - (actualgain) = AV ,ideal AV

FGE = A AV GE = V ,ideal (ideal gain) AV ,ideal
Example: noninverting amplifier
AV ,ideal =
and
AV =
GE =
FGE =
A 1 = 1 + A (1 + A )
for
A 1 + A
1 1 1 + A A
A >> 1
This gain error does not include the effect of resistor tolerances, which are an additional source of gain error.
3-62
Nonzero Output Resistance ROUT (1)

We assume that the op amp has nonzero output resistance RO and finite open-loop gain A. Example: noninverting and inverting op amp, which are identical for the calculation of the output resistance
vx , + ix = io + i2 v id ix v Avid where io = x RO vx and i2 = = i1 because i = 0 R1 + R2 R OUT =

Voltage divider: v1 =
+ + -
RO
io i2
ix
v A v id R2
v1 ii1 R1
R1 vx = vx R1 + R2
3-63
Nonzero Output Resistance ROUT (2)

Thus, we obtain the output conductance
1 ROUT
ix 1 + A 1 = + vx RO R1 + R2
ROUT =
For
RO 1 + A Note that RO would be infinite if A were assumed to be infinite. This is the reason why we must assume A to be finite. ROUT
3-64
RO much less than (R1 + R 2 ) can simplify this equation: 1 + A
RO (R1 + R2 ) 1 + A
Finite Input Resistance RIN (1)

1. Example: noninverting amplifier
RIN =
vx , ix
ix =
vx v1 RID
(1)
v
x
ix
+
v id
+ -
v R ID
+
Finite input resistance means i-= 0, but still i-<<i2, and therefore i1 i2.
Av i-
id
R2 i2 i1
v1 = i1 R1 = (i 2 + i ) R1 i 2 R1
and
v1
v1 =
A vx 1+ A
R1 vo = ( Av id ) = A (v x v1 ) R1 + R2
eq. (1)
R1
RIN =
vx = RID(1+ A) RIDA ix
3-65
Finite Input Resistance RIN (2)

i2 2. Example: inverting amplifier
ix R1 R2 v-
R IN =
v x i x R1 + v v = = R1 + ix ix ix
vx
vid
R ID
+
vo -
A v id
input current and input conductance:
ix = i + i2 = ix =
v v vo + RID R2
and
Inverting amplifier input resistance calculation
v v + Av + RID R2
RIN
G1 =
i1 1 1+ A = + v1 R ID R2
v R2 R + R2 RIN = R1 + = R1 + RID 1 + ix 1 A 1+ A
for largeRID
3-66
Summary of Nonideal Inverting and Noninverting Amplifiers

=
R1 R1 + R2
Inverting Amplifier Noninverting Amplifier
Voltage Gain
AV
R2 A R2 R1 R1 1 + A
A 1 R = 1+ 2 1+ A R1
Input Resistance
RIN
ROUT
R1 + RID
R2 R1 1+ A
RID (1 + A ) RID A
RO R O A 1 + A
Output Resistance
RO R O A 1 + A
3-67
Finite Common-Mode Rejection Ratio (CMRR) (1)

A real amplifier also responds to the signal that is common to both inputs, called the common-mode input voltage vic , defined as
vic =
v1 + v2 2
which is amplified by the common-mode gain Acm to give an overall output voltage
v +v vo = A(v1 v2 ) + Acm 1 2 = A(vid ) + Acm(vic ) 2

v1 = vic + v id 2
where A = Adm is the differential-mode gain and vid=(v1 v2) the differentialmode input voltage. Solving vid and vic with respect to v1 and v2 , we obtain: and
v2 = vic
vid 2
3-68
Finite Common-Mode Rejection Ratio (CMRR) (2)

An ideal amplifier would amplify vid and totally reject vic (Acm= 0), thus having infinite CMRR. But for an actual amplifier Acm is nonzero:
v A v vo = A vid + cm ic = A vid + ic CMRR A

or
with
CMRR =
A Acm
CMRR dB = 20 log
A dB Acm
Generally, the sign of Acm in unknown ahead of time, and CMRR specifications represent a lower bound.
+
+
v1 v2 A, A cm + vo
v id
2
+
+ vo
v ic
vid
2
3-69
Power Supply Rejection Ratio (PSRR)
When power supply voltages change due to long-term drift of the existence of noise on the supplies, the equivalent input-offset voltage VOS changes slightly. PSRR is a measure of the ability of the amplifier to reject these power supply variations.
PSRR values are similar to those of CMRR, with typical values in the range of 60 to 120 dB.
3-70
Common-Mode Input Resistance RIC (1)

The common-mode input resistance RIC of the op amp is the equivalent resistance presented to the common-mode source and often much greater than the differential-mode input resistance RIC.
+
+
v id
2
2R R ID
IC
vic
vid
2
2R
+ vo
IC
Op amp with common-mode input resistances added
3-71
Common-Mode Input Resistance RIC (2)

2R
IC
2R
IC
R ID vic
+
Input resistance for a common-mode signal:

vic 2R
+
RIN = RIC
2R
IC
IC
Amplifier with only a common-mode input signal present
2R v id
+
IC
Input resistance for a differential-mode signal:
R ID 2R
RIN = RID 4 RIC

IC
Amplifier input for a purely differential-mode input

And for RIC >> RID :
RIN RID
3-72
DC Error Sources - Input-Offset Voltage VOS (1)

Another class of error sources results from the need to bias the internal circuits that form the operational amplifier and from mismatches between pairs of solidstate devices in these circuits.
+
When the inputs of the op amp are both zero, the output is not truly zero but is resting at some dc voltage level VO :
v O = VO
Amplifier with zero input voltage but non-zero output voltage
The output voltage has to be modified:
v vO = Avid + ic +VOS CMRR

desired
with the equivalent dc input-offset voltage
VOS =
VO A
errors that corrupt the signal
3-73
Input-Offset Voltage VOS (2)

Example: noninverting amplifier
V OS Ideal amplifier with zero offset voltage
VOS is amplified just as any other

input signal source, and the dc output voltage of the op amp is
R2
vO
R2 VO = 1+ R VOS 1
Because we do not know the sign of VOS, and the VOS specifications represent an upper bound, we have
R1
Offset voltage can be modeled by a voltage source VOS in series with the amplifier input
VO 1+
R2 VOS R1
3-74
Input-Bias Currents IB1,2 and Input-Offset Current IOS (1)

For the transistors that form the op amp to operate, a small but nonzero dc inputbias current must be supplied to each input terminal of the amplifier. These currents produce an undesired voltage at the amplifier output. These currents represent base currents in an amplifier built with bipolar transistors or gate currents in one designed with MOSFETs or JFETs. The values of IB1 and IB2 are similar but not identical, and the actual direction depends on the details of the internal amplifier circuit. We define the offset current:
+
I B1 I B2 + vO
I OS = I B1 I B 2
The sign of IOS is also not known.
Operational amplifier with input bias currents modeled by current sources IB1 and IB2
3-75
Input-Bias Currents IB1,2 and Input-Offset Current IOS (2)

The offset-current specification is therefore normally expressed as an upper bound on the magnitude of IOS : Example: inverting op amp analysis by superposition Output due to IB1 : V = I R 1 + R2 O,1 B1 B Total voltage: And if we set:
I OS I MAX
VO , 2 = I B 2 R2
R2
R1 VO = VO ,1 + VO , 2
R1 R 2 R1 + R 2
Output due to IB2 :

R1
RB =
IB2
VO
+
RB IB1
The expression for the output-voltage error VO reduces to:
VO = (I B 2 I B1 )R2 = I OS R2
Inverting amplifier with bias current compensation resistor RB

3-76
Output Voltage vO and Current Limits iO (1)

As we remember, an actual op amp has a limited range of output voltage:
VEE vO VCC
Commercial op amps contain circuits that restrict the magnitude of the current in the output terminal in order to limit power dissipation in the amplifier and to protect the amplifier from accidental short circuits. The output-current specification affects the size of load resistor and places lower limits on the value of the feedback resistors R1 and R2 . Total output current:
+
v
S
iO iF R2 i=0 RL i
vO
v vO v iO = iL + iF = O + = O RL R1 + R2 REQ
where
REQ = RL (R1 + R2 )
R1
which represents the output current constraint and helps us choose the size of the feedback resistors.
Output current limit in the non-inverting amplifier

3-77
Frequency Response and Bandwidth of Operational Amplifiers (1)

Most general-purpose op amps are low-pass amplifiers designed to have high gain at dc and a single-pole frequency response:
A A(s) = o B = T s + B s + B
Ao is called open-loop gain at
dc
A dB 80
- 3 dB 20 log |A | o
60 - 20 dB/decade
B is called open-loop
bandwidth of the op amp
40 20
t B
T is called unity-gain
frequency at which
A( j ) = 1 (0 dB )
0 10
3
10 10 Radian Frequency (Log Scale)
10
10
Voltage gain vs. frequency for an operational amplifier
3-78
Frequency Response and Bandwidth of Operational Amplifiers (2)

At high frequencies, >> B, the transfer function can be approximated by
A( j )
Ao B
T
for
We see that the magnitude of the gain is indeed unity at =T :
A( j)
Rewriting this result:
T =1
= T
A( j ) T A( j ) f fT
This equation states that, for any frequency >>B, the product of the magnitude of amplifier gain and frequency has a constant value equal to the unity-gain frequency T. For this reason, the parameter T or fT is often referred to as gain-bandwidth product (GBW) of the amplifier. This important result is a property of single-pole amplifiers that can be represented by transfer functions given on the last slide.
3-79
Ta b le 1 2 . 5 - In ver t in g & No n - In ver t in g Am p lifier F r eq u en cy R es p o n s e C o m p a r is o n R1 R1 + R 2
No n - In ver t in g Am p lifier R2 R1
In ver t in g Am p lifier
D c G a in
A V(0 ) = 1 +
A V(0 ) =
R2 R1
F eed b a ck F a ct o r
1 A V (0 )
1 1 + A V (0 )
B a n d wid t h R IC
fB = f
fB = f R1 RO 1 + A
In p u t R es is t a n ce O u t p u t R es is t a n ce
R ID (1 + A ) RO 1 + A
3-80
Large-Signal Limitations Slew Rate and Full-Power Bandwidth (1)

Up to this point, we have assumed that the internal circuits that form the op amp can respond instantaneously to changes in the input signal.
However, the internal amplifier nodes all have an equivalent capacitance to ground, and only a finite amount of current is available to charge these capacitances.
Thus, there will be some limit to the rate of change on the various nodes. This limit is described by the slew-rate (SR) specification of the op amp. Typical values are:
0.1V/s SR 10V/s
For a given frequency, the slew rate limits the maximum amplitude of a signal that can be amplified without distortion.
3-81
Large-Signal Limitations Slew Rate and Full-Power Bandwidth (2)

Sinusoidal output signal:
v o = V M sin t
An example of slew-rate limited output signal

15V Sine Wave Input
Maximum rate of change of this signal occurs at the zero crossings:
Slew Rate Limited Output
dvo dt
= VM cost max = VM
max
0V
For no signal distortion, this maximum rate of change must be less than the slew SR rate:
VM SR or
VM
-15V 0s V(1) V(3) Time 200us 400us 600us
The full-power bandwidth fM is the highest frequency at which a full-scale signal amplitude VFS can be developed:
fM
SR 2 V FS
3-82
Summary

Terminology and history The Differential Amplifier The Ideal Operational Amplifier Analysis of Circuits Containing Ideal Operational Amplifiers
-
Inverting and Noninverting Amplifier Voltage Follower Summing Amplifier, Difference Amplifier, Instrumentation-Amplifier Configuration, Low-Pass Filter, Integrator Comparator, Schmitt Trigger, Astable Multivribator, Monostable Multivibrator
Amplifier Terminology Review Nonideal Operational Amplifiers Frequency Response and Bandwidth of Operational Amplifiers Large-Signal Limitations Slew Rate and Full-Power Bandwidth
3-83

OPAM

Transféré par

Informations du document

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

OPAM

Transféré par

Droits d'auteur :

Formats disponibles

3.

Terminology and History

Differential Amplifier (1)

Basic differential amplifier, including power supplies

Differential Amplifier (2) - Simplifications

(a) Amplifier without power supplies explicitly included

(b) Differential amplifier with implied ground connections

Differential Amplifier (3) Equivalent Circuit

Simplified g-parameter two-port representation of the differential amplifier (g12=0)

Differential Amplifier (4) Signal Analysis

A is the maximum gain available from the device.

Differential Amplifier (5) Voltage Gain

Amplifier with source and load attached

Ideal Differential Amplifier (1)

Ideal Differential Amplifier (2)

Ideal Operational Amplifier (1) - Assumptions

Ideal Operational Amplifier (2) - Analysis

Ideal Operational Amplifier (3)

The Inverting Amplifier (1)

The Inverting Amplifier (2)

virtual ground node

The Inverting Amplifier (3) - Voltage Gain

from (3) we finally obtain:

180 phase shift

The Inverting Amplifier (4) Alternative Calculation

inverting-amplifier input node: is = i2 Assumption 1:

Dividing equation (1) through (2) yields:

The Inverting Amplifier (5) Input Resistance & Virtual Ground

Calculation of the Output Resistance

The Inverting Amplifier (6) - Output Resistance

Thus, vx=0 independent of the value of ix, and finally

The Noninverting Amplifier (1)

The Noninverting Amplifier (2) - Voltage Gain

The Noninverting Amplifier (3) Input and Output Resistance

see loop equation on last slide : vid = v1 = 0 v x = R2i ROUT = 0 because i = 0.

Unity-Gain Buffer, or Voltage Follower (1)

we find for the voltage gain:

Unity-Gain Buffer, or Voltage Follower (2)

Summary of Ideal Inverting and Noninverting Amplifier Characteristics

Input Resistance R IN Output Resistance R OUT

The Summing Amplifier

Any number of inputs can be put to the summing junction.

v2 Application: Simple D/A-converter

summing junction & virtual ground

The Difference Amplifier (1) Input and Output Resistances R2

ROUT = 0 (remember the inverting opamp)

The Difference Amplifier (2) Output Voltage

Finally, with the voltage divider we obtain

The Instrumentation-Amplifier Configuration (1)

The Instrumentation-Amplifier Configuration (2)

The Instrumentation-Amplifier Configuration (3)

vb = va iR2 i(2 R1 ) iR2

from the difference amplifier

from the noninverting amplifier

General Feedback Network

Single-Pole, Low-Pass Filter (1) Voltage Gain

Single-Pole, Low-Pass Filter (2) Bode Plot

and integration yields:

Output voltage for a stepfunction input with VC(0)=0

Amplifier Terminology Review (1)

Amplifier Terminology Review (2)

AV , R IN, R OUT ROUT

+ v id (b) Closed-Loop Feedback Amplifier RIN AV v

The Comparator and Schmitt Trigger (I)