Plug and Play Guidelines Legacy

Legacy Plug and Play Guidelines
A Technical Reference for Legacy PCs and Peripherals for the Microsoft Windows Family of Operating Systems
ersion !"# $ May !%& !'''
(ntel Corporation and Microsoft Corporation
Legacy Plug and Play Guidelines 1997-1999 Intel Corporation and Microsoft Corporation. All rights reser ed.
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The information contained in this document represents the current view of Intel Corporation and Microsoft Corporation on the issues discussed as of the date of publication. Because Intel and Microsoft must respond to changing mar et conditions! it should not be interpreted to be a commitment on the part of Intel and Microsoft! and Intel and Microsoft cannot guarantee the accuracy of any information presented. This document is for informational purposes only. I"T#L $"% MIC&'(')T M$*# "' +$&&$"TI#(! #,P&#(( '& IMPLI#%! I" T-I( %'C.M#"T. Intel Corporation and Microsoft Corporation may have patents or pending patent applications! trademar s! copyrights! or other intellectual property rights covering sub/ect matter in this document. The furnishing of this document does not give you any license to these patents! trademar s! copyrights! or other intellectual property rights. Intel and Microsoft do not ma e any representation or warranty regarding specifications in this document or any product or item developed based on these specifications. Intel and Microsoft disclaim all e0press and implied warranties! including but not limited to the implied warranties of merchantability! fitness for a particular purpose! and freedom from infringement. +ithout limiting the generality of the foregoing! Intel and Microsoft do not ma e any warranty of any ind that any item developed based on these specifications! or any portion of a specification! will not infringe any copyright! patent! trade secret! or other intellectual property right of any person or entity in any country. It is your responsibility to see licenses for such intellectual property rights where appropriate. Intel and Microsoft shall not be liable for any damages arising out of or in connection with the use of these specifications! including liability for lost profit! business interruption! or any other damages whatsoever. $ctive,! Bac 'ffice! %irect(how! %irect,! Microsoft! M(1%'(! "et(how! +in23! +indows! +indows "T! and the +indows logo are either registered trademar s or trademar s of Microsoft Corporation in the .nited (tates and4or other countries. Intel and Pentium are registered trademar s! and Intel567! MM,! and ,eon are trademar s of Intel Corporation. 'ther product and company names herein may be the trademar s of their respective owners. 8 9::;<9::: Intel Corporation and Microsoft Corporation. $ll rights reserved.
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Contents
Welcome 5 -ow to .se This Guide...................................................................................................7 Conventions .sed in This Guide....................................................................................7 &eferences and &esources...............................................................................................; Chapter 1 9 Basic Legacy Plug and Play 9 Legacy Plug and Play (pecifications..............................................................................: .ni=ue Plug and Play %evice I%s.................................................................................9> 'ption &'M Guidelines...............................................................................................99 ?P"P@ Aendor Codes and Compatible I%s..................................................................99 I4' %ecoding ................................................................................................................99 Chapter 2 12 ISA Plug and Play 12 (ystem &e=uirements for Plug and Play I($ ..............................................................93 Plug and Play I($ %evice &e=uirements.....................................................................92 Plug and Play I($ (tandards for %evices...............................................................92 'ption &'Ms for I($ Boot %evices.......................................................................92 I4' %ecoding for I($ %evice..................................................................................95 I($ I&B (haring.....................................................................................................95 %eterministic Aalues for .nimplemented &egisters..............................................95 Correct Identifiers for I($ %evices.........................................................................95 BI'( &eporting or (erial I% for (ystem Board %evices........................................9C P"P (uffi0es and Compatible %evice I%s..............................................................9C 'ption &'Ms for Boot %evices..............................................................................97 Chapter 3 1 Legacy (erial Port ........................................................................................................9; Legacy Parallel Port .....................................................................................................96 #PP (upport and &estricted I4' addresses.............................................................96 Compatibility! "ibble Mode! and #CP Protocols ..................................................9: I### 9365 Port Connector (pecifications..............................................................9: Plug and Play %evice I%s for I### 9365 Peripherals ...........................................9: Compatible I% *ey for Parallel %evice I%.............................................................3> Legacy Mouse Port and %evices...................................................................................3> Legacy *eyboard Port and %evices..............................................................................39 Legacy )%C...................................................................................................................39 Appendi! A 22 I"#$ %&A$ and I'( Port Addresses 22 )i0ed Interrupts.............................................................................................................33 Legacy %M$ $ssignments...........................................................................................33 Legacy I4' $ddress $ssignments.................................................................................32 Appendi! B 25 %e)ice Identi*iers 25 Plug and Play Aendor and %evice I%s.........................................................................3C Generic +indows %evice I%s.......................................................................................37 Interrupt Controllers................................................................................................3;
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Timers......................................................................................................................3; %M$........................................................................................................................3; *eyboards................................................................................................................3; Parallel %evices.......................................................................................................36 (erial %evices..........................................................................................................36 %is Controllers......................................................................................................3: %isplay $dapters.....................................................................................................3: Peripheral Buses......................................................................................................2> &eal1Time Cloc ! BI'(! and (ystem Board %evices.............................................2> PCMCI$ Controller Chip (ets...............................................................................29 Mouse.......................................................................................................................29 "etwor $dapters....................................................................................................22 (ound! Aideo Capture! and Multimedia.................................................................2; Modems...................................................................................................................26
+lossary 39 Inde! ,5 Plug and Play re-uirements 1. Plug and Play$ 10 ,/ re-uirements$ 19 ,/ ISA de)ice re-uirements$ 1211/ I222 120,$ 1912. , parallel ports and de)ices$ 1912.
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+elcome
This guide is for engineers who build personal computers! e0pansion cards! and peripheral devices that will be used with the MicrosoftD +indowsD 231bit operating systems and that incorporate legacy components. The specific focus of this guide is Plug and Play configuration of resources for the following system componentsE Industry (tandard $rchitecture FI($G bus and devices (erial ports and devices I### 93651based parallel ports and devices *eyboard and mouse ports and devices
Important3 In general! it is strongly recommended that system designers implement Plug and Play for +indows 3>>> and +indows :6 based on the re=uirements defined in Advanced Configuration and Power Interface Specification, Version 1.0 or later F$CPI 9.>G! plus the driver guidelines defined in the Microsoft +indows 3>>> %river %evelopment *it F%%*G. In addition! designers are strongly encouraged to see legacy1free alternatives for system design! avoiding the I($ bus because of the throughput bottlenec s and resource limitations of I($ design. -owever! it is recogniHed that to meet some customer re=uirements! system manufacturers must provide some systems that support the legacy I($ bus. The goal of this document is to provide guidelines for legacy hardware design that will result in the optimal user e0perience when the hardware is used with the +indows family of operating systems. This guide is a supplement to the legacy Plug and Play specifications Favailable at httpE44www.microsoft.com4hwdev4respec4pnpspecs.htmG! and the driver implementation guidelines defined in the Microsoft +indows :C %%*. $ll material in this guide has previously appeared in the following documentsE PC 97 Hardware Design uide FMicrosoft PressD! 9::;I I(B" 91C;329126919G PC 9! S"ste# Design uide FMicrosoft Press! 9::;I I(B" 91C;3291;971;G PC 99 S"ste# Design uide FMicrosoft Press! 9::6I I(B" >1;2C71>C9619G
1997-1999 Intel Corporation and Microsoft Corporation. All rights reser ed.
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Welcome
-ow to .se This Guide

This guide is divided into several chapters! with appendi0es that list detailed settings.
Chapter Chapter 9! ?Basic Legacy Plug and Play@ Chapter 3! ?I($ Plug and Play@ Contents %efines basic specifications and guidelines for implementing legacy Plug and Play. Provides specific guidelines for implementing Plug and Play I($! for the computer system and for individual devices. Provides Plug and Play guidelines for legacy serial and parallel ports and for legacy mouse and eyboard connectors. I&B! %M$! and I4' Port $ddresses Lists compatible I%s for legacy and I($ devices. %efines technical terms and acronyms related to hardware and the +indows operating systems.
Chapter 2! ?I4' Ports and %evices@ $ppendi0 $! ?I&B! %M$! and I4' Port $ddresses@ $ppendi0 B! ?%evice Identifiers@ Glossary
This guide is co1authored by Intel Corporation and Microsoft Corporation. $dditional information about hardware design is available from Intel Corporation at httpE44developer.intel.com. $dditional information about hardware design is available from the Microsoft web sites at httpE44www.microsoft.com4hwdev4.
Conventions .sed in This Guide

The following conventional terms are used throughout this guide. Add1on de)ices %evices that are traditionally added to the base server system to increase functionality! such as audio! networ ing! graphics! and so on. $dd1on devices fall into two categoriesE devices built onto the system board set and devices on e0pansion cards added to the system through a system1board connector such as Peripheral Component Interconnect FPCIG. Intel Architecture &efers to computers based on 751bit and 231bit microprocessors that use the Intel $rchitecture instruction set! such as IntelD PentiumD! Intel Pentium with MM, technology! Pentium Pro! Pentium II! Pentium II ,eon! or compatible processors. MM, technology refers to IntelJs media1enhancement technology that includes new instructions added to the Intel $rchitecture instruction set. Legacy &efers to any feature in the system based on older technology for which
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compatibility continues to be maintained in other system components. System de)ices $lso on$%oard devices. &efers to devices on the system board set such as interrupt controllers! eyboard controller! real1time cloc ! direct memory access F%M$G page registers! %M$ controllers! memory controllers! floppy dis controller F)%CG! $T1$ttachment F$T$G ports! serial and parallel ports! PCI bridges! and so on. In todayJs servers! these devices are typically integrated with the supporting chip set. Windo4s &efers to the Microsoft +indows :C or +indows :6 operating systems! including any add1on capabilities and any later versions of the operating system. Windo4s 2... &efers to the Microsoft +indows 3>>> operating system! including any add1on capabilities and any later versions of the operating system. )or a list of acronyms and definitions of technical terms! see the Glossary later in this guide.
&eferences and &esources

The following represents some of the information resources! services! and tools available to help build hardware optimiHed to meet the re=uirements defined in this guide. This section also lists technical references for the specifications cited in this guide.
In*ormation "esources
Intel developer information httpE44developer.intel.com Microsoft hardware developer information httpE44www.microsoft.com4hwdev4 Microsoft %eveloper "etwor FM(%"G Professional (ubscription PhoneE F6>>G ;C:1C5;5 'utside "orth $mericaE FC9>G 3;C1>;72 )a0E FC9>G 3;C1>;73 httpE44msdn.microsoft.com4
5echnical "e*erences
Advanced Configuration and Power Interface Specification, Version 1.0 httpE44www.teleport.com4Kacpi4 I&' Persona( S"ste#)* Co##on Interfaces, Part "o. (65)1:6>: I&' Persona( S"ste#)* 'ouse +ec,nica( -eference, Part "o. (76,1333: International Business Machines Corporation IBM Customer Publications (upportE F6>>G 6;:13;C 'r contact an IBM sales representative
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Microsoft Platform (%*! +indows :C %%*! and +indows 3>>> %%* Provided through M(%" Professional subscriptionI httpE44msdn.microsoft.com4subscriptions4 Microsoft +indows -ardware Compatibility List F-CLG httpE44www.microsoft.com4hwtest4hcl4 Plug and Play specifications httpE44www.microsoft.com4hwdev4respec4pnpspecs.htm
Basic Legacy Plug and Play
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This chapter defines the basic specifications and implementation guidelines for legacy Plug and Play. )or information about Plug and Play drivers support under +indows :C! see the +indows :C %%*. Plug and Play for A0% drivers under +indows :6 should also follow the guidelines defined in the +indows :C %%*. )or information about Plug and Play support under +indows 3>>>! see the +indows 3>>> %%*.
Legacy Plug and Play (pecifications

#ach bus and device provided in the computer system must meet the current Plug and Play specifications related to its class! including re=uirements clarifications published for some Plug and Play specifications. )or $CPI1based systems! buses and devices must also meet the re=uirements defined in (ection 7 of the Advanced Configuration and Power Interface Specification, -evision 1.0 . This specification defines the re=uirements for automatic device configuration! resource allocation! and dynamic disable capabilities. The following shows current version numbers for all legacy Plug and Play specificationsE P(ug and P(a" &I.S Specification Version 1.0a Important3 This specification applies only for non1$CPI1based systems. $CPI1based systems must follow the re=uirements defined in $CPI 9.>. P(ug and P(a" /0terna( C.' Device Specification, Version 1.0 P(ug and P(a" Industr" Standard Arc,itecture 1ISA2 Specification, Version 1.0a C(arification to P(ug and P(a" ISA Specification, Version 1.0a P(ug and P(a" Para((e( Port Device Specification, Version 1.0% P(ug and P(a" S#a(( Co#puter S"ste# Interface Specification, Version 1.0
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6ote3 (tandard system devices are e0cluded from this re=uirement. The system can reserve static resources for devices such as programmable interrupt controllers FPICsG 9 and 3! 63C513 timer! 6>53 eyboard controller! real1time cloc ! %M$ page registers! %M$ controllers 9 and 3! and math coprocessor. )or systems based on Intel $rchitecture compatible processors! these fi0ed resources are located at I4' addresses under 9>>h and can also include a "onmas able Interrupt F"MIG. $ll system1board devices must use I($1compatible addresses. This includes devices with I4' port addresses within the reserved range >h<>0))h. )or information about legacy system I4' addresses! see $ppendi0 $! ?I&B! %M$! and I4' Port $ddresses.@
.ni=ue Plug and Play %evice I%s

#ach device connected to an e0pansion bus must be able to supply its own uni=ue I%. The following are the specific re=uirements for Plug and Play device I%sE #ach separate function or device on the system board must be separately enumeratedI therefore! each must provide a device I% in the manner re=uired in the current Plug and Play specification for the bus it uses. If a device on an e0pansion card is enumerated by the BI'(! it must have a uni=ue I% and its own resources according to the current device I% re=uirements for the bus to which the card is connected. This includes devices that are separately enumerated on multifunction cards or multifunction chips.
In addition! if an '#M uses a proprietary mechanism to assign asset or serial numbers to hardware! this information must be available to the operating system using +indows hardware instrumentation technology! as defined in the 3etwor4 PC S"ste# Design uide(ines, Version 1.0% or later. The following are e0ceptions to the re=uirement for a uni=ue Plug and Play I%E Legacy devices attached to the I($ bus on the system board do not have uni=ue Plug and Play I%sLfor e0ample! serial ports! parallel ports! or Personal (ystem43 FP(43G compatible port devices. The method for device identification is defined in the P(ug and P(a" ISA Specification, Version 1.0a, and the $CPI 9.> specification. (ome multifunction devices! such as (uper I4'! might include devices that do not have uni=ue Plug and Play I%s or uni=ue PCI subsystem I%s! but that are supported by drivers provided with the +indows operating system. $ device such as a multifunction PCI device that supports a number of functions but uses only a single set of relocatable resources does not have to provide separate I%s for each function included on the device.
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'ption &'M Guidelines

These guidelines apply for devices that use option &'M on systems based on Intel $rchitecture processors! whether the device is present on the system board or provided through an e0pansion card. 'ption &'Ms are usually located on cards used as system boot devices. %uring the boot process! option &'Ms initialiHe the boot devices! which provide the primary input! primary output! and Initial Program Load FIPLG device to boot the system. -owever! Plug and Play option &'Ms can be used to supply the Plug and Play e0pansion header to devices other than boot devices! enabling them to initialiHe both devices when the system boots.
?P"P@ Aendor Codes and Compatible I%s

$ll legacy devices not enumerated by the system1board interface must not use the acronym for Plug and Play! ?P"P@ in their vendor and device codes. The P"P vendor code is reserved for Microsoft and for vendors whose hardware is specifically assigned a particular I%. 'ther hardware can use a P"P code only when defining a deviceJs Compatible I% FCI%G and only after first indicating the deviceJs -ardware I% in the Plug and Play header. .se of CI%s are recommended for devices that use device drivers provided with the +indows operating system! such as a (tandard PC C'M Port FP"P>C>>G. )or information about using P"P CI%s! see $ppendi0 B! ?%evice Identifiers.@ To obtain a uni=ue P"P vendor I%! complete the form provided at httpE44www.microsoft.com4hwdev4pnpid.htm.
I4' %ecoding
#ach device must support a uni=ue I4' port address in the 971bit address range. This re=uirement means that! at a minimum! the upper address lines F$9><$9CG can be used as the device enable address! so that the device does not respond to addresses outside of the 9>1bit address range. %evices that use less than 971bit I4' decode create conflicts that cannot be resolved by a Plug and Play operating system. Phantom FaliasG addressing is not supported by the +indows operating system and cannot be used to meet this re=uirement. "otice that this re=uirement does not apply for the three I($ auto1configuration registers used during device enumeration and configuration. The $%%&#((! +&IT#M%$T$! and &#$%M%$T$ registers will continue to use 931bit decoding as described in the ISA P(ug and P(a" Specification, Version 1.0a.
I($ Plug and Play
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This chapter summariHes Plug and Play re=uirements for any I($ legacy implementations. In addition to I($ e0pansion cards! the following are also I($ devicesE 6>53 and similar controllers! ports! eyboards! and mice %irect memory access F%M$G controllers and slaves )loppy dis controllers F)%CsG Interrupt controllers Legacy parallel and serial ports Math coprocessors Programmable interrupt timers FPITsG AG$ controllers
-owever! any such devices located at I4' addresses below 9>>h can use fi0ed resources and are e0empt from Plug and Play re=uirements for uni=ue I%s! fle0ible resource configuration! and dynamic disable capabilities. )or details about the interrupt re=uest FI&BG settings! %M$ address! and I4' port addresses for specific devices! see $ppendi0 $! ?I&B! %M$! and I4' Port $ddresses.@
(ystem &e=uirements for Plug and Play I($

This section summariHes the basic re=uirements for a PC system that includes the I($ bus. If I($ support is included in a system! the manufacturer must implement the standards described in the following Plug and Play specificationsE P(ug and P(a" ISA Specification, Version 1.0a P(ug and P(a" &I.S Specification, Version 1.0a
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C(arifications to t,e P(ug and P(a" &I.S Specification, Version 1.0a .
The Plug and Play specifications are available from the web site at httpE44www.microsoft.com4hwdev4respec4pnpspecs.htm. $dditional I($ clarifications and white papers related to I($ Plug and Play under the Microsoft +indows operating system are available from the web site at httpE44www.microsoft.com4hwdev4legacy4. 6ote3 (tandard system devices are e0cluded from this re=uirement. The system can reserve static resources for devices such as interrupt controllers 9 and 3! 63C513 timer! 6>53 eyboard controller! real1time cloc ! %M$ page registers! %M$ controllers 9 and 3! and math coprocessor Fif presentG. )or a system based on Intel $rchitecture! these fi0ed resources are located at I4' addresses below 9>>- and can also include an "MI mas .
Plug and Play I($ %evice &e=uirements

This section includes additional re=uirements for I($ cards! including re=uirements for design implementations that appear only as recommendations in the I($ specification! to ensure that such cards will perform correctly under +indows. The information in this section is provided for manufacturers of I($ devices who want to ensure that their devices are completely compatible with Plug and Play operating systems. )or more details! see the Plug and Play I($ (pecification! version 9.>a.
Plug and Play I($ (tandards for %evices

$ny card or bus that implements Plug and Play I($ must fully implement the standards defined in the P(ug and P(a" ISA Specification, Version 1.0a. This specification also defines the re=uirements for a uni=ue I% for each I($ device. The uni=ue I% is used to identify the device for Plug and Play configuration.
'ption &'Ms for I($ Boot %evices

'ption &'Ms must be used only on cards that contain boot devices. Cards with option &'Ms must not hoo the primary boot interrupts FInt :h! Int 9>h! Int 92h! Int 96h! and Int 9:hG until the system calls the boot connection vector in the selected option &'M e0pansion header. )or cards with option &'Ms! the default configuration must be able to be disabled after the card has been isolated.
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I4' %ecoding for I($ %evice

This circuit can be simple enough to limit I4' addresses to the >h to 2))h range! or it can be fle0ible enough to use the upper address regions. The device must meet the guidelines for 971bit I4' decoding defined in Chapter 9! ?Basic Legacy Plug and Play!@ in this guide.
I($ I&B (haring

.nder +indows :C4:6 Fbut not +indows "TD 5.> or +indows 3>>>G! an I($ device and its driver can support I&B sharing if resource re=uirements cannot be met. This capability applies only for devices of the same class! not across device classes. To share I&Bs! the following re=uirements must be metE The I&B line must be pulled high by the system board. The I&B line must never be driven high by the devices. To signal an interrupt! devices must pull the I&B line low for a minimum of 9>> nanoseconds and then release it. The interrupt is signaled by the rising edge that occurs as a result of the pull1up on the I&B line. The drivers for all devices connected to the I&B line must correctly support the interrupt1sharing services of the virtual programmable interrupt controller device FApic%G. This means that after dispatching an interrupt from Apic%! the drivers must respond to Apic% and correctly indicate whether they actually processed an interrupt for their devices. Apic% will ensure that all devices with pending interrupts have been serviced before returning from the interrupt. I&B sharing support implemented in the device driver for servicing interrupts.
%eterministic Aalues for .nimplemented &egisters

$ny unimplemented registers in the range >>h<3)h must return a deterministic value when they are read. .nimplemented configuration registers must return the ?disabled@ or ?unused@ value Fnot necessarily >G when they are read.
Correct Identifiers for I($ %evices

In the Plug and Play I($ specification! it is re=uired that a Plug and Play card have bothE $n industry1uni=ue Aendor I% Fac=uired by completing the form provided at httpE44www.microsoft.com4hwdev4pnpid.htmG $ company1uni=ue Product I% Fassigned by the manufacturerG
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The specification re=uires that this Product I% be uni=ue among all Plug and Play I($ cards manufactured by that company. This means each product Ffor e0ample! fa0 card! display adapter! sound adapter! and so onG and every model Ffor e0ample! 95.5 fa0! 36.6 fa0! and so onG from the same manufacturer must have different product identifiers. This is a re=uirement because it allows the operating system to isolate and identify these different cards. The user must never have a Plug and Play card that cannot be identified because it cannot be distinguished from other models of cards from the same manufacturer. The use of a uni=ue Product I% does not solve the problems that occur when a user installs two of the same cards in a PC system. In those cases! the user might install a Plug and Play card but will not receive indication that it was installed and the card will not wor . )or this purpose! the Plug and Play I($ specification defines a uni=ue serial1number field that can be added to the Aendor and Product I%s to ma e the card completely uni=ue. $ board1uni=ue number in the serial1number field is re=uired for I($ devices included on a system.
BI'( &eporting or (erial I% for (ystem Board %evices

$ peripheral I($ device implemented on the system board can use a fi0ed (erial I% Fwhich is not uni=ueG if the device is reported through the BI'(. If the system board device participates in the Plug and Play I($ isolation scheme Frather than being reported through the BI'(G! then it must meet the same re=uirements for a uni=ue (erial I% as for an add1on card. "otice that it is possible that an add1on card containing an I($ chip might be added to a PC system that contains the same chip on the system board. In such a case! the add1on device will be found only if it has a different (erial I%.
P"P (uffi0es and Compatible %evice I%s

%evice I%s that use the three1character P"P suffi0 are allowed only in the Compatible %evice I% field and cannot be used as %evice I% or Logical %evice I% fields. The e0ception would be the device to which the P"P1based I% was originally assigned. &esource data describe what resources must be available for each logical device on the card Ffor e0ample! number of available I&B numbers! address ranges of memory! and so onG. &esource data can be stored in the same nonvolatile storage device Fsuch as a serial &'MG that contains the serial identifier. The resource data in the nonvolatile storage device must be se=uentially loaded into the resource data register F>5hG. The content of the nonvolatile storage device must be programmed with the information the system needs to interpret which resources the card re=uires. The
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structure of the data contained in the storage device is variable! depending on what resources are needed. The resource data for a Plug and Play I($ card can be read while the card is in the Config state. This card can enter the Config state either after it has been isolated during the isolation se=uence or whenever it receives a +a e FCard (elect "umber NC("OG software command in which the C(" matches the C(" assigned to the card. 'nly one card at a time can be in the Config state.
'ption &'Ms for Boot %evices

Plug and Play I($ e0pansion cards that contain boot devices re=uire some special considerations to properly boot the system. The system must implement support for Plug and Play I($ boot devices and option &'Ms as described in the Plug and Play BI'( specification. The types of devices re=uired for the boot process include the primary input device Fusually a eyboardG! the primary output device Fusually a display adapter and monitorG! and any IPL devices. $ny Plug and Play I($ e0pansion card that provides a boot function must be active when the system powers up. This gives non1Plug and Play systems the means for using Plug and Play I($ devices during a legacy boot process. In this case! a non1Plug and Play system BI'( will not perform the isolation se=uence but will instead perform a &'M scan to detect the presence of a boot device. $fter the &'M scan detects the presence of an option &'M on the boot device! the system &'M will /ump to the option &'M to initialiHe the device. The Plug and Play option &'M on the card will detect that the system BI'( is not Plug and Play1compatible and will respond accordingly. $lthough an initial set of static resources must be provided during this legacy boot! the Plug and Play I($ card must be capable of changing these resources using the standard Plug and Play I($ isolation and configuration process. $s re=uired in the Plug and Play I($ specification! resource usage of a card is always reflected in the cardJs configuration registers. This information allows +indows to easily determine the default settings of a Plug and Play boot device. The default settings can then be overridden by the operating system with full cooperation of the device driver.
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This chapter presents guidelines for legacy I4' ports and devices! including serial and parallel ports.
Legacy (erial Port

This section defines re=uirements for legacy serial ports. $ 97CC>$ buffered .niversal $synchronous &eceiver4Transmitter F.$&TG or e=uivalent buffered legacy serial port is the standard implementation. )or acceptable performance under +indows! the device must be able to support 99C.3* baud. $ legacy serial port must provide fle0ible resource configuration and complete dynamic disable capabilities as defined in the P(ug and P(a" /0terna( C.' Device Specification, Version 1.0. These are the recommended resource settings for legacy serial devicesE )our I4' locations for each port! where the standard I($ I4' addresses are 2)6h! 3)6h! 2#6h! 3#6h. .sing the standard addresses ensures the proper functioning of software that directly addresses these locations. Two I&B signals! where the standard is programmable interrupt controller1 based FPIC1basedG I&B 2 and I&B 5. .sing the standard I&B signals ensures the proper functioning of software written for systems that use standard I&B signals.
Two I&Bs are re=uired for each port. If two serial ports are implemented in the system! the I&Bs can be assigned as followsE )or serial port $E PIC1based I&B 5 and I&B 99 )or serial port BE PIC1based I&B 2 and I&B 9>
$n infrared FI&G adapter port might replace a serial port in a system. In such a case! the I& port should use the resource configuration that would otherwise be assigned to the second serial port. "otice that I&B sharing can be implemented under +indows if the minimum resource re=uirement cannot be met. Important3 Conflict resolution for legacy serial port must ensure the availability of at least one serial port. In the event of an irreconcilable conflict with other serial ports on the system! a legacy serial port must be capable of being disabled by Plug and Play software. This allows at least one of the two conflicting serial ports to operate correctly.
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Legacy Parallel Port

This section presents guidelines for legacy parallel ports. $ legacy parallel port must provide fle0ible resource configuration following the P(ug and P(a" Para((e( Port Device Specification, Version 1.0%. &esource re=uirements must be met for each device of this type on the system. The re=uirements cannot be split between two ports on the system. )or legacy parallel devices! the following are the minimum resource re=uirements for each parallel port on the systemE &e=uiredE (upport I($ I4' addresses of 2;6h and 3;6h! plus 2BC or a vendor1assigned I4' address. .sing these standard I4' addresses ensures proper functioning of software written for operating systems that directly address these locations. &ecommendedE Map the base I4' address to four additional locations. &e=uiredE (upport PIC1based I&B C and I&B ;. .sing these standard I&Bs ensures proper functioning of software written for operating systems that use standard I&B signals. &ecommendedE (upport five additional I&B signals. &e=uiredE (upport two uni=ue %M$ channel selections if the parallel port design supports bloc data transfers to memory using %M$ controllers. "otice also that the %M$ function will not wor on a parallel port without an I&B because the end of a %M$ transfer is signaled by an interrupt.
To ensure Plug and Play support for resolution of resource conflicts! a full list of options for all possible configuration combinations must be enumerated! includingE 'ptions for both e0tended capabilities port F#CPG mode! which re=uires an I4' address! an I&B! and a %M$ selection! and standard LPT mode! which re=uires only an I4' address. 'ptions that specify only the I4' address! allowing +indows to assign the I&B and %M$ channel.
'n Intel $rchitecture systems! the operating system considers the parallel port base address F4G stored in the first BI'( %ata $rea FB%$G locations to be LPT9. The address stored in the second location is LPT3! and so on. 'n &I(C1based systems! the information is in the $&C tree. 'n all $CPI1based systems! the information is obtained through the $CPI tree.
#PP (upport and &estricted I4' addresses

(ome enhanced parallel port F#PPG implementations re=uire eight contiguous I4' ports. If #PP support is implemented! the hardware cannot use the I($
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I4' address 2BCh as a base I4' address because AG$ devices re=uire use of port 2C>h.
Compatibility! "ibble Mode! and #CP Protocols

(upport for a parallel port must include! at a minimum! the compatibility1mode and nibble1mode protocols re=uired by the I### 936519::5 specification. This allows other I### 93651compliant devices to be connected without problems. The port must also support the #CP protocol as defined by I### 9365 to allow connections with higher1speed parallel peripherals. &ecommendedE #nable #CP by default.
I### 9365 Port Connector (pecifications

I### 93651I<compliant ports use a standard %B3C connector found on e0isting system parallel port designs. This is called an I### 93651$ connector in the specification. I### 93651II<compliant ports use an I### 93651C connector. This connector is used on both the port and the peripheral device. The parallel port design must provide enough space between the connectors and the surrounding enclosure to allow for a mating connector! connector shell! and latch assembly. The I### 9365 specification recommends an I### 93651C connector for all new ports and devices.
Plug and Play %evice I%s for I### 9365 Peripherals

The device I% is described fully in the I### 9365 specification. $ll characters in the device identification string must consist only of $(CII values 3>h<;)h. The device identification string consists of a leading Hero F>G! a he0adecimal value that represents the length of the string! and then a set of fields in $(CII that have a uni=ue identification string. In addition to the re=uirements specified in P(ug and P(a" Para((e( Port Device Specification, Version 1.0%, the device I% string must contain the following eys! at minimum. The eys are case1sensitive and can be abbreviated in I") files as indicated.
7ey M$".)$CT.&#& M'%#L CL$(( %#(C&IPTI'" A88re)iated string M)G M%L CL( %#(
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$ll M$".)$CT.&#& and M'%#L ey values must remain uni=ue for each manufacturer. $ll M$".)$CT.&#&! M'%#L! CL$((! and %#(C&IPTI'" ey values must remain static for a specific unit! where I% values do not change for different hardware configurations. )or e0ample! a user simply adding a memory module to a printer should not change the M'%#L ey value reported as part of the device I%. -owever! if the user adds memory by installing an upgrade it that re=uires a different driver or re=uires the e0isting driver to behave differently! then changing the M'%#L value is acceptable as part of the upgrade installation process. The CL$(( ey describes the type of parallel device. The CL$(( ey can contain the values P&I"T#&! M'%#M! "#T! -%C! PCMCI$! M#%I$! )%C! P'&T(! (C$""#&! or %IGC$M. -%C refers to hard dis controller. M#%I$ refers to any multimedia device. )%C refers to floppy dis controller. The %#(C&IPTI'" ey is an $(CII string of up to 936 characters that contains a description of the device the manufacturer wants to have presented if a device driver is not found for the peripheral. )or information about how the system determines the correct peripheral device driver! see the +indows :C %%* and +indows 3>>> %%*.
Compatible I% *ey for Parallel %evice I%

The CI% ey in the device identification string can provide a value that e0actly matches a peripheral name supported by a device driver shipped with +indows. The value must match a value listed in the deviceJs I") file.
Legacy Mouse Port and %evices

The following re=uirements must be met to ensure that all Plug and Play re=uirements are met and that built1in Microsoft1supplied drivers support the pointing device. If a P(431style port is used! the following re=uirements must be metE Comply in full with re=uirements in Persona( S"ste#)* Specification, by IBM. .se an 6>53 chip For e=uivalentG to ensure compatibility with +indows. In most cases! the e0isting 6>53 eyboard port is sufficientI the chip initiates a PIC1 based I&B 93 interrupt when the pointing device is connected. (upport PCI1based I&B 93 to ensure the proper functioning of software written for legacy systems that use this I&B signal. &eturn e0pected codes! including send I% F>)3hG and response ac nowledgement F$C*G F>)$hG! plus 91byte I%.
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Legacy *eyboard Port and %evices

If a P(431style eyboard port is used! it must meet the following re=uirements! which ensure that all Plug and Play re=uirements are met and that built1in Microsoft1supplied drivers support this device. (upport I&B 9 on Intel $rchitecture to ensure the proper functioning of software written for legacy systems! which e0pect to use this I&B signal. Map the I4' address ports to 7>h and 75h. &eturn e0pected scan codes! including send I% F>)3hG and response $C* F>)$hG! plus 31byte I%.
Legacy )%C
The following resource re=uirements must be met for each legacy )%C device on the systemE .se static I4' addresses 2)3h! 2)5h! and 2)Ch. $dditional addresses can be provided in the event of conflict .se I&B 7 .se %M$ Channel 3 if )%C supports bloc data transfers to memory using %M$ controllers
These resources cannot be shared among devices of the same type. The )%C must be capable of being configured! relocated! and disabled. )or e0ample! if the legacy )%C is located on the system board and an adapter that includes an )%C is added to the system! the system1board )%C must be capable of being disabled to prevent conflicts with the new adapter. If the legacy )%C is located on an e0pansion card! the e0pansion card must allow independent dynamic disabling of the )%C and the hard dis controller. In this case! the adapter will continue to function if the )%C is disabled because of conflicts.
//
I&B! %M$! and I4' Port $ddresses
$ P P # " % I ,
This appendi0 lists resource assignments for I&B! %M$! and I4' port addresses used by built1in devices on legacy system boards.
)i0ed Interrupts
The following I&Bs are used by I($ and system devices and are considered to be fi0ed assignments.
9i!ed Interrupts :ard4are I"# I&B > I&B 9 I&B 3 I&B 2 I&B 5 I&B C I&B 7 I&B ; I&B 6 I&B : I&B 9> I&B 99 I&B 93 I&B 92 I&B 95 I&B 9C %e*ault assignment (ystem timer *eyboard (econd programmable interrupt controller FPICG cascade C'M 3 C'M 9 (ometimes LPT 3Lnot considered fi0ed (tandard floppy dis controller F)%CG LPT 9 &eal1time cloc 4CM'( L (ometimes C'M 5Lnot considered fi0ed (ometimes C'M 2Lnot considered fi0ed P(431style mouse Coprocessor Primary Integrated %evice #lectronics FI%#G controller (econdary I%# controller
Legacy %M$ $ssignments
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The following table lists %M$ channel assignments that are used by legacy devices and are therefore considered fi0ed.
Legacy %&A Considered 9i!ed :ard4are %&A %M$ > %M$ 9 %M$ 3 %M$ 2 %M$ 5 %M$ C %M$ 7 %M$ ; System *unction ;de*ault< I($ e0pansion L )%C #0tended capabilities port F#CPG parallel port on LPT 9 %M$ controller cascading L L L
Legacy I4' $ddress $ssignments

The following table lists I4' addresses that are used by legacy devices and are therefore considered fi0ed.
Legacy System I'( I'( Address >>>><>>>) >>9><>>96 >>>9) >>3><>>39 >>5><>>52! >>56<>>5B >>C><>>C3 >>7> >>79 >>75 >>;><>>;9 >>69<>>6B >>:><>>:9 >>:3 >>:2<>>:) %e*ault system *unction (lave %M$ (ystem (ystem Master 63C: Programmable interrupt timer FPITG P9! PIT P3 (ystem *eyboard4mouse controller (ystem control port B *eyboard4mouse status "onmas able Interrupt F"MIG enable4real1time cloc %M$ page registers (ystem (ystem control port $ (ystem 1Continued2
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Legacy System I'( 1continued2 I'( Address >>$><>>$9 >>C><>>%# >>)><>>)9 >9;><>9;; >9)><>9); >3>9 >33><>33) >3;6<>3;$ >3#6<>3#) >3)6<>3)) >22><>229 >2;7 >2;6<>2;$ >266<>26B >2B><>2BB >2BC<>2B# >2C><>2%) >2#><>2#; >2#6<>2#) >2)><>2); >2)6<>2)) >C25<>C2; >C)6<>C)B %e*ault system *unction (lave interrupt controller Master %M$ controller Coprocessor busy clear4reset (econdary I%# controller Primary I%# controller Qoystic interface (ound Blaster LPT 3 F,T parallel port 2G $lternate C'M F5G C'M 3 MP.15>9 I%# Controller LPT 9 F,T parallel port 3G )re=uency modulation F)MG synthesis M%$! #G$4video graphics array FAG$G LPT 2 F,T parallel port 9G #G$4AG$ PCIC PCMCI$ controllers $lternate C'M F2G )%C L e0cluding >2)7 C'M 9 +indows (ound (ystem1compatible Peripheral Component Interconnect FPCIG ports
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%evice Identifiers
$ P P # " % I ,
This appendi0 lists CI%s for Plug and Play vendor I%s and device I%s. 6ote3 )or non1BI'( enumerated I($ devices! new vendor I%s must be registered by completing the form provided at httpE44www.microsoft.com4hwdev4pnpid.htm or by sending mail to ihvRmicrosoft.com with ? P6PI%@ in the sub/ect line.
Plug and Play Aendor and %evice I%s

$ll non1BI'( enumerated devices must not use ?P"P@ in their vendor and device codes. Instead! the vendor must register a three1character vendor code. The P"P vendor code is reserved for Microsoft and can be used only when defining a deviceJs CI% after indicating the deviceJs -ardware I% in the Plug and Play header. .se of CI%s is strongly recommended for devices that use inbo0 device drivers! such as a ?(tandard PC C'M Port@ FP"P>C>>G. The following e0ample output of a Plug and Play header is provided as a reference for the Microsoft +indows operating system.
Vendor ID: XXXFFFF Serial Number: 00000001 Checksum (reported): 0x5 !N! Version: 1"0 Vendor Ver": 10 De#ice Description: ID !ort De#ice ID: XXX0001 Doesn$t Support I%& 'an(e Checkin( Vendor De)ined *o(ical De#ice Control 'e(isters: None Compatible De#ice ID: PNP0600 De#ice Description: ID Dependent +unction 0 Dependent +unction 1 nd o) Dependent +unctions
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+hen the user is installing devices that use this method! a dialog bo0 appears at the beginning of the enumeration se=uence to suggest use of the +indows :C4:6 default driver. +indows :C4:6 also provides the option of using a manufacturer1supplied dis in case the user wants to choose a manufacturer1supplied driver. )or multifunction adapters! you should supply an I") file that chooses the appropriate drivers! including default drivers! for all the adapterJs devices. This prevents additional dialog bo0es from repeatedly re=uesting the default driver or a manufacturerJs dis for the remaining devices on the adapter. +hen an I") file is used in this manner for default driver selection! it must lin the -ardware I% F,,,>>>>G to the appropriate compatible device driver from the +indows :C4:6 distribution C% or installation dis s. If this is not done! +indows :C4:6 will continue to =uery the user for either the default driver or a new driver! thus defeating the purpose of using the I") file in this way.
Generic +indows %evice I%s

Many devices! such as the interrupt controller or the eyboard controller! have no standard #0tended Industry (tandard $rchitecture F#I($G I%. $lso! a set of compatible devices! such as video graphics array FAG$G and (uper AG$ F(AG$G! are not actually devices but define a compatibility hardware subset. Set another set of I%s needs to be used to identify buses. Microsoft has reserved an #I($ prefi0 FP"PG to identify various devices that do not have e0isting #I($ I%s. Microsoft also uses P"P to define compatibility devices. The I%s are defined in the following tables.
%e)ice I% "anges I% range P"P>000 P"P6000 P"P$000 P"PB000 P"PC000<%000 Category (ystem devices "ettwor adapters (mall computer system interface F(C(IG! proprietary C% adapters (ound! video capture! multimedia Modems
The following obsolete device I% is provided only for compatibility with earlier device I% lists.
%e)ice I% P"P>6>3 %escription Microsoft +indows (ound (ystem1compatible device FobsoleteI use P"PB>00 insteadG
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Interrupt Controllers
%e)ice I% P"P>>>> P"P>>>9 P"P>>>3 P"P>>>2 P"P>>>5 %escription $T interrupt controller #I($ interrupt controller MC$ interrupt controller $dvanced Protocol Interrupt Controller F$PICG Cyri0 (LiC MP interrupt controller
Timers
%e)ice I% P"P>9>> P"P>9>9 P"P>9>3 %escription $T timer #I($ timer MC$ timer
%M$
%e)ice I% P"P>3>> P"P>3>9 P"P>3>3 %escription $T direct memory access F%M$G controller #I($ %M$ controller MC$ %M$ controller
*eyboards
%e)ice I% P"P>2>> P"P>2>9 P"P>2>3 P"P>2>2 P"P>2>5 P"P>2>C P"P>2>7 P"P>2>; P"P>2>6 %escription IBM PC4,T eyboard controller F621 eyG IBM PC4$T eyboard controller F671 eyG IBM PC4,T eyboard controller F651 eyG IBM #nhanced F9>949>31 ey! P(43 mouse supportG 'livetti eyboard F621 eyG 'livetti eyboard F9>31 eyG 'livetti eyboard F671 eyG Microsoft +indows eyboard General Input %evice #mulation Interface FGI%#IG legacy Continued
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7ey8oards 1continued2 %e)ice I% P"P>2>: P"P>2>$ P"P>2>B P"P>23> P"P>239 P"P>233 P"P>232 P"P>235 P"P>23C P"P>237 P"P>23; P"P>25> P"P>259 P"P>253 P"P>252 P"P>252 P"P>255 %escription 'livetti eyboard F$9>949>31 eyG $TTT 2>3 eyboard &eserved by Microsoft Qapanese eyboard $>9 F9>71 eyG Qapanese eyboard F9>91 eyG Qapanese $, eyboard Qapanese eyboard >>34>>2 F9>71 eyG Qapanese eyboard >>9 F9>71 eyG Qapanese Toshiba des top eyboard Qapanese Toshiba laptop eyboard Qapanese Toshiba noteboo *orean eyboard F651 eyG *orean eyboard F671 eyG *orean enhanced eyboard *orean enhanced eyboard 9>9b *orean enhanced eyboard 9>9c *orean enhanced eyboard 9>2 eyboard
Parallel %evices
%e)ice I% P"P>5>> P"P>5>9 %escription (tandard LPT port #0tended capabilities port F#CPG printer port
(erial %evices
%e)ice I% P"P>C>> P"P>C>9 P"P>C>3 P"P>C9> P"P>C99 %escription (tandard PC C'M port 97CC>$1compatible C'M port Multiport serial device Fnon1intelligent 97CC>G Generic Ir%$1compatible device Generic Ir%$1compatible device
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%is Controllers
%e)ice I% P"P>7>> P"P>7>9 P"P>7>3 P"P>7>2 P"P>;>> P"P>;>9 %escription Generic #(%I4I%#4$T$1compatible hard dis controller Plus -ardcard II Plus -ardcard II,L4#U Generic Integrated %evice #lectronics FI%#G supporting %evice Bay specifications PC standard floppy dis controller F)%CG (tandard )%C supporting %evice Bay specification
%isplay $dapters
%e)ice I% P"P>:>> P"P>:>9 P"P>:>3 P"P>:>2 P"P>:>5 P"P>:>C P"P>:>7 P"P>:>; P"P>:>6 P"P>:>: P"P>:>$ P"P>:>B P"P>:>C P"P>:>% P"P>:># P"P>:>) P"P>:9> P"P>:99 P"P>:93 P"P>:92 P"P>:95 %escription AG$ compatible Aideo (even A&$M4A&$M II49>35i 6C954$ compatible Trident AG$ Cirrus Logic laptop AG$ Cirrus Logic AG$ Tseng #T5>>> +estern %igital AG$ +estern %igital laptop AG$ (2 Inc. :994:35 $TI .ltra Pro4Plus FMach 23G $TI .ltra FMach 6G ,G$ compatible $TI AG$ +onder +eite P:>>> graphics adapter 'a Technology AG$ Compa= BAision ,G$43 Tseng Labs +234+23i4+23p (2 Inc. 6>94:364:75 Cirrus Logic C53:4C525 Fmemory1mappedG Continued
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%isplay Adapters 1continued2 %e)ice I% P"P>:9C P"P>:97 P"P>:9; P"P>:96 P"P>:9: P"P>:9$ P"P>:2> P"P>:29 P"P>:5> P"P>:59 P"P>:)) %escription Compa= $dvanced AG$ F$AG$G $TI .ltra Pro Turbo FMach 75G &eserved by Microsoft Matro0 MG$ Compa= BAision 3>>> Tseng +936 Chips T Technologies (AG$ Chips T Technologies $ccelerator "C& ;;c33e (AG$ "C& ;;c23blt Plug and Play monitors FA#($ display data channel N%%COG
Peripheral Buses
%e)ice I% P"P>$>> P"P>$>9 P"P>$>3 P"P>$>2 P"P>$>5 P"P>$>C P"P>$>7 %escription I($ bus #I($ bus MC$ bus Peripheral Component Interconnect FPCIG bus A#($4AL1bus Generic $dvanced Configuration and Power Interface F$CPIG bus Generic $CPI #0tended I4' F#I'G bus
&eal1Time Cloc ! BI'(! and (ystem Board %evices

%e)ice I% P"P>6>> P"P>B>> P"P>C>> P"P>C>9 P"P>C>3 P"P>C>2 %escription $T1style spea er sound $T real1time cloc Plug and Play BI'( Fonly created by the &''T enumeratorG (ystem board General I% for reserving resources re=uired by Plug and Play system board registers Fnot specific to a particular deviceG Plug and Play BI'( event notification interrupt Continued
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"eal15ime Cloc=$ BI(S$ and System Board %e)ices 1continued2 %e)ice I% P"P>C>5 P"P>C>C P"P>C>7 P"P>C>; P"P>C>6 P"P>C>: P"P>C>$ P"P>C>B P"P>C>C P"P>C>% P"P>C># P"P>C>) P"P>C9> P"P>C99 P"P>C93 P"P>C92 %escription Math co1processor $dvanced Power Management F$PMG BI'( Fversion1independentG &eserved for identification of early Plug and Play BI'( implementation &eserved for identification of early Plug and Play BI'( implementation $CPI system board hardware $CPI embedded controller $CPI control method battery $CPI fan $CPI power1button device $CPI lid device $CPI sleep1button device PCI interrupt lin device $CPI system indicator device $CPI thermal Hone %evice Bay Controller F%BCG Plug and Play BI'( Fused when $CPI mode cannot be usedG
PCMCI$ Controller Chip (ets

%e)ice I% P"P>#>> P"P>#>9 P"P>#>3 P"P>#>2 %escription Intel 6327C1compatible PCMCI$ controller Cirrus Logic CL1P%7;3> PCMCI$ controller AL(I AL63C957 PCMCI$ controller Intel 6327C1compatible CardBus controller
Mouse
%e)ice I% P"P>)>> P"P>)>9 P"P>)>3 P"P>)>2 P"P>)>5 %escription Microsoft bus mouse Microsoft serial mouse Microsoft InPort mouse Microsoft P(431style mouse Mouse (ystems mouse Continued
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&ouse 1continued2 %e)ice I% P"P>)>C P"P>)>7 P"P>)>; P"P>)>6 P"P>)>: P"P>)>$ P"P>)>B P"P>)>C P"P>)>% P"P>)># P"P>)>) P"P>)9> P"P>)99 P"P>)93 P"P>)92 9 P"P>)95 P"P>)9C P"P>)97 P"P>)9; P"P>)96 P"P>)9: P"P>)9$ P"P>)9B P"P>)9C P"P>)9% P"P>)9# P"P>)9) P"P>)3> P"P>)39 P"P>)33 P"P>)32 P"P>)))
9
%escription Mouse (ystems 21button mouse FC'M3G Genius mouse FC'M9G Genius mouse FC'M3G Logitech serial mouse Microsoft BallPoint serial mouse Microsoft Plug and Play mouse Microsoft Plug and Play BallPoint mouse Microsoft1compatible serial mouse Microsoft InPort1compatible mouse Microsoft1compatible P(431style mouse Microsoft (erial BallPoint1compatible mouse Te0as Instruments Buic Port mouse Microsoft1compatible bus mouse Logitech P(431style mouse P(43 port for P(431style mouse Microsoft *ids mouse Logitech bus mouse Logitech (+I)T device Logitech1compatible serial mouse Logitech1compatible bus mouse Logitech1compatible P(431style mouse Logitech1compatible (+I)T device -P 'mniboo mouse Compa= LT# Trac ball P(431style mouse Compa= LT# Trac ball serial mouse Microsoft *ids Trac ball mouse &eserved by Microsoft Input %evice Group &eserved by Microsoft Input %evice Group &eserved by Microsoft Input %evice Group &eserved by Microsoft Input %evice Group &eserved by Microsoft Input %evice Group &eserved by Microsoft (ystems
The system BI'( should report the P(43 port! not which type of mouse is connected to that port.
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"etwor $dapters
%e)ice I% P"P6>>9 P"P6>>5 P"P6>>7 P"P6>>6 P"P6>7C P"P6>;3 P"P6>;2 P"P6>;6 P"P6>;5 P"P6>C: P"P6>C$ P"P6>CB P"P6>CC P"P6>%2 P"P6>%5 P"P6>%C P"P6>%7 P"P6>%; P"P6>%6 P"P6>%% P"P6>%# P"P6>%) P"P6>#> P"P6>#9 P"P6>#3 P"P6>#C P"P6>#; P"P6>#6 P"P6>#: %escription "ovell4$nthem "#23>> Compa= "#23>> Intel #ther#0press423 -P #thertwist #I($ L$" $dapter423 F-P3;356$G .ngermann1Bass "I.ps or "I.ps4#'TP %#C F%#399G #therwor s MC4TP %#C F%#393G #therwor s MC4TPMB"C %C$ 9>1MB MC$ -P MC L$" $dapter497 TP FPC3;357G IBM To en &ing IBM To en &ing II IBM To en &ing II4(hort IBM To en &ing 54971MB "ovell4$nthem "#9>>> "ovell4$nthem "#3>>> "#9>>> compatible "#3>>> compatible "ovell4$nthem "#9C>>T "ovell4$nthem "#39>> (MC $&C"#TPC (MC $&C"#T PC9>>! PC3>> (MC $&C"#T PC99>! PC39>! PC3C> (MC $&C"#T PC92>4# (MC $&C"#T PC93>! PC33>! PC37> (MC $&C"#T PC3;>4# (MC $&C"#T PC7>>+! PC7C>+ %#C %#PC$ %#C F%#9>>G #ther+or s LC %#C F%#3>>G #ther+or s Turbo Continued
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"etwor $dapters (continued)

%e)ice I% P"P6>#$ P"P6>#B P"P6>#C P"P6>#% P"P6>## P"P6>#) P"P6>)9 P"P6>)2 P"P6>)5 P"P6>)7 P"P6>); P"P6>)6 P"P6>)B P"P6>)C P"P6>)% P"P6>)# P"P6>)) P"P69>> P"P69>C P"P69>7 P"P69>; P"P6992 P"P699C P"P693> P"P6932 P"P6935 P"P693C P"P6937 P"P693; %escription %#C F%#9>9G #ther+or s LC4TP %#C F%#3>9G #ther+or s Turbo4TP %#C F%#3>3G #ther+or s Turbo4TPMB"C %#C F%#9>3G #ther+or s LC4TPMB"C %#C ##9>9 Fbuilt1inG %#Cpc 522 +( Fbuilt1inG 2Com #therLin Plus 2Com #therLin II or IITP F61bit or 971bitG 2Com To enLin 2Com #therLin 97 2Com #therLin III 2Com generic #therLin Plug and Play device Thomas1Conrad TC7>5C Thomas1Conrad TC7>53 Thomas1Conrad TC7953 Thomas1Conrad TC795C Thomas1Conrad TC7353 Thomas1Conrad TC735C %C$ 9>1MB %C$ 9>1MB )iber 'ptic %C$ 9>1MB Twisted Pair &acal "I7C9> .ngermann1Bass "I.pc .ngermann1Bass "I.pc4#'TP (MC (tarCard PL.( F+%46>>2(G (MC (tarCard PL.( with on1board hub F+%46>>2(-G (MC #therCard PL.( F+%46>>2#G (MC #therCard PL.( with boot &'M soc et F+%46>>2#BTG (MC #therCard PL.( with boot &'M soc et F+%46>>2#BG Continued
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6et4or= Adapters 1continued2 %e)ice I% P"P6936 P"P693$ P"P693% P"P693) P"P692> P"P6923 P"P692; P"P6926 P"P6959 P"P6953 P"P695B P"P69CC P"P69C7 P"P69C; P"P69C6 P"P69C: P"P69C) P"P697> P"P697$ P"P697% P"P69:9 P"P69C2 P"P69C5 P"P69CC P"P69C7 P"P69C; P"P69C6 P"P69#5 P"P69#7 P"P69#; P"P69#B P"P69#C %escription (MC #therCard PL.( TP F+%46>>2+TG (MC #therCard PL.( 97 with boot &'M soc et F+%46>92#BTG Intel #ther#0press 97 or 97TP Intel To en#0press 9745 Intel To en#0press MC$ 9745 Intel #ther#0press 97 FMC$G $rtisoft $#19 $rtisoft $#13 or $#12 $mplicard $C 39>4,T $mplicard $C 39>4$T #vere0 (peedLin 4PC97 F#A3>3;G -P PC L$" $dapter46 TP F-P3;35CG -P PC L$" $dapter497 TP F-P3;35;$G -P PC L$" $dapter46 TL F-P3;3C>G -P PC L$" $dapter497 TP Plus F-P3;35;BG -P PC L$" $dapter497 TL Plus F-P3;3C3G "ational (emiconductor #thernode V97$T "ational (emiconductor $T4L$"TIC #thernode 971$T2 "C& To en1&ing 51MB I($ "C& To en1&ing 97451MB I($ 'licom 9745 To en &ing $dapter (MC #therCard PL.( #lite F+%46>>2#PG (MC #therCard PL.( 9>T F+%46>>2+G (MC #therCard PL.( #lite 97 F+%46>92#PG (MC #therCard PL.( #lite 97T F+%46>92+G (MC #therCard PL.( #lite 97 Combo F+%46>92#+ or 6>92#+CG (MC #ther#lite .ltra 97 Pure %ata P%I:>3C123 FTo en &ingG Pure %ata P%IC>6W F$rc"etG Pure %ata P%IC97W F$rc"etG Proteon To en &ing FP92:>G Proteon To en &ing FP92:3G Continued
Chapter !
Welcome
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6et4or= Adapters (continued) %e)ice I% P"P69#% P"P69## P"P69#) P"P69)> P"P69)) P"P63>> P"P63>: P"P63>$ P"P6392 P"P6395 P"P639% P"P633; P"P6336 P"P6329 P"P6372 P"P63;; P"P636$ P"P636B P"P636C P"P636% P"P63:5 P"P63B% P"P63C3 P"P63C2 P"P6239 P"P6232 P"P6235 P"P6237 P"P623; P"P626C P"P626; P"P6266 P"P626: P"P62:> %escription Proteon I($ To en &ing F925>G Proteon I($ To en &ing F9253G Proteon I($ To en &ing F9257G Proteon I($ To en &ing F925;G Cabletron #3>>> (eries %"I Cabletron #39>> (eries %"I Uenith %ata (ystems U1"ote Uenith %ata (ystems "#3>>>1compatible ,ircom Poc et #thernet II ,ircom Poc et #thernet I &adi(ys #,M19> (MC 2>>> (eries (MC :9C3 controller $dvanced Micro %evices $M39>>4$M9C>>T Tulip "CC197 #0os 9>C Intel C:C1based #thernet TI3>>>1style To en &ing $M% PC"et )amily cards $M% PC"et23 FAL1bus versionG Ir%$ Infrared "%I( driver FMicrosoft1suppliedG IBM PCMCI$1"IC ,ircom C#9> ,ircom C#M3 %#C #thernet Fall typesG (MC #therCard Fall types e0cept 6>924$G $&C"#T1compatible Thomas Conrad Fall $&C"#T typesG IBM To en &ing Fall typesG &emote networ access F&"$G driver &"$ point1to1point protocol FPPPG driver &eserved for Microsoft networ ing components Peer IrL$" I& driver FMicrosoft1suppliedG Generic networ adapter
Chapter !
Welcome
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SCSI and Proprietary C%1"(& Adapters %e)ice I% P"P$>>3 P"P$>>2 P"P$>9B P"P$>9% P"P$>9# P"P$>9) P"P$>3> P"P$>33 P"P$>3B P"P$>3% P"P$>3) P"P$>2> P"P$>29 P"P$>23 %escription )uture %omain 971;>><compatible controller Panasonic proprietary C%1&'M adapter F(BPro4(B97G Trantor 936 (C(I controller Trantor T97> (C(I controller Trantor T226 Parallel (C(I controller Trantor T256 Parallel (C(I controller Trantor Media Aision (C(I controller $lways I"13>>> (C(I controller (ony proprietary C%1&'M controller Trantor T92b 61bit (C(I controller Trantor T2C6 Parallel (C(I controller Mitsumi L.1>>C (ingle (peed C%1&'M controller W drive Mitsumi ),1>>9 (ingle (peed C%1&'M controller W drive Mitsumi ),1>>9 %ouble (peed C%1&'M controller W drive
(ound! Aideo Capture! and Multimedia

%e)ice I% P"PB>>> P"PB>>9 P"PB>>3 P"PB>>2 P"PB>>5 P"PB>>C P"PB>>7 P"PB>>; P"PB>>6 P"PB>>: P"PB>>$ P"PB>>B %escription (ound Blaster 9.C sound device (ound Blaster 3.> sound device (ound Blaster Pro sound device (ound Blaster 97 sound device Thunderboard1compatible sound device $dlib1compatible fre=uency modulation F)MG synthesiHer device MP.5>9 compatible Microsoft +indows (ound (ystem1compatible sound device Compa= Business $udio Plug and Play Microsoft +indows (ound (ystem device MediaAision Pro $udio (pectrum FTrantor (C(I1enabled! Thunder Chip1disabledG MediaAision Pro $udio 21% Continued
Chapter !
Welcome
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Sound$ >ideo Capture$ and &ultimedia 1continued2 %e)ice I% P"PB>>C P"PB>>% P"PB>># P"PB>>) P"PB>9> P"PB>96 P"PB>9: P"PB>3> P"PB>3) %escription MusicBuest MB,123M MediaAision Pro $udio (pectrum Basic Fno Trantor (C(I! Thunder Chip1enabledG MediaAision Pro $udio (pectrum FTrantor (C(I1enabled! Thunder Chip1enabledG MediaAision QaHH197 chip set F'#M versionsG $uravision A0PC>> chip set<'rchid Aideola MediaAision Pro $udio (pectrum 61bit MediaAision Pro $udio (pectrum Basic Fno Trantor (C(I! Thunder chip1disabledG Samaha 'PL21compatible )M synthesiHer device Qoystic 4gameport
Modems
%e)ice I% P"PC>>> P"PC>>9 %escription Compa= 955>> modem FTB%G Compa= 35>>4:7>> modem FTB%G
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Glossary
(ee also the -ardware Glossary available on httpE44www.microsoft.com4hwdev4glossary.htm.
2PP enhanced parallel port 2SC% #0tended (ystem Configuration %ata 9C% floppy dis controller 9I9( first in4first out +B gigabyte :CL -ardware Compatibility List :C5 -ardware Compatibility Tests I%2 Integrated %evice #lectronics I222 Institute of #lectrical and #lectronics #ngineers I:> independent hardware vendor I'( input4output I(C5L I4' control IPL initial program load I"P I4' re=uest pac et I"# interrupt re=uest ISA Industry (tandard $rchitecture LA6 local area networ LBA logical bloc addressing L2% light1emitting diode LP5 line printer L?6 logical unit number &B megabyte &S%6 Microsoft %eveloper "etwor 6&I "onmas able Interrupt (2& original e=uipment manufacturer PCI Peripheral Component Interconnect PI( programmed I4'
Acronyms and A00re)iations

ACPI $dvanced Configuration and Power Interface A6SI $merican "ational (tandards Institute API application programming interface APIC $dvanced Programmable Interrupt Controller A"C $dvanced &I(C Computing ASCII $merican (tandard Code for Information Interchange A5 IBM registered trademar for PC4$T A5A $T $ttachment A5API $T$ Pac et Interface B%A BI'( %ata $rea BI(S basic I4' system CI% Compatible I% C&(S complementary metal1o0ide semiconductor C(& 9. Component 'b/ect ModelI 3. legacy serial port. %%7 driver development it %LL dynamic lin library %&A direct memory access 2CP e0tended capabilities port 2I%2 #nhanced Integrated %evice #lectronics 2ISA e0tended I($
Plug and Play and Legacy !e ice "upport 1997-199# Intel Corporation and Microsoft Corporation. All rights reser ed.
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P(S5 power1on self1test PS'2 Personal (ystem43 "A& random access memory "ISC reduced instruction set computing "(& read1only memory rt real time SCSI small computer system interface S%7 software developers it S99 (mall )orm )actor SI+ (pecial Interest Group S>+A (uper AG$ ?A"5 .niversal $synchronous &eceiver4Transmitter ?PS uninterruptible power supply >+A video graphics array W:#L +indows -ardware Buality Laboratory
API $pplication programming interface. $ set of routines that an applications program uses to re=uest and carry out lower1level services performed by a computer operating system. architecture $ general term referring to the structure of all or part of a computer system. $lso covers the design of system software! such as the operating system! as well as referring to the combination of hardware and basic software that lin s machines on a computer networ . A5A $T $ttachment. $n integrated bus usually used between host processors and dis drives. .sed interchangeably with I%#. A5API $T$ Pac et Interface. $ hardware and software specification that documents the interface between a host computer and C%1&'M drives using the $T$ bus.
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8and4idth .sually used in reference to the amount of data per unit of time that must move from one point to another! such as from C%1&'M to processor. BI(S Basic I4' system. $ set of routines that wor s closely with the hardware to support the transfer of information between elements of the system! such as memory! dis s! and the monitor. $lthough critical to performance! the BI'( is usually invisible to the end userI however! programmers can access it. 8us enumerator In a Plug and Play system! a bus device driver that detects devices located on a specific bus and loads information about devices into the hardware tree.
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ACPI $dvanced Configuration and Power Inter1 face. $ specification that defines a new interface to the system board that enables the operating system to implement operating system<directed power management and system configuration. )ollowing the $CPI allows system manufacturers to build systems consistent with the 'n"ow design initiative for instantly available PCs. ACPI hard4are Computer hardware with the features necessary to support operating system power management and with the interfaces to those features described using the %escription Tables as specified in Advanced Configuration and Power Interface Specification . add1on de)ices %evices that are traditionally added to the base system to increase functionality! such as audio! networ ing! graphics! (C(I con1 troller! and so on. $dd1on devices fall into two categoriesE devices built onto the system board and devices on e0pansion cards added to the system through a system board connector such as PCI.
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class )or hardware! the manner in which devices and buses are grouped for purposes of installing and managing device drivers and allocating resources. class dri)er $ driver that provides system1 re=uired! hardware1independent support for a given class of physical devices. (uch a driver communicates with a corresponding hardware1 dependent port driver! using a set of system1defined device control re=uests! possibly with additional driver1defined device control re=uests. .nder +%M! the class driver is responsible for multiprocessor and interrupt synchroniHation.
Plug and Play and Legacy !e ice "upport 1997-1999 Intel Corporation and Microsoft Corporation. All rights reser ed.
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C(& 9. Component 'b/ect ModelI the core of 'L#. %efines how 'L# ob/ects and their clients interact within processes or across process boundaries. 3. Legacy serial port. CP? Central processing unit. $ computational and control unit of a computerI the device that interprets and e0ecutes instructions. By definition! the CP. is the chip that functions as the ?brain@ of the computer.
2ISA #0tended Industry (tandard $rchitecture. $ 231bit e0pansion bus designed as a superset of the I($ bus. %esigned to e0pand the speed and data width of the legacy e0pansion bus while still supporting older I($ cards. enumerator $ Plug and Play device driver that detects devices below its own device node! creates uni=ue device I%s! and reports to Configuration Manager during startup. )or e0ample! a (C(I adapter provides a (C(I enumerator that detects devices on the (C(I bus. e!pansion card $ card that connects to an e0pansion bus and contains one or more devices. e!pansion "(& See option &'M.
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data rate The speed of a data transfer process! normally e0pressed in bits per second or bytes per second. %%C %isplay data channel. The Plug and Play baseline for monitors. The communications channel between a monitor and the display adapter to which it is connected. This channel provides a method for the monitor to convey its identity to the display adapter. de)ice $ny circuit that performs a specific function! such as a parallel port. de)ice I% $ uni=ue $(CII string for a device created by enumerators to identify a hardware device and used to cross1reference data about the device stored in the registry. %istinguishes each logical device and bus from all others on the system. %LL %ynamic lin library. $PI routines that .ser1mode applications access through ordinary procedure calls. The code for the $PI routine is not included in the userJs e0ecutable image. Instead! the operating system automatically points the e0ecutable image to the %LL procedures at run time. %&A %irect memory access. $ method of moving data from a device to memory For vice versaG without the help of the microprocessor. The system board uses a %M$ controller to handle a fi0ed number of channels! each of which can be used by only one device at a time. dri)er *ernel1mode code used either to control or emulate a hardware device.
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9%C )loppy dis controller. $ chip and associated circuitry that directs and controls reading from and writing to a computerJs dis drive. 9I9( )irst in4first out. $ method for processing a =ueue in which items are removed in the same order they were added.
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:CL -ardware Compatibility List. See +-BL. :C5 -ardware Compatibility Tests. $ suite of tests from +-BL to verify hardware and device driver operations under a specific operating environment. These tests e0ercise the combination of a device! a software driver! and an operating system under controlled conditions to verify that all components operate properly.
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I%2 Integrated %evice #lectronics. $ type of dis 1 drive interface where the controller electronics reside on the drive itself! eliminating the need for a separate adapter card. I222 Institute of #lectrical and #lectronics #ngineers. 'rganiHation that develops standards. I69 *ile Information file. $ file created for a particular adapter that provides the operating system with information re=uired to set up a device! such as a list of valid logical configurations for the device! the names of driver files associated with the device! and so on. $n I") file is typically provided by the device manufacturer on a dis with an adapter.
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2CP #0tended capabilities port. $n asynchronous! 61bit<wide parallel channel defined by I### 9365< 9:55 that provides PC1to1peripheral and peripheral1 to1PC data transfers.
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I6I *ile InitialiHation file. Commonly used under +indows 2.0 and earlier! I"I files have been used by both the operating system and individual applica1 tions to store persistent settings related to an appli1 cation! driver! or piece of hardware. In +indows 231 bit operating systems! I"I files are supported for bac ward compatibility! but the registry is the preferred location for storing such settings. input class The class of filters that provides an interface for -I% hardware! including .(B and legacy devices! plus proprietary and other -I% hardware! under the +%M -I% architecture. integrated de)ice $ny deviceLsuch as a parallel port or graphics adapterLthat is designed on the system board rather than on an e0pansion card. inter*ace )or parameters on a connection re=uest! a specific set of methods and properties implemented on a medium that a filter connection uses to communicate! such as a specific set of I'CTLs. I'( Input4output. Two of the three activities that characteriHe a computer Finput! processing! and outputG. &efers to the complementary tas s of gathering data for the microprocessor to wor with and ma e the results available to the user through a device such as the display! dis drive! or printer. I(C5L Input4output control. $ custom class of I&Ps available to .ser mode. #ach +%M class driver has a set of I'CTLs that it uses to communi1 cate with applications. The I'CTLs give the class driver information about intended usage by applications. The class driver performs all I'CTL parameter validation. IPL Initial program load. $ device used by the system during the boot process to load an operating system into memory. I"P I4' re=uest pac et. %ata structures that drivers use to communicate with each other. The basic method of communication between ernel1mode devices. $n I&P is a ey data structure for +%M! which features multiple layered drivers. In +%M! every I4' re=uest is represented by an I&P that is passed from one driver layer to another until the re=uest is complete. +hen a driver receives an I&P! it performs the operation the I&P specifies! and then either passes the I&P bac to the I4' Manager for disposal or onto an ad/acent driver layer. $n I&P pac et consists of two partsE a header and the I4' stac locations.
I"# Interrupt re=uest. $ method by which a device can re=uest to be serviced by the deviceJs software driver. The system board uses a PIC to monitor the priority of the re=uests from all devices. +hen a re=uest occurs! a microprocessor suspends the current operation and gives control to the device driver associated with the interrupt number issued. The lower the numberLfor e0ample! I&B2Lthe higher the priority of the interrupt. Many devices only support raising re=uests of specific numbers. ISA Industry (tandard $rchitecture. $n 61bit Fand later! a 971bitG e0pansion bus that provides a buffered interface from devices on e0pansion cards to the internal bus.
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=ernel The core of the layered architecture that manages the most basic operations of the operating system! such as sharing the processor between different bloc s of e0ecuting code! handling hardware e0ceptions! and other hardware1dependent functions. =ernel mode The processor mode that allows full! unprotected access to the system. $ driver or thread running in ernel mode has access to system memory and hardware. =ernel1mode dri)er %river for a logical! virtual! or physical devices.
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LA6 Local area networ . $ group of computers and other devices dispersed over a relatively limited area and connected by a communications lin that enables any device to interact with any other device on the networ . Co#pare wit, +$". legacy $ny feature in the system based on older technology for which compatibility continues to be maintained in other system components. local 8us .sually refers to a system bus directly connected to the microprocessors on a system board. .sed collo=uially to refer to system board buses that are located closer to the microprocessor than e0pansion buses Fthat is! with less bufferingG! which are therefore capable of greater throughput.
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minidri)er $ hardware1specific %LL that uses a Microsoft1provided class driver to accomplish most actions through functions call and provides only device1specific controls. monolithic dri)er $ driver that has many different classes of functionality contained in the same driver. mother8oard See system board. multi*unction de)ice $ piece of hardware that supports multiple! discrete functions! such as audio! mi0er! and music! on a single adapter.
port $ connection or soc et used to connect a deviceLsuch as a printer! monitor! or modemL to the computer. Information is sent from the computer to the device through a cable. port dri)er $ low1level driver that responds to a set of system1defined device control re=uests and possibly to an additional set of driver1defined FprivateG device control re=uests sent down by a corresponding class driver. $ port driver insulates class drivers from the specifics of host bus adapters and synchroniHes operations for all its class drivers. P(S5 Power1on self1test. $ procedure of the system BI'( that identifies! tests! and configures the system in preparation for loading the operating system.
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ni88le mode $n asynchronous! peripheral1to1host channel defined in the I### 936519:55 standard. Provides a channel for the peripheral to send data to the host! which is commonly used as a means of identifying the peripheral. 6&I "onmas able Interrupt. $n interrupt that cannot be overruled by another service re=uest. $ hardware interrupt is called nonmas able if it cannot be mas ed by the processorJs interrupt enable flag.
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"A& &andom access memory@ (emiconductor1 based memory that can be read and written by the microprocessor or other hardware devices. &efers to volatile memory! which can be written as well as read. registry In +indows 231bit operating systems! the tree1structured hierarchical database where general system hardware and software settings are stored. The registry supersedes the use of separate I"I files for all system components and applications that now how to store values in the registry. resource 9. $ set from which a subset can be allocated for use by a client! such as memory or bus bandwidth. This is not the same as resources that are allocated by Plug and Play. 3. $ general term that refers to I&B signals! %M$ channels! I4' port addresses! and memory addresses for Plug and Play. "ISC &educed instruction set computing. $ type of microprocessor design that focuses on rapid and efficient processing of a relatively small set of instructions. &I(C architecture limits the number of instructions that are built into the microprocessor! but optimiHes each so it can be carried out very rapidlyLusually within a single cloc cycle. rt &eal time. In computing! refers to an operating mode under which data is received and processedI the results are returned instantaneously.
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(2& 'riginal e=uipment manufacturer. .sed primarily to refer to systems manufacturers. option "(& 'ptional read1only memory found on an e0pansion card. 'ption &'Ms usually contain additional firmware re=uired to properly boot the peripheral connected to the e0pansion card! for e0ample! a hard drive.
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PCI Peripheral Component Interconnect. $ 231bit or 751bit bus designed to be used with devices that have high bandwidth re=uirements! such as the display subsystem. planar See system board. Plug and Play $ design philosophy and set of specifications that describe hardware and software changes to the system and its peripherals that automatically identify and arbitrate resource re=uirements among all devices and buses on the system. Plug and Play specifies a set of device driver interface elements that are used in addition to! not in place of! e0isting driver architectures.
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SCSI (mall computer system interface. Pronounced ?scuHHy.@ $n I4' bus designed as a method for connecting several classes of peripherals to a host system without re=uiring modifications to generic hardware and software. static resources %evice resources! such as I&B signals! %M$ channels! I4' port addresses! and memory addresses! that cannot be configured or relocated. S>+A (uper AG$. $ video standard established by A#($ to provide high1resolution color display on IBM1compatible computers. system 8oard A(so motherboard or planar. The primary circuit board in a system that contains most of the basic components of the system. system de)ices %evices on the system board! such as interrupt controllers! eyboard controller! real1 time cloc ! %M$ page registers! %M$ controllers! memory controllers! )%C! $T$ ports! serial and parallel ports! PCI bridges! and so on. In todayJs systems! these devices are typically integrated in the supporting chip set.
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W:#L +indows -ardware Buality Labs. Provides testing services for hardware and drivers for +indows 231bit operating systems. (ee httpE44www.microsoft.com4hwtest4. Win32 API $ 231bit application programming interface for +indows 231bit operating systems that includes sophisticated operating system capabilities! security! and $PI routines for +indows1based applications.
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?A"5 .niversal $synchronous &eceiver4 Transmitter. $ module composed of a circuit that contains both the receiving and transmitting circuits re=uired for asynchronous serial communication. ?PS .ninterruptible power supply. $ device connected between a computer and a power source that ensures that electrical flow to the computer is not interrupted because of a blac out and! in most cases! protects the computer against potentially damaging events such as power surges and brownouts. user mode The nonprivileged processor mode in which application code e0ecutes! including protected subsystem code in +indows "T 5.> and +indows 3>>>. user1mode dri)ers +in231based multimedia drivers and A%%s for M(1%'(<based applications with application1dedicated devices. )or information! see the +indows 3>>> %%*.
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971bit I4' decoding! 99! 95 3#6h and 3)6h! I($ I4' standard address! 9; 2#6h and 2)6h! I($ I4' standard address! 9; 6>53 chip! 3> Plug and Play re=uirements! 9> $C* Fac nowledgmentG codes! 39 codes eyboard ports and peripherals! 39 mouse ports and pointing devices! 39 $CPI F$dvanced Configuration and Power InterfaceG legacy devices! 9> parallel port base addresses! 9: addresses 3;6h! 96 2;6h! 96 2BC! 96 2C>h! 9: 2)3h! 39 2)5h! 39 2)Ch! 39 7>h! 39 75h! 39 I($ I4' standard 9; I($1compatible addresses! 9> $dvanced &I(C computing F$&CG interface! parallel ports! 9: $(CII values in device I%s! 9:! 3> asset numbers assigned to hardware! 9> asynchronous receivers F.niversal $synchronous &eceiver4TransmitterG! 9; audio components! device I%s! 2;126 automatic configuration. See resource configuration BI'( device I%s! 2>129 I($ devices reported through! 9C
parallel port addresses! 9: Plug and Play! 93192 BI'( %ata $rea FB%$G! 9: boot devices! option &'Ms! 99! 92195! 97 buses device I%s ! 2> legacy serial port re=uirements! 9;196 re=uirements! 9> C%1&'M devices! proprietary adapter device I%s! 271 2; C(arification to P(ug and P(a" ISA Specification, : CL$(( ey! 3> compatibility mode! 9: Compatible I% Compatible I% FCI%G ey! 3> obtaining vendor codes! 99 P"P suffi0! 99! 9C197 conflict resolution. See resource conflicts connectors %B3C! 9: I### 9365! 9: parallel ports! 9: controllers dis controllers! 3: interrupt! 9> interrupt! 3; %B3C connector! 9: %#C $lpha systems! parallel port base addresses! 9: decoding! 971bit I4'! 99! 95 %#(C&IPTI'" ey! 3> device configuration device enumeration! 99 Plug and Play re=uirements! 9> %evice I%s $(CII values in 9:13> basic re=uirements! 9>
1lossary I### 9365! 9:13> numerical listing! 37126 overview! 3C137 Plug and Play! 9:13> %evice I%s 1continued2 P(ug and P(a" ISA Specification, 9> P(ug and P(a" Para((e( Port Device Specification, 9: P"P suffi0! 9C197 dis controllers! 3: display adapters! device I%s! 3:12> %M$ Fdirect memory accessG controllers Plug and Play re=uirements 9> device I%s! 3; legacy I($ %M$ assignments! 32 page registers! 9> parallel ports! 96 %M$ Channel 3! 39 %M$ controllers! and floppy dis drives! 39 dynamic disable capabilities floppy dis controllers! 39 legacy ports and peripherals! 9; P(ug and P(a" /0terna( C.' Device Specification, 9; #CP Fe0tended capabilities portG #CP mode Plug and Play! 96 re=uirements! 9: I### 936519::5! 9: enhanced parallel port F#PPG! 9: enumeration device I%s! 9> P"P vendor code! 99 #PP support! 9: e0pansion buses and cards! device I%s! 9> e0pansion headers FPlug and PlayG! 99 fi0ed I($ interrupts! 33132 See a(so I($ buses and devices. fi0ed resources! 9> floppy dis drives and controllers conflict resolution4dynamic disable capabilities! 39 %M$ controllers! 39 legacy )%C! 39 re=uirements! 39 resource configuration re=uirements Flegacy devicesG! 39 resource conflicts with hard dis controller! 39 hard dis drives and controllers! resource conflicts with floppy dis controller! 39 -ardware I%s! 99 I4' addresses 971bit decoding! 99195 alias I4' addressing! 99 I($ auto1configuration registers! 99 I($1compatible addresses! 9> legacy I4' assignments! 32135 parallel ports! 96 phantom or alias addressing! 99 Plug and Play devices specifying! 96 serial I4' assignments! 9;196 I4' ports and devices! overview! 9; IBM Personal (ystem43 (pecification! 3> I### 9365 I### 936519::5! 9: I### 93651I! 9: Plug and Play device I%s! 9:13> I") files! abbreviations for parallel port description eys! 9: interrupt controllers device I%s! 3; fi0ed resources! 9> IPL Finitial program loadG! 99 I& FinfraredG devices! serial ports! 9; I&B sharing! serial ports! 96 I&Bs Finterrupt re=uestsG fi0ed interrupts! 33132 I&B 93 usage! 3> I&B C usage! 96 I&B ; usage! 96 eyboards! 39 mouse ports and pointing devices! 3> parallel ports! 96 serial ports and devices! 9; sharing! 95 I($ addresses parallel ports! 96! 9: serial port! 9; I($ buses and devices auto1configuration registers! 99 device I% re=uirement e0ceptions! 9> fi0ed interrupts! 33132 I&B sharing! 95 I($ Plug and Play (pecification! 99 I($1compatible addresses! 9> legacy %M$ assignments! 32 legacy I4' assignments! 32135 Plug and Play re=uirements! 93197 P"P vendor code! 99 Product I%s! 9519C reporting through BI'(! 9C Aendor I%s! 9519C eyboard controller! Plug and Play re=uirements! 9> eyboard ports and peripherals
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1lossary ac nowledgment codes! 39 device I%s! 3;136 eyboard ports and peripherals 1continued2 fi0ed resources! 9> P(431style ports! 39 scan codes! 39 legacy devices! Plug and Play device I%s! 9> legacy )%C! floppy dis controller! 39 legacy ports and peripherals See a(so serial ports and devices dynamic disable capabilities! 9; I4' assignments! 32135 P(ug and P(a" /0terna( C.' Device Specification, 9; P"P vendor code! 99 re=uirements! 9; resource configuration! 9; .$&Ts! 9; LPT mode! Plug and Play! 96 M$".)$CT.&#& description ey! 3> math coprocessors! 9> M%L ey! 3> M)G ey! 3> M'%#L description ey! 3> modems! device I%s! 26 mouse ports and pointing devices 6>53 chip! 3> ac nowledgment codes! 39 device I%s! 29123 IBM Personal (ystem43 (pecification! 3> I&Bs Finterrupt re=uestsG! 3> P(431style ports! 3> multifunction devices! Plug and Play device I%s! 9> networ adapters! device I%s! 22127 "etwor PC (ystem %esign Guidelines! 9> nibble mode! 9: "MI F"onmas able InterruptG! 9> option &'Ms basic re=uirements! 99 boot devices supported! 92197 designing for Plug and Play! 92195 parallel ports and devices $CPI systems! 9: BI'( support! 9: compatibility mode! 9: design re=uirements! 96 device I%s! 36 %M$! 96 #CP mode! 96! 9: I### 9365! 9:13> legacy ports and peripherals! 96 LPT mode! 96
-*
nibble mode! 9: Plug and Play support! 96 resource configuration! 9619: &I(C1based systems! 9: PCMCI$! controller chip set device I%s! 29 phantom I4' addressing! 99 PIC1based I&B signals! 9;! 3> Plug and Play basic re=uirements! 9> buses and I4' types I($ device re=uirements! 93197 compatible I%s! 99 device configuration! : device I%s I### 9365! 9:13> parallel ports and devices! 9:13> dynamic disable capabilities! : e0pansion headers! 99 legacy support! 9> option &'Ms! 99! 92195 parallel ports! 96 resource assignment! : Plug and Play documents and specifications Advanced Configuration and Power Interface Specification, : P(ug and P(a" /0terna( C.' Device Specification, :! 9; P(ug and P(a" ISA Specification, :! 9> P(ug and P(a" Para((e( Port Device Specification, :! 96! 9: P(ug and P(a" SCSI Specification, : P"P identifier! 99 P"P vendor code! 99! 9C197 Product I%s! I($ buses and devices! 9519C programmable interrupt controller1based FPIC1basedG I&B signals! 96 mouse ports and pointing devices! 3> serial ports! 9; programmable interrupt controllers FPICsG! Plug and Play re=uirements! 9> P(431style ports eyboards! 39 mouse ports and pointing devices! 3> Plug and Play device I%s! 9> real1time cloc s device I%s! 2>129 fi0ed resources! 9> registers %M$ page registers! 9> I($ auto1configuration registers! 99 unimplemented! 95
1lossary resource assignment mouse ports and pointing devices! 3> parallel ports and devices! 96 Plug and Play re=uirements! : serial ports! 9; resource configuration automatic configuration! 99 floppy dis drives and controllers! 39 I($ auto1configuration registers! 99 legacy ports and peripherals! 9; parallel ports and! 9619: P(ug and P(a" /0terna( C.' Device Specification, 9; P(ug and P(a" Para((e( Port Device Specification, 96 resource conflicts 971bit I4' decoding! 99 floppy dis controllers! 39 legacy ports and peripherals! 96 scan codes! eyboards! 39 (C(I adapters and peripherals! device I%s! 2712; (erial I%s FI($ devicesG! 9C serial numbers! assigning to hardware! 9> serial ports and devices See a(so legacy ports and peripherals conflict resolution! 96 design re=uirements! 9;196 device I%s! 36 I4' addresses! 9; interrupts! 9; I&B sharing! 96 legacy port re=uirements! 9;196 wireless components! 9; sharing! I&B! 95 (uper I4'! Plug and Play device I%s! 9> system devices device I%s! 2>129 I($1compatible addresses! 9> Plug and Play re=uirements! 9> timers device I%s! 3; fi0ed resources! 9> .$&Ts F.niversal $synchronous &eceiver4 TransmitterG! 9; unimplemented registers! 95 .niversal $synchronous &eceiver4Transmitter F.$&TG! 9; vendor codes! 99 Aendor I%s! I($ buses and devices! 9519C Aendor P"P code! 99 video input and capture! device I%s! 2;126
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Plug and Play Guidelines Legacy

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Plug and Play Guidelines Legacy

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Legacy Plug and Play Guidelines

(ntel Corporation and Microsoft Corporation

-ow to .se This Guide

Conventions .sed in This Guide

&eferences and &esources

Basic Legacy Plug and Play

Legacy Plug and Play (pecifications

.ni=ue Plug and Play %evice I%s

'ption &'M Guidelines

?P"P@ Aendor Codes and Compatible I%s

I($ Plug and Play

(ystem &e=uirements for Plug and Play I($

C(arifications to t,e P(ug and P(a" &I.S Specification, Version 1.0a .

Plug and Play I($ %evice &e=uirements

Plug and Play I($ (tandards for %evices

'ption &'Ms for I($ Boot %evices

I4' %ecoding for I($ %evice

I($ I&B (haring

%eterministic Aalues for .nimplemented &egisters

Correct Identifiers for I($ %evices

BI'( &eporting or (erial I% for (ystem Board %evices

P"P (uffi0es and Compatible %evice I%s

'ption &'Ms for Boot %evices

Legacy (erial Port

Legacy Parallel Port

#PP (upport and &estricted I4' addresses

Compatibility! "ibble Mode! and #CP Protocols

I### 9365 Port Connector (pecifications

Plug and Play %evice I%s for I### 9365 Peripherals

Compatible I% *ey for Parallel %evice I%

Legacy Mouse Port and %evices

Legacy *eyboard Port and %evices

I&B! %M$! and I4' Port $ddresses

Legacy %M$ $ssignments

Legacy I4' $ddress $ssignments

Plug and Play Aendor and %evice I%s

Generic +indows %evice I%s

&eal1Time Cloc ! BI'(! and (ystem Board %evices

PCMCI$ Controller Chip (ets

"etwor $dapters (continued)

(ound! Aideo Capture! and Multimedia

(ee also the -ardware Glossary available on httpE44www.microsoft.com4hwdev4glossary.htm.

Acronyms and A00re)iations

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