PD - 91348C

IRL530N
Logic-Level Gate Drive Advanced Process Technology Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.

HEXFET Power MOSFET

D

VDSS = 100V RDS(on) = 0.10

G S

ID = 17A

TO-220AB

Absolute Maximum Ratings

Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @T C = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Q Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche EnergyR Avalanche CurrentQ Repetitive Avalanche EnergyQ Peak Diode Recovery dv/dt S Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew

Max.
17 12 60 79 0.53 16 150 9.0 7.9 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbfin (1.1Nm)

Units
A W W/C V mJ A mJ V/ns C

Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient

Typ.
0.50

Max.
1.9 62

Units
C/W

1/09/04

IRL530N
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ

Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

RDS(on)

VGS(th) gfs
IDSS

Gate Threshold Voltage Forward Transconductance

Drain-to-Source Leakage Current

IGSS Qg Qgs Qgd td(on) tr td(off) tf

LD LS

Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time
Internal Drain Inductance Internal Source Inductance

Ciss Coss Crss

Input Capacitance Output Capacitance Reverse Transfer Capacitance

Typ. Max. Units Conditions V V GS = 0V, ID = 250A 0.122 V/C Reference to 25C, ID = 1mA 0.100 VGS = 10V, ID = 9.0A T 0.120 VGS = 5.0V, ID = 9.0A T 0.150 VGS = 4.0V, ID = 8.0A T 2.0 V VDS = VGS, ID = 250A S V DS = 25V, ID = 9.0A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 34 ID = 9.0A 4.8 nC VDS = 80V 20 VGS = 5.0V, See Fig. 6 and 13 T 7.2 VDD = 50V 53 ID = 9.0A ns 30 RG = 6.0, VGS = 5.0V 26 RD = 5.5, See Fig. 10 T Between lead, 4.5 nH 6mm (0.25in.) G from package 7.5 and center of die contact 800 VGS = 0V 160 pF VDS = 25V 90 = 1.0MHz, See Fig. 5

Min. 100 1.0 7.7

Source-Drain Ratings and Characteristics

IS
ISM

VSD trr Qrr ton

Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) QV Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time

Min. Typ. Max. Units

Conditions D MOSFET symbol 17 showing the A G integral reverse 60 p-n junction diode. S 1.3 V TJ = 25C, IS = 9.0A, VGS = 0V T 140 210 ns TJ = 25C, I F = 9.0A 740 1100 nC di/dt = 100A/s T Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

Q Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 ) R Starting TJ = 25C, L = 3.7mH RG = 25, IAS = 9.0A. (See Figure 12) .

S ISD 9.0A, di/dt 540A/s, VDD V(BR)DSS, T Pulse width 300s; duty cycle 2%
TJ 175C

IRL#!
100
TOP VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V

100

ID , Drain-to-Source Current (A )

10

ID , Drain-to-Source Current (A )

VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP

10

2.5 V
1

2 .5V 2 0 s P U LS E W ID TH T J = 2 5C
0.1 1 10

0.1

100

0.1 0.1 1

2 0 s P U LS E W ID TH T J = 1 75 C
10

100

V D S , D rain-to-S ource V oltage (V )

V D S , D rain-to-S ource V oltage (V )

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

100

3.0

T J = 2 5 C

R D S (on) , D ra in-to -S o urc e O n R e s is ta nc e (N o rm alize d)

I D = 15 A

I D , D ra in -to-S ourc e C urrent (A)

2.5

T J = 1 7 5C
10

2.0

1.5

1.0

0.5

0.1 2 3 4 5 6

V DS = 5 0V 2 0 s P U L S E W ID TH
7 8 9 10

0.0 -60 -40 -20 0 20 40 60 80

V G S = 1 0V

100 120 140 160 180

V G S , G ate-to -So urce Voltag e (V)

T J , J unc tion T em perature (C )

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance Vs. Temperature

IRL530N
1400

1200

C , Capacitance (pF)

1000

C iss

V G S , G ate-to-S ource V oltage (V )

V GS C iss C rs s C o ss

= = = =

0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d

15

I D = 9.0 A V D S = 8 0V V D S = 5 0V V D S = 2 0V

12

800

600

C oss
400

C rss
200

0 1 10 100

0 0 10 20

FO R TE S T C IR C U IT S E E FIG U R E 1 3
30 40 50

V D S , D rain-to-S ourc e V oltage (V )

Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage

Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage

100

1000

I S D , R everse Drain C urrent (A )

O P E R A TIO N IN TH IS A R E A LIM ITE D B Y R D S (o n )

T J = 17 5C

I D , Drain C urrent (A )

100

10

10 s

T J = 2 5C

10

10 0s

1 0.4 0.6 0.8 1.0

V G S = 0V
1.2

1 1

T C = 25 C T J = 17 5C S ing le P u lse
10

1m s 10m s 100

1.4

1000

V S D , S ourc e-to-D rain V oltage (V )

V D S , D rain-to-S ource V oltage (V )

Fig 7. Typical Source-Drain Diode Forward Voltage

Fig 8. Maximum Safe Operating Area

IRL#!
20

VDS VGS

RD

I D , Drain Current (A)

15

D.U.T.
+

RG

-VDD

5.0V
10
Pulse Width 1 s Duty Factor 0.1 %

Fig 10a. Switching Time Test Circuit

VDS 90%

0 25 50 75 100 125 150 175

TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf

Fig 9. Maximum Drain Current Vs. Case Temperature

Fig 10b. Switching Time Waveforms

10

Thermal Response (Z thJC )

D = 0.50 0.20 0.10 0.05 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1

0.1

0.02 0.01

0.01 0.00001

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRL530N
VDS D.U.T. RG + V - DD
5.0 V

E A S , S ingle P ulse A valanche E nergy (m J)

350

TO P
300

B O TTO M
250

ID 3 .7A 6 .4A 9.0 A

IAS tp
0.01

200

150

Fig 12a. Unclamped Inductive Test Circuit

100

50

V(BR)DSS tp VDD VDS

V D D = 25 V
25 50 75 100 125 150

A
175

S tarting T J , J unc tion T em perature (C )

Fig 12c. Maximum Avalanche Energy Vs. Drain Current

IAS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator Same Type as D.U.T.

50K

QG

12V

.2F

.3F

5.0 V
QGS VG QGD
VGS
3mA

D.U.T.

+ V - DS

Charge

IG

ID

Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRL#!
Peak Diode Recovery dv/dt Test Circuit
D.U.T

S
+

Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer

R
-

Q
RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test

+ VDD

Driver Gate Drive P.W. Period D=

P.W. Period VGS=10V

D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt

VDD

Re-Applied Voltage Inductor Curent

Body Diode

Forward Drop

Ripple 5%

ISD

* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS

IRL530N
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)

4 15.24 (.600) 14.84 (.584)

1.15 (.045) MIN 1 2 3

HEXFET 1 - GATE

LEAD ASSIGNMENTS

LEAD ASSIGNMENTS IGBTs, CoPACK 1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR

14.09 (.555) 13.47 (.530)

2 - DRAIN 1- GATE 3 - SOURCE 2- DRAIN 3- SOURCE 4 - DRAIN 4- DRAIN 4.06 (.160) 3.55 (.140)

3X 1.40 (.055) 3X 1.15 (.045) 2.54 (.100)

0.93 (.037) 0.69 (.027) M B A M

3X

0.55 (.022) 0.46 (.018)

0.36 (.014)

2.92 (.115) 2.64 (.104)

2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH

3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/</,1(&
Note: "P" in assembly line position indicates "Lead-Free"

,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/< /27&2'(

3$57180%(5 '$7(&2'( <($5  :((. /,1(&

For GB Production
EX A M PLE: THIS IS A NIRF1010 LOT C O DE 1789 A SSEM BLEDO NW W19, 1997 INTHE A SSEM BLYLINE "C " INTERNA TIONA L REC TIFIER LO G O A SSEM BLY LO TC O DE PA RT NUM BER

DA TE C O DE Y EA R 7 = 1997 W EEK19 LINE C

TO-220AB package is not recommended for Surface Mount Application.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/04

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