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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO.

1, FEBRUARY 2014

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Comparison of Surge Arrester Models


Pablo Mourente Miguel, Member, IEEE
AbstractThis paper deals with the two most used arresters models applied in digital simulations with the Alternative Transients Program, the conventional, and IEEE models. It presents a model analysis and parameter adjustment procedures to the conventional model. It also presents an application to both models of different types of current and voltage surges and even power frequency voltage, with a comparison of the results obtained with both models and with typical manufacturer data. While adjustment of the IEEE model was difcult and laborious, the conventional model presented a straightforward procedure. The results obtained show that there is a close agreement between the two models when the surge front time is above s. The conventional model always presents higher values for the limiting and residual voltages, and better agreement with the typical manufacturer data. Thus, the conventional model presents the advantages of simplicity and more conservative results. Index TermsArresters, hysteresis, impulse testing, simulation, surge protection.
Fig. 1. Resistive current characteristic of a typical ZnO arrester.

I. INTRODUCTION IGHTNING arresters are used to protect equipment and installations against overvoltages. The effectiveness of an arrester to limit an overvoltage will depend on the rate of rise of the overvoltage wave. Several models are used to simulate the behavior of an arrester on the Alternative Transients Program (ATP), each using a different approach to represent the hysteresis effect. This paper makes a short description and comparison of two of the most used models: the conventional model and the IEEE model. The adjustment of the conventional model is described and considerations are made regarding the signicance of each component and the procedure of adjustment. Simulation of the application of several current and voltage surges to both models will enable a comparison between models and with typical manufacturer data. In addition, a comparison of the performance under power frequency will be performed. The comparison between results and typical manufacturer data for a 120-kV surge arrester will show the applicability of each model. II. CONVENTIONAL SURGE ARRESTER MODEL The modeling of a surge arrester on ATP is made with the use of the nonlinear resistors using one of the following components: MOV92, NLRES92, or NLRES99. However, these components reproduce only the resistive part of the arrester and any electric circuit has inherent inductance and capacitance.
Manuscript received March 29, 2012; revised August 24, 2012, September 24, 2012, and May 02, 2013; accepted August 15, 2013. Date of publication September 17, 2013; date of current version January 21, 2014. Paper no. TPWRD-00331-2012. The author is with TgDelta Engenharia e Consultoria Ltda, Rio de Janeiro, RJ 21931-100, Brazil (e-mail: tgelta@tgdelta.com.br). Digital Object Identier 10.1109/TPWRD.2013.2279835

A. Evaluating the Inductance of the Arrester Body The inductance of the arrester body is estimated as being equal to the inductance of a nite round conductor, with the dimensions of the arrester. As stated in [1], the inductance of a nite round conductor is (1) where is the length of the conductor and r is the radius of the conductor. The term in (1) represents the internal inductance when the current density on the conductor is uniform, which is the case at low frequencies. In operation, the arrester will be submitted to very large spectra of frequency, from power frequency to several megahertz during surge discharge. As the frequency increases, the skin effect phenomena forces the current density to increase at the surface of the conductor. The penetration depth [2] of current will be given by (2) where is the electric resistivity, is the magnetic permeability, and f is frequency. A difculty arises in evaluating the electric resistivity of the ZnO blocks, which is nonlinear. This is done by taking into account the information provided by the manufacturer on the resistive leakage current and on the residual voltage for a surge arrester with 120-kV rated voltage (see the Appendix). The apparent resistance is derived from the curve shown in Fig. 1, and from this apparent resistance, the electric resistivity of ZnO blocks is estimated. Considering the ZnO blocks with 55-mm diameter and a total height of 80 cm, the electric resistivity derives from the apparent

0885-8977 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO. 1, FEBRUARY 2014

Fig. 2. Apparent resistance of a ZnO arrester with

120 kV.

Fig. 4. Penetration depth in ZnO blocks.

Fig. 3. Apparent resistivity of ZnO blocks.

resistance. Fig. 3 shows the apparent resistivity, which is current dependent. Fig. 4 shows the penetration depth in the ZnO blocks at several frequencies. Due to the nonlinearity of the ZnO blocks, the penetration depth will be a function of frequency and current magnitude, which is given by

Fig. 5. Spectrum of standard impulse, full, and chopped waves.

(3)

For frequencies below 1 MHz, the penetration depth on the ZnO blocks is much larger than the radius of the blocks. For frequencies up to 10 MHz and with high current values, the penetration depth is still on the same magnitude order of the ZnO blocks radius. The frequency range involved in insulation coordination studies will be below 10 MHz, since above this frequency, the component amplitude is very reduced. The frequency spectrum of a standard 1.2 50- s full and chopped impulse wave and of a 10 kA1/2 20 s are shown in Figs. 5 and 6. Thus, it may be said that during a surge discharge, current ows in all or most of the cross section of these blocks, and the internal inductance of the ZnO blocks is not negligible. Above 10 MHz, the penetration depth will be shorter than the radius of

Fig. 6. Spectrum of 10 kA1/2

20- s wave.

the ZnO blocks and the very-high-frequency components will be concentrated close to the surface of the blocks. Just for comparison, the penetration depth on a copper round conductor would be 8.6 mm at 60 Hz and 0.212 mm at 100 kHz. For an arrester with a rated voltage of 120 kV, the body inductance will be (4)

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Fig. 8. Representation of the conventional model of the surge arrester.

C. Total Inductance on the Arrester Branch


Fig. 7. Surge arrester usual installation arrangement.

The total inductance on the arrester branch will be the sum of phase lead, arrester body, and ground lead inductances

It shall be noted that this gure is very close to the value prescribed in [3], which is 1 H/m for outdoor arresters. B. Evaluating the Inductance of the Connecting Leads The arrester connects to the electric system, which means that two lead connections will be necessary: a phase lead and a ground lead. The representation of these connecting leads by lumped impedance is possible when the transit time is much smaller than the front time of the propagating surge, which is written in the form (5) Thus, a 6-m lead may be represented as a lumped inductance to frequencies up to 5 MHz. A grounding lead will have a length in the order of 3 m, meaning that this may be represented as a lumped inductance up to 10 MHz. If the overvoltage under study presents components at higher frequencies or the leads are longer, it will be necessary to represent the connecting leads as transmission lines. Fig. 7 shows the usual arrangement of a surge arrester, where the phase and grounding leads may be seen. Using 85 mm aluminum cables on both leads, the conductor diameter will be 11.79 mm. The penetration depth in an aluminum cable is given by

(8) Any current discharge will have to ow through this total inductance, and the corresponding voltage drop will be added to the voltage limited by the arrester. For frequencies above 100 kHz, which correspond to the surge discharge regime of the arrester, the inductances of the connecting leads will be represented only by the external inductance, since the skin effect will cause concentration of current close to the surface. For the arrester body, even considering the skin effect and the nonlinearity of the ZnO blocks, the penetration depth is bigger than the blocks diameter; thus, the internal inductance shall be considered. At frequencies on the order of the power frequency, the inductance of the connecting leads will be higher than the calculated values, since the internal inductance will have to be added. However, in that range of frequencies, the current rate is small and the effect on the limiting voltage by the arrester is very small and may be neglected. It may be said that the rule of thumb that indicates the use of a value of 1 H/m for the connecting leads and to the arrester body will lead to a higher inductance gure. D. Arrester Capacitance The arrester capacitance considered was 30 pF, based on eld measurements of arresters of the same voltage class. E. Representation of the Conventional Model

(6) The penetration depth will be 0.273 mm at 100 kHz, which means that the current will be concentrated next to the surface. Thus, the internal inductance is negligible, and the inductance of each lead will be Phase lead (7) Ground lead (8)

The conventional model of a surge arrester is presented in Fig. 8, including the connecting leads inductances. The model consists of a nonlinear resistor connected in series with the arrester body inductance and a parallel capacitor. This model is sometimes referred to as the Tominaga [4], [5] model. III. IEEE SURGE ARRESTER MODEL The IEEE surge arrester model is described in [6], being formed by two nonlinear resistors (A0 and A1) connected by an RL parallel lter (R1//L1). The capacitance of the arrester body is connected in parallel with the nonlinear resistor A0. To represent the extremities effects of the arrester body, another

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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO. 1, FEBRUARY 2014

Fig. 9. IEEE model of the surge arrester. Fig. 11. Hysteresis loop formed by conventional and IEEE models submitted to 65 kA8 20 s current surge, showing a slight difference between both models.

Fig. 10. Limiting voltage calculated with conventional and IEEE models submitted to 65 kA8 20 s current surge, showing a very slight difference between both models.

RL parallel lter (R0//L0) is connected in series with the nonlinear resistor A0. Fig. 9 shows the IEEE model. The adjustment of the model parameters shall match the residual voltages obtained for the 8 20 s discharge currents. IV. COMPARING THE CONVENTIONAL AND IEEE MODELS The purpose of both models is to allow the calculation of the effect of an arrester in limiting the overvoltages and the discharge current. The efforts to adjust the IEEE model are cumbersome, since an iterative process has to be used to adjust the parameters of the circuit. The conventional model presents a much easier process of adjustment. A comparison between the results obtained with each model submitted to different incoming surges will be presented. A. Current Surges With double exponential current surges applied to both models, the Limiting Voltages will be compared. The term limiting voltage refers to the voltage drop measured from the point of connection of the arrester to the phase conductor to the ground; thus, it includes the voltage drops on the conductor leads and on the arrester body. The term residual voltage refers to the voltage drop measured only on the arrester body. 1) 65 kA8 20 s: As may be seen in Fig. 10, the behavior of both models is roughly the same, the conventional model presented a voltage crest of 442.8 kV and the IEEE model presented 435.4 kV, a difference of 1.7%. Fig. 11 shows the hysteresis loop presented by each model, which are practically identical. Fig. 12 presents the dissipated power and energy on both models. Both models dissipated the same instantaneous power

Fig. 12. Dissipated power and energy calculated with conventional and IEEE models submitted to 65 kA8 20- s current surge, showing an exact overlay between the results obtained with both models.

Fig. 13. Limiting voltage calculated with conventional and IEEE models submitted to 10 kA4 10 s current surge, showing a very slight difference between models near the crest of the limiting voltage.

and energy during this current surge. The dissipated energy is 555.6 kJ (or 4.63 kJ/kV). The power and energy dissipated by the IEEE model are the sum of the power and energy dissipated by components A0 and A1. The component A0 dissipates more than the component A1 due to the delay introduced by the inductance L1. 2) 10 kA4 10 s: Fig. 13 shows the limiting voltage of both models when submitted to a 10 kA4 10 s. The conventional model presented a voltage crest of 316.3 kV and the IEEE model presented 314.6 kV, a difference of 0.5%. 3) 2 kA1/2 2 s: As may be seen in Figs. 14 and 15, the behavior of both models is roughly the same, with the conventional model presenting a slightly higher residual voltage. The

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TABLE I DATA USED IN THE IEEE MODEL

Fig. 14. Limiting voltage calculated with conventional and IEEE models submitted to 2 kA1/2 2 s current surge, showing very slight difference between both models.

TABLE II LIMITING VOLTAGES CALCULATED WITH BOTH MODELS

Fig. 15. Hysteresis loop formed by the conventional and IEEE models submitted to 2 kA1/2 2 s current surge, showing very slight difference between both models.

TABLE III DISSIPATED ENERGY CALCULATED WITH BOTH MODELS

Fig. 16. Comparison of the residual voltage informed by the manufacturer and calculated with conventional and IEEE models submitted to 10-kA current surges with different front times.

TABLE IV INFLUENCE OF FRONT TIME ON THE RESIDUAL VOLTAGE

conventional model presented a voltage crest of 310.5 kV, and the IEEE model presented 303.9 kV, a difference of 2.2%. It is expected that the residual voltage will increase when the front time of the surge is reduced. Both models present such behavior, as shown in Fig. 16, which is slightly more pronounced on the conventional model. Table IV presents the residual voltage calculated from both models. B. Voltage Surges Double exponential voltage surges will be applied to both models and the limiting voltage compared. Fig. 17 shows the circuit used to simulate the application of the voltage surges.

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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO. 1, FEBRUARY 2014

Fig. 17. Circuit used to simulate the application of voltage surges.

Fig. 20. Limiting voltage during the application of chopped wave 715 kV1.2 50 s impulse, showing the same results for both models.

Fig. 18. Limiting voltage and current through the arresters models during the application of full-wave 650 kV1.2 50- s impulse, showing an exact overlay between the results for both models.

Fig. 21. Limiting voltage and current through the arresters models during the application of full-wave 650 kV1/2 20- s impulse, showing a very slight difference in the results obtained with both models.

Fig. 19. Difference between the limiting voltage calculated with both models during the application of full-wave 650 kV1.2 50- s impulse. The results obtained with both models are an exact overlay.

Fig. 22. Limiting voltage during the application of chopped wave 715 kV1/2 20- s impulse, showing a very slight difference between the results obtained with both models.

1) Full Wave 650 kV1.2 50 s: Fig. 18 shows the limiting voltage obtained with the application of a standard lightning impulse with 650 kV peak. The resulting waves are practically identical, in such a manner that it is almost impossible to distinguish the limiting voltage of both models. To emphasize the agreement of the two models, Fig. 19 shows the difference between the calculated limiting voltages. The bigger differences appear in the front region, but those never exceeded 3.0 kV. 2) Chopped Wave 715 kV1.2 50 s: Fig. 20 shows the limiting voltage of the conventional and IEEE models during the application of a 715-kV chopped wave impulse. Practically, there is no difference between the limiting voltages produced by both models. 3) Full Wave 650 kV1/2 20 s: Fig. 21 shows the limiting voltage produced by both models when submitted to a full wave 650 kV1/2 20 s.

4) Chopped Wave 715 kV1/2 20 s: Fig. 22 shows the limiting voltage produced by both models when submitted to a chopped wave 650 kV1/2 20 s. C. Switching Surges Previous simulations have shown that the differences between the conventional and IEEE model arise when the signal presents very high frequency components. When the frequency spectrum is contained below 5 MHz, the results given by both models are practically identical. To conrm this observation, a switching surge of 350 kV250 2500 s will be applied to both models. Fig. 23 shows the limiting voltage calculated according to both models, which were 263.96 kV for the conventional model and 263.95 kV for the IEEE model. In addition, the current through each arrester model is nearly identical, 871.95 A for the conventional model and 871.8 A for the IEEE model.

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Fig. 25. Leakage current through the conventional model with 1-p.u. voltage. Fig. 23. Limiting voltage and current through the arrester calculated with both models during the application of 350 kV250 2500 s switching surge, showing nearly identical results obtained with both models.

Fig. 26. Leakage current through the IEEE model with 1.05-p.u. voltage.

Fig. 24. Instantaneous power dissipated on each arrester calculated with both models during the application of 350 kV250 2500 s switching surge, showing an exact overlay.

TABLE V LIMITING VOLTAGES CALCULATED WITH BOTH MODELS

Fig. 24 shows the instantaneous power dissipated by both arrester models. The conventional model, which has only one nonlinear component, dissipates 230.16 MW. The IEEE model has two nonlinear components and dissipates 127.49 MW in component A0 and 102.63 MW in component A1, amounting to a total dissipation of 230.12 MW. D. Power Frequency At power frequency, it is not usual to apply the arresters models, at least not with this grade of complexity. However, since there are data available on the leakage current of arresters in service, then it will be interesting to compare both models when submitted to a power frequency voltage. The values of voltage applied to the models range from 0.925 to 1.1 times the nominal phase-earth system voltage. Figs. 25 and 26 show the leakage current through the arrester models. The leakage current presents a level between 0.5 to 2 mA, which agrees with the usual eld values. The leakage current through the arrester has a resistive and a capacitive component. As the applied voltage rises, the resistive component of the leakage current increases and more pronounced distortion appears on the current wave. Both models presented exactly the same value for the resistive component of the leakage current, as may be seen in Table VI. E. Computing Time Table VII shows simulation time in ATP, using the same circuit and replacing only the arrester model.

TABLE VI LEAKAGE CURRENTS CALCULATED WITH BOTH MODELS

TABLE VII COMPARISON OF ATP SIMULATION TIMES USING THE SAME CIRCUIT

V. CONCLUSION Surge arresters are used in electric systems to limit overvoltages, which otherwise may compromise the insulation of equip-

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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO. 1, FEBRUARY 2014

Fig. 27. Residual voltage versus front time to an arrester with

120 kV.

TABLE VIII TYPICAL CHARACTERISTIC DATA SUPPLIED BY THE MANUFACTURER

practically identical. The departure observed in the results presented by the conventional model from manufacturer data at front times below s may be attributed to the penetration depth at very high frequencies being smaller than the radius of the ZnO blocks. Fig. 4 illustrates this. For 10 MHz, the penetration depth is 48 mm at 10 kA. Thus, the inductance of the arrester body, which in the adjusted parameters included the internal inductance of the ZnO blocks, will be higher than the real value and produce a higher voltage drop. Both the conventional and IEEE model reproduce the known behavior of presenting a higher crest value for surges with a short-time front. A comparison with typical manufacturer-supplied data for the residual voltage of a surge arrester with 120 kV has shown that the IEEE model presents lower values, and the conventional model presented better results in surge front times up to 0.8 s, where this model started to present higher values. This is an advantage, since the results are conservative. A comparison of both models submitted to the power frequency presented exactly the same results, which were in agreement with the eld measurements of leakage current on the same type of arresters. APPENDIX Data used in this paper relate to an arrester with a rated voltage of 120 kV. The characteristics informed by the manufacturer are summarized in Fig. 27 and Table VIII. REFERENCES
[1] P. M. Anderson, Analysis of Faulted Power Systems. New York: Wiley, 1995, p. 470. [2] J. D. Kraus and K. R. Carver, Electromagnetics, 2nd ed. Tokyo, Japan: McGraw-Hill Kogakusha, 1973, p. 406. [3] Surge ArrestersPart 4: Metal-Oxide Surge Arresters Without Gaps for a.c. Systems,, IEC 60099-4, Ed.2.22009-05. [4] S. Tominaga, K. Azumi, Y. Shibuya, M. Imataki, Y. Fujiwara, and S. Nichida, Protective performance of metal oxide surge arrester based on the dynamic v-i characteristics, IEEE Trans. Power App. Syst., vol. PAS-98, no. 6, pp. 18601871, Nov. 1979. [5] A. Bayadi, N. Harid, K. Zehar, and S. Belkhiat, Simulation of metal oxide surge arrester dynamic behavior under fast transients, presented at the Int. Conf. Power Syst. Transients, New Orleans, LA, USA, 2003. [6] IEEE Guide for Application of Metal-Oxide Surge Arresters for Alternating-Current Systems, IEEE Standard C62.22-2009, Jul. 2009. [7] S. S. Wanderley and P. M. Miguel, Comparao dos modelos de pararaios utilizados para simulao no ATP, presented at the XXI Seminrio Naciaonal de Produco e Transmisso de Energia Eltrica, Florianpolis, SC, Brazil, 2011. Pablo Mourente Miguel (M11) was born in El Ferrol, Spain, in August 1951. He graduated in electrical engineering from the Universidade Federal do Rio de Janeiro (UFRJ), Rio de Janeiro, Brazil, in 1975 and received the M.Sc. and D.Sc. degrees from the Alberto Luiz Coimba Institute Graduate School and Research in Engineering (COPPE-UFRJ) in 1981 and 1984, respectively. Currently, he is a Consulting Engineer with TgDelta Engenharia e Consultoria Ltd., Rio de Janeiro.

ment and installations. It is important to have means to evaluate the performance of the arresters, which is done by performing digital simulations of the electric system. In these simulations, the limiting voltages on several points of interest are determined. In addition, the current through the arrester and the dissipated power and energy have to be evaluated in order to choose an arrester, which is able to operate in electric systems. The IEEE model necessitates that the user transform the manufacturer data presented for one nonlinear resistor in data related to two nonlinear resistors. The conventional model uses a very simple adjustment, the manufacturer data are directly used on the nonlinear resistor and inductances added in series with this nonlinear resistor. The calculation of the inductances on the arrester branch, as proposed here, is very simple. A comparison of the results with the simple conventional model and the more complex IEEE model have shown that differences in the results presented by both models are signicant only when the front time of the current or voltage surge is below s. For front times above 1 s, the results obtained are

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