IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO.

6, NOVEMBER 2013

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Simulation to Study the Effect of Oxide Thickness and High-K Dielectric on Drain-Induced Barrier Lowering in N-type MOSFET
Subhradip Das and Sudakshina Kundu
AbstractThe effect of variation of oxide thickness on the draininduced barrier lowering, simulation parameter of a conventional MOSFET has been studied, rst theoretically by proposing a new numerical method and then verifying by simulating with Sentaurus TCAD Toolkit. Since SiO2 has its limitations at very low oxide thicknesses, improvement in the performance of the MOS by using high-K dielectric material for gate-channel isolation has also been studied. Index TermsDrain-induced barrier lowering (DIBL), high-k dielectric, simulation, sentaurus toolkit.

II. THEORY A short-channel MOSFET with channel length less than the minimum value given by [10]
L m i n =0 . 4 {r j t o x ( W d + W s ) 2 }
5

(1)

I. INTRODUCTION

HE feature size of MOSFET has been scaled down obeying Moores Law [1] in order to keep pace with the miniaturization standards, which has started with 10-m halfpitch of a standard memory cell in 1971, has reached as low as 22 nm in 2011 and is all set to scale down to 11 nm in 2015 according to international technology roadmap for semiconductors (ITRS) [2]. The aim is to reach more than moore according to a white paper by the ITRS. This has resulted in some serious short-channel effects [3], drain-induced barrier lowering (DIBL) being one important limitation to the performance of the Nanoscale MOSFETs [4][6]. As the channel length scales down so does the oxide thickness. But beyond a maximum oxide thickness, the leakage current increases. If high-K dielectric materials can replace SiO2 , this limitation is substantially reduced [7]. In this paper, effects of scaling the dielectric material thickness and replacing SiO2 by high-K material for gate isolation particularly on DIBL are studied. A conventional enhancement n-MOSFET has been studied by developing a computational theory [6], [8], and [9] and checking its validity with the results simulated by Sentaurus, which is a powerful TCAD tool. Use of HfO2 as the High-K dielectric proves benecial and the improvement of the DIBL characteristics is established in this paper.

where rj is the junction depth, tox is the oxide thickness, and Wd and Ws are the depletion widths in the drain to substrate and source to substrate junctions, respectively. In case of short-channel MOSFET, the threshold voltage Vth required to turn ON the device is not constant, but changes with variation of drain to source voltage Vd . The variation in Vth is attributed to the lowering of barrier between source and drain with the increase in Vds . This change in threshold voltage is calculated as an index of DIBL. DIBL for bulk Si device is given in [10] as DIBL = 180 td tox Vds SL2 e (2)

where td is the depletion width, S is the subthreshold swing, and Le is the effective channel length. Here, td is given by td 2S i s qNS i (3)

and subthreshold swing is given by the expression found in [10] as S = (60 mV) 1 + tox S i td ox . (4)

It is evident from the aforementioned expressions that the DIBL parameter is dependent on the insulator thickness and the permittivity of the insulator. A. Oxide Scaling and High-k Dielectric For decades since the birth of MOSFET, SiO2 has been the insulator of choice. However, with scaling the SiO2 layer faces the following challenges. 1) Direct tunneling leakage current increases with decreasing gate oxide thickness. 2) There is undesirable Boron diffusion from polysilicon gate through the thin oxide. 3) The reliability is poor. 4) There is high defect density. 5) Uniformity of gate oxide is poor. An insulating material with high dielectric constant will achieve the same advantages of scaled down oxide minus the

Manuscript received March 7, 2013; revised July 10, 2013; accepted July 29, 2013. Date of publication August 2, 2013; date of current version November 6, 2013. This work is supported in part by the Technical Education Quality Improvement Programme (TEQIP) Phase II and in part by the West Bengal University of Technology. The review of this paper was arranged by Associate Editor A. Bhalerao. The authors are with the Department of Computer Science and Engineering, West Bengal University of Technology, Kolkata 700064, India (e-mail: subhradipdas85@gmail.com; sudakshinakundu@wbut.ac.in). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TNANO.2013.2276441

1536-125X 2013 IEEE

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IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEMBER 2013

TABLE I GATE DIELECTRIC MATERIALS, DIELECTRIC CONSTANTS AND ENERGY BAND GAP

Fig. 1.

x and y eld directions in n-MOSFET.

disadvantages of the thin oxide since the dielectric will be wider in thickness. This work aims at investigating the relation between oxide thickness and DIBL parameter for submicron devices. We are also aiming to nd out the variation of DIBL parameter with the use of high-K dielectric materials as alternative to SiO2 . The effectiveness of the high-K material is measured by its effective oxide thickness (EOT). The EOT of the high-K materials listed in Table I can be obtained from the following formula [10]. The choice of the material for achieving gate isolation is made on two important considerations, the permittivity and the energy band gap. Table I indicates a few good quality dielectric materials, of which HfO2 is the material of choice because of its high-K value and high-band-gap energy. From Table I, it may be concluded that materials with high-K values have less energy band gap as compared to those with lower K values. Hence, a tradeoff is to be made. HfO2 is considered ahead of ZrO2 as the former have slightly greater energy band gap as opposed to the latter. Higher the band gap, more will be the connement and hence lesser will be the gate-body leakage current. In this computation of DIBL parameter, the depletion width td in (2) has been done by solving the 2D Poissons equation 2 2 + 2 = x2 y where is the total space charge density given by
+ (x, y ) = {p(x, y ) + Nd n(x, y ) Na }

Fig. 2. Variation of DIBL parameter with oxide thickness tox , oxide thickness (nm) along x-axis and DIBL in mv/V along y -axis.

potential is obtained from that solution. Thus, td is more exact as compared to the usually assumed values of surface potential. With such modied accurate value of td , the analytical expression of DIBL is expected to more accurately agree with the simulated results and hence give a better result. III. RESULTS AND DISCUSSIONS This section presents the results of this study. Here, the problem is approached in two different ways. First, the effect of variation of oxide thickness on DIBL is computed theoretically and plotted. MATLAB software is used to obtain the results. Then, TCAD Sentaurus is used to simulate the n-MOSFET and hence verify the results. Considering a conventional n-MOSFET, the variation of oxide thickness with DIBL parameter is plotted using (2) and corresponding simulated values are also plotted. SiO2 is taken as the insulating layer in the simulation. Fig. 2 shows the variation of DIBL parameter with oxide thickness. Red curve represents the simulated result and the blue one plots the computed values. The curves show close agreement. It is evident from the simulated and the computed curves that the DIBL parameter improves as the oxide thickness increases. Slight disagreement in the simulated and computed values may be due to the fact

(5)

(6)

where n(x,y) and p(x,y) give the electron and hole densities as a + function of potential, respectively, Na and Nd are the ionized acceptors and donors, respectively, and also the potential is taken as a function of eld along both x and y directions as indicated in Fig. 1. From (5) and (6), we have 2 (x, y ) 2 (x, y ) 2qNi + = . x2 y 2 s (7)

Exact solution of Poissons equation is analytically computed employing nite element method (FEM) with the help of partial differential equation toolbox from MATLAB. Value of surface

DAS AND KUNDU: SIMULATION TO STUDY THE EFFECT OF OXIDE THICKNESS AND HIGH-K DIELECTRIC

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of gate on the channel is restored. However, narrow oxides lead to leakage current, which is detrimental. With the use of a highK layer replacing the oxide, the DIBL effect decreases and the DIBL parameter improves as now a wider insulation can be used instead of the narrow oxide. The effectiveness of the highK material is measured by its EOT. With HfO2 as dielectric layer, the scaled MOSFET provides better DIBL characteristics than the conventional MOSFET. ACKNOWLEDGMENT S. Das would like to thank Prof. S. Kundu for her constant support and inspiration and guidance. Special mention must be made of Dr. S. Chatterjee, Lecturer in the Department of Electronic Sciences, University of Calcutta. The authors would also like to thank S. Ghosh and R. Dutta of the Department of Computer Science and Engineering, West Bengal University of Technology, Kolkata, India, for their useful discussions.
Fig. 3. Variation of EOT with permittivity, EOT (nm) along x-axis and permitivity along y -axis.

REFERENCES
[1] G. E. Moore, Progress in digital integrated electronics, in Proc. IEDM Tech. Dig., 1975, pp. 1113. [2] W. Arden, M. Brillou et, P. Cogez, M. Graef, B. Huizing, and R. Mahnkop, More-than-Moore WhitePaper. (Nov. 16, 2010).[Online]. http://www.itrs.net/Links/2010ITRS/IRC-ITRS-MtM-v2%203.pdf, Jun. 22, 2012. [3] Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. New York, NY, USA: Cambridge Univ. Press,, 1998, ch. 3, pp. 176179. [4] A. A. Mutlu and M. Rahman, Two-dimensional analytical model for drain induced barrier lowering (DIBL) in short channel MOSFETs, in Proc. IEEE Southeastcon, 2000, pp. 340344. [5] S. G. C. S. Ramanan, Drain-Induced Barrier-Lowering analysis in VLSI MOSFET devices using two-dimensional numerical simulation, IEEE Trans. Electron Devices, vol. ED-33, no. 11, Nov. 1986. [6] S. S. Mahato, P. Chakraborty, T. K. Maiti, M. K. Bera, C. Mahata, M. Sengupta, A. Chakraborty, S. K. Sarkar, and C. K. Maiti, DIBL in short-channel strained-Si n-MOSFET, in Proc. IEEE Conf., 2008, pp. 1 4. [7] M. H. Chowdhury, M. A. Mannan, and S. A. Mahmood, HighK dielectric for submicron MOSFET, IJETSE Int. J. Emerging Technol. Sci. Eng., vol. 2, no. 2, pp. 112, Jul. 2010. [8] N. Arora, Threshold voltage MOSFET modeling for VLSI simulation theory and practice, Int. Series Advances Solid State Electron. Technol., 2007, ch. 8, sec. 5.3.3, pp. 210218. [9] M. Morsin, M. K. Amriey, A. M. Zulkipli, and R. Sanudin, Design, simulation and characterization of 50 nm p-well MOSFET using sentaurus TCAD software, in Proc. Malaysian Tech. Universities Conf. Eng. Technol., Jun. 2022, 2009. [10] S. M. Sze, Physics of semiconductor deviceMOSFET, 2nd ed. ed. New York, NY, USA: Wiley, ch. 8, pp. 469485.

that while computing the polysilicon gate depletion, gate oxide tunneling, etc., have not been considered. The simulator TCAD Sentaurus has considered these effects by default. Fig. 3 plots the EOT against permittivity for different highK materials. The equivalent oxide thickness decreases with increase of permittivity K . From Fig. 2, it is evident that gate control over channel region increases as permittivity K increases and the DIBL effect is reduced. Fig. 3 gives the improvement in DIBL parameter with permittivity. Effect of change of dielectric material is accounted for by the varying EOT. Effect of different insulating material with different dielectric constants can be easily incorporated by varying the EOT in the calculations which is done here. If a high-K dielectric layer is grown on substrate itself the interface becomes unstable due to mismatch in the lattice constant of the insulator and substrate. This causes increase in scattering and hence mobility degradation. The solution is to grow a low-K dielectric layer above the substrate and then grow the high-K layer [7]. This will increase the EOT thus affecting the DIBL parameter. IV. CONCLUSION It may, therefore, be concluded that as the device is scaled down, DIBL becomes more pronounced. If the insulator thickness is scaled down DIBL effect will get reduced as the control

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