Principles Of

Digital Design
Chapter 1
Introduction
Design Representation Levels of Abstraction Design Tasks and Design Processes CAD Tools

Design Representation

Behavioral or functional representation

Specifies the behavior or the function of a design without any implementation information

Structural representation
Specifies the implementation of a design in terms of components and their interconnections

Physical representation
Specifies the physical characteristics of the design
Blueprint for manufacturing

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Behavioral Representation)

no

Pulse =

yes

Seconds = Seconds + 1 S display = Seconds

yes

no

Seconds = 0?

Minutes = Minutes + 1 M display = Minutes

yes

no

Minutes = 0?

Hours = Hours + 1 H display = Hours

Clock Process

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Behavioral Representation)

no

S1 closed?
yes no

yes yes

no

S2 closed?

S2 closed?
yes

Not possible

yes

S3 closed?

no

no

S3 closed?

Mwakeup = Mwakeup + 1 M display = Mwakeup

yes no no

Minutes = Minutes + 1 M display = Minutes

yes

S4 closed?

S4 closed?

Hwakeup = Hwakeup + 1 H display = Hwakeup

Hours = Hours + 1 H display = Hours

Setup Process
Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Behavioral Representation)

no

Minutes = Mwakeup?
no

yes yes yes

Hours = Hwakeup?
no

S5 closed?

Buzz = 1

Alarm Process

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Structural Representation)

1 Oscillator
S1 (Time set) S3 (M advance) S4 (H advance) S2 (Alarm set)

Pulse generator
Pulse

S3

S4

S cnt

M cnt

H cnt

M reg

H reg

S display M display H display

S2 S2

Minute comparator

Buzz Hour Sound comparator S5 generator (Alarm on) 6

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Pulse Wave)

Generated by Oscillator

(a) Sine wave

1 second

1 (b) Pulse wave 0

Generated by Pulse generator

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Alarm Clock (Physical Representation)

Oscillator Pulse generator Sound generator

OSC

PG

SG

Liquid display

Minute advance switch DS Battery holder

Hour advance switch Set and alarm switches

HOURS

MINUTES

ALM

TIME

ON

OFF

TIMESET

ALARM

Printed circuit board

Front view

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Levels of Abstraction
Levels Behavioral forms
Differential eq., current-voltage diagrams

Structural components
Transistors, resistors, capacitors

Physical objects
Analog & digital cells

Transistor

Gate

Boolean equations, finite-state machines

Gates, flip-flops

Modules or units

Register

Algorithms, flowcharts, instruction sets, generalized FSM

Adders, comparators, registers, counters, register files, queues

Microchips

Processor

Executable specification, programs

Processors, controllers, memories, ASICs, ASIPs 9

Printed-circuit boards or multi-chip modules

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Design Methodologies

Top-down

Bottom-up

Meet-in-the-middle

Copyright 2004-2005 by Daniel D. Gajski

10

Slides by Philip Pham, University of California, Irvine

Design Process
Design Specification Library Development Design Synthesis

System synthesis Logic synthesis Architecture synthesis Circuit design Sequential synthesis Layout generation

Design Analysis
Property verification Constraint satisfaction for cost, performance, power, testability manufacturing, and other metrics

Documentation Manufacturing

Copyright 2004-2005 by Daniel D. Gajski

11

Slides by Philip Pham, University of California, Irvine

CAD Tools

Design Capture and Modeling

Schematic capture Modeling in a hardware-description language

Synthesis Tools
Logic synthesis Sequential synthesis Behavioral or high-level synthesis System synthesis

Verification and Simulation Physical Design

Placement Routing

Testing
12

Copyright 2004-2005 by Daniel D. Gajski

Slides by Philip Pham, University of California, Irvine

Typical Design Process

Market Analysis Product Requirements Product Specification Product Architecture Product Design Verification or Simulation

Physical Design Test Generation Documentation Manufacturing Testing

Copyright 2004-2005 by Daniel D. Gajski

13

Slides by Philip Pham, University of California, Irvine

Road Map of Digital Design

Transistors, resistors, capacitors Electronics Digital circuit design Analog circuit design

Boolean algebra

Logic gates and flip-flops

Analog components

Finite-state machine Logical design techniques Binary system and data representation Combinational components Storage components Interface components Sequential design techniques VLSI design

Generalized finite-state machines

Algorithm synthesis

Material covered in book

Software design and engineering

Processor components

Computer design Embedded system design

Hardware, software, and mechanical codesign Copyright 2004-2005 by Daniel D. Gajski

14

Slides by Philip Pham, University of California, Irvine

Chapter Summary

Three Design Representations

Behavioral Structural Physical

Four Levels of Abstraction

System Processor Register Gate Capture and Modeling Verification and Simulation Synthesis and Analysis Placement and Routing Test Generation

CAD Tools

Road Map
15
Slides by Philip Pham, University of California, Irvine

Copyright 2004-2005 by Daniel D. Gajski