Mid-I 2011

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Code No: A107320202 Set No. 1 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD III B.Tech. II Sem., I Mid-Term Examinations, February 2011 MICROPROCESSORS AND MICROCONTROLLERS Objective Exam Name: ______________________________ Hall Ticket No. A I 1. Choose the correct alternative:
Answer All Questions. All Questions Carry Equal Marks.Time: 20 Min. Marks: 20.
Whicn of the following register is not present in EU( Execution Unit) of the 8086 microprocessor? [ ] a. SP b.BP c.SI d.IP Which signal is used to demultiplex the Adress bus of 8086 a. BHE b.LOCK c.READY d.ALE [ ]
2.
3.
Which of the following signal is used to control the direction of dataflow of bus transcievers [ _ __ ____ a. DT / R b. M / IO c. DEN d.ALE If a memory block uses address range 10000H to 2FFFFh then its capacity is a. 64KB b.128KB c.256KB d.512KB
4.
5.
Which of the following register holds the address of I/O port of I/O instructions of 8086 [ a. BX b.DX c.SI d.DI Which of the followin gsignal belongs to maximun mode only ____ _____ _____ ____ a. RD b. TEST c. LOCK d. DEN Which of the following pair of registers is invalid a. CS:SP b. SS: SP c. DS:BX
6.
7.
8.
In minimum mode configuration M/IO & WR=0 indicates the following operation a. I/O read b. I/O Write c. Memory Read d. Memory Write Which of the following flags is used for single stepping a. Direction Flag b. Interrupt Flag c.Trap Flag Which Command word of 8259 is used masking interrupts a. ICW1 b.ICW2 c.OCW1
T N
W U
R O
D L
[ d. ES:DI [
9.
[ d. Overflow Flag [ d.OCW2
10.
Cont..2
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Code No: A107320202 II 11. 12. 13. 14. 15. Fill in the blanks:
:2:
Set No.1
The cycle required to read from memory is called ___________. The address available at 8086 pins is called____________. During block transfer mode , the completion of data transfer is indicated by ______. The number of ports required to interface a 12 bit DAC is _________. The Condition which makes CPU execute next instruction after WAIT instruction is______________ . The ______ bit of the Control word register of 8257 is used for enabling auto load facility. The Instruction of 8257 used to disable CPU address is ___________.
16. 17. 18. 19. 20.
The instruction MOV 1234[BX],3456H is ______ bit (opcode) Instruction. The number of 8259s required to service 64 interrupts is _________. The command word used to differentiate master and slave is ______.
T N
W U
-oOo-
R O
D L
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www.jntuworld.com Code No: A107320202 Set No. 2 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD III B.Tech. II Sem., I Mid-Term Examinations, February 2011 MICROPROCESSORS AND MICROCONTROLLERS Objective Exam Name: ______________________________ Hall Ticket No. A I 1. Choose the correct alternative: If a memory block uses address range 10000H to 2FFFFh then its capacity is a. 64KB b.128KB c.256KB d.512KB [ ]
2.
Which of the following register holds the address of I/O port of I/O instructions of 8086 [ a. BX b.DX c.SI d.DI Which of the followin gsignal belongs to maximun mode only ____ _____ _____ ____ a. RD b. TEST c. LOCK d. DEN Which of the following pair of registers is invalid a. CS:SP b. SS: SP c. DS:BX
3.
4.
5.
6.
7.
8.
Whicn of the following register is not present in EU( Execution Unit) of the 8086 microprocessor? [ ] a. SP b.BP c.SI d.IP Which signal is used to demultiplex the Adress bus of 8086 a. BHE b.LOCK c.READY d.ALE [ ]
9.
T N
W U
R O
d. ES:DI
D L
d. Overflow Flag [ d.OCW2 ]
10.
Which of the following signal is used to control the direction of dataflow of bus transcievers [ _ __ ____ a. DT / R b. M / IO c. DEN d.ALE
Cont..2
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Code No: A107320202 II 11. 12. Fill in the blanks:
:2:
Set No.2
The number of ports required to interface a 12 bit DAC is _________. The Condition which makes CPU execute next instruction after WAIT instruction is______________ . The ______ bit of the Control word register of 8257 is used for enabling auto load facility. The Instruction of 8257 used to disable CPU address is ___________. The instruction MOV 1234[BX],3456H is ______ bit (opcode) Instruction. The number of 8259s required to service 64 interrupts is _________. The command word used to differentiate master and slave is ______. The cycle required to read from memory is called ___________. The address available at 8086 pins is called____________.
13. 14. 15. 16. 17. 18. 19. 20.
During block transfer mode , the completion of data transfer is indicated by ______.
T N
W U
-oOo-
R O
D L
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www.jntuworld.com Code No: A107320202 Set No. 3 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD III B.Tech. II Sem., I Mid-Term Examinations, February 2011 MICROPROCESSORS AND MICROCONTROLLERS Objective Exam Name: ______________________________ Hall Ticket No. A I 1. Choose the correct alternative: Which of the followin gsignal belongs to maximun mode only ____ _____ _____ ____ a. RD b. TEST c. LOCK d. DEN Which of the following pair of registers is invalid a. CS:SP b. SS: SP c. DS:BX [ ]
2.
[ d. ES:DI
3.
4.
5.
6.
Whicn of the following register is not present in EU( Execution Unit) of the 8086 microprocessor? [ ] a. SP b.BP c.SI d.IP Which signal is used to demultiplex the Adress bus of 8086 a. BHE b.LOCK c.READY d.ALE
7.
8.
Which of the following signal is used to control the direction of dataflow of bus transcievers [ _ __ ____ a. DT / R b. M / IO c. DEN d.ALE If a memory block uses address range 10000H to 2FFFFh then its capacity is a. 64KB b.128KB c.256KB d.512KB [
T N
W U
R O
d. Overflow Flag [ ]
D L
d.OCW2
9.
10.
Which of the following register holds the address of I/O port of I/O instructions of 8086 [ a. BX b.DX c.SI d.DI
Cont..2
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Code No: A107320202 II 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. Fill in the blanks:
:2:
Set No.3
The ______ bit of the Control word register of 8257 is used for enabling auto load facility. The Instruction of 8257 used to disable CPU address is ___________. The instruction MOV 1234[BX],3456H is ______ bit (opcode) Instruction. The number of 8259s required to service 64 interrupts is _________. The command word used to differentiate master and slave is ______. The cycle required to read from memory is called ___________. The address available at 8086 pins is called____________.
During block transfer mode , the completion of data transfer is indicated by ______. The number of ports required to interface a 12 bit DAC is _________.
The Condition which makes CPU execute next instruction after WAIT instruction is______________ .
T N
W U
-oOo-
R O
D L
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www.jntuworld.com Code No: A107320202 Set No. 4 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD III B.Tech. II Sem., I Mid-Term Examinations, February 2011 MICROPROCESSORS AND MICROCONTROLLERS Objective Exam Name: ______________________________ Hall Ticket No. A I 1. Choose the correct alternative: In minimum mode configuration M/IO & WR=0 indicates the following operation a. I/O read b. I/O Write c. Memory Read d. Memory Write Which of the following flags is used for single stepping a. Direction Flag b. Interrupt Flag c.Trap Flag Which Command word of 8259 is used masking interrupts a. ICW1 b.ICW2 c.OCW1 [ ]
2.
[ d. Overflow Flag
3.
d.OCW2
4.
Whicn of the following register is not present in EU( Execution Unit) of the 8086 microprocessor? [ ] a. SP b.BP c.SI d.IP Which signal is used to demultiplex the Adress bus of 8086 a. BHE b.LOCK c.READY d.ALE
5.
6.
Which of the following signal is used to control the direction of dataflow of bus transcievers [ _ __ ____ a. DT / R b. M / IO c. DEN d.ALE If a memory block uses address range 10000H to 2FFFFh then its capacity is a. 64KB b.128KB c.256KB d.512KB
7.
8.
Which of the following register holds the address of I/O port of I/O instructions of 8086 [ a. BX b.DX c.SI d.DI Which of the followin gsignal belongs to maximun mode only ____ _____ _____ ____ a. RD b. TEST c. LOCK d. DEN Which of the following pair of registers is invalid a. CS:SP b. SS: SP c. DS:BX [ ]
T N
W U
R O
D L
9.
10.
[ d. ES:DI
Cont..2
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Code No: A107320202 II 11. 12. 13. 14. 15. 16. 17. 18. Fill in the blanks:
:2:
Set No.4
The instruction MOV 1234[BX],3456H is ______ bit (opcode) Instruction. The number of 8259s required to service 64 interrupts is _________. The command word used to differentiate master and slave is ______. The cycle required to read from memory is called ___________. The address available at 8086 pins is called____________. During block transfer mode , the completion of data transfer is indicated by ______. The number of ports required to interface a 12 bit DAC is _________.
The Condition which makes CPU execute next instruction after WAIT instruction is______________ . The ______ bit of the Control word register of 8257 is used for enabling auto load facility. The Instruction of 8257 used to disable CPU address is ___________.
19. 20.
T N
W U
-oOo-
R O
D L
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[ d. Overflow Flag [ d.OCW2

16. 17. 18. 19. 20.

d. Overflow Flag [ d.OCW2 ]

Code No: A107320202 II 11. 12. Fill in the blanks:

13. 14. 15. 16. 17. 18. 19. 20.

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