Guide to cadence IC Design Software (Virtuoso Schematic/Layout, Analog Environment, and Assura DRC/LVS) Department of Electrical and Computer

Engineering Fall 2007

(last revised 10 17 07!

Summary "#is is a tutorial on #ow to design$ simulate$ la%out$ run D&C ' ()S$ and generate fa*rication files for an Integrated Circuit (IC! using t#e cadence Virtuoso design platform+ "#is tutorial will wal, t#roug# an e-ample C./S inverter design from start to finis# in order to e-plain eac# of t#e steps in t#e design+ Cadence runs in on (inu- environment+ (inu- wor,stations are availa*le in Co*leig# 0all$ &m 120+ "#e following lists t#e steps t#at will *e covered in t#is tutorial2 Step 12 (aunc#ing Cadence Step 22 Creating a (i*rar% Step 32 Creating a Sc#ematic and S%m*ol for t#e Inverter Step 42 Creating a Simulation "est 5enc# for t#e Inverter Step 62 &unning a S7ICE simulation (DC and "ransient! Step 12 Creating a (a%out Step 72 &unning D&C Step 82 &unning ()S Step 92 Generating fa*rication files to create mas,s (not availa*le %et!

Step 1: Launching Cadence 1! (og into t#e (inu- wor,stations in Co*leig# 120 using t#e :DE des,top option+ a! If %ou are enrolled in EE414 (Fall 2007! ; %our username is2 ; %our password is2 >/"E 12 <first initial= followed *% <last name= %our *anner ID wit#out t#e <;<

Don?t c#ange %our password$ it will onl% c#ange on t#e wor,station t#at %ou are logged into+ @ou don?t #ave permission to c#ange %our password on t#e server+ Also don?t c#ange %our s#ell$ Cadence won?t run in an% ot#er s#ell t#an t#e default+ "#e computers in C/50 120 are dual *oot+ "#e% automaticall% come up in SuSE (inu-+ If t#e% are *ooted into windows$ %ou will need to s#utdown and restart to *ring up (inu-+ B#en (inu- *oots$ it will automaticall% mount %our home director%+ @our #ome director% e-ists on a server called ece- ileserver+ "#e (inu- wor,station tries to mount t#is drive once ever% minute+ If %ou *oot up and t#en login *efore t#is drive #as *een mounted$ %ou will not see an% of %our files and not *e a*le to do an%t#ing+ "#e solution is to wait a couple of minutes after *ooting up and allow t#e drive to automaticall% mount *efore logging in+ "#is is onl% an issue if %ou #ave to re*oot+ If t#e wor,stations are alread% *ooted into (inu-$ t#en %ou don?t need to worr% a*out it+

>/"E 22

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Start a terminal window a! *! /n t#e tas,*ar at t#e *ottom of t#e screen$ %ou?ll see an icon of a monitor wit# a little s#ell ne-t to it+ Clic, on t#is to *ring up a terminal window+ "#e terminal s#ould *e *roug#t up in %our #ome director%+ "est to ma,e sure ever%t#ing is /: *% doing a2 CC w#oami CC pwd (it s#ould return %our username! (it s#ould return %our #ome director% #ome username!

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C#ange into %our wor,ing director% a! In t#e terminal window$ c#ange to <wor,= *% t%ping CC cd wor,

>/"E 12 In t#is director%$ %ou will see a file called <cds+li*=+ "#is is t#e file t#at sets up t#e Cadence licenses and t#e tool,it we?ll *e using+ 4! (aunc# Cadence a! @ou will need to *e in %our <wor,= director% in order to start Cadence+ @ou can return to %our #ome director% no matter w#ere %ou are *% t%ping2 CC cd >ow c#ange to %our <wor,= director% *% t%ping2 CC cd wor, *! Start cadence *% t%ping2 CC icf* ' >/"E 12 t#e <'= means t#at t#e program will run in t#e *ac,ground+ It is important t#at w#en %ou are done wit# cadence$ %ou need to close t#e program using t#e <File;E-it=$ <Bindow;Close=$ etcD If %ou clic, on t#e <E= *utton of t#e terminal$ t#e program will still *e running in t#e *ac,ground and %our files will *e loc,ed t#e ne-t t%pe %ou login+ >/"E 22 If %ou login and run cadence and %our files are loc,ed$ %ou need to find and delete an% F+lc, files t#at e-ist+ Step 2: Creating a Library 1! .a,e a director% to store %our Cadence (i*rar% (onl% do t#is once! a! @ou will *e wor,ing wit# Li!raries in cadence+ Cadence organiGes all of its files using li*raries+ "o ,eep t#ings organiGed$ %ou will create a folder under "or# called <CadenceH(i*raries=+ In t#is director%$ we will create a li*rar% for EE414+ @ou create %our li*raries in Cadence+ Be are going to manuall% create a Directory using t#e terminal window called <CadenceH(i*raries=+ "#en in Cadence$ we will create t#e actual li*raries+ If %ou ever want to create anot#er li*rar% for a senior design or researc# proIect$ %ou would do it in t#is folder2 .a,e a director% for %our li*rar% *% t%ping2 CC m,dir CadenceH(i*raries *! C#ec, t#at t#e director% was successfull% created *% t%ping2 CC ls Jal 4

@ou s#ould see %our recentl% created li*rar%

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Create a (i*rar% in Cadence a! Be are going to create a (i*rar% called <EE414H(i*rar%=+ "#is li*rar% will #old all of our proIects for t#e semester+ Be will do t#is in t#e Cadence Li!rary $anager window+ B#en %ou launc# Cadence$ t#e Li!rary $anager is t#e first window t#at comes up+ First c#ec, t#at t#e software #as come up correctl% wit# t#e necessar% design ,its+ @ou s#ould see t#e following (i*raries in t#e <(i*rar%= section of t#e Li!rary $anager+ ; ami600#-,; ami600#-t"#ese are t#e li*raries for t#e A.I 0+6um C./S process we will *e using+ If %ou do >/" see t#ese li*raries$ somet#ing is wrong and %ou need to e-it cadence+ "#e first t#ing to c#ec, is t#at %ou launc#ed Cadence in %our "or# director%$ w#ic# contained t#e cds+li* file+ "#e second t#ing to c#ec, is t#at %our #ome drive was successfull% mounted upon login+ If it was mounted correctl%$ %ou s#ould automaticall% see a "or# director% in %our #ome director%+ *! >ow create a li*rar% called <EE414H(i*rar%= *% using t#e pull;down menus in t#e Li!rary $anager window2 File J >ew J (i*rar% In t#e %e" Li!rary window$ enter t#e following2 >ame2 Director%2 Clic, </:= EE414H(i*rar% 5rowse to %our <CadenceH(i*raries= director%

In t#e &echnology 'ile or %e" Li!rary window t#at pops up$ we want to attac# t#e A.I 0+6um tec#nolog% file to our li*rar%2 Select <Attac#ed to an e-isting tec#file Clic, </:= In t#e Attach Design Li!rary to &echnology 'ile window2 Select <ami600#-,-= from t#e pull;down *o-+ Clic, </:

Step 3: Creating a Schematic and Symbol for the Inverter 1! Create a cell called I>) a! B#en we create an item in Cadence$ it is called a Cell+ A cell can contain various vie"s suc# as sc#ematics$ s%m*ols$ spectre simulation info$ )erilog$ la%out$ etcD Be will *egin *% creating a cell for our inverter called I>) t#at will #ave a sc#ematic and a s%m*ol+ In order to simulate our I>) cell$ we?ll create anot#er cell called testHI>)+ "#e testHI>) cell will contain a sc#ematic in w#ic# we will instantiate our I>) cell+ In t#e Li!rary $anager window$ #ig#lig#t %our EE414H(i*rar% t#en use t#e pull; down menus to create a new cell2 File J >ew J Cell )iew In t#e Create %e" 'ile window$ select2 (i*rar% >ame2 Cell >ame2 )iew >ame2 "ool2 (i*rar% 7at# file2 EE414H(i*rar% (t#is is t#e li*rar% t#e cell will *e part of! (our uniKue name! (Default!

I>) Sc#ematic Composer;Sc#ematic verif% t#is is set to2 #ome username wor, cds+li*

"#is will *ring up t#e Virtuoso Schematic Editing window+ 2! Enter t#e sc#ematic for t#e inverter a! Enter an >./S transistor 1

; on t#e left #and side of t#e sc#ematic window$ %ou?ll see some icons+ Clic, on t#e <Instance= icon+ @ou can also use t#e LiM *utton+ ; t#is *rings up t#e Add (nstance window= In t#is window$ select t#e following2 (i*rar%2 ; 5rowse to t#e ami600#-t- li*rar% ; select t#e cell called <n= ; select t#e view called <s%m*ol= (clic, on it once!

; %ou will see an >./S s%m*ol now connected to %our mouse in t#e sc#ematic window+ Clic, once to drop t#e s%m*ol in t#e sc#ematic+ 0it t#e LESCM *utton to e-it t#e <add instance= command mode+ *! .odif% t#e properties for t#e >./S transistor ; clic, on t#e >./S s%m*ol ; *ring up its properties dialog *% eit#er2 ; clic,ing on t#e )ro*erty icon on t#e left ; #itting t#e LKM *utton ; c#ange t#e Bidt# to 6u (>ote t#e default units are um$ so Iust enter 6! ; Clic, </:= c! Enter a 7./S transistor ; on t#e left #and side of t#e sc#ematic window$ clic, on t#e <Instance= icon+ ; in t#e Add (nstance window=$ select t#e following2 (i*rar%2 ; 5rowse to t#e ami600#-t- li*rar% ; select t#e cell called <p= ; select t#e view called <s%m*ol= (clic, on it once!

; %ou will see a 7./S s%m*ol now connected to %our mouse in t#e sc#ematic window+ Clic, once to drop t#e s%m*ol in t#e sc#ematic+ 0it t#e LESCM *utton to e-it t#e <add instance= command mode+ d! .odif% t#e properties for t#e 7./S transistor ; clic, on t#e 7./S s%m*ol ; *ring up its properties dialog *% eit#er2 ; clic,ing on t#e )ro*erty icon on t#e left (or #it LKM! ; c#ange t#e Bidt# to 10u (>ote t#e default units are um$ so Iust enter 10! ; Clic, </:= e! Add I / pins 7

; t#is circuit will ultimatel% #ave a s%m*ol t#at will *e instantiated in a #ig#er level design+ Be need to add I / pins to s#ow t#e inputs and outputs+ ; on t#e left #and side of t#e sc#ematic window$ clic, on t#e <7in= icon to add an I / pin ; w#en %ou do t#is$ an Add )in dialog will come up+ Fill in t#e following2 7in >ames2 Direction2 I> input

; >ow w#en %ou drag %our mouse into t#e sc#ematic window$ %ou?ll see a pin attac#ed to it+ B#ile %ou are dragging t#e pin around$ %ou can go *ac, into t#e Add )in dialog and rotate t#e pin to %our desired orientation *% clic,ing on <&otate=+ Clic, once in t#e sc#ematic window to add %our pin+ ; >ow t#at t#e pin #as *een placed$ %ou?ll notice t#at t#e Add )in dialog is still open+ @ou can use t#is to add t#e remaining pins+ Add t#e 3 remaining pins to %our inverter as follows (rotate t#em as %ou place t#em to ma,e t#em fit properl%!2 7in >ames2 Direction2 7in >ames2 Direction2 7in >ames2 Direction2 /N" output )DD input/utput )SS input/utput

; to end t#e Add )in command$ #it t#e LESCM *utton and t#e dialog will disappear+ f! &e;7osition %our instances ; *efore %ou wire up %our circuit$ %ou want to move around %our >./S$ 7./S$ and pins so t#e% are in a good location+ ; select an instance *% clic,ing on it once+ ; %ou can move t#e selected *% doing eit#er2 ; Edit;.ove ; clic,ing t#e LmM *utton ; w#en in t#e move command$ t#e instance will *e attac#ed to %our mouse+ "o drop t#e instance$ clic, once+ ; to end t#e move command$ clic, t#e LESCM *utton+

g!

Add wires ; now %ou will wire up t#e circuit+ /n t#e rig#t #and side of t#e sc#ematic window clic, on t#e +ire (narro") icon+ ; %ou are now in add "ire mode+ If %ou clic, once$ %ou will start adding a wire+ Cadence will automaticall% tr% to create t#e s#ortest pat# *etween pins+ 0owever$ if %ou want to manuall% add a corner$ %ou can single;clic,+ @ou can end t#e add "ire mode *% clic,ing once on an instance pin or dou*le clic,ing on t#e same location+ ; connect up t#e inverter input$ output$ )DD$ )SS$ and *od% connections+ If %ou ma,e a mista,e$ %ou can get out of t#e add "ire mode *% clic,ing LESCM+ "#en %ou can #ig#lig#t a wire and clic, LDeleteM to remove t#e wire+

#!

C#ec, and Save ; in t#e Sc#ematic window pull;down$ do t#e following2 Design J C#ec, and Save

; if %ou #ave an% warnings or errors$ %ou will get a pop up window telling %ou #ow man%+ "o see t#e details of t#e warnings and errors$ loo, in t#e Log window+ ; leave t#e sc#ematic window /7E> in order to create a s%m*ol+ 3! Create a s%m*ol for t#e inverter a! @ou will now create a sym!ol view for %our I>) cell ; in t#e sc#ematic window$ use t#e pull;downs to perform2 9

Design J Create Cellview J From Cellview "#is will automaticall% create a s%m*ol for %our sc#ematic wit# ports associated wit# t#e pins t#at %ou?ve added+ ; In t#e Cellvie" 'rom Cellvie" window ensure t#e following settings2 (>/"E2 t#ese s#ould default to t#e correct settings! (i*rar% >ame2 Cell >ame2 From )iew >ame2 "o )iew >ame2 "ool Data "%pe2 *! EE414H(i*rar% I>) sc#ematic s%m*ol Composer;S%m*ol

7osition t#e pins of %our s%m*ol ; in t#e Sym!ol ,eneration -*tions dialog$ %ou will tell t#e tool w#ere to locate %our pins+ .odif% %our pins as follows2 (eft 7ins2 &ig#t 7ins2 "op 7ins2 5ottom 7ins2 Clic, </:= ; %ou s#ould now see a Virtuoso Sym!ol Editing window pop up t#at #as %our newl% generated s%m*ol+ @ou will see %our pin names in addition to various parameters t#at can *e used to pass in information to %our lower;level circuit+ For now$ leave t#ese as t#e% are+ B#en t#e parameters are not used$ t#e% will not s#ow up w#en %ou instantiate t#is s%m*ol+ ; Nsing t#e pull;down menus$ perform2 Design J C#ec, and Save In /ut )DD )SS

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c!

.odif% t#e s%m*ol ; t#e default s#ape for t#e s%m*ol is a rectangle+ For t#is inverter$ %ou s#ould modif% t#e s%m*ol s#ape to reflect t#e traditional <triangle wit# a *u**le= so t#at t#is circuit is easil% recogniGa*le+ ; @ou can select and delete t#e default sKuare s#ape in t#e s%m*ol ; @ou can add a triangle s#ape using t#e pull;down menus2 Add J S#ape J 7ol%gon ; @ou can add a circle using t#e pull;down menus2 Add J S#ape J Circle ; @ou can move s#apes$ properties$ and pins around *% first selecting$ and t#en clic,ing LmM to get into t#e move mode+ "o get out of t#e move mode$ clic, t#e LESCM *utton+ ; %ou can also rotate items *% selecting t#em and clic,ing LrM+ ; once %ou #ave created an accurate s%m*ol for %our circuit$ perform2 Design J C#ec, and Save ; clean up an% warnings or errors t#at %ou #ave+ ; close t#e s%m*ol editor *% performing2 Bindow J Close ; close %our sc#ematic window *% performing

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Bindow ; Close Step 4: Creating a Simulation Test ench for the Inverter 1! Create a cell called testHI>) a! >ow we will create a new cell w#ic# will consist of a sc#ematic view+ "#is will contain an instantiation of our I>) cell s%m*ol+ It will also contain voltage sources$ power supplies$ and a load capacitance+ It is AL+A.S a good idea to test eac# lower;level #ierarc#ical *loc, separatel% *efore incorporating it into a #ig#er level design+ As suc#$ %our li*rar% will contain man% levels of circuit *loc,s and test *enc#es+ "o ,eep t#is straig#t$ we will use a prefi- of =testHOcell nameC= to easil% identif% t#e cells in our li*rar% w#ic# are test *enc#es+ A test *enc# will onl% contain a sc#ematic view w#ile an actual circuit t#at will *e fa*ricated will contain man% views suc# as schematic, sym!ol, layout, Verilog, V/DL, aVerilog, etc0 - In Li!rary $anager$ use t#e pull;downs to perform2 File J >ew J Cell )iew ; In t#e Create %e" 'ile window$ fill in t#e following2 (i*rar% >ame2 Cell >ame2 )iew >ame2 "ool2 Clic, </:= ; A new sc#ematic window will pop up+ 2! Enter t#e test *enc# sc#ematic a! Instantiate t#e inverter (I>)! ; /n t#e left #and side of t#e sc#ematic window$ clic, on t#e (nstance *utton (>/"E2 %ou can also clic, t#e LiM *utton! ; In t#e Add (nstance dialog$ enter t#e following2 (i*rar%2 5rowse to %our EE414H(i*rar% B#ile t#is *rowse window is open$ select2 (i*rar%2 Cell2 EE414H(i*rar% I>) 12 EE414H(i*rar% testHI>) sc#ematic Composer;Sc#ematic

)iew2

s%m*ol

; once %ou clic, on t#e view sym!ol$ t#e inverter s%m*ol for I>) will *e attac#ed to %our mouse+ @ou can clic, once to instantiate it in %our test *enc# sc#ematic ; clic, t#e LESCM *utton to e-it t#e instance mode+ *! Enter a )oltage Source for )DD2 ; For a test *enc#$ we use ideal components for voltage sources$ lumped capacitors$ etcD "#ere is a li*rar% called analogLi! t#at e-ists in t#e (i*rar% .anager t#at contains all of t#ese elements+ ; Clic, on t#e (nstance icon on t#e left #and side of t#e sc#ematic window2 (or %ou can clic, LiM!+ ; In t#e Li!rary 1ro"ser window$ select t#e analogLi! li*rar%+ ; scroll t#roug# t#e Cells until %ou find vdc+ Select t#e vdc cell$ t#en select t#e sym!ol view+ ; once %ou clic, on sym!ol$ t#e vdc instance will attac# to %our mouse in t#e sc#ematic window+ Clic, once to instantiate vdc+ Clic, LESCM to end t#e add instance mode+ ; @ou can rotate t#e vdc instance *% selecting it and clic,ing LrM+ ; @ou can move t#e vdc instance *% selecting it and clic,ing LmM ; @ou can set t#e properties for vdc *% selecting it and #itting LKM2 ; Set t#e DC Voltage to 6 ; @ou can also c#ange t#e instance name to somet#ing more descriptive if %ou wis# ; Clic, </:= c! Enter a G>D node2 ; Again$ use t#e instance command to *ring up t#e Li!rary 1ro"ser+ ; 5rowse to t#e analogLi! li*rar%+ ; In t#e Cell column$ scroll down to find gnd+ ; Clic, on t#e sym!ol view to instantiate it in %our test *enc# sc#ematic+ ; rotate and attac# t#e G>D s%m*ol to t#e )DD suppl% t#at %ou entered earlier+ 13

d!

Enter t#e remaining instances of t#e test *enc# ; using t#e same process$ enter t#e following items from analogLi!2 ; cap ; vdc ; vpulse (used for a load capacitance$ valueP160fF! (used for )in in a DC simulation$ set to 0v and name t#e instance Vin2dc! (used for )in in a transient simulation$ set to2 voltage 12 voltage 22 rise time2 fall time2 pulse widt#2 period2 0 6 1ps 1ps 6ns 10ns

e!

7osition t#e instances in t#e sc#ematic ; *efore wiring up t#e sc#ematic$ position all of t#e instances in a good location around t#e I>)+ >ote t#at we will *e naming nets so leave a lot of room to enter a net and give it a name (i+e+$ don?t put t#e instances on top of eac# ot#er! ; we are going to put t#e DC source for )I> in series wit# t#e 7N(SE source+ 7ut t#e vdc source *elow t#e vpulse source+ ; %ou can cop% an instance *% selecting and #itting LcM

f!

Bire up t#e instances ; use t#e +ire (narro") icon on t#e left #and side of t#e sc#ematic to enter t#e wires for %our sc#ematic+

g!

>ame t#e wires ; on t#e left #and side of t#e sc#ematic window$ clic, on t#e +ire %ame icon+ ; t#is *rings up t#e Add +ire %ame dialog+ @ou will enter a wire name and t#en clic, on t#e wire in t#e sc#ematic window to assign t#e name+ Enter t#e following wire names2 )I>$ )/N"$ )DD >ote t#at %ou can?t name t#e G>D net as it is alread% named *% connecting it to t#e gnd instance+

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C#ec, and Save Nse t#e pull;down menus to perform2 Design J C#ec, and Save :eep t#e sc#ematic window open for t#e ne-t part+

Step !: "unning a S#IC$ Simulation 1! Setup t#e simulation a! /pen t#e Analog Design Environment ; In t#e sc#ematic pull;down menus$ perform2 "ools J Analog Environment *! C#oose t#e S*ectre Simulator and t#e location of simulation files ; we will *e using t#e Spectre simulator+ "#is simulator generates a large amount of temporar% data t#at we don?t want to store on ece;fileserver+ If ever%*od% in our class simulated at once and stored t#e data on ece;fileserver we would fill its dis,s up ver% Kuic,l%+ Instead$ we can direct t#e simulator to store t#e temporar% information to our local dis,+ /n t#e mac#ine %ou are logged into$ t#ere will *e a director% called tmp+ Be will tell t#e simulator to put all of our results in a director% 16

called2 tmp simulation ; In t#e Analog Design Environment window$ use t#e pull;downs2 Setup J Simulator Director% 0ost Simulator2 7roIect Director%2 ; Clic, </:= c! Setup t#e .odel 7at# ; In t#e Analog Design Environment window$ use t#e pull;downs2 Setup J A.I Set .odel 7at# (defaults s#ould *e /:! tec#(i*2 process corners2 ; Clic, </:= d! Setup "emperature ; In t#e Analog Design Environment window$ use t#e pull;downs2 Setup J "emperature (default s#ould *e /:! Scale2 Degrees2 ; Clic, </:= e! Setup DC Anal%sis ; (et?s first start wit# a DC simulation to plot t#e )oltage "ransfer C#aracteristics ()"C! of t#e inverter2 ; In t#e Analog Design Environment window$ use t#e pull;downs2 Anal%sis ; C#oose Anal%sis2 Sweep )aria*le2 C#ec, DC$ unc#ec, all ot#ers C#ec, <Component 7arameter= Clic, on <Select Component= >o clic, on t#e )inHdc instance in t#e sc#ematic2 In t#e Select Com* )aram dialog t#at 11 Celsius 27 ami600#-,ty* for all spectre tmp simulation

comes up$ #ig#lig#t <dc= and clic, </:= Sweep &ange2 Sweep "%pe2 Clic, </:= f! Select /utputs to monitor ; In t#e Analog Design Environment window$ use t#e pull;downs2 /utputs ; Save All (eave t#e 3ee* -*tions dialog defaults$ clic, </:= g! &un t#e DC Simulation ; In t#e Analog Design Environment window$ clic, on t#e Green Stoplig#t2 ; a window will pop up wit# t#e )"C #! 7rint or Save t#e results ; in t#e plot window$ use t#e pull;downs to perform2 File J 7rint ; Clic, on t#e <7rint= *utton+ "#is will print to t#e printer in C/5 126+ ; @ou can also perform a2 File J Save as Image Start P 0 Stop P 6 Automatic

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; t#is will give %ou a file t#at %ou can insert into %our proIect report+ i! &un a transient simulation ; Go *ac, into t#e Analog Environment window2 ; From t#e pull;down menus2 Anal%ses J C#oose ; clic, t#e tran radio *utton ; enter a Stop "ime of 20ns (%ou .NS" put t#e <n= for nano! ; clic, t#e Green Stoplig#t to run t#e simulation ; a plot will come up s#owing 2 c%cles of %our 10ns period input+ @ou also will notice t#at t#e DC simulation still ran+ "#is is #and% w#en %ou are altering t#e siGes of t#e inverter and monitoring )t# in addition to t#e dela%+ If %ou don?t want to run t#e DC simulation an%more$ %ou can clic, on t#e <c#oose anal%sis= *utton in t#e analog environment window$ select <dc=$ t#en unc#ec, t#e Ena!led radio *utton at t#e *ottom of t#e window+ "#is will disa*le t#e simulation *ut ,eep all of %our setup information for t#e DC anal%sis+

I!

Save %our session ; in addition to saving %our sc#ematics$ %ou want to save %our simulation environment+ Nsing t#e pull;down menus in t#e analog environment$ perform2 Session J Save State ; give a descriptive name suc# as <testHI>)HDCHandH"&A>= ; %ou can retrieve t#is state t#e ne-t time %ou run cadence *% performing2 18

Session J (oad State Step %: Creating a Layout for the Inverter 1! Create a layout Cell view for t#e inverter a! In t#e Li!rary $anager window$ use t#e pull;down menus to create a new cell2 File J >ew J Cell )iew ; In t#e Create %e" 'ile window$ select2 (i*rar% >ame2 Cell >ame2 )iew >ame2 "ool2 (i*rar% 7at# file2 EE414H(i*rar% I>) la%out )irtuoso (t#is will updated w#en %ou c#oose t#e tool! (t#is is t#e name of t#e la%out editor! (t#is is t#e li*rar% of %our cell!

verif% t#is is set to2 #ome username wor, cds+li*

"#is will *ring up t#e Virtuoso Layout Editing window and t#e layers menu+ 2! Setup %our displa% options a! If %ou?d li,e$ %ou can modif% t#e grid and snap attri*utes ; use t#e 7ull;down menu2 /ptions J Displa% /ptions ; Set t#e following2 .inor Spacing .aIor Spacing E Snap Spacing @ Snap Spacing P 0+1 P1 P 0+1 P 0+1

3!

Create t#e layout for t#e >./S transistor >/"E2 our process assumes t#at we are using a p;t%pe su*strate+ a! Enter Active Diffusion &egion ; we use t#e &I' la%er to accomplis# two t#ings+ "#e first is to define t#e active region for our >./S transistor+ "#e second is to define w#ere t#e nQ implants will occur+ 19

; In t#e E;direction$ we need t#e DIF rectangle to *e large enoug# for t#e following (descri*ed from left;to;rig#t! ; t#e source contact-to-active spacing ; t#e source contact window ; t#e source contact-to-*oly spacing ; t#e *oly gate ; t#e drain contact-to-*oly spacing ; t#e drain contact window ; t#e drain contact-to-active spacing "otal (0+4um minimum! (0+6um fi-ed! (0+4um minimum! (0+1um minimum! (0+4um minimum! (0+6um fi-ed! (0+4um minimum! C 3+2um (Q margin!

; In t#e @;direction$ we ma,e D(' t#e siGe of our desired B$ w#ic# in t#is e-ample is 6um+ ; in t#e (a%er menu$ clic, on D(' ; in t#e (a%out window (%ou ma% #ave to clic, on it to ma,e it active!$ start a rectangle *%2 ; Create J &ectangle (or use t#e #ot,e% LrM! ; draw a rectangle t#at is at least 3+4 - 6+ ; resiGe if necessar%+ @ou can put %our mouse over an edge and it will turn into a dotted line+ @ou can t#en clic, LsM to stretc# t#e s#ape+

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21

*!

Enter t#e pol%silicon gate ; we use t#e )-L.4 la%er to enter t#e gate+ Be will ma,e t#e gate rectangle 0+1um in t#e E;direction+ @ou?ll need to overlap t#e )-L.4 over t#e diffusion region *% at least 0+6um on eac# side+ Be?ll resiGe it later w#en we #oo, up t#e 7./S+ ; in t#e (a%er menu$ clic, on )-L.4 ; in t#e (a%out window (%ou ma% #ave to clic, on it to ma,e it active!$ start a rectangle *%2 ; Create J &ectangle (or clic, t#e #ot,e% LrM! ; put t#e rectangle directl% in t#e middle of t#e DIF rectangle

c!

Enter t#e Active Contacts ; we insert contacts using an automatic command in Cadence+ As we insert t#e contacts$ we can tell t#e command #ow man% and of w#at t%pe+ ; In t#e file pull;down menus$ perform2 ; Create J Contact ; a window will appear and a contact will snap to %our mouse+ Since our >./S is 6um wide$ we can put more t#an 1 contact on eac# terminal+ It is a good design practice to put as man% contacts as will fit+ ; in t#e dialog window$ set t#e num*er of rows to 4+ >ow clic, *ac, in t#e la%out window and %ou?ll see 4 contacts attac#ed to %our mouse+ 22

; in t#e dialog window$ we also need to define w#at t%pe of contact we are inserting+ Since t#is is an active region contact$ we c#oose DIFC" in t#e <contact t%pe= pull;down+ ; it is mandator% for t#e process t#at t#e siGe of t#e contacts *e 0+6um - 0+6um+ ; Clic, in t#e diffusion regions to place %our source and drain contacts+

d!

Enter t#e 5od% Contacts ; In t#e file pull;downs$ perform2 Create J Contact ; again$ select 4 rows of contacts+ Since t#is is a 5od% contact for an >./S$ we need to select )D('C&+ "#is will tell t#e tool t#at we need to implant a pQ region *eneat# t#e contact to form an /#mic contact to t#e p;t%pe su*strate+ ; t#e minimum active;to;active spacing is 0+9um so t#e *od% contacts will need to *e at least t#is distance awa% from t#e DIF region+ ; Clic, in t#e la%out window to add t#e 5od% contacts+

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>/"E2 "#is is all we can do on t#e >./S for now+ Be will move on to entering t#e 7./S and t#en we?ll #oo, ever%t#ing up+ It is a good idea to run D&C rig#t now+ Step 7 in t#is tutorial will wal, %ou t#roug# #ow to run t#e D&C c#ec,+ 4! Create t#e layout for t#e 7./S transistor >/"E2 t#e process for t#e 7./S is similar to t#e >./S+ &emem*er t#at we need to create an >;well for t#e 7./S su*strate+ a! Enter >;well ; we create t#e >;well using a com*ination of 2 la%ers (&51 and %'(ELD! ; ,e% spacing?s for t#e >;well are2 ; minimum >;well to >Q Active spacing P 1+6um ; minimum >;well widt# P 2+6um ; enter a rectangle using t#e &51 t#at is large enoug# to accommodate our 7./S and still #ave at least 1+6um *etween t#e edges of active regions+ ; create t#e e-act same siGed rectangle using >FIE(D and place directl% on top of t#e "N5 rectangle >/"E2 %ou can cop% t#e &51 rectangle and t#en perform a LKM to c#ange its la%er to >FIE(D+ "#is ma,es duplicating s#apes ver% eas%+

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*!

Enter t#e 7./S Active &egion ; t#is is accomplis#ed using 3 la%ers (D('$ %)LS$ and ))LS! ; first create a DIF region t#at #as t#e same E;dimensions as %our >./S and a @;dimension of 10um (BpP10um! ; now %ou will overlap t#is D(' region wit# *ot# an %)LS and an ))LS rectangle++ "#e siGes of t#e %)LS and ))LS s#apes must e-tend *e%ond t#e edges of t#e D(' region *% 0+3um+ "#e com*ination of t#ese t#ree regions tells t#e tool t#at we are going to create an Active region t#at is pQ doped in an >;well+

c!

Enter t#e pol%silicon Gate ; use )-L.4 Iust as in t#e >./S+ "#e siGe s#ould *e 0+1um in t#e E;dimension and in t#e @;dimension it s#ould overlap t#e DIF rectangle *% 0+6um

d!

Add t#e active contacts ; Iust as in t#e >./S$ we add t#e active contacts using t#e Create 6 Contact pull;down+ Be again c#oose DIFC" as t#e t%pe of contact+ "#ere s#ould *e room to add 9 contacts to *ot# t#e Drain and Source

e!

Add t#e *od% contacts ; we now add t#e *od% contacts+ Nse t#e Create-Contact pull;down+ 0owever$

%ou will c#oose %D('C& as t#e t%pe of contact to indicate an nQ diffusion contact+

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6!

At t#is point$ it is a good time to run D&C+ Be want to ma,e sure t#e transistors are correct prior to connecting t#em up+ Connect t#e nodes of t#e inverter a! Create t#e Input node using 7ol%silicon ; Nse t#e )-L.4 la%er to connect t#e gates of t#e 7./S and >./S in addition to creating a region for a signal to enter t#e circuit from .etal1+ ; Clic, on t#e )-L.4 la%er and t#en add a rectangle (or pol%gon! in t#e la%out to complete t#e connection ; Add a 7ol%;to;.etal1 using t#e pull;down menus in t#e la%out window2 Create J Contact ; in t#e dialog window$ select .17(@ as t#e contact t%pe+ "#is will allow a single from .etal1 to c#ange la%ers to 7/(@1 in order to drive t#e input of in t#e inverter+

*!

Create t#e output node using .etal1 ; Nse t#e $4 la%er to connect t#e drains of t#e 7./S and >./S transistors toget#er to form t#e output of t#e inverter ; In t#e la%er menu$ clic, on $4+ ; in t#e la%out window$ create a rectangle using LrM 21

; also add some metal over t#e .17(@ contact so t#at w#en t#is I>) is

instantiated in #ig#;level la%out$ t#e input and output can *e accessed on $4+

c!

Create t#e )SS and )DD rates using .etal 1 ; Nse t#e $4 la%er to create t#e )SS and )DD notes of t#e inverter+ &emem*er t#at t#ese connections must also pic, up t#e *od% contacts of t#e transistors ; a good la%out practice is to ,eep a consistent pattern of t#e )SS and )DD traces so t#at w#en %ou interface wit# ot#er circuits$ t#e )SS )DD rails will line up+

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1!

Be will create a #oriGontal trace a*ove t#e inverter for )DD+ Be will create a #oriGontal trace *elow t#e inverter for )SS+ Be can c#oose a pitc# of 26um for t#e )SS and )DD rails+ Add 7ins and (a*els to t#e (a*els and 7ins to t#e Device In order to *e a*le to run t#e Layout vs7 Schematic (()S! c#ec,$ we need to add t#e net names of our circuit in t#e sc#ematic+ "#is is a two step process t#at involves first adding a 7in and t#en adding a (a*el to a given .etal or 7ol% s#ape in %our la%out+ "#is is a manual process and reKuires to t%pe in t#e net names EEAC"(@ as %ou defined t#em in %our sc#ematic+ a! Adding 7ins ; in t#e layout window$ use t#e pull;down menus to perform2 ; Create J 7in ; in t#e create pin dialog$ set t#e following2 "erminal >ames P I / "%pe P 7in "%pe P "%pe in t#e $()CT name of t#e pin t#at %ou used in t#e sc#ematic Nse t#e $()CT t%pe t#at %ou used in t#e sc#ematic (input$ output$ input/utput! .17I> (.etal 1 7in$ t#is assumes t#at all of %our inputs and outputs of %our la%out are on .etal 1+ If t#e% are on pol%$ %ou s#ould select t#e pol% pin t%pe+

Clic, </: ; %ou will see t#e pin attac#ed to %our mouse in t#e la%out editor window+ Clic, in t#e la%out window to drop %our pin+ 7lace t#is pin wit#in t#e metal of %our la%out in t#e appropriate spot+ &epeat for all pins ()DD$)SS$I>$/N"!+

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*!

Adding (a*els ; in t#e la%out window$ use t#e pull;down menus to perform2 Create J (a*el ; in t#e dialog *o-$ set t#e following2 (a*el P 0eig#t P "%pe in t#e $()CT name of t#e pin t#at %ou Iust created t#is is t#e siGe of t#e font t#at t#e la*el will #ave+ If %ou clic, in t#e la%out window$ %ou?ll see t#e te-t attac#ed to %our mouse+ .a,e t#is siGe somet#ing reada*le$ *ut not so large it will clutter t#e la%out+ &emem*er t#at t#is la%out will *e used in #ig#er;level *loc,s

; now we need to c#ange t#e la%er of t#e (a*el we Iust added+ Be need to put t#e la*el on t#e same la%er as our )in &y*e and t#e la%er in our la%out t#at is our node we are naming (in t#is case$ .eta l 1! ; in t#e la%out window$ select t#e (a*el %ou Iust put in ; *ring up t#e properties of t#e la*el and c#ange t#e la%er to $4+ </:= t#e properties dialog+

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Step *: "unning &esign "ule Chec+ ,&"CD&C will c#ec, %our la%out against t#e la%out design rules for t#e process+ @ou do not need to wait until %our design is complete to run D&C+ @ou can run it periodicall% to ma,e sure t#at eac# step meets t#e design rules2 1! &un D&C ; in t#e Virtuoso Layout Editor window$ use t#e pull;down menus2 ; Assura J &un D&C ; in t#e popup window$ %ou need to first select t#e tec#nolog% file %ou are going to c#ec, against+ )iew &ules Files2 ; clic, </:= ; if a popup comes up sa%ing t#at t#e D&C data alread% e-ists$ clic, </:= to overwrite2 ; a small window will appear t#at sa%s D&C is running$ it will ta,e a few moments to complete+ ; w#en complete$ a window will appear sa%ing t#e D&C #as successfull% ran+ "#is is Iust telling %ou t#at t#e D&C ran$ not t#at %ou passed D&C+ Clic, <@es= to view t#e errors+ ; errors will *e #ig#lig#ted in t#e la%out window ami600#-,-

2!

End D&C ; in t#e error la%er window$ perform ; File J Close E(B ; in t#e la%out window$ perform2

30

; Assura J Stop &un

31

Step .: "unning Layout versus Schematic ,L/S()S will c#ec, %our la%out against %our sc#ematic to verif% t#at t#e gates %ou?ve created are w#at %ou intended+ "#is includes t#e siGes of %our transistors+ ()S wor,s *% creating a netlist of %our sc#ematic and t#en one of %our la%out+ It compares t#e two to ma,e sure t#at eac# net is correct and t#e num*er of transistors %ou intended are present+ In order for t#e nets to *e identified *% name in t#e la%out$ %ou will need to #ave added a 7in and a (a*el to eac# node+ If %ou don?t add t#e 7in and (a*el$ %ou won?t *e a*le to run ()S+ Also if %our la*el is not on t#e correct la%er$ it will not pass ()S+ ()S s#ould *e successfull% run on eac# *loc, prior to including it in a #ig#er level sc#ematic+ 1! &un ()S ; in t#e Virtuoso Layout Editor window$ use t#e pull;down menus2 ; Assura J &un )(S ; in t#e popup window$ %ou need to first select t#e tec#nolog% file %ou are going to c#ec, against (%ou onl% need to do t#is once! )iew &ules Files2 ; clic, </:= ; if a popup comes up sa%ing t#at t#e ()S data alread% e-ists$ clic, </:= to overwrite2 ; a small window will appear t#at sa%s ()S is running$ it will ta,e a few moments to complete+ ; w#en complete$ a window will appear sa%ing t#e ()S #as successfull% ran+ "#is is Iust telling %ou t#at t#e ()S ran$ not t#at %ou passed ()S+ Clic, <@es= to view t#e errors+ ; a report window will *e given t#at s#ows t#e results of ()S+ @ou can scroll t#roug# t#e report to see w#at errors and warning (if an%! occurred+ ami600#-,-

32

2!

)iew ()S &esults ; in t#e LVS De!ug window$ #ig#lig#t t#e results in t#e Cell List+ "#e top one will *e %our design+ ; using t#e pull;downs$ perform )iew ; (a%out )>( >etlist

; t#is netlist gives t#e S7ICE dec, of w#at it found in %our la%out+ @ou s#ould see %our n and p devices$ including t#e node names and t#e siGes+ ; if %ou #as errors$ %ou will also *e a*le to view t#e Schematic V%L %etlist+ @ou can view *ot# of t#ese netlist to see w#at information ()S is or isn?t seeing in %our design+

3!

End ()S ; in t#e ()S De*ug window$ perform ; File J Close

33

)ppendi0 ): Cadence 1ot 2eys Sc#ematic Entr% (and ot#er windows w#ere applica*le!2 c cop% e descend (read onl%! E descend (edit mode! Re ascend up one level f Goom to fit design to window i add instance l la*el wire m move p add pin K edit parameters r rotate u undo N redo w add wire G Goom to *o- using left;mouse clic,s LM Goom in and out arrow ,e%s move around window F3 Command options left;mouse select clic, middle;mouse over o*Iect *rings up t%pical properties rig#t;mouse repeat last operation (a%out Entr% (and ot#er windows w#ere applica*le!2 c m r & CntlQp l ( G S f L"A5M cntlQf s#iftQf s cop% move add rectangle add pol%gon add a pin la*el a wire la*el a wire Goom in to area Goom out 2fit in window pan toward mout convert instantiated instance to *loc, view convert instantiated instance to la%er view stretc# t#e side of a rectangle if mouse is over it

34

)ppendi0 : 34I( 5 LI43( Commands Nseful commands2 66 cd CC cd T + CC cd Odirector% nameC 2 t#is ta,es %ou to %our wor,ing director% 2 a <T= is a s#ortcut for %our #ome director% 2 c#ange into a director% 2 %ou can t%pe t#e first few letters of t#e director% name 2 and t#en clic, L"A5M to #ave t#e rest of t#e name 2 automaticall% filled in for %ou 2 go N7 one director% 2 c#ec, %our present wor,ing director%$ i+e+$ w#at director% 2 %ou?re in 2 get a list of t#e files and directories in %our current director% 2 get a list of all files and directories$ including #idden files 2 >/"E2 files t#at start wit# <+=$ are #idden and can onl% 2 *e seen wit# ls Jal+ 2 ma,e a director% 2 remove a file 2 move a file to Opat#C 2 move a director% and all of its su*folders and files to Opat#C 2 cop% a file to Opat#C 2 cop% a director% and all of its su*folders and files to Opat#C 2 s#ows %ou t#e contents of a file 2 tells %ou t#e username %ou are logged in as 2 tells %ou t#e computer t#at %ou are logged into 2 displa%s t#e manual (or #elp file! for a given command

CC cd ++ CC pwd CC ls CC ls Jal

CC m,dir OnameC CC rm OnameC CC mv OnameC Opat#C CC mv Jr OnameC Opat#C CC cp OnameC Opat#C CC cp Jr OnameC Opat#C CC more CC w#oami CC #ostname CC man OtopicC

36