EXPERIMENT NO.

1

AIM: Simulate and study V-I characteristics of a Diode using PSPICE windows.

CIRCUIT DIAGRAM:


















PROGRAM:

** Diode Characteristic
VD 1 0 DC 1V
*DC input voltage is overridden during DC sweep
D1 1 2 D1N914 ; Diode with model D1N914
* anode cathode model
VX 2 0 DC 0V ; measures the diode current ID
* DIode model defines the model parameters
.MODEL D1N914 D (IS=3.93E-9 RS=1 BV=100V IBV=5E-6 CJ O=1.7PF TT=2NS)
.DC VD 0 1V 0.01V ; DC sweep from 0 to 2 V with 0.01 V increment
.PLOT DC I(VX) ; Plots the diode current on the output file
.PROBE ; Graphical waveform analyzer
.END ; End of circuit file








Vx
0Vdc
1
D1
D1N914
VD
1Vdc
2
RESULT:




CONCLUSION: The forward biased silicon diode in an electronic system under dc condition has a
drop of 0.7v across it in conduction state at any value of diode current
















EXPERIMENT NO.2

AIM: Simulate and study V-I characteristics of a NPN-BJ T using PSPICE windows.

CIRCUIT DIAGRAM:




















PROGRAM:

**** NPN-BJ T Characteristics
IB 0 1 DC 1MA ; Base current
VCE 2 0 DC 12V ; Collector-emitter voltage
Q1 2 1 0 Q2N2222A ; BJ T statement
.MODEL Q2N2222A NPN (IS=2.105E-16 BF=173 VA=83.3V CJ E=29.6PF CJ C=19.4PF
+ TF=489.88PS TR=4.9NS) ; Model parameters
.DC VCE 0 10V 0.02V IB 0 1MA 200UA ; DC sweep for VCE and IB
.PROBE ; Graphical waveform analyzer
.OP
.END ; End of circuit file






IB
1mAdc
VCE
12Vdc
Q1
Q2N2222A
1
RESULT:






CONCLUSION:The collector to emitter voltage will influence the magnitude of collector current
as shown in graph.

















EXPERIMENT NO.3

AIM: Simulate and study frequency response of R-L-C series circuit using PSPICE windows.


CIRCUIT DIAGRAM:















PROGRAM:
***ExpTransient Response of an RLC-circuit with a sinusoidal input voltage
* SIN (VO VA FREQ) ; Simple sinusoidal source
VIN 1 0 SIN (0 10V 5KHZ) ; sinusoidal input voltage
R1 1 2 2
L1 2 3 50UH
C1 3 0 10UF
.TRAN 1US 500US ; Transient analysis
.PLOT TRAN V(3) V(1) ; Plots on the output file
.PROBE ; Graphical waveform analyzer
.END ; End of circuit file















VIN
FREQ =5KHZ
VAMPL =10V
2
L1
50uH
1 2 3
R1
2
C1
10UF
1
RESULT:

























EXPERIMENT NO. 4


AIM: Simulate and study Darlington pair amplifier circuit using PSPICE windows and determine
quiescent condition.

CIRCUIT DIAGRAM:




















PROGRAM:
**** Darlington Pair
VCC 2 0 DC 12V
VIN 1 0 DC 5V
* BJ Ts with model QM
Q1 2 1 3 QM
Q2 2 3 4 QM
RB 2 1 47k
RE 4 0 4.7K
* Model QM for NPN BJ Ts
.MODEL QM NPN (BF=100 BR=1 RB=5 RC=1 RE=0 VJ E=0.8 VA=100)
* Transfer function analysis to calculate dc gain, input resistance
* and output resistance
.TF V(4) VIN
.END


3
RE
4.7k
VCC
12Vdc
RB
47k
Q2
QM
Q1
QM
4
VIN
5Vdc
1

RESULT:


**** 10/10/05 22:36:42 ********* PSpice 9.1 (Mar 1999) ******** ID# 0 ********
**** Darlington Pair
**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C

*************************************************************

NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE

( 1) 5.0000 ( 2) 12.0000 ( 3) 4.3560 ( 4) 3.5909

VOLTAGE SOURCE CURRENTS
NAME CURRENT

VCC -9.129E-04
VIN 1.489E-04

TOTAL POWER DISSIPATION 1.02E-02 WATTS


**** SMALL-SIGNAL CHARACTERISTICS

V(4)/VIN = 9.851E-01
INPUT RESISTANCE AT VIN = 4.696E+04
OUTPUT RESISTANCE AT V(4) = 6.677E+01

JOB CONCLUDED

TOTAL JOB TIME 0.00




CONCLUSION:The collector to emitter voltag will influence the magnitude of collector current as
shown in graph.








EXPERIMENT NO.5

AIM: Simulate and study Diode Clipper and Clamper circuits using PSPICE windows.


CIRCUIT DIAGRAM: (CLIPPERS)
PROGRAM:
Prog. 1
VDC
1Vdc
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
3
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
1
VDC1
1.5Vdc
2
D1
D1N3940
2
2
3
D1
D1N3940
D1
D1N3940
D1
D1N3940
D1
D1N3940
R
.22K
1
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
3
VDC
1Vdc
R
.22K
3
VDC2
1Vdc
D2
D1N3940
VDC
1Vdc
2
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
2
D1
D1N3940
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
R
.22K
1
D1
D1N3940
2
VDC
1Vdc
1
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
R
.22K
1
2
R4
.22K
R
.22K
1
1
R
.22K
VAC
FREQ =30kHz
VAMPL =5V
VOFF =0
Figure 1
Figure 7
Figure 6
Figure 5
Figure 4
Figure 2
Figure 3
*******CLIPPER 1
R 1 2 .22K
D1 2 0 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END
Prog. 2
*******CLIPPER 1
R 1 2 .22K
D1 2 3 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
VDC 3 0 DC 1V
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END
Prog. 3
*******CLIPPER 3
R 1 2 .22K
D1 2 3 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
VDC 0 3 DC 1V
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END

Prog. 4
*******CLIPPER 4
R 1 2 .22K
D1 0 2 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END

Prog. 5
*******CLIPPER 5
R 1 2 .22K
D1 3 2 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
VDC 0 3 DC 1V
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END

Prog. 6
*******CLIPPER 6
R 1 2 .22K
D1 3 2 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
VDC 3 0 DC 1V
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END

Prog. 7
*******CLIPPER 7
R 1 2 .22K
D1 3 2 D1N3940
D2 2 4 D1N3940
VAC 1 0 SIN(0 5V 30KHZ)
V1_VDC1 4 0 DC 1V
V2_VDC2 0 3 DC 1.5V
.MODEL D1N3940 D(
+ IS =4E-10
+ RS =.105
+ N =1.48
+ TT =8E-7
+ CJ O =1.95E-11
+ VJ =.4
+ M =.38
+ EG =1.36
+ XTI =-8
+ KF =0
+ AF =1
+ FC =.9
+ BV =600
+ IBV =1E-4
+)
.PROBE
.TRAN 0US 100US
.END












RESULT:















































Result of CLIPPER 1
Result of CLIPPER 2

















































Result of CLIPPER 3
Result of CLIPPER 4

















































Result of CLIPPER 6
Result of CLIPPER 5

















































Result of CLIPPER 7
CIRCUIT DIAGRAM: (CLAMPERS)


PROGRAM:
Prog. 1
****CLAMPER1
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 2 0 D1N3491
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

2
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
2
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
2
R1
560k
2
R1
560k
1
C1
.01uf
D1N3491
D1
D1N3491
D1
C1
.01uf
1
D1N3491
D1
2
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
C1
.01uf
R1
560k
1
D1N3491
D1
R1
560k
C1
.01uf
C1
.01uf
D1N3491
D1
R1
560k
2
R1
560k
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
VDC
1Vdc
1
VDC
1Vdc
C1
.01uf
VAC
FREQ =30khz
VAMPL =5v
VOFF =0v
VDC
1Vdc
D1N3491
D1
1 1
VDC
1Vdc
Figure 5
Figure 1
Figure 2
Figure 6 Figure 3
Figure 4
Prog. 2
****CLAMPER2
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 2 3 D1N3491
V_VDC 3 0 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 3
****CLAMPER3
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 2 3 D1N3491
V_VDC 0 3 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 4
****CLAMPER4
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 0 2 D1N3491
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 5
****CLAMPER5
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 3 2 D1N3491
V_VDC 3 0 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 6
****CLAMPER6
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 3 2 D1N3491
V_VDC 0 3 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

RESULT:





















Result of CLAMPER1






















Result of CLAMPER3
Result of CLAMPER2

















































Result of CLAMPER4
Result of CLAMPER5
































Result of CLAMPER6
EXPERIMENT NO.6


AIM: Simulate and study transient & frequency response of a BJ T amplifier in common-emitter
configuration using PSPICE windows.

CIRCUIT DIAGRAM:


















PROGRAM:

*Transient & Freq. Response of Bipolar Transistor Amplifier
.OPTIONS NOPAGE NOECHO
* Transient analysis for 0 to 2 ms with 50 s increment
* Print details of transient analysis operating point.
.TRAN/OP 50US 2MS
* AC analysis from 1 Hz to 10 KHz with a decade increment and
* 10 points per decade
.AC DEC 10 1HZ 10KHZ
* Print the details of AC analysis operating point
.OP
* Input voltage is 10 mV peak for ac analysis and for transient response
* it is 10 mV peak at 1 kHz with zero-offset value
VIN 1 0 AC 10MV SIN (0 10MV 1KHZ)
VCC 0 7 DC 15V
RS 1 2 500
R1 7 3 47K
R2 3 0 5K
RC 7 4 10K
Rs
500
R1
47k
CE
10uF
C2
10uF
4
R2
5k
RE
2k
C1
10uF
RC
10k
2
RL
20k
1
5
6
Vcc
15Vdc
VIN
FREQ =1kHz
VAMPL =10mV
VOFF =0
Q1
Q2N2907
3
RE 5 0 2K
RL 6 0 20K
C1 2 3 10UF
C2 4 6 10UF
CE 5 0 10UF
* Transistor Q1 with model QM
Q1 4 3 5 0 QM
* Model QM for PNP transistors
.MODEL QM PNP (IS=2E-16 BF=100 BR=1 RB=5 RC=1 RE=0 TF=0.2NS TR=5NS
+ CJ E=0.4PF VJ E=0.8 ME=0.4 CJ C=0.5PF VJ C=0.8 CCS=1PF VA=100)
* Plot the results of transient analysis for voltages at nodes 4, 6 and 1
.PLOT TRAN V(4) V(6) V(1)
* Plot the results of ac analysis for the magnitude and phase angle
* of output voltage at node 6
.PLOT AC VM(6) VP(6)
.PROBE
.END

RESULT:


EXPERIMENT NO.7

AIM: Simulate and study Half-wave & Full-wave Rectifier using PSPICE windows.


CIRCUIT DIAGRAM:




































Full-wave Rectifier
L1
2000uH
L3
10uH
2
Vin
FREQ =50Hz
VAMPL =220V
VOFF =0
D1
D1N4009
RL
1000
5
Rs
10
1 3
D2
D1N4009
4
L2
10uH
Half-wave
5 1
D1
mod1
RL
500
Rs
10
Vin
FREQ =50Hz
VAMPL =220V
VOFF =0
2
L1
2000uH
3
L2
20uH
PROGRAM:



*HALF WAVE rectifier
Vin 2 0 sin(0 220 50 )
RL 5 0 500
RS 2 1 10
L1 1 0 2000
L2 3 0 20
K1 L1 L2 0.99999
D1 3 5 mod1
.model mod1 D (IS=1e-14, n=1)
.tran 0.2m 200m
.plot tran v(3), v(5)
.probe
.end





*FULL WAVE rectifier
Vin 2 0 sin(0 230V 50HZ)
RL 5 4 1000
RS 2 1 10
L1 1 0 2000
L2 3 4 10
L3 4 0 10
K1 L1 L2 L3 0.99
D1 0 5 D1N4009
D2 3 5 D1N4009
.model D1N4009 D(Is=544.7E-21 N=1 Rs=.1 Ikf=0 Xti=3 Eg=1.11 Cjo=4p M=.3333
+ Vj=.75 Fc=.5 Isr=30.77n Nr=2 Bv=25 Ibv=100u Tt=2.885n)
.tran 0.2ms 200ms
.probe
.end











RESULT:








Half-wave Rectifier
Full-wave Rectifier
EXPERIMENT NO.8

AIM: Simulate and study active low-pass, high-pass & band-pass filter using PSPICE windows.

CIRCUIT DIAGRAM:





























RF
100k
Vo
RG
10k
Vin
C1
0.1uF
R1
10k
UA741
3
2
8
4
1
+
-
V
+
V
-
OUT
Low-pass Filter
Vo
C2
1n
UA741
3
2
8
4
1
+
-
V
+
V
-
OUT
R1
20k
V1
R5
10k
R3
10k
R6
100k
R2
20k
R4
10k
R7
100k
UA741
3
2
8
4
1
+
-
V
+
V
-
OUT
Band-pass Filter
R1
20k
R4
10k
R3
10k
UA741
3
2
8
4
1
+
-
V
+
V
-
OUT
C2
1n
Vo
R5
10k
R2
20k
V1
High-pass Filter
PROGRAM:


1.
*LOWpass Filter Circuit
* Input voltage is 1 V peak for ac analysis or frequency response
VIN 1 0 AC 1
RG 2 0 10k
RF 2 4 100K
C1 3 0 .1UF
R1 1 3 10K
* Subcircuit call for op-amp OPAMP
XA1 2 3 4 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R2 3 4 10K
C2 3 4 1.5619UF
* Voltage-controlled voltage source of gain 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit definition
.ENDS OPAMP
* AC analysis for 10 Hz to 100 MHz with a decade increment and
* 10 points per decade
.AC DEC 10 10HZ 100MEGHZ
* Plot the results of ac analysis
.PLOT AC VM(4) VP(4)
.PROBE
.END


2.
*Highpass Filter Circuit
* Input voltage is 1 V peak for ac analysis or frequency response
VIN 1 0 AC 1
R1 1 2 20K
R2 2 4 20K
R3 3 0 10K
R4 1 5 10K
R5 4 5 10K
RL 4 0 100K
C1 2 4 0.01UF
* Subcircuit call for op-amp OPAMP
XA1 2 3 4 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R2 3 4 10K
C2 3 4 1.5619UF
* Voltage-controlled voltage source of gain 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit definition
.ENDS OPAMP
* AC analysis for 10 Hz to 100 MHz with a decade increment and
* 10 points per decade
.AC DEC 10 10HZ 100MEGHZ
* Plot the results of ac analysis
.PLOT AC VM(5) VP(5)
.PROBE
.END


3.
*Bandpass Filter Circuit
* Input voltage is 1 V peak for ac analysis or frequency response
VIN 1 0 AC 1
R1 1 2 20K
R2 2 4 20K
R3 3 0 10K
R4 1 5 10K
R5 4 5 10K
R6 6 7 100K
R7 6 0 100k
RL 7 0 100K
C1 2 4 0.01UF
* Subcircuit call for op-amp OPAMP
XA1 2 3 4 0 OPAMP
XA2 5 6 7 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R2 3 4 10K
C2 3 4 1.5619UF
* Voltage-controlled voltage source of gain 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit definition
.ENDS OPAMP
* AC analysis for 10 Hz to 100 MHz with a decade increment and
* 10 points per decade
.AC DEC 10 10HZ 100MEGHZ
* Plot the results of ac analysis
.PLOT AC VM(7) VP(7)
.PROBE
.END


RESULT:
1.



2.









3.





EXPERIMENT NO.9


EXPERIMENT NO.9

AIM: Simulate and study Integrator using PSPICE windows.

CIRCUIT DIAGRAM:



























PROGRAM:

* Integrator Circuit
* The input voltage is represented by a piece-wise linear waveform.
* To avoid convergence problems due to a rapid change of the input
* voltage, the input voltage is assumed to have a finite slope.
VIN 1 0 PWL(0 0 1NS -1V 1MS -1V 1.0001MS 1v 2ms 1v 2.0001ms -1V 3MS -1V 3.0001MS 1V
4MS 1V)
R1 1 2 2.5K
RF 2 4 1MEG
RX 3 0 2.5K
RL 4 0 100K
R1
2.5k
3
2
8
4
1
+
-
V
+
V
-
OUT
Vin
1 4
Rl
100k
2
3
Rf
1MEG
Rx
2.5k
out put vol t age
C1
0.1uF
C1 2 4 0.1UF
* Calling subcircuit OPAMP
XA1 2 3 4 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R1 3 4 10K
C1 3 4 1.5619UF
* Voltage-controlled voltage source with a gain of 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit OPAMP
.ENDS
* Transient analysis for 0 to 4 ms with 50 us increment
.TRAN 50US 4MS
* Plot the results of transient analysis for the voltage at node 4
.PLOT TRAN V(4) V(1)
.PLOT AC VM(4) VP(4)
.PROBE
.END

RESULT:






EXPERIMENT NO.10

AIM: Simulate and study Differentiator using PSPICE windows.


CIRCUIT DIAGRAM:





5
R1
100
out put vol t age
Rf
10k
Vin
Rx
10k
Rl
100k
C1
0.4uF
3
2
8
4
1
+
-
V
+
V
-
OUT
1 2 4 3



PROGRAM:

* Differentiator Circuit
* The maximum number of points is changed to 410. The default
* value is only 201.
.OPTIONS NOPAGE NOECHO LIMPTS=410
* Input voltage is a piece-wise linear waveform for transient analysis.
VIN 1 0 PWL(0 0 1MS 1 2MS 0 3MS 1 4MS 0)
R1 1 2 100
RF 3 4 10K
RX 5 0 10K
RL 4 0 100K
C1 2 3 0.4UF
* Calling op-amp OPAMP
XA1 3 5 4 0 OPAMP
* Op-amp subcircuit definition
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R1 3 4 10K
C1 3 4 1.5619UF
* Voltage-controlled voltage source with a gain of 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit OPAMP
.ENDS OPAMP
* Transient analysis for 0 to 4 ms with 50 s increment
.TRAN 10US 4MS
* Plot the results of transient analysis 4
.PLOT TRAN V(4) V(1)
.PROBE
.END

RESULT:
Prog. 4
****CLAMPER4
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 0 2 D1N3491
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 5
****CLAMPER5
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 3 2 D1N3491
V_VDC 3 0 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end

Prog. 6
****CLAMPER6
C_C1 1 2 .01uf
R_R1 2 0 560k
D_D1 3 2 D1N3491
V_VDC 0 3 1V
V_VAC 1 0 sin(0 5v 30khz)
.model D1N3491 D(Is=68.65f Rs=3.786m Ikf=1.774 N=1 Xti=2 Eg=1.11 Cjo=1.457n
+ M=.9735 Vj=.75 Fc=.5 Isr=11.02u Nr=2 Tt=6.059u)
* Motorola pid=1N3491 case=DO21
* 88-08-24 rmn
.probe
.tran 0us 100us
.end
RL 4 0 100K
C1 2 4 0.01UF
* Subcircuit call for op-amp OPAMP
XA1 2 3 4 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M
R2 3 4 10K
C2 3 4 1.5619UF
* Voltage-controlled voltage source of gain 2E+5
EA 4 5 3 4 2E+5
RO 5 7 75
* End of subcircuit definition
.ENDS OPAMP
* AC analysis for 10 Hz to 100 MHz with a decade increment and
* 10 points per decade
.AC DEC 10 10HZ 100MEGHZ
* Plot the results of ac analysis
.PLOT AC VM(5) VP(5)
.PROBE
.END


4.
*Bandpass Filter Circuit
* Input voltage is 1 V peak for ac analysis or frequency response
VIN 1 0 AC 1
R1 1 2 20K
R2 2 4 20K
R3 3 0 10K
R4 1 5 10K
R5 4 5 10K
R6 6 7 100K
R7 6 0 100k
RL 7 0 100K
C1 2 4 0.01UF
* Subcircuit call for op-amp OPAMP
XA1 2 3 4 0 OPAMP
XA2 5 6 7 0 OPAMP
* Subcircuit definition for OPAMP
.SUBCKT OPAMP 1 2 7 4
RI 1 2 2.0E6
* Voltage-controlled current source with a gain of 0.1M
GB 4 3 1 2 0.1M