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022-0038 Rev. F
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Table 1. Correspondence between Motorola and Rabbit SPI Signals (Master Mode) Motorola Signal Names SCK MOSI Rabbit Signal Names CLKA or CLKB TXA or TXB on parallel port C* ATXA or ATXB on parallel port D RXA or RXB on parallel port C MISO ARXA or ARXB on parallel port D SS Any general-purpose I/O can be Slave/Chip Select configured for the Slave Select function * Serial ports A and B can be multiplexed between parallel ports C and D; therefore, Serial ports A or B can be only configured to operate via one of the parallel ports at any particular time. Master In Slave Out Pin Function Serial Clock Master Out Slave In
NOTE: The Rabbit uses a LSB first format whereas the Motorola SPI uses a MSB first format.
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SS Signal
The behavior and function of the slave/chip select is different depending on whether the device is configured as a master or a slave. In a master SPI device, the chip select normally acts as an active low output signal to enable or disable the slave device. Alternatively, the master can be configured to treat the chip select signal as an error-detection input.
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Figure 2 shows a typical full-duplex master/slave SPI-based system consisting of a Rabbit master and multiple slave devices.
Figure 2. Full-Duplex Master/Slave Based SPI System
Rabbit Master
Clock Generator Shift Register Shift Register /SS1 CLKB TX RX SCK MOSI
Slave Device 1
Shift Register
MIS
/SS1
/SSn
SCK MOSI MISO
Slave Device n
Shift Register
/SSn
SPIinit() initializes the SPI port parameters for a serial interface. SPIwrite() writes a block of bytes to the SPI port. SPIread() reads a block of bytes from the SPI port. SPIWrRd() reads and writes a block of bytes from/to the SPI port.
If you use the Dynamic C SPI driver, it is not necessary to read the remainder of this technical note.
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Table 3. Alternate Output Function for Parallel Port C bit 7 6 5 4 3 2 1 0 TXD TXC TXB TXA Port C
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The above steps outline how to configure serial port B for synchronous serial communication. The following steps describe the method, requirements, and restrictions for transferring a byte in the SPI mode.
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4. Interrupt-driven communication.
If an interrupt-driven scheme is used, there are a few issues that a user must pay attention to. Because serial port B does not have separate vectors for receive and transmit interrupts, when an interrupt occurs, the serial port B Status register (SBSR) must be read every time to determine the cause of the interrupt. SBSR is at address 0xD3.
Table 7. Serial Port B Status Register (SBSR) Bit(s) 0 7 1 0 6 1 0 5 1 4 0 3 1 The byte in the receiver buffer is an address. The receiver buffer was not overrun. The receiver buffer was overrun. This bit is cleared when the receiver buffer is read. This bit is always zero. The transmit data register is empty. The transmit data register is full. The serial port will request an interrupt when the transmitter clears this bit. The interrupt is cleared when the transmit data register is written, or any value (which will be ignored) is written to this register. The transmitter is idle. The transmitter is sending a byte. The serial port will request an interrupt when the transmitter clears this bit, which occurs only if the transmitter is ready to start sending another byte but the transmit buffer is empty. The interrupt is cleared when the transmit data register is written, or any value (which will be ignored) is written to this register. These bits are always zero. Value Description The receive data register is empty There is a byte in the data register of the receiver. The serial port will request an interrupt when the receiver sets this bit. The interrupt is cleared when the receiver buffer is read. The byte in the receiver buffer is data.
2 1
1:0
In the case of a transmit, an interrupt is generated when a byte (in this case the first byte) is transferred from the buffer to the shift register; that is, when the buffer becomes empty. (Note that the Rabbit employs one level of buffering on the serial ports.) Since were not ready to send another byte, we have to clear the interrupt by performing a dummy write to the Serial Port B Status Register (SBSR). The act of writing to the status register clears the transmit interrupt.
References
Motorola SPI Specifications, M68HC11 Reference Manual, Chapter 8, pp. 8-1 through 8-22.
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