FAN73832 (Half-Bridge Dead Time Control)

FAN73832 Half-Bridge Gate-Drive IC
February 2007
FAN73832
Features
Half-Bridge Gate-Drive IC
Description
The FAN73832 is a half-bridge, gate-drive IC with shutdown and programmable dead-time control functions for driving MOSFETs and IGBTs, operating up to +600V. Fairchilds high-voltage process and common-mode noise canceling technique provide stable operation of high-side driver under high dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half- and full-bridge inverters.
Floating Channel for Bootstrap Operation to +600V Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels

Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VDD=VBS=15V High-Side Output in Phase of IN Signal Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Canceling Circuit Internal 400ns Minimum Dead-Time at RDT=20K Programmable Turn-on Delay-Time Control (Dead-Time)
Applications
SMPS Motor Drive Inverter Fluorescent Lamp Ballast HID Ballast
8-SOP
8-DIP
Ordering Information
Part Number
FAN73832M(1) FAN73832MX(1) FAN73832N Note: 1. These devices passed wave soldering test by JESD22A-111.
Package
8-SOP 8-DIP
Pb-Free
Yes
Operating Temperature Range Packing Method

Tube -40C ~ 125C Tape & Reel Tube
2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2
www.fairchildsemi.com
Typical Application Diagrams
RBOOT
DBOOT
VDD FAN73832
1 IN
VDC
VB HO VS LO
8 7
PWM
2 GND 3
CBOOT
PWM IC Control
Shutdown RDT
DT/ SD
6 5
4 VDD
FAN73832 Rev.01
Figure 1. Application Circuit for Half-Bridge Switching Power Supply
VDC VCC
VDD
VB HO
VDD
VB HO VS
PHA PHB SD
IN VS IN
Forward
FAN73832
DT/ SD GND LO
FAN73832
Reverse
DT/ SD GND LO
DC Motor Controller
FAN73832 Rev.01
Figure 2. Application Circuit for Full-Bridge DC Motor Driver
2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 2
Internal Block Diagram
8
UVLO
VB
DRIVER
NOISE CANCELLER
R S
R Q
HO
IN
HS(ON/ OFF)
PULSE GEN ERATOR
6
UVLO
VS VDD
SCHMITT TRIGGER INPUT
DRIVER
DT/SD
RDTINT
DEAD - TIME CONTROL
LS(ON/ OFF)
DELAY
LO
GND
FAN73832 Rev:00
Figure 3. Functional Block Diagram of FAN73832
Pin Assignments
IN GND DT/SD VDD
1 2 3 4
8 7 6 5
VB HO VS LO
Figure 4. Pin Configuration (Top View)
FAN73832
FAN73832 Rev:00
Pin Definitions
Pin #
1 2 3 4 5 6 7 8
Name
IN GND DT/SD VDD LO VS HO VB Logic Input Ground
Description
Dead-Time Control with External Resistor and Shutdown Function Low-Side Supply Voltage Low-Side Driver Output High-Side Floating Supply Return High-Side Driver Output High-Side Floating Supply
Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol
VS VB VHO VDD VLO VIN VDT/SD GND dVS/dt PD(2)(3)(4) JA TJ TSTG Notes:
Parameter
High-side offset voltage High-side floating supply voltage High-side floating output voltage HO Low-side and logic-fixed supply voltage Low-side output voltage LO Logic input voltage (IN) Dead-time and shutdown control voltage Logic ground Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature 8-SOP 8-DIP 8-SOP 8-DIP
Min.
VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 VDD-25
Max.
VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 5.0 VDD+0.3 50 0.625 1.25 200 100 150 150
Unit
V V V V V V V V V/ns W
C/W C C
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances.
Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VB VS VDD VHO VLO VIN TA
Parameter
High-side floating supply voltage High-side floating supply offset voltage Low-side supply voltage High-side (HO) output voltage Low-side (LO) output voltage Logic input voltage (IN) Ambient temperature
Condition
Min.
VS+15 6-VDD 15 VS GND GND -40
Max.
VS+20 600 20 VB VDD VDD 125
Unit
V V V V V V C
Electrical Characteristics
VBIAS (VDD, VBS)=15.0V, RDT=20K,TA=25C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Symbol
IQBS IQDD ISD(5) IPBS IPDD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVH VBSUVH RDTINT VDT VOH VOL IO+ IOVS
Parameter
Quiescent VBS supply current Quiescent VDD supply current Shutdown supply current Operating VBS supply current Operating VDD supply current Offset supply leakage current VDD and VBS supply under-voltage positive going threshold VDD and VBS supply under-voltage negative going threshold VDD supply under-voltage lockout hysteresis Internal dead-time setting resistance Normal voltage at DT High-level output voltage, VBIAS-VO Low-level output voltage, VO Output high short-circuit pulse current Output low short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO Logic "1" input voltage Logic "0" input voltage Logic "1" input bias current Logic "0" input bias current Shutdown "1" input voltage Shutdown "0" input voltage Input pull-down resistance VIN=5V VIN=0V
Condition
VIN=0V or 5V VIN=0V or 5V, RDT=20K DT/SD=GND fIN=20kHz, rms value fIN=20kHz, rms value VB=VS=600V
Min.
Typ.
35 300 650 400 650
Max.
90 450 900 700 850 10
Unit
SUPPLY CURRENT SECTION
POWER SUPPLY SECTION 10.7 10.0 11.6 10.8 0.8 12.5 11.6 V V V
DEAD-TIME CONTROL SECTION 20 RDT=20K IO=20mA VO=0V, VIN=5V with PW<10s VO=15V, VIN=0V with PW<10s 250 500 350 650 -9.8 -7.0 3.0 1.0 0.6 K V V V mA mA V
GATE DRIVER OUTPUT SECTION
LOGIC INPUT SECTION (INPUT and SHUTDOWN) VIH VIL IIN+ IINSD+
2.9 1.2 50 100 2.0 1.2 2.9 100
V V A A V V K
SDRPD
Note: 5. This parameter guaranteed by design.
Dynamic Electrical Characteristics

VBIAS (VDD, VBS)=15.0V, VS=GND, CL=1000pF, RDT=20K and TA = 25C, unless otherwise specified.
Symbol
tON tOFF tR tF tSD(5) DT1, DT2 DMT
Parameter
Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Shutdown propagation delay Dead-time LO OFF to HO ON & HO OFF to LO ON Dead-time matching
Conditions
VS=0V, RDT=20K VS=0V or 600V(5), RDT=20K CL=1000pF CL=1000pF RDT =20K RDT = 200K RDT = 20K RDT =200K
Min.
Typ.
580 180 50 30 100
Max.
730 230 100 80 180 500 2.30 60 150
Unit
ns
300 1.20
400 1.68 0 0
ns s ns
Note: 5. These parameters guaranteed by design.
Typical Characteristics
11.6 12.0 11.4
VDDUV+ ,VBSUV+ [V]
11.6 11.4 11.2 11.0 10.8 -40 -20 0 20 40 60 80 100 120
VDDUV- ,VBSUV- [V]
11.8
11.2 11.0 10.8 10.6 10.4 10.2 10.0 -40 -20 0 20 40 60 80 100 120
Temperature [C]
Temperature [C]
Figure 5. VDD/VBS UVLO (+) vs. Temperature
Figure 6. VDD/VBS UVLO (-) vs. Temperature
500
100
400
80
IQDD [A]
IQBS [A]
300
60
200
40
100
20
0 -40
-20
20
40
60
80
100
120
0 -40
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 7. VDD Quiescent Current vs. Temperature
Figure 8. VBS Quiescent Current vs. Temperature
1000
800
800 600
IPDD [A]
600
IPBS [A]
-20 0 20 40 60 80 100 120
400
400 200
200
0 -40
0 -40
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 9. VDD Operating Current vs. Temperature
Figure 10. VBS Operating Current vs. Temperature
Typical Characteristics (Continued)
100
3.0 2.5 2.0
80
IIN+ [A]
60
VIH [V]
-20 0 20 40 60 80 100 120
1.5 1.0
40
20
0.5 0.0 -40
0 -40
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 11. Logic Input Current vs. Temperature
Figure 12. Logic Input High Voltage vs. Temperature
3.0 2.5
3.0 2.5
SD+ BAR [V]
2.0
2.0 1.5 1.0 0.5 0.0 -40
VIL [V]
1.5 1.0 0.5 0.0 -40
-20
20
40
60
80
100
120
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 13. Logic Input Low Voltage vs. Temperature
Figure 14. SD Positive Threshold vs. Temperature
3.0 2.5
800
600
SD- BAR [V]
1.5 1.0
tON [nsec]
-20 0 20 40 60 80 100 120
2.0
400
200 0.5 0.0 -40 0 -40
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 15. SD Negative Threshold vs. Temperature
Figure 16. Turn-on Delay Time vs. Temperature
Typical Characteristics (Continued)
300
500
DT1, RDT= 20k [nsec]
250
450
tOFF [nsec]
200 150 100 50 0 -40
400
350
-20
20
40
60
80
100
120
300 -40
-20
20
40
60
80
100
120
Temperature [C]
Temperature [C]
Figure 17. Turn-off Delay Time vs. Temperature
Figure 18. Dead--Time (RDT=20k) vs. Temperature
2.4
2.0
DT1, RDT= 200k [nsec]
2.2 2.0 1.8 1.6 1.4 1.2 -40
1.6
Deadtime [S]
1.2
0.8
0.4
-20
20
40
60
80
100
120
0.0 20
40
60
80
100
120
140
160
180
200
Temperature [C]
RDT [kohm]
Figure 19. Dead Time (RDT=200k) vs. Temperature
Figure 20. RDT vs. Dead-Time
-6
-8
VS [V]
-10
-12
-14 -40 -20 0 20 40 60 80 100 120
Temperature [C]
Figure 21. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Temperature
Switching Time Definitions
+15V
10F
100nF
10F 100nF 1 IN 2
+15V
VB HO VS LO
8 7 1nF 6 5
GND
HO
3 DT/SD
Control
SD
20K
VDD
LO
1nF
FAN73832
FAN73832 Rev:00
Figure 22. Switching Time Test Circuit
IN
HO
LO
DT/SD DT1 DT2 Shutdown DT2 DT1 Shutdown DT1

FAN73832 Rev.00
Figure 23. Input / Output Waveforms
IN
50% tOFF 90%
50%
tON 10% 90%
LO
HO
tON 10%
tOFF
FAN73832 Rev.00
Figure 24. Switching Time Waveform Definitions
50% DT/SD
90% HO or LO
tSD
FAN73832 Rev.00
Figure 25. Shutdown Waveform Definition
90% HO DT1 90% LO MDT= |DT1 - DT2| 10%

FAN73832 Rev.00
10% DT2
Figure 26. Dead-Time Control Waveform Definition
Typical Application Information

1. Normal Operating Consideration
The FAN73832 is a single PWM input, half-bridge, gatedrive IC with programmable dead-time and shutdown functions. The dead-time is set with a resistor (RDT) at the DT/SD pin. The wide dead-time programming range provides the flexibility to optimize drive signal timing for a selection of switching devices (MOSFET or IGBT) and applications. The turn-on time delay circuitry (Dead-Time) accommodates resistor values from 20k to 200k with a dead-time proportional to the RDT resistance. If the DT/SD pin voltage decreases below 1.2V in the normal operation, the IC enters shutdown mode. The external dead-time setting resistor (RDT) is at least above 20K for normal operation in typical applications.
3. Layout Consideration
For optimum performance of the high- and low-side gate drivers, considerations must be taken during printed circuit board (PCB) layout.
3.1 Supply Capacitors

If the output stages are able to quickly turn-on a switching device with a high value of current, the supply capacitors must be placed as close as possible to the device pins (VDD and GND for the ground-tied supply, VB and VS for the floating supply) to minimize parasitic inductance and resistance.
3.2 Gate Drive Loop

Current loops behave like an antenna, able to receive and transmit noise. To reduce the noise coupling/emission and improve the power switch turn-on and off performances, gate drive loops must be reduced as much as possible.
2. Under-Voltage Lockout (UVLO)

The FAN73832 has an under-voltage lockout (UVLO) protection circuit for high- and low-side channels to prevent malfunction when VDD and VBS are lower than the specified threshold voltage. The UVLO circuitry monitors the supply voltage (VDD) and bootstrap capacitor voltage (VBS) antepenult.
3.3 Ground Plane

Ground plane must not be placed under or nearby the high-voltage floating side to minimize noise coupling.
Mechanical Dimensions
8-SOP
Dimensions are in millimeters (inches) unless otherwise noted. .
1.55 0.20 0.061 0.008
MIN
0.1~0.25 0.004~0.001
0.56 ) 0.022
#1
#8
4.92 0.20 0.194 0.008 5.13 MAX 0.202
#4
#5
6.00 0.30 0.236 0.012

+0.10 0.15 -0.05 +0.004 0.006 -0.002
1.80 MAX 0.071

MAX0.10 MAX0.004
3.95 0.20 0.156 0.008
5.72 0.225 0.50 0.20 0.020 0.008
0~
January 2001, Rev. A 8sop225_dim.pdf
Figure 27. 8-Lead Small Outline Package (SOP)
1.27 0.050
0.41 0.10 0.016 0.004

Mechanical Dimensions (Continued)

8-DIP
Dimensions are in millimeters (inches) unless otherwise noted. .
#1
#8
9.20 0.20 0.362 0.008 9.60 MAX 0.378
#4
#5
2.54 0.100
7.62 0.300
5.08 MAX 0.200 3.40 0.20 0.134 0.008
3.30 0.30 0.130 0.012 0.33 0.013 MIN
0.25 0.05
0~15
+0.10
0.010 0.002
September 1999, Rev B
+0.004
pdip8_dim.pdf
Figure 28. 8-Lead Dual In-Line Package (DIP)
0.018 0.004
1.524 0.10 0.060 0.004

0.46 0.10
6.40 0.20 0.252 0.008
0.79 ) 0.031
TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL Current Transfer Logic DOME 2 E CMOS EcoSPARK EnSigna FACT Quiet Series FACT FAST FASTr FPS FRFET GlobalOptoisolator GTO
HiSeC i-Lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power220 Power247 PowerEdge PowerSaver
PowerTrench Programmable Active Droop QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START SPM SuperFET SuperSOT-3 SuperSOT-6 SuperSOT-8 TCM The Power Franchise
TinyLogic TINYOPTO TinyPower TinyWire TruTranslation SerDes UHC UniFET VCX Wire
TinyBoost TinyBuck
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILDS WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.
Rev. I23
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
No Identification Needed
Full Production
Obsolete
Not In Production

FAN73832 (Half-Bridge Dead Time Control)

Transféré par

Informations du document

Description originale:

Titre original

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

FAN73832 (Half-Bridge Dead Time Control)

Transféré par

Droits d'auteur :

Formats disponibles

FAN73832 Half-Bridge Gate-Drive IC

Driving Capability for Both Channels

Operating Temperature Range Packing Method

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2

FAN73832 Half-Bridge Gate-Drive IC

Typical Application Diagrams

Figure 1. Application Circuit for Half-Bridge Switching Power Supply

Figure 2. Application Circuit for Full-Bridge DC Motor Driver

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 2

FAN73832 Half-Bridge Gate-Drive IC

Internal Block Diagram

PULSE GEN ERATOR

SCHMITT TRIGGER INPUT

DEAD - TIME CONTROL

Figure 3. Functional Block Diagram of FAN73832

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 3

FAN73832 Half-Bridge Gate-Drive IC

IN GND DT/SD VDD

Figure 4. Pin Configuration (Top View)

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 4

FAN73832 Half-Bridge Gate-Drive IC

Absolute Maximum Ratings

Recommended Operating Conditions

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 5

FAN73832 Half-Bridge Gate-Drive IC

SUPPLY CURRENT SECTION

GATE DRIVER OUTPUT SECTION

2.9 1.2 50 100 2.0 1.2 2.9 100

Note: 5. This parameter guaranteed by design.

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 6

FAN73832 Half-Bridge Gate-Drive IC

Dynamic Electrical Characteristics

Note: 5. These parameters guaranteed by design.

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 7

FAN73832 Half-Bridge Gate-Drive IC

11.6 12.0 11.4

VDDUV+ ,VBSUV+ [V]

11.6 11.4 11.2 11.0 10.8 -40 -20 0 20 40 60 80 100 120

VDDUV- ,VBSUV- [V]

Figure 5. VDD/VBS UVLO (+) vs. Temperature

Figure 6. VDD/VBS UVLO (-) vs. Temperature

Figure 7. VDD Quiescent Current vs. Temperature

Figure 8. VBS Quiescent Current vs. Temperature

Figure 9. VDD Operating Current vs. Temperature

Figure 10. VBS Operating Current vs. Temperature

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 8

FAN73832 Half-Bridge Gate-Drive IC

Typical Characteristics (Continued)

3.0 2.5 2.0

0.5 0.0 -40

Figure 11. Logic Input Current vs. Temperature

Figure 12. Logic Input High Voltage vs. Temperature

SD+ BAR [V]

2.0 1.5 1.0 0.5 0.0 -40

1.5 1.0 0.5 0.0 -40

Figure 13. Logic Input Low Voltage vs. Temperature

Figure 14. SD Positive Threshold vs. Temperature

SD- BAR [V]

200 0.5 0.0 -40 0 -40

Figure 15. SD Negative Threshold vs. Temperature

Figure 16. Turn-on Delay Time vs. Temperature

2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 9