INTERNATIONAL PROFESSIONAL STUDENT CONTEST FINAL STAGE, GALAI, ROMANIA

The 18th edition, April 10, 2009

Design a single board digital imaging system, consisting of: Digital camera: OV7660FB_LM; Light source: RGB LED; Digital programmable circuit: TIE2009 User interface: 3 push-button type switches; Connector for TIE2009 circuit programming; USB interface; Power source. Functional description The circuit TIE2009 will interact with the user by the means of 3 push-button switches and an USB interface, will command the digital camera functions and will modify the currents through the three junctions of the RGB LED by three PWM signals. The information about these currents will be collected via RS1, RS2 and RS3 resistors and supplied to the analog inputs of TIE2009 circuit. The currents drawn from the power sources by TIE2009 are: 100 mA from the DVDD; 50 mA from the AVDD. The currents drawn from the power sources by digital camera are: 50 mA from the 2.5 V; 50 mA from the 1.8 V; 10 mA from the 5 V. 1. Requirements for schematic design The schematic project will be created using any CAD system accepted in the contest. The components Digital camera, RGB LED and TIE2009 will be created in a new library named with the last name (surname/family name) of the contestant. The RGB LED symbol must be created as a multi-part component. Decoupling capacitors with 100nF value will be placed on power lines, wherever is necessary. Any flat or hierarchical organization of the schematic project is accepted.

2. Requirements for PCB layout design The printed circuit board will be rectangular shaped, double sided, 120 mm x 90 mm. The components will be placed on one side of the board, grouped by functional criteria. The RGB LED (see appendix 1) will be placed as close as possible to the digital camera objective.

Signal traces width will be 0.2 mm, the global spacing/clearance being set to 0.2 mm. Vias connecting electrical layers will have 0.6 mm drill and 1.27 mm pad diameter. "POWER IN" traces will be designed to support 2A current intensity. The copper thickness is 70 m, the maximum accepted overheating for traces being 10C. For the analog block, the designer has to generate a partial ground plane on the TOP layer, with an aperture (line width) of 0.25 mm. Thermal relief structures for the TIE2009 pads connected to the copper plane will be designed and sized according to IPC2222 standard. The digital ground signals should be routed apart from analog ground structure. Both ground structures will be connected together in only one point, at the X3 power connector. Signals named D0...D7 will be routed as a data bus on a single layer, using 0.15 mm width traces. The link between TIE2009 and the USB connector will be made of equal length traces (with 2 mm tolerance), having the spacing exactly double than the width of tracks. The RC filter must be placed as close as possible to the USB connector. The heat generated by the RGB LED will be dissipated through forced convection using as heatsink a solid copper rectangular area, placed on the other side of the board. A copper structure will be designed in order to transfer the heat from the thermal pad of the RGB LED to the dissipation area. The total thermal resistance RGB LED case - ambient will be no more than 25 K/W. The following board parameters are as follows: Thermal conduction coefficient of copper: k= 0.395 W/(mmK); Forced convection coefficient in air: h= 0.3 10-4 W/(mm2K); Hole copper-plating thickness: 35 m; Dielectric substrate thickness: 1.6 mm. The thermal resistance of the contact between RGB LED and board, and the thermal conductance through dielectric will be neglected. The board will be mounted into an enclosure using two M3 screws, with the screw head of 6 mm. These screws must be placed onto one of diagonals, into proper non-plated mounting holes, at 6 mm distance to corners. Global fiducial markers, having circular shape, must be introduced in a proper number, according to IPC782 standard. Onto the electrical bottom layer, a rectangular copper area of 30 x 20 mm will be defined. Generate a cut in this area and place the last name (surname/family name), with copper, inside it. All resistors and non-polarized capacitors of the system will be 0805 SMD type, except RS1, RS2 and RS3 shunt resistors, which have 1206 type. TIE2009 has a TQFP64 package, with 0.8 mm pitch. The digital camera will be connected to the circuit board with a flexible printed circuit and a 24 pins connector (see appendix 2). On the printed circuit board a proper sized area will be reserved for the camera. The programming connector will be made of 5 pins, 2.54 mm spaced, in the order presented in the schematic diagram. The push buttons will have the PCB footprint specified in the appendix 3. M1, M2 and M3 transistors have a SOT223 footprint. For the rest of components, proper PCB footprints will be allocated. 3. Requirements for PCB layout finishing A single PCB manufacturing file for the top electrical layer must be generated. Notes: The design order is mandatory: libraries, schematic design, transfer procedure, layout design and post-processing activities. All PCB footprint dimensions for new components are accepted with a tolerance of 0.1mm of the nominal value specified in appendices.

+5V R2 1k R3 1k C2
1 1 2

+5V

A
2

X1

+5V S2 Mode 100n GND +5V +5V C4 220n USB_D+ USB_D100n C3 S3 Start

Programming

5 4 3 2 1

+5V

R1 1k
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

C1
AVDD DVDD PGC PGD I/O35 I/O34 I/O33 I/O32 I/O31 I/O30 I/O29 I/O28 VUSB D+ DDGND

+5V

1.8V

I_R I_G I_B +5V

Y1 25MHz IC1 TIE2009

C5 10p

C6 10p PWM_R PWM_G PWM_B

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 DVDD DGND

C
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

+5V

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MCLR AN0 AN1 AN2 AN3 AN4 AGND OSC1 OSC2 DGND PWM1 PWM2 PWM3 PWM4 DVDD DGND 6 8 3 5 7 9 13 17 DGND DVDD I/O27 I/O26 I/O25 I/O24 I/O23 I/O22 I/O21 I/O20 I/O19 I/O18 I/O17 I/O16 I/O15 I/O14 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 RESET PWDN SIO_D SIO_C VSYNC HREF XCLK PCLK

NC3 NC2 NC1 DGND AGND DOVDD DVDD AVDD

24 23 1 15 2 11 10 4

+2V5

S1 Reset

100n

C
D0 D1 D2 D3 D4 D5 D6 D7 19 21 22 20 18 16 14 12
IC2 OV7660FB_LM

+5V

D2 D1 D3 D0 D4 D5 D6 D7

B
+5V RGB LED D1_B +5V

+5V

B
RGB LED D1_C

RGB LED D1_A

PWM_R RF2 I_R 100 100 RS2 10 CF2 100n 100 I_G 100 RF4

R9 PWM_G

M1 BSP100 RF1 R10 PWM_B

M2 BSP100 RF3

R11 100

M3 BSP100 RF5 100 RS5 10 CF3 100n

RF6 100

100

I_B

100 RS1 10

CF1 100n

A
C7 15p R4 10 R5 33p 10
1 2 3 4 5

USB_DUSB_D+ C9 15p

C8

IC3 XX7805 LM317

IN
+

+5V IC4

+2V5 D2 1N4148
+

1.8V

POWER_IN
IN
+

X3 Power +9V
OUT GND OUT ADJ

C16 C14 220n C15 10u R7 100 220n

C17 10u

0V

C10 220n R8 500

C11 10u/16V

C12 220n

C13 10u R6 500

Appendix 1

Z-Power LED Series Technical Datasheet for F50380

Solder pad:

Note: 1. All dimensions are in millimeters (tolerance: 0.2) 2. Slug of package is connected to anode of Red

Appendix 2

Specifications for OV7660FB_LM

Pins diagram:

Note:

Flex cable will not be bent more than 120 degree AVDD is 2.5V sensor analog power DVDD is 1.8V sensor digital power DOVDD is 2.5 to 5V sensor digital IO power Sensor AGND and DGND should be separated and connected to a single point, as close as possible to connector

Appendix 3

Specifications for pushbutton