Si4814BDY

Vishay Siliconix

Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode

PRODUCT SUMMARY
VDS (V) Channel-1 30 Channel-2 RDS(on) () 0.018 at VGS = 10 V 0.023 at VGS = 4.5 V 0.018 at VGS = 10 V 0.022 at VGS = 4.5 V ID (A)a Qg (Typ.) 10 8.5 10.5 9.3 6.6 8.9

FEATURES
Halogen-free According to IEC 61249-2-21 Available LITTLE FOOT Plus Integrated Schottky 100 % Rg Tested

APPLICATIONS
ADC/DC Converters - Notebook

SCHOTTKY PRODUCT SUMMARY

VDS (V) 30 VSD (V) Diode Forward Voltage 0.50 V at 1.0 A IF (A) 2.0

D1

SO-8
D1 D1 G2 S2 1 2 3 4 Top View Ordering Information: Si4814BDY-T1-E3 (Lead (Pb)-free) Si4814BDY-T1-GE3 (Lead (Pb)-free and Halogen-free) 8 7 6 5 G1 S1/D2 S1/D2 S1/D2

G1 N-Channel 1 MOSFET

S1/D2

Schottky Diode G2 N-Channel 2 MOSFET S2

ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted

Parameter Drain-Source Voltage Gate-Source Voltage TC = 25 C Continuous Drain Current (TJ = 150 C)a,b TC = 70 C TA = 25 C TA = 70 C Pulsed Drain Current (10 s Pulse Width) Continuous Source-Drain Diode Current PulseD Source-Drain Current Single-Pulse Avalanche Current Single-Pulse Avalanche Energy L = 0.1 mH TC = 25 C Maximum Power Dissipationa, b TC = 70 C TA = 25 C TA = 70 C Operating Junction and Storage Temperature Range Notes: a. Based on TC = 25 C. b. Surface Mounted on 1" x 1" FR4 board. c. t = 10 s. Document Number: 73278 S09-0394-Rev. C, 09-Mar-09 www.vishay.com 1 TJ, Tstg PD TC = 25 C TA = 25 C IDM IS ISM IAS EAS 3.3 2.1 1.9
a, b, c

Symbol VDS VGS

Channel-1 30 20 10

Channel-2

Unit V

10.5 8.3 7.8a, b, c 6.3a, b, c 40 3.2 1.8a, b, c 40 15 11.2 3.5 2.2 2.0a, b, c 1.3a, b, c C W mJ A

ID

8 7.5
a, b, c

6a ,b, c 40 3 1.7a, b, c 40

1.2a, b, c

- 55 to 150

Si4814BDY
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Channel-1 Parameter Maximum Junction-to-Ambienta Maximum Junction-to-Foot (Drain) t 10 s Steady State Symbol RthJA RthJF Typ. 54 32 Max. 65 38 47 30 Channel-2 Typ. Max. 60 35 Unit C/W

Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Maximum under Steady State conditions is 112 C/W for Channel 1 and 107 C/W for Channel 2.

MOSFET SPECIFICATIONS TJ = 25 C, unless otherwise noted

Parameter Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VGS(th) Temperature Coefficient Gate Threshold Voltage Gate-Body Leakage VDS VDS/TJ ID = 250 A VGS(th)/TJ VGS(th) IGSS VDS = VGS, ID = 250 A VDS = 0 V, VGS = 20 V VDS = 30 V, VGS = 0 V Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V, TJ = 85 C On-State Drain Currentb ID(on) VDS = 5 V, VGS = 10 V VGS = 10 V, ID = 10 A Drain-Source On-State Resistanceb RDS(on) VGS = 10 V, ID = 10.5 A VGS = 4.5 V, ID = 8.5 A VGS = 4.5 V, ID = 9.3 A Forward Transconductanceb Diode Forward Voltageb Dynamica Total Gate Charge Gate-Source Charge Gate-Drain Charge Gate Resistance Qg Qgs Qgd Rg Channel-2 VDS = 15 V, VGS = 4.5 V, ID = - 10.5 A Ch-1 Channel-1 VDS = 15 V, VGS = 4.5 V, ID = 10 A Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 0.5 0.5 6.6 8.9 2.9 3.4 2.3 2.4 1.9 2.3 2.9 3.5 10 14 nC gfs VSD VDS = 15 V, ID = 10 A VDS = 15 V, ID = 10.5 A IS = 1.7 A, VGS = 0 V IS = 1 A, VGS = 0 V VGS = 0 V, ID = 250 A Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 20 20 0.0145 0.015 0.019 0.018 30 35 0.75 0.47 1.1 0.5 0.018 0.018 0.023 0.022 S V 1.5 1.5 30 30 24 25 -6 -6 3.0 2.7 100 100 1 100 15 2000 A A nA V V mV/C Symbol Test Conditions Min. Typ.a Max. Unit

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Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

Si4814BDY
Vishay Siliconix
MOSFET SPECIFICATIONS TJ = 25 C, unless otherwise noted
Parameter Dynamica Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Fall Time Reverse Recovery Rise Time td(on) tr td(off) tf trr Qrr ta tb Ch-1 Channel-1 VDD = 15 V, RL = 15 ID 1 A, VGEN = 10 V, Rg = 6 Channel-2 VDD = 15 V, RL = 15 ID 1 A, VGEN = 10 V, Rg = 6 IF = 1.3 A, dI/dt = 100 A/s IF = 2.2 A, dI/dt = 100 A/s IF = 1.3 A, dI/dt = 100 A/s IF = 2.2 A, dI/dt = 100 A/s IF = 1.3 A, dI/dt = 100 A/s IF = 2.2 A, dI/dt = 100 A/s IF = 1.3 A, dI/dt = 100 A/s IF = 2.2 A, dI/dt = 100 A/s Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 Ch-1 Ch-2 8 9 11 13 21 27 6 9 28 24 17 12 12 11 16 13 ns 15 15 18 20 32 40 10 15 40 35 nC ns Symbol Test Conditions Min. Typ.a Max. Unit

Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test; pulse width 300 s, duty cycle 2 %.

SCHOTTKY SPECIFICATIONS TJ = 25 C, unless otherwise noted

Parameter Forward Voltage Drop Symbol VF Test Conditions IF = 1.0 A IF = 1.0 A, TJ = 125 C VR = 30 V Maximum Reverse Leakage Current Junction Capacitance Irm CT VR = 30 V, TJ = 100 C VR = - 30 V, TJ = 125 C VR = 10 V Min. Typ. 0.47 0.36 0.004 0.7 3.0 50 Max. 0.50 0.42 0.100 10 20 pF mA Unit V

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

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Si4814BDY
Vishay Siliconix
CHANNEL-1 TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
40 VGS = 10 thru 5 V 35 4V I D Drain Current (A) 30 25 20 15 10 5 3V 0 0.00 0.30 0.60 0.90 1.20 1.50 I D Drain Current (A) 30 25 20 15 10 5 0 0 1 2 3 4 5 VDS Drain-to-Source Voltage (V) TC = 125 C 25 C - 55 C 35 40

VGS Gate-to-Source Voltage (V)

Output Characteristics
0.025

Transfer Characteristics

1050 900 VGS = 4.5 V C Capacitance (pF) 750 600 450 300 Ciss

R DS(on) On-Resistance ()

0.022

0.019

0.016

VGS = 10 V

Coss Crss

0.013 150 0.010 0 5 10 15 20 25 30 35 40 0 0

12

18

24

30

ID Drain Current (A)

VDS Drain-to-Source Voltage (V)

On-Resistance vs. Drain Current

6 V GS Gate-to-Source Voltage (V) ID = 7.5 A 5 RDS(on) On-Resistance (Normalized) VDS = 10 V 4 VDS = 15 V 3 1.4 1.6

Capacitance

VGS = 10 V and 4.5 V ID = 7.5 A

1.2

1.0

0.8

0 0 1 2 3 4 5 6 7 8 9 Qg Total Gate Charge (nC)

0.6 - 50

- 25

25

50

75

100

125

150

TJ Junction Temperature (C)

Gate Charge

On-Resistance vs. Junction Temperature

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Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

Si4814BDY
Vishay Siliconix
CHANNEL-1 TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
40 TJ = 150 C I S Source Current (A) 10 RDS(on) On-Resistance () 0.05

0.04

0.03 ID = 7.5 A 0.02

TJ = 25 C

0.01

0.1 0.0

0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 2 4 6 8 10

VSD Source-to-Drain Voltage (V)

VGS Gate-to-Source Voltage (V)

Source-Drain Diode Forward Voltage

0.4 120 100 ID = 250 A 0.0 Power (W) 80

On-Resistance vs. Gate-to-Source Voltage

0.2 V GS(th) Variance (V)

- 0.2

60

- 0.4

40

- 0.6

20

- 0.8 - 50

0 - 25 0 25 50 75 100 125 150 0.001 0.01 0.1 Time (s) 1 10 TJ Temperature (C)

Threshold Voltage
100 Limited by RDS(on)*

Single Pulse Power, Junction-to-Ambient

IDM Limited

10 I D Drain Current (A) 1 ms 1 ID(on) Limited 10 ms 100 ms 0.1 TC = 25 C Single Pulse BVDSS Limited 0.01 0.1 1 10 1s 10 s DC

100

VDS Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified

Safe Operating Area

Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

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Si4814BDY
Vishay Siliconix
CHANNEL-1 TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5

0.2
Notes:

0.1 0.1 0.05

t1 PDM

0.02

t2 1. Duty Cycle, D =

2. Per Unit Base = R thJA = 90 C/W

t1 t2

Single Pulse 0.01 10 - 4 10- 3 10- 2 10- 1 1 Square Wave Pulse Duration (s) 10

3. T JM - TA = PDMZthJA(t) 4. Surface Mounted

100

600

Normalized Thermal Transient Impedance, Junction-to-Ambient

2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse

0.01 10- 4 10- 3 10- 2 10- 1 Square Wave Pulse Duration (s) 1 10

Normalized Thermal Transient Impedance, Junction-to-Foot

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Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

Si4814BDY
Vishay Siliconix
CHANNEL-2 TYPICAL CHARACTERISTICS
40 35 30 I D Drain Current (A) I D Drain Current (A) 25 20 15 10 5 0 0.0 3V VGS = 10 thru 4 V

25 C, unless otherwise noted

40 35 30 25 20 15 TC = 125 C 10 5 0 0.0 25 C - 55 C

0.3

0.6

0.9

1.2

1.5

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

VDS Drain-to-Source Voltage (V)

VGS Gate-to-Source Voltage (V)

Output Characteristics
0.025 1400

Transfer Characteristics

Ciss RDS(on) On-Resistance () 0.022 VGS = 4.5 V 0.019 VGS = 10 V 0.016 C Capacitance (pF) 1120

840

560 Coss Crss

0.013

280

0.010 0 5 10 15 20 25 30 35 40

0 0 5 10 15 20 25 30

ID Drain Current (A)

VDS Drain-to-Source Voltage (V)

On-Resistance vs. Drain Current

6 V GS Gate-to-Source Voltage (V) ID = 7.8 A 5 R DS(on) On-Resistance VDS = 10 V 4 VDS = 15 V 3 1.4 1.6

Capacitance

VGS = 10 V and 4.5 V ID = 7.8 A

(Normalized)

1.2

1.0

0.8

0 0.0

2.2

4.4

6.6

8.8

11.0

0.6 - 50

- 25

25

50

75

100

125

150

Qg Total Gate Charge (nC)

TJ Junction Temperature (C)

Gate Charge

On-Resistance vs. Junction Temperature

Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

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Si4814BDY
Vishay Siliconix
CHANNEL-2 TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
40 TJ = 150 C 0.05

I S Source Current (A)

10

R DS(on) On-Resistance ()

0.04

0.03 ID = 7.8 A 0.02

TJ = 25 C 1

0.01

0.1 0.0

0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 2 4 6 8 10

VSD Source-to-Drain Voltage (V)

VGS Gate-to-Source Voltage (V)

Source-Drain Diode Forward Voltage

10 100

On-Resistance vs. Gate-to-Source Voltage

I R Reverse Current (mA)

80

Power (W) 24 V

10- 1 10- 2 10- 3

60

30 V

40

10- 4

20

10- 5 0 25 50 75 100 125 150 TJ Temperature (C)

0 0.001 0.01 0.1 Time (s) 1 10

Reverse Current vs. Junction Temperature

100 Limited by R DS(on)*

Single Pulse Power, Junction-to-Ambient

IDM Limited

10 I D Drain Current (A) 1 ms 1 ID(on) Limited 10 ms 100 ms 0.1 TC = 25 C Single Pulse BVDSS Limited 0.01 0.1 1 10 100 VDS Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified 1s 10 s dc

Safe Operating Area

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Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

Si4814BDY
Vishay Siliconix
CHANNEL-2 TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
2 1 Duty Cycle = 0.5 Normalized Effective Transient Thermal Impedance

0.2 0.1 0.1 0.05 0.02

Notes: PDM t1 t2 1. Duty Cycle, D = t1 t2

2. Per Unit Base = R thJA = 85 C/W 3. T JM - TA = PDMZthJA(t) 4. Surface Mounted

Single Pulse 0.01 10- 4

10- 3

10- 2

10- 1

10

100

600

Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5

0.2 0.1 0.1 0.05 0.02

Single Pulse 0.01 10- 4 10- 3 10- 2 10- 1 Square Wave Pulse Duration (s) 1 10

Normalized Thermal Transient Impedance, Junction-to-Foot

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73278.

Document Number: 73278 S09-0394-Rev. C, 09-Mar-09

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Package Information
Vishay Siliconix

SOIC (NARROW): 8-LEAD

JEDEC Part Number: MS-012

E 1 2 3 4

D 0.25 mm (Gage Plane) A

h x 45 C

All Leads q L 0.101 mm 0.004"

A1

MILLIMETERS DIM A A1 B C D E e H h L q S 5.80 0.25 0.50 0 0.44 Min 1.35 0.10 0.35 0.19 4.80 3.80 1.27 BSC 6.20 0.50 0.93 8 0.64 0.228 0.010 0.020 0 0.018 Max 1.75 0.20 0.51 0.25 5.00 4.00 Min 0.053 0.004 0.014 0.0075 0.189 0.150

INCHES Max 0.069 0.008 0.020 0.010 0.196 0.157 0.050 BSC 0.244 0.020 0.037 8 0.026

ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498

Document Number: 71192 11-Sep-06

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VISHAY SILICONIX

TrenchFET Power MOSFETs

Application Note 808

Mounting LITTLE FOOT, SO-8 Power MOSFETs

Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.
0.288 7.3

0.288 7.3

0.050 1.27

0.088 2.25

0.027 0.69 0.078 1.98

0.088 2.25

0.2 5.07

Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading

The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, thermal connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device.
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APPLICATION NOTE

0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07

Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading

Document Number: 70740 Revision: 18-Jun-07

Application Note 826

Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-8

0.172 (4.369) 0.028 (0.711)

(6.248)

0.022 (0.559)

0.050 (1.270) Recommended Minimum Pads Dimensions in Inches/(mm)

Return to Index

Return to Index

APPLICATION NOTE

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(1.194)

0.047

(3.861)

0.246

0.152

Document Number: 72606 Revision: 21-Jan-08

Legal Disclaimer Notice

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Vishay

Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishays knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customers responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customers technical experts. Product specifications do not expand or otherwise modify Vishays terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Material Category Policy

Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards.

Revision: 02-Oct-12

Document Number: 91000