TTL Logic Databook TexasInstruments

The TTL Data Book
General Information
Contents
Title Page
D
uoRe LuJ oimi iwa ueD
NUMERICAL INDEX FUNCTIONAL INDEX GLOSSARY EXPLANATION OF FUNCTION TABLES PARAMETER MEASUREMENT INFORMATION TYPICAL CHARACTERISTICS
1-3 1-7 1-39 1-43 1-45 1-51
1 -2
NUMERICAL INDEX
Device Type SN 5400 SN54LSOO SN54S00 SN5401 SN54LSO1 SN 5402 SN54LSO2 SN54S02 SN5403 SN54LSO3 SN54S03 SN5404 SN54LSO4 SN54SO4 SN5405 SN54LS05 SN54S05 SN5406 SN 5407 SN5408 SN54LSO8 SN54S08 SN5409 SN54LSO9 SN54S09 SN5410 SN54LS10 SN54S10 SN54LS11 SN54S11 SN5412 SN54LS12 SN5413 SN54LS13 SN5414 SN54LS14 SN54LS15 SN54515 SN5416 SN5417 SN 5420 SN54LS20 SN54S20 SN54LS21 SN5422 SN54LS22 SN54S22 SN 5423 SN5425 SN 5426 SN54LS26 SN5427 SN54LS27 SN5428 SN54LS28 SN 5430 SN54LS30 SN7400 SN74LSOO SN74S00 SN7401 SN74LSO1 SN7402 . SN74LSO2 . .. SN74S02 . SN7403 SN74LSO3 SN74S03 .. SN7404 SN74LSO4 SN74SO4 . . . SN7405 . SN74LSO5 .. SN74S05 . SN7406 SN7407 SN7408 . SN74LSO8 SN74S08 SN7409 SN74LSO9 SN74S09 SN7410 SN74LS10 SN74S10 SN74LS11 SN74S11 SN7412 SN74LS12 SN7413 .. SN74LS13 SN7414 . SN74LS14 .. SN74LS15 SN74S15 SN7416 .. SN7417 SN74LS19A SN7420 SN74LS20 SN74S20 . SN74LS21 SN7422 SN74LS22 .. SN74S22 SN7423 SN74LS24A SN7425 SN7426 . SN74LS26 . SN7427 SN74LS27 SN7528 SN74LS28 SN7430 SN74LS30
Page No. 2-3 2-3 2-3 2-9 2-9 2-13 2-13 2-13 2-19 2-19 2-19 2-25 2-25 2-25 2-31 2-31 2-31 2-37 2-39 2-41 2-41 2-41 2-47 2-47 2-47 2-53 2-53 2-53 2.59 2-59 2-63 2-63 2-67 2-67 2-77 2-77 2.87 2.87 2-37 2-39 2-91 2-95 2-95 2-95 2.101 2.105 2-105 2-105 2-111 2-91 2-111 2-115 2-115 2-119 2-119 2-123 2-123 2-127 2-127
Device Type SN54S30 SN54LS31 SN5432 SN54LS32 SN54S32 SN5433 SN54LS33 SN5437 SN54LS37 SN54S37 SN5438 SN54LS38 SN54S38 SN5439 SN5440 SN54LS40 SN54S40 SN5442A SN54LS42 SN5445 SN5446A SN5447A SN54LS47 SN5448 SN54LS48 SN54LS49 SN5450 SN5451 SN54LS51 SN54S51 SN5453 SN5454 SN54LS54 SN54LS55 SN54LS56 SN54LS57 SN54S64 SN54S65 SN54LS68 SN54LS69 SN5470 SN5472 SN5473 SN54LS73A SN5474 SN54LS74A SN54S74 SN5475 SN54LS75 SN5476 SN54LS76A SN5477 SN54LS77 SN54LS78A SN5483A SN54LS83A SN5485 SN54LS85 SN54S85 SN74S30 SN74LS31 SN7432 SN74LS32 SN74S32 . .. SN7433 ....... SN74LS33 SN7437 . SN74LS37 . SN74S37 SN7438 . . . . SN74LS38 SN74S38 SN7439 SN7440 SN74LS40 . . . . SN74S40 . SN7442A SN74LS42 SN7445 .. SN7446A SN7447A . SN74LS47 SN7448 . SN74LS48 SN74LS49 SN7450 SN7451 SN74LS51 SN74S51 SN7453 . SN7454 SN74LS54 SN74LS55 SN74LS56 SN74LS57 SN74S64 SN74S65 SN74LS68 SN74LS69 SN7470 SN7472 . SN7473 .. . SN74LS73A SN7474 SN74LS74A SN74S74 SN7475 SN74LS75 SN7476 SN74LS76A
Page No. 2-127 2-133 2-137 2-137 2-137 2-143 2 - 143 2-147 2-147 2-147 2-153 2-153 2-153 2.159 2-161 2-161 2-161 2-167 2-167 2-173 2-175 2-175 2.175 2-175 2-175 2-175 2-189 2-193 2-193 2.193 2-199 2-201 2-201 2-205 2-207 2-207 2.211 2-211 2-215 2-215 2-221 2-225 2-229 2-229 2-235 2.235 2-235 2-241 2-241 2-247 2-247 2-241 2.241 2.253 2-257 2-257 2-263 2-263 2-263
SN74LS78A SN7483A SN74LS83A SN7485 SN74LS85 SN74S85
TEXAS INSTRUMENTS
POST OFFICE BOX 655012 DALLAS. TEXAS 75265
1 -3
Ge n e ra lIn fo rm at ion
NUMERICAL INDEX
Device Type
SN5486 SN54LS86A SN54S86 SN5490A SN54LS90 SN5491A SN54LS91 SN5492A SN54LS92 SN5493A SN54LS93 SN5494 SN5495A SN54LS95B SN5496 SN54LS96 SN5497 SN7486 SN74LS86A SN74S86 SN7490A SN74LS90 SN7491A SN74LS91 SN7492A SN74LS92 SN7493A SN74LS93 SN7494 SN7495A SN74LS958 537496 SN74LS96 SN7497
Page No.
2-271 2 271 2-271 2-271 2-277 2-289 2 289 2 277 2 277 2-277 2-277 2-293 2-297 2 297 2-305 2 305 2 311
Device Type
31454143 SN54145 3N541.S145 SN54147 SN54LS147 3354148 3N54L.S148 3354150 33541510 SN54LS151 SN54S151 5554153 SN54LS153 3N5-1S153 3354154 SN54155 SN54LS155A SN74143 SN74145 SN74LS145 SN74147 SN74LS147 . SN74148 SN74LS148 SN74150 SN74151A SN74LS151 SN74S151 SN74153 SN74LS153 SN74S153 5374154 5374155 SN74LS155A
Page No.
2-439 2.447 2-447 2-451 2-451 2-451 2-451 2-457 2-457 2-457 2 457 2-465 2-465 2 465 2 471 2-475 2-475
uop, ew iolui
SN54107 SN54LS107A
SN54109 SN54LS109A SN54111 SN54LS112A SN54S112 SN54LS113A SN54S113 SN54LS114A SN54S114 SN54116 SN54120 SN54121 SN54122 SN54LS122 SN54123 SN54LS123 SN54S124 SN54125 SN54LS125A SN54126 SN54L5126A SN54128 SN54130 SN54132 SN54LS132 SN54S132 SN54S133 SN54S134 SN54S135 SN54136 SN54LS136 SN54LS137 SN54LS138 SN54S138 SN54LS139A SN54S139 SN54S140
SN74107 .. SN74LS107A .
3374109 SN74LS109A SN74111 SN74LS112A 511745112 SN74LS113A SN74S113 SN74LS114A SN74S114 SN74116 SN74120 SN74121 SN74122 SN74LS122 3N74123 SN74LS123 SN74S124 SN74125 SN74LS125A SN74126 SN74LS126A SN74128 SN74130 SN74132 SN74LS132 SN74S132 93746133 SN74S134 SN74S135 SN74136 SN74LS136 SN74LS137 SN74LS138 SN74S138A SN74LS139A SN74S139A SN74S140 .
2-319 2-319
2 325 2-325 2-331 2-335 2-335 2-343 2-343 2-349 2-349 2-357 2-361 2 367 2-373 2-373 2 373 2-373 2 383 2 387 2-387 2 387 2-387 2-393 2-373 2-395 2 395 2 395 2 407 2 -111 2-415 2-417 2-417 2 421 2-425 2-425 2-431 2-431 2-435
SN54156 SN54LS156
5354157 SN54LS157 SN54S157 3N54LS158 51\1545158 31\154159 SN54160 9N541.S160A 5354161 3N5455161A 3354152 SN54LS162A SN54S162 3554163 SN54LS163A 33545163 SN54164 535453164 5354165 SN54LS165A SN54166 SN54LS166A SN54167 3N154L916913 53545169 5354170 53541.5170 33541.5171 5354173 3N54L5173A 5354171 SN54LS174 SN54S174 3354175 3N54LS175 SN543175
SN74156 SN74LS156
SN74157 SN74LS157 SN74S157 SN74LS158 SN74S158 SN74159 SN74160 SN74LS1600 SN74161 SN74LS161A SN74162 SN74LS162A SN74S162 9N174163 SN74LS163A SN74S163 SN74164 SN74LS164 SN74165 SN74LS165A SN74166 . SN74LS166A SN74167 SN74LS1698 SN74S169 SN74170 SN74LS170 SN74LS171 SN74172 5374173 . SN74LS173A 5N74174 SN74LS174 SN74S174 SN74175 SN74LS175 SN74S175 .
2-475 2-475
2-483 2-483 2-483 2 483 2-483 2-489 2-493 2-493 2-493 2-493 2 493 2-493 2-493 2-493 2-493 2-493 2-515 2-515 2-521 2-521 2-529 2 529 2-537 2-543 2-543 2-555 2-555 2-565 2-569 2-575 2-575 2-581 2-581 2-581 2-581 2-581 2-581
1-4
TEXAS INSTRUMENTS
NUMERICAL INDEX
Device Type SN54176 SN54177 SN54178 SN54180 SN54LS181 SN74176 SN74177 SN74178 SN74180 SN74LS181
Page No. 2-587 2 587 2-593 2-597 2-601
Device Type
SN54LS266 SN54273 SN54LS273 SN54276 SN54278 SN74LS266 SN74273 SN74LS273 SN74276 SN74278
Page No.
2-757 2-759 2-759 2-763 2 767
SN54S181 SN54S182 SN54LS183 SN54190

SN54LS190 SN54191 SN54LS191 SN54192 SN54LS192 SN54193 SN54LS193 SN54194 SN54LS194A SN54S194 SN54195 SN54LS195A SN54S195 SN54196 SN54LS196 SN54S196 SN54197 SN54LS197 SN54S197
SN745181 ....... SN74S182 SN74LS183

SN74190 SN74LS190 SN74191 SN74LS191 SN74192 SN74LS192 SN74193 SN74LS193 91174194 SN74LS194A SN74S194 SN74195 SN74LS195A SN74S195 SN74196 SN74LS196 SN74S196 SN74197 SN74LS197 SN74S197 .
..
..
2-601 2-611 2-617

2-619 2-619 2-619 2-619 2-633 2-633 2-633 2-633 2-645 2-645 2-645 2-655 2-655 2-663 2-663 2-663 2-663 2-663 2-663 2-663
SN54279 SN54LS279A SN54LS280

SN54S280 SN54283 SN54LS283 SN54S283 SN54284 5N54285 SN54290 5N54L5290 SN54LS292 SN54293 SN54LS293 SN54LS294 SN54LS2958 SN54LS297 SN54298 SN54LS298 SN54LS299 SN54S299 SN54LS320 SN54LS321
SN74279 SN74LS279A . SN74LS280

SN74S280 ... SN74283 SN74LS283 SN74S283 SN74284 SN74285 SN74290 SN74LS290 SN74LS292 SN74293 SN74LS293 SN74LS294 SN74LS295B SN74LS297 SN74298 SN74LS298 . SN74LS299 SN74S299 SN74LS320 SN74LS321 .
2-771 2-771 2-775

2-775 2 781 2-781 2-781 2-787 2-787 2 791 2-791 2 799 2-791 2-791 2-799 2-807 2-811 2-817 2-817 2-823 2-823 2-829 2 829
1
Ge n era lIn fo rmat io n
6 1-5
SN54198 SN54199
SN54221 SN54LS221 SN54LS240 SN54S240 SN54LS241 SN54S241 SN54LS242 SN54LS243 SN54LS244 SN54S244 SN54LS245 SN54246 SN54247 SN54LS247 SN54LS248 SN54251 SN54LS251 SN54S251 SN54LS253 SN54S253 SN54LS25713 SN54S257 5N54LS2586 SN54S258 SN54259 SN54LS2598 SN54S260 SN54LS261 SN54265
SN74198 SN74199
SN74221 SN74LS221 SN74LS240 SN74S240 SN74LS241 SN74S241 SN74LS242 SN74LS243 SN74LS244 SN74S244 SN74LS245 SN74246 SN74247 SN74LS247 SN74LS248 SN74251 SN74LS251 SN74S251 SN74LS253 SN74S253 SN74LS257B SN74S257 SN74LS2586 SN74S258 SN74259 SN74LS2598 SN74S260 SN74LS261 SN74265
2-671 2-671
2-681 2-681 2-691 2-691 2-691 2-691 2-697 2-697 2-691 2-691 2-701 2-705 2-705 2-705 2-705 2-715 2-715 2-715 2-723 2-723 2 729 2-729 2-729 2-729 2-735 2-735 2-739 2-743 2-751
SN54LS322A SN54ALS323
SN54LS348 SN54S350 SN54LS352 SN54L5353 SN54LS354 SN54LS355 SN54LS356 SN54365A SN54LS365A SN54366A SN54LS366A SN54367A SN54LS367A SN54368A SN54LS368A SN54LS373 SN54S373 SN54LS374 SN54S374 SN54LS375 SN54376 SN54LS377 SN54LS378 SN54LS379 SN54LS381A SN54S381 SN54L5382 SN54LS384 SN54LS385
SN74LS322A SN74ALS323
SN74LS348 SN74S350 SN74LS352 SN74LS353 SN74LS354 SN74LS355 SN74LS356 SN74365A SN74LS365A SN74366A SN74LS366A SN74367A SN74LS367A SN74368A SN74LS368A SN74LS373 SN74S373 SN74LS374 SN74S374 SN74LS375 SN74376 SN74LS377 SN74LS378 SN74LS379 SN74LS381A SN74S381 SN74LS382 SN74LS384 SN74LS385
2-835 2-841
2-845 2-849 2-855 2-859 2-863 2-863 2-863 2-873 2-873 2-873 2-873 2-873 2 873 2-873 2-873 2-883 2-883 2-883 2-883 2 891 2 893 2-895 2-895 2-895 2-899 2-899 2 899 2 907 2-913
TEXAS INSTRUMENTS
NUMERICAL INDEX
Device Type SN54LS386A SN54390 SN54LS390 SN54393 SN54LS393 SN54LS395A SN54LS396 5N54LS399 SN54LS422 SN54LS423 SN54S436 SN54LS440 SN54LS441 SN54LS442 SN54LS444 SN54LS445 SN54LS446 SN54L5449 SN54LS465 SNE4LS466 SN54LS467 SN54LS468 SN54LS490 SN54LS540 SN54LS541 SN54LS590 SN54LS591 SN54LS592 SN54LS593 SN54LS594 SN54LS595 SN54LS596 SN54LS597 SN54LS598 SN54L5599
Page No. SN74LS386A SN74390 . . . SN74LS390 SN74393 SN74LS393 SN74LS395A SN74LS396 SN74LS399 SN74LS422 SN74LS423 SN74S436 SN74LS440 SN74LS441 SN74LS442 SN74 LS444 SN74LS445 SN74LS446 SN74LS449 SN74LS465 SN74LS466 SN74LS467 SN74 LS468 SN74LS490 SN74LS540 SN74LS541 SN74LS590 SN74LS591 SN74L5592 SN74LS593 SN74LS594 SN74LS595 SN74LS596 SN74LS597 SN74LS598 SN74LS599 SN74LS600A SN74LS601A SN74LS603A SN74LS604 SN74LS606 SN74LS607 SN74LS610 SN74 LS611 SN74LS612 SN74LS613 SN74 LS620 2-917 2-919 2-919 2-919 2-919 2-929 2-933 2-937 2-941 2-941 2-947 2-951 2-951 2-951 2-951 2-957 2-959 2-959 2-963 2-963 2-963 2-963 2-967 2-973 2-973 2-977 2-977 2-981 2-981 2-989 2-993 2-993 2-999 2-999 2-989 2-1007 2-1007 2-1007 2-1015 2-1015 2-1015 2-1021 2-1021 2-1021 2-1021 2-1031
Device Type SN54LS621 SN 54 LS624 SN54LS626 SN54LS628 SN54LS629 SN54LS630 SN54LS636 SN54LS637 SN54LS638 SN54LS639 SN54LS640 SN54LS641 SN54LS642 SN54LS644 SN54LS645 SN54LS646 SN54LS647 SN54 LS648 SN54LS649 SN54LS651 SN54LS652 SN54LS653 SN54LS668 SN54LS669 SN54LS670 SN54LS671 SN54LS672 SN54 LS673 SN54LS674 SN54LS681 SN54LS682 SN54LS684 SN54LS685 SN54LS687 SN54LS688 SN54LS690 SN54LS691 SN54LS693 SN54LS696 SN54LS697 SN54LS699 SN74LS621 SN74LS623 SN74LS624 .. SN74LS625 SN74LS626 . . . SN74L8627 SN74LS628 . . SN74LS629 SN74LS630 SN74LS636 SN74LS637 SN74LS638 SN74LS639 SN74LS640 SN74LS641 SN74LS642 SN74LS644 .. SN74LS645 SN74LS646 SN74LS647 SN74L5648 . SN74LS649 SN74LS651 SN74LS652 SN74LS653 SN74LS668 . SN74LS669 . 3N74L3670 SN74LS671 . SN74LS672 .. SN74LS673 SN74LS674 . . . SN74LS681 SN74LS682 SN74LS684 SN74LS685 SN74LS686 SN74LS687 SN74LS688 SN74LS690 SN74LS691 SN74LS693 SN74LS696 SN74LS697 . SN74LS699 ..
Page No. 2-1031 2-1031 2-1037 2-1037 2-1037 2-1037 2-1037 2-1037 2-1047 2-1055 2-1055 2-1063 2-1063 2-1067 2-1067 2-1067 2-1067 2-1067 2-1075 2-1075 2-1075 2-1075 2-1085 2-1085 2-1085 2-1093 2-1093 2-1103 2-1111 2-1111 2-1117 2-1117 2-1123 2-1129 2-1129 2-1129 2-1129 2-1129 2-1129 2-1139 2-1139 2-1139 2-1149 2-1149 2-1149
uoR e wa olui l eiau aD
MI/
SN54LS604 SN54LS606 SN54LS607 SN54LS610 SN54LS612 SN54LS620
1-6
TEXAS INSTRUMENTS
POST OFFICE BOO 655012 DALLAS, TEXAS 75265
FUNCTIONAL INDEX
Column heading Literature Number provides the latest available technical source for a particular product. TI's technical literature is identified by a seven- or eight-character product source code consisting of four 141 alpha characters, three 131 numeric characters, and a revision letter, if applicable. If the fourth alpha character is an "S", then the document is a stand-alone data sheet, e.g., SDAS106A. The code is printed at the upper right-hand corner on the front cover and the lower left-hand corner on the back cover of a data book, and at the lower left-hand corner on the back page of a data sheet. List of Applicable Databooks: SCAD001 A = Advanced CMOS Logic Databook SCLD001B = High-Speed CMOS Logic Databook SDADOO1B = ALS/AS Logic Databook SDFD001 = F Logic Databook SDLD001A = Standard TTL Logic Databook SDVD001 = LSI Logic Databook SDZDOO1 B = Programmable Logic Databook
TEXAS INSTRUMENTS
POST OFFICE BOX 655012 DALLAS, TEXAS 75265
1-7
Gene ra l Info rm ation
FUNCTIONAL INDEX
GATES
POSITIVE-NAND GATES
TECHNOLOGY DESCRIPTION TYPE STD TTL 8-Input '30 LS S A 13-Input 12-Input Dual 2-Input '133 '134 '8003 '13 20 Dual 4-Input 40 '1020 '11020 10 Triple 3-Input '1010 '11010 A 00 '26 '37 Quad 2-input 38 '39 '132 '5 '1: Hex 2-Input '804 '1804
. Denotes available technology. = Denotes planned new. A = Denotes "A" suffix available in the technology indicated. B . Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced. TBA
ALS
AS
HC
AC
ACT
LITERATURE NUMBER
sill
rInnl A B '9 ' 1A 'B IB

-. IA 'A
: '
..,...
SD: SC.. SD' SC
uogewaol ui l eaau a9
'11030 A A A
SDADOO1B SDLD001A SDI. I SD/ I i ' 'A 113 '
'.300113 )001A SD! 'I3 A SC!. SDLD001A SDAD001B I )001B )001 SD: IB SC 1 'A SDAD001B 'A SD SC SDI SDI SDI iB ' 'A .A 1B
A A A A A A B
SD!
IA SDI SDA.,.....71B grIl 0001A . )001A .. )001B '00018 : )001A SDAD0018 SC

IR
1-s
TEXAS INSTRUMENTS
POST OFFICE BOX 655012 DALLAS TEXAS 75265
FUNCTIONAL INDEX
POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS
TECHNOLOGY DESCRIPTION TYPE STD TTL Dual 4-Input Triple 3-Input

'22
LITERATURE HC AC ACT NUMBER SDLD001A
LS
ALS
AS
SDAD00113 SDLD001A SDAD00113
'12
Quad 2-Input '03 '1003 B

A POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS
)001B )001A 'D0018 )001B SDAD00113
TECHNOLOGY DESCRIPTION TYPE STD TTL Triple 3-Input '15 Quad 2-Input
'09
LITERATURE HC AC ACT NUMBER

SDLD001A
LS
ALS
AS
SDADOO1B SDLD001A
SDA0001B SCLD001B SDFD001 SCLD001B
Quad Schmitt
A
'7001
= Denotes available technology. Denotes planned new.
Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA = Denotes information To Be Announced.
TEXAS INSTRUMENTS
POST OFFICE 80X 855012 DALLAS. TEXAS 75265
1-9
Gen e ra lInfo rmation
'01
SDLD001A SDAD001 B
FUNCTIONAL INDEX
POSITIVE - AND GATES TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS F HC AC ACT LITERATURE NUMBER
A Dual 4-Input '21
SDATIRR18 SD' SC SD SC' SDI. SD/ 'A

B
lA A 1B 'B
'11021 A
u ogetw om IMMO
11 Triple 3-Input '1011 '11011
soapon , R
S CAT
08 Quad 2-Input '1008 '11008
, _
",
...
......A...J01B SCLD0018 SDFD001 SDAD001 B SCADOO1A
POSITIVE-OR GATES
TECHNOLOGY
DESCRIPTION Triple 3-Input
TYPE '4075
STD TTL
LITERATURE
LS
ALS
AS
HC
AC
ACT
NUMBER SCLD001B SDLDO01A SDAD001 B B

.
' 32
Quad 2 - Input
A A A A B
gilt!, D0018 10018 .,Apoo 1 A SDAD001 B SCLD001B SDADOO1B
'11032 Hex 2-Input 832 '1832

A B TBA Denotes available technology. Denotes planned new. Denotes "A" suffix available in the technology Indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
1-10
TEXAS INSTRUMENTS
POST OFFICE sox 655012 DALLAS, TEXAS 75265
FUNCTIONAL INDEX
POSITIVE-NAND GATES
TECHNOLOGY DESCRIPTION Dual 4-Input with Strobe Dual 4-Input Dual 5-Input TYPE STD TTL '25 '4002
'260
LITERATURE HC AC ACT NUMBER SDLD001A SCLD0018 SDL0001A SDLD001A
LS
ALS
AS
A A A A
A
Triple 3-Input
27
SDA000113 SCLC 'SDK SCAD001 A SDLD00 I A '8 i 'B )001 .. )001A SDAD001B SDLDOO1A SDAD00113 SCLD001B SDFD001 SDAD001B SDAD0018 SC SC ' B 1A 'B SDAD00113
'11027
'02
28 Quad 2-Input '33 '36 '1002 '7002 '11002 Hex 2-Input '805 '1805
POSITIVE-OR/NOR GATES
TECHNOLOGY DESCRIPTION 8-Input
TYPE '4078
STD TTL
LS
ALS
AS
HC
Ij
I_
LITERATURE
AC ACT NUMBER
SCLD001B
-= Denotes available technology.
= Denotes planned new A = Denotes "A" suffix available in the technology indicated B = Denotes "B" suffix available in the technology indicated. TBA = Denotes information To Be Announced.
INSTRUMENTS
TExAs
FUNCTIONAL INDEX
EXCLUSIVE-OR/-NOR GATES TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS HC LITERATURE NUMBER
Quad 2-Input Exclusive-OR Gates with Totem-Pole Outputs Quad 2-Input Exclusive-OR Gates with OpenCollector Outputs Quad 2-Input Exclusive-NOR Gates
Quad 2-Input Exclusive-NOR Gates with OpenCollector Outputs '811
'86 '136
qn , O001A . . _
SCLD001 B SDLD001A
IRJ OU GD
'266 '810 '7266
SDAD001B SDI Iloo1A
uoge iwol ui
S..' 113 SCLD001B
SDADOO1B
Quad ExclusiveOR/-NOR Gates
'135
SDLD001A
AND-NOR GATES TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS HC HCT LITERATURE NUMBER
2-Wide 4-Input 4-Wide 4-2-3-2 Input 4-Wide 2-2-3-2 Input Dual 2-Wide 2-Input
'55 '64 '54 '51
SDLD001A
AND-NOR GATES WITH OPEN-COLLECTOR OUTPUTS TECHNOLOGY LITERATURE
SCLD001B
DESCRIPTION
4-Wide 4-2-3-2Input
TYPE
STD
TTL
'65
LS
ALS
AS
HC
HCT
NUMBER SDLD001A
m- Denotes available technology. Denotes planned new. Denotes "A" suffix available in the technology indicated. A B m Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced. TBA
1-12
INSTRUMENTS
TEXAS
40
FUNCTIONAL INDEX
EXPANDABLE GATES
TECHNOLOGY DESCRIPTION Dual 2-Wide AND-OR-Invert Dual 4-Input Positive-NOR with Strobe MULTIFUNCTION GATES AND ELEMENTS TECHNOLOGY DESCRIPTION Inverter,3-/4Input NAND/NOR Combination 6-Section NAND Invert, NOR Quadruple Complimentary Output Logic Element DELAY ELEMENTS TECHNOLOGY DESCRIPTION Inverting and Noninverting Elements 2-Input NAND-Buffer
= Denotes available technology. = Denotes planned new.
TYPE
STD TTL
LITERATURE HC HCT NUMBER
LS
ALS
AS
'50
SDLD001A
'23
TYPE
STD TTL
LITERATURE AS HC HCT NUMBER
LS
ALS
'7006
SCLD001B
'7008
SC LD001B
'265
SDLD001A
TYPE
STD TTL
LS
ALS
31
SDLD001A
A = Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA = Denotes information To Be Announced.
TEXAS 44
4/1
INSTRUME
1-13
Ge ne ralInfo rm ation
FUNCTIONAL INDEX
INVERTERS/NONINVERTINI; BUFFERS
HEX INVERTERS/NONINVERTERS TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS F HC AC ACT HCU LITERATURE NUMBER
B '04
..a. A
uoRewaNui leaeueD
'11004 Hex Inverters '05 '06 '14 '16 '19 '1004 '1005 '34 '11034 A A
SCI.' SCI B SDFD001 SCAD001A SDLD001A crlArinnt B .rI ".. 'A . 'A B SDLD001A SDLD001A SDADOO1B SDAD001B SDAD001B SCADOO1A
,
A IB 'B
Hex Noninverter
A
Denotes available technology. Denotes planned new. Denotes "A ' suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated.
TBA = Denotes information To Be Announced.
1-14
INSI RI IMENTS
TrxAs
FUNCTIONAL INDEX
DRIVER AND BUS TRANSCEIVERS

HEX DRIVERS
TECHNOLOGY DESCRIPTION TYPE STD TTL Hex 2-Input Driver '808 '1808 '07 '17 Hex Driver _
'1R,
LITERATURE HC HCT - NUMBER )001B )001 B SDAD00113 SDLD001A
LS
ALS A A
AS B
A A A A A A A A A DRIVERS WITH OPEN-COLLECTOR OUTPUTS TECHNOLOGY A
SDADOO1B SDADOO1B SDADOO1B )001A )001B SDLD001A SCLD001B SDLD001A

SCLD001B
' 365 Noninverting Hex Buffers/ Drivers '367 '368 '366
SDLD001A SCLD001B
DESCRIPTION Noninverting Octal Buffers, Drivers Inverting Octal Buffers, Drivers Inverting and Noninverting Octal Buffers, Drivers

TYPE '757 760 '756 '763
STD TTL
LITERATURE HC HCT NUMBER SDADOO1B SDADOO1B SDADOO1B SDADOO1B
LS
ALS
AS
'762
SDADOO1B
= Denotes available technology. . Denotes planned new.
A Denotes "A" suffix available in the technology indicated. B . Denotes "B" suffix available in the technology indicated. TBA . Denotes information To Be Announced.
TEXAS IN STRU M ENTS

POST OFFICE BOX 655012 DALLAS TEXAS I
1-15
Gen e ralInform atio n
FUNCTIONAL INDEX
BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS TECHNOLOGY DESCRIPTION Noninverting Quad Transceivers Inverting Quad Transceivers '758 '615 A 12-mA/24-mA/ 40-mA Sink Transceivers '639 641 '614 '622 12-mA/24-mA/ 48-mA Sink Inverting Output Transceivers '642 '653 12-mA/24-rnA/ 48-mA Sink, True and Inverting Output Transceivers Registered with Multiplexed 12-mA/24-mA/ 48-mA True Output Transceivers Registered with Multiplexed 12-mA/24-mA/ 48-mA Inverting Output Transceivers
= Denotes available technology . m Denotes planned new. A m Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
TYPE
STD TTL
LITERATURE F HC NUMBER
LS
ALS
AS
'759
SDAD00113
SDADOO1B SDAD0018
U OR BILUN LII I MIBUOD
SDA0001B )001A )001

CllAIVIO113
'621
A A A A A A ..... SC
'A
SC 18 crlArinn .1 B
'638
SLDLOO1A SDAD0018 SDLD001A ' 1B A SDAD00113 SDLD001A A SDADOO1B SDLD001A SDLD001A SDV0001 SDLD001A
'644
'647 '654
'649
SDVD001
1-16
TEXAS INSTRUMENTS
49/
FUNCTIONAL INDEX
DRIVERS WITH 3-STATE OUTPUTS
TECHNOLOGY DESCRIPTION Quad Buffers/ Drivers with Independent Output Controls TYPE STD TTL LS A A '241 '11241 '244 Noninverting Octal Buffers/ Drivers '11244 '465 '467 A A S '1244
A B TBA Denotes available technology. Denotes planned new, Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
ALS
AS
HC
HCT
AC
ACT
BCT
LITERATURE NUMBER 'A 'B )01A )01B SDLD001A SDADOO1B SCLD00113 crwrIont
'125 '126
1
Gene ral Informat ion
1-17
SDLD001A SDADOO1B qcl 0001B ' SCADOO1A SDLD001A SDAD0016 SDADOO1B SDLD001A -101A ,......A,...J01B SCLD001B SDADOO1B
'541
TEXAS Ail INSTRUMENTS

FUNCTIONAL INDEX
DRIVERS WITH 3-STATE OUTPUTS (continued)
TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS F HC HCT AC ACT BCT
LITERATURE NUMBER
'231 '240
SDAD001B SDLD001A SDAD001B )001B )001 ;004 )001A 1001A ' )001 B SDADOO1B SDLD001A SDLD001A
uop,ewaNui peieueD
'11240 Inverting Octal Buffers/Drivers '466 '468 A A '540 '1240

Inverting and Noninverting Octal Buffers/ Drivers '230
SDADOO1B 'B E E.....,,

1B
SDADOO1B
Noninverting 10-Bit Buffers/ Drivers Inverting 10-Bit Buffers/Drivers
'2827 '29827 '2828 '29828
SCLS051 SDVD001 SCLS052 SCLS051 SOVD001 SCLS052
Denotes ava lable technology. . Denotes planned new. Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
B TBA
1-18
TEXAS 11" INSTRUMENTSINS

POST OFFICE 000 655012
01/
DALLAS, TEXAS 75205
FUNCTIONAL INDEX
BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
DESCRIPTION Noninverting Quad Transceivers
TYPE
LS
ALS A
AS
TECHNOLOGY F HC HCT
LITERATURE AC ACT BCT Nt VI l it SDLI
'243
SDADOO1B
'242 B
SCLD001B SDFD001 SDLD001A SDADOO1B

SDFD001
Inverting Quad
Transceivers
'1242
SDADOO1B
SDL0001A
Quad
Tridirectional '442
Transceivers A '245 SDLD001A SDAD0018
SCLD00113 SDFD001
'11245 '620 Octal Transceivers
TBA SCAD001A SCLD001B SDAD003 SD SC SCAD001A SCLD001B SDADOO1B SDLD001A SCAD001A SCLD001B SDADOO1B SDLD001A
'11620 '640 '11640 '643 '11643 '1245

A
SCAD001A SDAD001A
TBA
. Denotes available technology. Denotes planned new. Denotes "A" suffix available in the technology indicated Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
B TBA
TEXNS INSTRUMENTS
1-19
Ge nera lInfo rma tion
SCLD0016
FUNCTIONAL INDEX
BUS TRANSCEIVERS WITH 3-STATE OUTPUTS (continued)
DESCRIPTION
TYPE
'543
LS
ALS
AS
TECHNOLOGY F HC HCT
AC
ACT
BCT
LITERATURE NUMBER
SDFD001 SDFD001
'544
'646
SCL
Octal Bus Transceivers

with Registers
UOR B LUJ OW I l ei GU OD
648
'651
'652 '11646
'11648
SDI. 1B A SD SC B SD' ' B SD . A SCLD001B SDADOO1B SDLD001A

SCLD001B SDAD001B
SDLD001A
'11651 '11652 '658 '659

'664 8-/9-Bit Bus Transceivers with Parity '665 '29833
SCADOO1A
S CLD001B SDAS119A SCBS003 SDAS119A SCBS003 3118 3002 SDAS118 SCBS002
Checker/
Generator
'29834
'29853
'29854
A B TBA Denotes available technology. _== Denotes planned new
Denotes "A" suffix available in the technology indicated Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
1-20
TEXAS 4 INSTRUMENTS
FUNCTIONAL INDEX
BUS TRANSCEIVERS WITH 3-STATE OUTPUTS (continued)
DESCRIPTION Noninverting 9Bit Transceivers Inverting 9-Bit Transceivers Noninverting 10Bit Transceivers Inverting 10-Bit Transceivers
TYPE '29863 29864 '29861 29862
TECHNOLOGY LS S ALS AS F HC HCT AC ACT BCT
LITERATURE NUMBER SD SC SDAS096A TBA SDAS097 SCLS056 TBA SDADOO1B SDLD001A SDAS097 iA
'623
SCLD001B )001 )001B 1B A SDADOO1B SDLD001A
12-mA/24-mA/ 48-mA Sink, True Output Transceivers '654 '1640 '1645 '1' Universal Transceiver/ Port Controllers

'645
A A A
SDAD0018
. '856 '877
SCAD001A SDAD00113
m Denotes ava lable technology.
Denotes planned new. A -= Denotes "A" suffix available in the technology indicated. B m Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
TEXAS INSTRUMENTS
1-21
Ge ne ral Info rmat ion
FUNCTIONAL INDEX
LINE DRIVERS/BUS TRANSCEIVERS/MOS DRIVERS
TECHNOLOGY DESCRIPTION TYPE '2242 Bus Transceivers . . STD TTL LS S ALS '2640 '2645 '2240 AS HC BCT
LITERATURE NUMBER
SDAD001E1
IW OUG9
'2240 Line Drivers '2241 '2244 '2244 '2540 '2541
TBA
uoR etw oi Lii
SDA0001B
LINE DRIVERS
TECHNOLOGY DESCRIPTION Octal Buffers

AND/Line Drivers with Input Pull up '747
TYPE '746
STD TTL
LS
ALS
Resistors Octal/Line
Dnvers.'wyth 3-State Output "2541
SDADOO1B
'2540
Denotes available technology. . Denotes planned new.
A Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA = Denotes information To Be Announced.
1-22
TEXAS INSTRUMENTS
POST LJL ,CE HD% 1S5012 DAL L
FUNCTIONAL INDEX
50-OHM/75-OHM LINE DRIVERS TECHNOLOGY DESCRIPTION Quad 2-Input Positive-NOR Dual 4-Input Positive-NAND Hex 2-Input Positive-NAND Hex 2-Input Positive-NOR Hex 2-Input Positive-AND Hex 2-Input Positive-OR TYPE STD TTL '128 '140 '804 '1804 '805 '1805 '808 '1808 '832 13 '1832 SDLD001A A A A A A A A A MULTIFUNCTION DRIVERS TECHNOLOGY DESCRIPTION Dual Pulse Synchronizers/ Drivers
. Denotes available technology. Denotes planned new.
LS
ALS
B B B B
SDADOO1B SCLD001B SDADOO1B SCLD001B SDADOO1B SCLD001B SDADOO1B SCLD001 SDAD0018
TYPE
STD TTL
LS
ALS
'120
SDLD001 A
A Denotes "A" suffix available in the technology indicated. B . Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
TEXAS INSTRUMENTS
1-23
Gene ra l In fo rma tio n
FUNCTIONAL INDEX
FLIP-FLOPS
DUAL AND SINGLE FLIP-FLOPS TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS HC AC ACT F LITERATURE NUMBER
'73 '76
A A A
A
uopetwom league
78 107
!A 'B SDLD001A SCLD001B SDLD001A SCLD001B

SDLD001A SCLD001B
..
109 Dual J-K EdgeTriggered '112
A A A A A A A A A A A
SDLD001A SDADOO1B SCLD001B SDFD001 sni ilnni A SC. --' 8 SD. ' SD 'A SDADOO1B sci 0001B ' )001 1001A SDADOO1B SCA 00018 . Inn .1
'113
'114
'11109 Single J-K EdgeTriggered 70 Dual D-Type 74 A A
SDL0001A ' )001B 10018 SDFD001 SCADOO1A SCLD001B
Dual D-Type with 2-Input NAND/NOR Gates Dual 4-Bit D-Type Edge-Triggered '11074 '7074 '7075 '7076 '874 876 '878 '879 B A A A
SDAD001B
m Denotes available technology. m Denotes planned new. Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced. TBA
1 -24
TEXAS INSTRUMENTS
AP
FUNCTIONAL INDEX
QUAD AND HEX FLIP-FLOPS NO. OF FFs TECHNOLOGY TYPE STD TTL 175
Q, iri
DESCRIPTION
OUTPUTS
LS
ALS
AS
HC
LITERATURE NUMBER SDLD001A
SDAD001 B SCLD001B SDFD001 SDLD001A SCLD001B SDFD001
D-Type
'174 Q 6 '378
'276
SDLD001A SDAD001B SCLD001B SDFD001 SD A

SC SDFD001 B
J-K
'279
SDLD001A
'376
Denotes available technology. Denotes planned new. A = Denotes "A" suffix available in the technology indicated, Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
TEXAS 1/ INSTRUMENTS
POST OFFICE SOX 856012 DALLAS, TEXAS 75265
1-25
Gene ra lInfo rmation
'379
FUNCTIONAL INDEX
OCTAL, 9-BIT, AND 10-BIT DTYPE FLIP-FLOPS DESCRIPTION NO. OF BITS OUTPUTS TYPE STD LS TECHNOLOGY LITERATURE AC ACT BCT F NUMBER
ALS
AS
HC
HCT
SDLD001A SDADOO1B SCLD001B
'374 True Data 3-State A '574
'11374 2-State True Data with Clear 3-State '575 '874 '878 True with Enable Octal
A A A
TBA SDFD001 ' )OO1B )0018 001 ' )001A SDLD001A SDAD00113 SCLD001B SDFD001 SDADOO1B )001A )001B SDFD001 SD SC 'B 001 SDADOO1B SCLD001B SDFD001 SDAD001B SDAD00113 B -
uoReuuol ui l e.lau aD
'273
2-State
'377 '534
Inverting
3-State '564 '576 '826 '11534 '577 '879 '876 '825
A
A A
SCAD001A
Inverting with Clear Inverting with Preset True 9-Bit Inverting

True
3-State 3-State
SDADOO1B
3-State 3-State
'823 '1823 '824 '821 '1821 '822
SDAD0018 SDAS126 SDAD0018 SDAS131 SDAD001B
10-Bit
3-State 3-State
Inverting
. Denotes available technology. Denotes planned new A . Denotes "A" suffix available in the technology indicated B . Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
1 -26
TEXAS INSTRUMENTS
POST OFFICE SOX 655012 ()All AS TEXAS 7526',
AP
FUNCTIONAL INDEX
LATCHES AND MULTIVIBRATORS

QUAD LATCHES WITH 2-STATE OUTPUTS
TECHNOLOGY DESCRIPTION TYPE STD TTL '75 Bistable '375 S-R '279 LS A
MONOSTABLE MULTIVIBRATORS
LITERATURE AS HC HCT NUMBER SDI SC A 'B
ALS
SDLD001A SCLD001B SDLD001A
1
Ge ne ra lInfo rm ation
1-27
TECHNOLOGY DESCRIPTION TYPE '121 Single '123 Dual '221 '423 STD TTL
D-TYPE OCTAL, 9-BIT, AND 10-BIT READ-BACK LATCHES
LS
ALS
S DLDOOIA
DESCRIPTION Edge-Triggered Inverting and Noninverting Transparent True Transparent Noninverting Transparent with Clear and True Outputs Transparent with Clear and Inverting Outputs
A B TBA
NO. OF BITS
TECHNOLOGY TYPE STD TTL '996 '990 ..4 '991 '993 '995 '666 LS S ALS AS HC HCT
LITERATURE NUMBER
Octal Octal 9-Bit 10-Bit Octal 9-Bit 10-Bit Octal
SDADOO1B
Octal
'667
Denotes available technology. Denotes planned new. Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
TEXAS INSTRUMENTS
FUNCTIONAL INDEX
OCTAL, 9-BIT, AND 10-BIT LATCHES NO. OF BITS TECHNOLOGY OUTPUTS TYPE STD TTL LS '373 Transparent Octal 3-State
B
DESCRIPTION
LITERATURE AC ACT BCT F NUMBER SDLD001A
ALS
AS
HC
HCT
aD A
SDADOO1B SCLD001B TBA SDFD001

'
IB B
UORBU.1.1 01U1 l eie UeD
'573 '11373 Dual 4-Bit Transparent Octal 2-State 3-State '116 '873 B '533 Inverting Transparent
SDFD001
SCADOO1A SDLD001A SDADOO1B SDADOO1B
SCLD001B TBA SDFD001 SCADOO1A '.' Q1B 5.,,,....,01B SDFD001
Octal
3-State
'11533 A '563 '580 A A B e
Dual 4-Bit Inverting Transparent 2-Input Multiplexed Octal 3-State OC 2-State Q only True True True Inverting 10-Bit 9-Bit Octal 10-Bit 9-Bit Octal 3-State 3-State 3-State 3-State 3-State 3-State '604 '607 '259 '4724 '841 '1841 '843 '1843 '845 '842 '844 '846 Octal 3-State '880
SDADOO1B
SDLDOOIA SCLD001B SDLD001A ' 1B IB SCLD001B SDADOO1B SDAS130 SDADOO1B SDAS127
Addressable
Octal
SDADOO1B
. Denotes available technology. Denotes planned new. A .- Denotes "A" suffix available in the technology indicated. B 'Denotes "B" suffix available in the technology indicated. TBA = Denotes infnrmation To Be Announced
1-28
Ib I Uf
TE., INSTRUMENTS
EiL.012 f,e,1l AS I i',26`
FUNCTIONAL INDEX
REGISTERS
SHIFT REGISTERS NO. OF BITS SX MODES TYPE S L X I-I X '322 4 X X Parallel-In Parallel-Out Bidirectional 8 X X X X '323 X 4 X X X 5 8 Serial-In Parallel-Out Parallel-In Serial-Out 8 X X X X 8 X 16
Serial In 8
TECHNOLOGY STD TTL LS A A S ALS AS HC F
DESCRIPTION SignProtected
LITERATURE NUMBER SDLD001A StI SD ' A B
1
Gene ra l Info rmation
1-29
X X
X X
X X
'194 '198
SCLD001B SDLDOO1A Fnip,

-
'299
5,...:
1B
SC - - - -.1B SDFD001 SDLD001A . - B
')001 .. .001A SD 18
X X X X X X X
'95 '195 '295 '395 '96 '199 '164
B B
Parallel-In Parallel-Out
'A SCLL,...., ; B
SDLD001A
A A ' ' I
'A 'ES
X X X
X X X
'165 '166 '674

'91
. 1 )001A )001 B )001A )001E1

SDLD001A
X
X
Serial-Out
NOTE . Modes: S- - S R. S - St_ t

= Denotes available technology.
Load, H
Hold
A B TBA
Denotes planned new. Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced
TEXAS INSTRUMENTS
P(1,1 ()MU BOX 655012 13ALI AS TEXAS 75265
FUNCTIONAL INDEX
SHIFT REGISTERS WITH LATCHES
NO. OF DESCRIPTION Parallel-In, Parallel-Out with Output Latches Serial-In Buffered 8 3-State OC 16 Parallel-In, Serial-Out with Input Latches Parallel I/O Ports with Input Latches Multiplexed Serial Inputs 8 3-State '598 8 2-State '597 2-State 4 3-State 672 '594 '595 '599 '673 BITS OUTPUT TYPE 671
TECHNOLOGY STD TTL LS S ALS AS HC
LITERATURE NUMBER
SDLD001A SDLD001A 'B A SCLD001B
fMIGUOD
Parallel-Out with Output Latches
u og euuolui
SDLD001A
SIGN-PROTECTED REGISTERS
DESCRIPTION Sign-Protected Registers
NO. OF BITS 8 SX
MODES TYPE S L X H X '322 STD TTL LS A
TECHNOLOGY S ALS AS HC
LITERATURE NUMBER SDLD001A
REGISTER FILES
TECHNOLOGY DESCRIPTION Dual 16 Words X 4 Bits 4 Words X 4 Bits 8 Words X 2 Bits 64 Words X 40 Bits OUTPUT TYPE '870 '871 '170 '670 '172 '8834 STD TTL 3-State OC 3-State 3-State 3-State LS S ALS A AS HC
LITERATURE NUMBER SDAD001B
SDLD001A
TBA
Denotes available technology. Denotes planned new. A Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. B TBA a Denotes information To Be Announced.
1-30
TEXAS d INSTRUMENTS
Ai
FUNCTIONAL INDEX
OTHER REGISTERS
TECHNOLOGY DESCRIPTION Quadruple Multiplexers with Storage 8-Bit Universal Shift Registers Quadruple Bus Buffer Register Data Selector/ Multiplexer/ Register Dual-Rank 8-Bit Shift Register 8-Bit Diagnostic/ Pipeline Register '963 '964 '819 29818 '356 ' 299 173 A '298 TYPE STD TTL LS S ALS AS HC BCT
LITERATURE NUMBER SDLD001A SDAD00113 SCLD001B SDLD001 A SDAD001B SCLD0018 SDLD001A SCLD001B SDVD001 SDLD001A
1
Ge ne ral Info rmat io n
1-31
SDAS105
TBA
. Denotes avai able technology. Denotes planned new. A Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA . Denotes information To Be Announced.
TEXAS INSTRUMENTS
POST OFFICE 80X 655012 DALLAS. TEXAS 75285
4 40
FUNCTIONAL INDEX
COUNTERS
SYNCHRONOUS COUNTERS POSITIVE-EDGE TRIGGERED PARALLEL LOAD TECHNOLOGY TYPE STD TTL LS S ALS AS HC F LITERATURE NUMBER
DESCRIPTION
A B
SDL SD?
'A 'B B
'160
uollewiowi l eJoueD
Decade
Sync '162
B A
SDLD001A SDAD00113 SCLD001B SDFD001 SDADOO1B SDLD001A B SDADOO1B SDFD001 SDLD001A SDADOO1B SCLD001B SDLD001A SDADOO1B SCLD001B SDADOO1B SDFD001
SDLD001A SDL0001A A
'560 '692 Sync '168 '190 Decade Up/Down Async '192
A
A
Sync
'568
'696
'161
SD SC SDI
'B B
'163 4-Bit Binary Sync '561
A B A
SDI A SDADOO1B SCLD001B SDI SD,1B SDLDOOIA SDLD001A SDLD001A
'693 '8161 '8163

. Denotes available technology
.
SDAS116 SDAS1O4
. Denotes planned new. A . Denotes "A" suffix available in the technology indicated. B . Denotes "B" suffix available In the technology indicated. TBA . Denotes information To Be Announced.
1-32
TEXAS INSTRUMENTS
FUNCTiONAL INDEX
SYNCHRONOUS COUNTERS POSITIVE-EDGE TRIGGERED (continued)
DESCRIPTION
PARALLEL LOAD
TECHNOLOGY TYPE STD TTL LS S ALS AS HC F
LITERATURE NUMBER
'191 Async '193 4-Bit Binary Up/Down B '169
Sync
'569 '697
'699
SOLD001A
8-Bit Up/Down Divide-By-10 Johnson Counter Divide-By-8 Johnson Counter

A B TBA
Async CLR Sync CLR
'8169 '867 '869 '4017 '7022
SDAS117 SDVD001
SCLD00113
Denotes available technology. Denotes planned new Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
TE XAS INSTRUM ENTS

1-33
Gene ralIn fo rm ation
SDI IA SDAL,J1B SCLD001B i001A ,,,....A3001B SCL0001B SDLD001A SDAS001B )001 .....A3001B SDFD001
FUNCTIONAL INDEX
ASYNCHRONOUS COUNTERS (RIPPLE CLOCK) NEGATIVE-EDGE TRIGGERED
DESCRIPTION
PARALLEL
TECHNOLOGY
LOAD Set-to-9 Yes Yes Set-to-9 None Yes Yes
TYPE '90 '176 '196 .

J.,
Decade
uogewa olui lenue9
4-Bit Binary
None Divide-By-12 Dual Decade Set-to-9 Dual 4-Bit Binary 7-Bit Binary 12-Bit Binary 14-Bit Binary None
'177 '197 J._ '390 '490 '393 '4024 '4040 '4020 '4060 '4061
STD TTL A A A A
LITERATURE
LS A
ALS
AS
HC
NUMBER
SDLD001A
SDLD001A ' 1)001B ' 1)00113 )001A )001A SCLD001B
SCLD0018
Denotes available technology.
Denotes planned new. A = Denotes "A" suffix available in the technology indicated. Denotes "B" suffix available in the technology indicated. B TBA Denotes information To Be Announced.
1 -34
TEXAS INSTRUMENTS
FUNCTIONAL INDEX
8-BIT BINARY COUNTERS WITH REGISTERS
DESCRIPTION Parallel Register Outputs Parallel Register Inputs Parallel I/O
PARALLEL LOAD 3-State OC 2-State 3-State
TECHNOLOGY TYPE STD TTL '590 '591 '592 '593 LS

S
LITERATURE AS HC NUMBER SDLD001A SCLO001B
ALS
SDLD001A
FREQUENCY DIVIDERS, RATE MULTIPLIERS
TECHNOLOGY DESCRIPTION 60-Bit Binary Rate Multiplier Decade Rate Multiplier Programable Frequency Dividers/Digital Timers
A
TYPE
STD TTL
LITERATURE HC HCT NUMBER
LS
ALS
AS
'97 '167
SDLD001A
'282 '284
.
SDAD001B SDLD001A
Denotes available technology Denotes planned new.
Denotes "A" suffix available in the technology indicated. B . Denotes "B" suffix available in the technology indicated. TBA Denotes information To Be Announced.
TEXAS INSTRUMENTS
1 -35
Gen era lInfo rmat ion
FUNCTIONAL INDEX
PROGRAMMABLE LOGIC ARRAYS

STANDARD HIGH-SPEED PAL' CIRCUITS IALSI TYPE PAL1 ALBA
PALI 6R4A
INPUTS
OUTPUTS NO. 8
4
NO. OF PINS
TYPE Active Low Registered
PACKAGES
LITERATURE NUMBER
PAL1ARRA 16
PAL'i chuA-2
6 8
8 4 6
20
Active Low
FK,FN,J,N
uoge unow i lenu eD
PALI 6R4A-2 PALI 6R6A-2
Registered
PALI 6R8A-2 PAI .

PAL PAL PAI A-2
8 8
4 6 20 8 8 Active Low Registered 24 FK,FN,JT,NT
1
.
Active Low
SDZDOO1B
PAL.,,,-k
PAI. PAI PAI .
'A-2
I -2
1-2
4 6 8 HIGH PERFORMANCE PAL' CIRCUITS (ALS) Registered
TYPE 406L8-10 4L16R4-10 TIBPAL16R6-10 TIBPAL16R8-10 TIBPAL16L8-12 TIBPAL16R4-12 TIBPAL16R6-12

TIBPAL16R8-12 TIBPAL161-18-15
INPUTS
OUTPUTS NO. 8 4 6 8 8 4 6 Register Active High Register TYPE Active High
NO. OF PINS
PACKAGES
LITERATURE NUMBER
SDZDOO1B
TIBPAL16HD8-15 TIBPAL16L8-15 TIBPAL , TlADAL" \ L' AL ,
16
Active High Active Low
20
FK,FN,J,N
TBA
SDZDOO1 B TBA SDZDOO1B
1-15 15 15 25 6 8
8
TIBPAL1 1,.4-15 Registered
Active High
TBA
TIBPAL16FID8-25
TIRPAL16L8 25 4L16LD8-25
. )001C 8 Active Low
= Denotes available technology = Denotes planned new. A = Denotes "A" suffix available in the technology indicated B = Denotes "B" suffix available in the technology indicated TBA = Denotes information To Be Announced
PAL is a registered trademark of Monolithic Memories Inc.
1-36
TEXAS INSTRUMENTS
FUNCTIONAL INDEX
HIGH PERFORMANCE PAL' CIRCUITS (ALS) (continued) TYPE TIBPAL16R4-25 TIBPAL16R6-25 TIBPAL16R8-25 TIBPAL16L8-30 TIBPAL16R4-30 TIBPAL16R6-30 TIBPAL16R8-30 TIBPAL20L8-15 TIBPAI . TIBPAI TIBPAI. '-15 -15 I-15 16 INPUTS OUTPUTS NO. 4 6 8 8 4 6 8 8 4 6 8 8 4 6 20 8 10 4 8 10 10 4 8 10 8 4 6 19 8 8 4 6 8 HIGH PERFORMANCE CMOS PAL' CIRCUITS TYPE 1..161..8-55 kL16R4-55 TICPAL16R6-55 TICPAL16R8-55
= Denotes available technology. Denotes planned new
NO. OF PINS
TYPE Registered Active Low Registered Active Low Registered Active Low Registered Active Low Registered Active Low Registered Active Low Registered Active Low Registered
PACKAGES
LITERATURE NUMBER
20
FK,FN,J,N
SDZDOO1B
TIBPAL,_...,_..-25 TIBPAL20R4-25 TIBPAI TIBPAI TIBPAI TIBPAI TIBPAI. TIBPAI . TIBPAI TIBPAI TIBPAI. TIBPAI . ' (5 25 0-20 '-20 20 -20 0-30 -30 30 ' 1-30
SDZD00113
24
FK,FN,JT,NT TBA
TIBPALR19L8 TIBPALR19R4 TIBPALR19R6 TIBPALR19R8 TIBPALT19L8 _ _ 4LT19R4 . 4LT19R6 TIBPALT19R8
SDZDOO1B
INPUTS
OUTPUTS NO. 8 4 6 8 Register TYPE Active High
NO. OF PINS
PACKAGES
LITERATURE NUMBER
16
20
JL,N
TBA
A Denotes "A" suffix available in the technology indicated. B Denotes "B" suffix available in the technology indicated. TBA . Denotes information To Be Announced.
PAL is a registered trademark of Monolithic Memories Inc
TEXAS 4 INSTRUMENTS
POST OFFICE PDX 655012 DALLAS. TEXAS 75265
1 -37
GeneralInform ation
FUNCTIONAL INDEX
HIGH PERFORMANCE IMPACT PROGRAMMABLE ARRAY LOGIC
TYPE _ TIBPAL22V10 _ ' 4L22V10A 41_22V10A
INPUTS 12 Inputs or 11 Inputs with CLK
OUTPUTS NO 10 TYPE I/O
NO. OF PINS 24
PACKAGES
LITERATURE NUMBER SDPS015 SDPS106
NT,FN
FIELD PROGRAMMABLE LOGIC ARRAY (ALS)
TYPE
INPUTS
OUTPUTS NO. TYPE 3-State OC 3-State
NO. OF PINS
ARRAY 14x32x6
PACKAGES
LITERATURE NUMBER
uog e tw olui leJ OU GD
TIFPLA839 TIFPLA840 TIB828167B 67A 2S105B . ' 05A 16 8 14 6
24 14 x 48 x 6 28
FK,FN,N,NT SDZ0001A FK,FN,JD,N
3-State 3-State
BIPOLAR MEMORY
FIRST-IN FIRST-OUT MEMORIES (FIFOs)
TYPE DESCRIPTION OF 3-State 3-State 16 Words x 4 Bits 3-State OC OC 3-State 16 Words x 5 Bits 3-State 3-State 3-State 64 Words x 4 Bits 64 Words x 5 Bits
A B TBA
TECHNOLOGY TYPE .. ..' :-: . . . '229 '234 . '235 A A A STD TTL ALS AS LS S HC HCT PACKAGES
LITERATURE NUMBER
J,N D,N,FK,FN JN J,N DW,FK,FN DW,J,FK,FN DW,FK,FN,J,N DW,J,FK,FN DW,FN,FK,N SDAS106 SDVD001 SDAS107 SDAS108 SDVD001
3-State 3-State
Denotes available technology. Denotes planned new. Denotes "A" suffix available in the technology indicated Denotes "B" suffix available in the technology indicated. Denotes information To Be Announced.
1-38
Tr xias ANSI 1 ,Z1 'MENTS

GLOSSARY SYMBOLS, TERMS, AND DEFINITIONS
INTRODUCTION These symbols, terms, and definitions are in accordance with those currently agreed upon by the JEDEC Council of the Electronic Industries Association (EIA) for use in the USA and by the International Electrotechnical Commission (IEC) for international use. OPERATING CONDITIONS AND CHARACTERISTICS (IN SEQUENCE BY LETTER SYMBOLS) f max Maximum clock frequency The highest rate at which the clock input of a bistable circuit can be driven through its required sequence while maintaining stable transitions of logic level at the output with input conditions established that should cause changes of output logic level in accordance with the specification. Supply current The current into the VCC supply terminal of an integrated circuit. Supply current, outputs high The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the outputs are at the high level.
Supply current, outputs low The current into* the VCC supply terminal of an integrated circuit when all (or a specified number) of the outputs are at the low level.
ICC
ICCH
ICCL
IIH
High-level input current The current into an input when a high-level voltage is applied to that input. Low-level input current The current into* an input when a low-level voltage is applied to that input. High-level output current The current into an output with input conditions applied that, according to the product specification, will establish a high level at the output. Low-level output current The current into* an output with input conditions applied that, according to the product specification, will establish a low level at the output. Short-circuit output current The current into* an output when that output is short-circuited to ground (or other specified potential) with input conditions applied to establish the output logic level farthest from ground potential lor other specified potential).
Off-state (high-impedance-state) output current (of a three-state output)
IIL
10H
IOL
IOS
1 0Z
The current flowing into an output having three-state capability with input conditions established that, according to the production specification, will establish the high-impedance state at the output. to Access time The time interval between the application of a specified input pulse and the availability of valid signals at an output.
'Current out of a terminal is given as a negative value
TEXAS INSTRUMENTS
1-39
Gen e ral In fo rm at ion
tdis
Disable time (of a three-state output) The time interval between the specified reference points on the input and output voltage waveforms, with the three-state output changing from either of the defined active levels (high or low) to a high-impedance (off) state. (tdis = tPHZ or tPLZ) Enable time (of a three-state output) The time interval between the specified reference points on the input and output voltage waveforms, with the three-state output changing from a high-impedance (off) state to either of the defined active levels (high or low). (ten = tpZH or tpzLI. Fall time The time interval between two reference points (90% and 10% unless otherwise specified) on a waveform that is changing from the defined high level to the defined low level. Hold time The time interval during which a signal is retained at a specified input terminal after an active transition occurs at another specified input terminal. NOTES: 1. The hold time is the actual time interval between two signal events and is determined by the system in which the digital circuit operates. A minimum value is specified that is the shortest interval for which correct operation of the digital circuit is guaranteed. 2. The hold time may have a negative value in which case the minimum limit defines the longest interval (between the release of the signal and the active transition) for which correct operation of the digital circuit is guaranteed.
ten
UOU EWJ OJ UI l e J OU OD
tf
th
tpd
Propagation delay time The time between the specified reference points on the input and output voltage waveforms with the output changing from one defined level (high or low) to the other defined level. (tpd = tPHL or tPLH) Propagation delay time, high-to-low level output The time between the specified reference points on the input and output voltage waveforms with the output changing from the defined high level to the defined low level. Disable time (of a three-state output) from high level The time interval between the specified reference points on the input and the output voltage waveforms with the three-state output changing from the defined high level to a high-impedance (off) state. Propagation delay time, low-to-high-level output The time between the specified reference points on the input and output voltage waveforms with the output changing from the defined low level to the defined high level. Disable time (of a three-state output) from low level The time interval between the specified reference points on the input and output voltage waveforms with the three-state output changing from the defined low level to a high-impedance (off) state. Enable time (of a three-state output) to high level The time interval between the specified reference points on the input and output voltage waveforms with the three-state output changing from a high-impedance (off) state to the defined high level. Enable time (of a three-state output) to low level The time interval between the specified reference points on the input and output voltage waveforms with the three-state output changing from a high-impedance (off) state to the defined low level.
tPHL
tpHZ
tPLH
tpLZ
tpZH
tpzL
1-40
TEXAS INSTRUMENTS
tr
Rise time The time interval between two reference points (10% and 90% unless otherwise specified) on a waveform that is changing from the defined low level to the defined high level. Setup time The time interval between the application of a signal at a specified input terminal and a subsequent active transition at another specified input terminal. NOTES: 1. The setup time is the actual time interval between two signal events and is determined by the system in which the digital circuit operates. A minimum value is specified that is the shortest interval for which correct operation of the digital circuit is guaranteed. 2. The setup time may have a negative value in which case the minimum limit defines the longest interval (between the active transition and the application of the other signal) for which correct operation of the digital circuit is guaranteed.
tsu
I
C O
R
O C
tt
Transition time (general) The time interval between two reference points (10% and 90% unless otherwise specified) on a waveform that is changing from the defined low level to the defined high level (rise time) or from the defined high level to the defined low level (fall time). Pulse duration (width) The time interval between specified reference points on the leading and trailing edges of the pulse waveform. High-level input voltage An input voltage within the more positive (less negative) of the two ranges of values used to represent the binary variables. NOTE: A minimum is specified that is the least-positive value of high-level input voltage for which operation of the logic element within specification limits is guaranteed. Low-level input voltage An input voltage level within the less positive (more negative) of the two ranges of values used to represent the binary variables. NOTE: A maximum is specified that is the most-positive value of low-level input voltage for which operation of the logic element within specification limits is guaranteed. High-level output voltage The voltage at an output terminal with input conditions applied that, according to the product specification, will establish a high level at the output. Low-level output voltage The voltage at an output terminal with input conditions applied that, according to the product specification, will establish a low level at the output. Positive-going threshold level The voltage level at a transition-operated input that causes operation of the logic element according to specification as the input voltage rises from a level below the negative-going threshold voltage, VT .
tw
a)
VIH
V11
VOH
VOL
VT+
VT
Negative-going threshold level The voltage level at a transition-operated input that causes operation of the logic element according to specification as the input voltage falls from a level above the positive-going threshold voltage, VT +
TEXAS INSTRUMENTS
1-41
UOI IMU J OI U1
leletlaD
EXPLANATION OF FUNCTION TABLES
The following symbols are used in function tables on TI data sheets: high level (steady state) L = = = low level (steady state) transition from low to high level transition from high to low level value/level or resulting value/level is routed to indicated destination value/level is re-entered X = irrelevant (any input, including transitions) off (high-impedance) state of a 3-state-output a .. h = = the level of steady-state inputs at inputs A through H respectively level of Q before the indicated steady-state input conditions were established complement of Qo or level of Q before the indicated steady-state input conditions were established level of Q before the most recent active transition indicated by 1 or t one high-level pulse one low-level pulse TOGGLE each output changes to the complement of its previous level on each active transition indicated by 1 or t
00
Q0 Qn
JL
If, in the input columns, a row contains only the symbols H, L, and/or X, this means the indicated output is valid whenever the input configuration is achieved and regardless of the sequence in which it is achieved. The output persists so long as the input configuration is maintained. If, in the input columns, a row contains H, L, and/or X together with t and/or 1, this means the output is valid whenever the input configuration is achieved but the transition(s) must occur following the achievement of the steady-state levels. If the output is shown as a level (H, L, Q0, or Q0), it persists so long as the steady-state input levels and the levels that terminate indicated transitions are maintained. Unless otherwise indicated, input transitions in the opposite direction to those shown have no effect at the output. (If the output is shown as a pulse, JL o r , the pulse follows the indicated input transition and persists for an interval dependent on the circuit.)
TEXAS INSTRUMENTS
1-43
Gene ralInform ation
EXPLANATION OF FUNCTION TABLES
Among the most complex function tables in this book are those of the shift registers. These embody most of the symbols used in any of the function tables, plus more. Below is the function table of a 4-bit bidirectional universal shift register, g., type SN74194.
FUNCTION TABLE INPUTS CLEAR MODE Si
X X =-,
OUTPUTS PARALLEL A
X Xm X X X X X
SO
X X = 2I
CLOCK
X
SERIAL LEFT
X X X X X I
RIGHT
XX
B
X X
C
X X .X X X X X
D
X X
OA L 0 A0 a H L 0 8n Br) 0 A0
OB L OBO b DA, ClA n Cn 0 Cn B0
OC L CO c Bn 0 55 Dn ODn CO
OD L DO d Cn On H L DO
=====2
-,
uop m.wolui i eJo ueD
=X X X X X
-oX X XX >d
X =- I
-1 2
-,
X X X
--JX
2-,
-,
-I
The first line of the table represents a synchronous clearing of the register and says that if clear is low, all four outputs will be reset low regardless of the other inputs. In the following lines, clear is inactive (high) and so has no effect. The second line shows that so long as the clock input remains low (while clear is high), no other input has any effect and the outputs maintain the levels they assumed before the steady-state combination of clear high and clock low was established. Since on other lines of the table only the rising transition of the clock is shown to be active, the second line implicitly shows that no further change in the outputs will occur while the clock remains high or on the high-to-low transition of the clock. The third line of the table represents synchronous parallel loading of the register and says that if S1 and SO are both high then, without regard to the serial input, the data entered at A will be at output QA, data entered at B will be at GB, and so forth, following a low-to-high clock transition. The fourth and fifth lines represent the loading of high- and low-level data, respectively, from the shift-right serial input and the shifting of previously entered data one bit; data previously at QA is now at QB, the previous levels of QB and Qc are now at Qc and QD respectively, and the data previously at QD is no longer in the register. The entry of serial data and shift takes place on the low-to-high transition of the clock when S is low and SO is high and the levels at inputs A through D have no effect. The sixth and seventh lines represent the loading of high- and low-level data, respectively, from the shift-left serial input and the shifting of previously entered data one bit; data previously at QB is now at QA, the previous levels of Qc and QD are now at QB and Qc, respectively, and the data previously at CIA is no longer in the register. This entry of serial data and shift takes place on the low-to-high transition of the clock when S1 is high and SO is low and the levels at inputs A through D have no effect. The last line shows that as long as both mode inputs are low, no other input has any effect and, as in the second line, the outputs maintain the levels they assumed before the steady-state combination of clear high and both mode inputs low was established.
1-44
1Ns1 RI 1MENTS
TrxAs
PARAMETER MEASUREMENT INFORMATION
SERIES 54/74, 54LS/74LS, 54S/74S

Vcc
OPEN. COLLECTOR INPUT CONDITIONS (See Test Table and Note) OUTPUTS TOTEM-POLE OUTPUTS TEST TABLE
4- 1+1
VOH
1 0H
FUNCTION NAND AND NOR OR
INPUT CONDITIONS Input under test at VIL max, all others at 4.5 V All inputs at VIH min All inputs at VIL max Input under test at VIH min, all others at GND Inputs under test la set including one input of
41AND-OR
All inputs of AND gate under test at VIH min, all others at GND
NOTE: For functions having three-state outputs, input conditions are maintained which will cause the outputs to be enabled (low-impedance).
FIGURE 1. VIH , VIL, VOH , 1 0H

Vcc
FUNCTION INPUT CONDITIONS (See Test Table and Note) TEST TABLE INPUT CONDITIONS All inputs at VIH min Input under test at VIL max, all others at 4.5 V Input under test at VIH min, others at GND All inputs at VIL max All inputs of AND gate under test at VIH min, all others at GND Inputs under test la set including one input of each AND gate) at VIH min, all others at 4.5 V
loL 4 1+1
NAND AND NOR
VOL
OR AND-ORINVERT AND-OR
NOTE: For functions having three-state outputs, input conditions are maintained which will cause the outputs to be enabled (low-impedance).
FIGURE 2. VII VIL. VOL vcc

VI REMAINING INPUTS OPEN OUTPUT IS) OPEN OUTPUT IS) OPEN Vcc
II or IIH 1+)_11.
REMAINING 0_ INPUTS (See Note El
_L
NOTE: Each input is tested separately. NOTES: A. Each input is tested separately. B. When testing AND-OR-INVERT or AND-OR gates, each AND gate is tested separately with inputs of AND gates not under test open when testing II and
grounded when testing IIH
FIGURE 3. Vi
FIGURE 4. II, IIH
TEXAS INSTRUMENTS
1 - 45
Gene ra lInfo rmatio n
VOH "
IOH
AND-OR INVERT
each AND gate) at VIE max, all others at 4.5 V
SERIES 54/74, 54LS/74LS, 54S/74S

4.5 V VCC
REMAINING INPUTS 1 IL OUTPUT(S) OPEN
4
VI
NOTES. A. Each Input is tested separately.
B. When testing AND-OR-INVERT or AND-OR gates, each AND gate is tested separately with input of AND gates not under test
open
uoge w aol ui l eie u eo
FIGURE 5. III
TEST TABLE
VCC
FUNCTION
NAND
INPUT CONDITIONS
All inputs at GND
AND
INPUT CONDITIONS (See Test Table and Note)
All inputs at 4.5 V All inputs at GND All inputs at 4.5 V_ All inputs at '. _ All inputs at 4., .
NOR OR
I
FIGURE 6. 10S. 1 0 (+1 VCC
FUNCTION NAND AND NOR
INPUT r CONDITIONS (See Test Table and Note) OUTPUTIS) OPEN
vt
4, los
AND-OR-INVERT AND-OR
NOTE: For functions having three-state outputs, input conditions are maintained which will cause the outputs
to be enabled llowdrnpedancel.
TEST TABLE
INPUT CONDITIONS FOR lecH All inputs at GND All inputs at 4.5 V All inputs at GND One input at 4.5 V all others at GND All inputs at GND All inputs of one AND gate at 4 5 V, all others at GND
INPUT CONDITIONS FOR lcu All inputs at 4.5 V All inputs at GND One input at 4.5 V, all others at GND All inputs at GND All inputs of one AND gate at 4.5 V, all others at GND All inputs at GND
'CC
OR AND-OR-INVERT AND-OR
NOTE: Icc is measured simultaneously for all functions in a package. The average-per-gate values are calculated from the appropriate one of the following equations.: total lcc, IcCH, or Icct, (average per gate or flip-flop) -
Icc. IccH, or Ica_
(number of gates or flip-flops in package) ICCH T ICCL
!cc (average per gate, 50% duty cycle) -
2 (number of gates in package)
FIGURE 7. Icc
1-46
TEXAS INSTRUMENTS
,
to
SERIES 54/74, 54LS/74LS, 54S/74S
VT
FIGURE 8. V -r+, IT + , VOL (FOR NAND SCHMITT TRIGGERS)

VC C
OPEN
FIGURE 9. VT , IT VON (FOR NAND SCHMITT TRIGGERS)

NOTES: A. Switches are in position 1 for SN54'/SN74' B. The IX limit for SN54' and SN74' circuits may be verified by an alternate equivalent procedure. The
IOL 4-1+1
Vgx source is replaced by a resistor (see table below) in parallel with a voltmeter between the X and X pins. If the measured voltage, Vxx, is less than 0.4, the specified limit for ly( is met.
RESISTANCE VALUE TABLE SN5423 SN5450, SN5453 SN7423 2 v)7 SN7450, SN7453 114 138 0 105 130 0
FIGURE 10. Ix (FOR EXPANDABLE GATES)
1 0L 4 1-0
VBE (0)
=27 kit (Adjust lx)
FIGURE 11. VBE(Q) (FOR EXPANDABLE GATES)
FIGURE 12. VOH (FOR EXPANDABLE GATES)
Tr XAS INS1 RUM ENTS

1-47
Ge ne ra l Info rma t io n
SERIES 54/74, 54LS/74LS, 54S/74S
uo! leuu olui l eieu eD
4 (--) x FIGURE 13. VOH (FOR EXPANDABLE GATES)

IX 4--1+1
4 (-1 IX
FIGURE 14. Vol_ (FOR EXPANDABLE GATES)

IX VCC 4.5 V x
VCC
(+) V5Z
V111 V IL
FIGURE 15. ON-STATE CHARACTERISTICS FOR EXPANDERS vcc
FIGURE 16. OFF-STATE CHARACTERISTICS FOR EXPANDERS

VCC 4.5 V
Ix 4 (+1
VIH VIL
IX 4-- (+1 vx
FIGURE 17. ON-STATE CHARACTERISTICS FOR EXPANDERS
FIGURE 18. OFF-STATE CHARACTERISTICS FOR EXPANDERS
I Vcc
(See Notes 2 and 3) OTHER INPUTS
1 01offl 4 1+1 (See Note 2)

(See Note 3)
To Vg..1 Of VIL (See Note 11
OUTPUT CONTROL INPUTS
Vo
NOTES: 1. Input conditions are maintained which will ensure that the three-state outputis) is (are) disabled to the highimpedance state. See function table or logic for the particular device. 2. When testing for current into the output with a high-level output voltage, input conditions are applied that would cause the output to be low if it were enabled. 3. When testing for current out of the output with a lowlevel output voltage, input conditions are applied that would cause the output to be high if it were enabled.
FIGURE 19. lo( off) (THREE-STATE OUTPUTS)
1 -48
TEXAS
INSTRUMENTS
SERIES 54/74 and 54S/74S

TEST POINT TEST POINT VCC VCC
VCC
FROM OUTPUT UNDER TEST (See Note B)
FROM OUTPUT UNDER TEST
FROM OUTPUT TEST POINT CL (See Note A) UNDER TEST
S1
(See Note B)
CL (See Note A/ ..1 .
CL (See Note A)
S2
LOAD CIRCUIT FOR
HI-STATE TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR THREE-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent
TIMIN
3V 4l . 1.5 V
I NPUTG
tsatup
,,r,
HIGH-LEVEL PULSE
1.5 V
1.5 V
0V iii thold
4...._t w ____04
DATA j 1.5 V INPUT
4
\1.5 V
3V
0V
41--t w o
LOW-LEVEL PULSE i Thi\1.5 V 1.5 V
VOLTAGE WAVEFORMS SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS PULSE WIDTHS
3V INPUT j 1.5 V I I , PLH-14II1 IN-PHASE 1 OUTPUT I \ 1.5 V I 0V 111-- lertPHL 1.5 V
OUTPUT CONTROL (Low-level enabling/
3V \ 1.5 V 1.5 V 0V
I
1 I
I4 , PZL - 11.1
NI,. St closed, S2 open -4.5 V 1.5 V
\__. -t- , 5 v VOH

WAVEFORM 1 VOL (See Note Cl
(4 I I
tPLZ I I S1 and S2 closed -1.5 V
al
tpHL46-11.1 OUT-OF-PHASE OUTPUT (See Note F) I 1.5V
I4-4*-tPLH
i i 17V "H VOL eli---tPZHIll WAVEFORM 2 Si open, (See Note CI S2 closed I / 1 5 V
i 1 0.5 V VOL tPHZ-14-101 EO.5 V I
K-4
N--f
0V S1 and
VOH - 1 .5 V S2 closed
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS
NOTES: C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. D. E. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR < 1 MHz, Z out = 50 0 and: For Series 54/74, t r W. 7 ns, tf 7 ns. For Series 54S/74S, t r s 2.5 ns, If 2.5 ns.
F. When measuring propagation delay times of 3-state outputs, switches S1 and S2 are closed. G. The outputs are measured one at a time with one input transition per measurement.
TEXAS INSTRUMENTS
1 -49
Gene ra l In fo r mat ion
SERIES 54LS/74LS
TEST POINT TEST POINT VCC
VCC
VCC
TEST POINT
cL
IR J OU O9
CL (See Note Al
i
=
ISee Note Al
CL (See Note Al
-=t
uoge w iNui
LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS NOTES A CL includes probe and Jig capacitance B. All diodes are 1 N3064 or equivalent.
LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR THREE-STATE OUTPUTS
TIMING INPUT tsetup 14
41
1.3 V
II ',hold
-
3V
0V
HIGH-LEVEL PULSE
iii
DATA j 1.3 V INPUT
1.
3V 0V LOW-L PULSE
\1.3V
1.3 V /1.3 V i 14---1w--114 4--1 w --lel T' ---\ 1 .3 V 1.3 V
VOLTAGE WAVEFORMS SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS PULSE WIDTHS
3V INPUT _11.3 V I \1.3 V I 0V
OUTPUT
CONTROL (Low-level V 13V
3V
1 tPLH / 4-01 IN-PHASE I 1.3 V OUTPUT I I tpHL--14---101 -----\ OUT-OF-PHASE 1.3 V OUTPUT (See Note Fl
14-41-tPHL 1 I 1
enabling)
\__,
I
t 1.3" VOH VOL VOH 1.3 V VOL
14tPZL-11.1 1 -4.5 V Si closed, WAVEFORM 1 1.3 V S2 open (See Note Cl 4 , PZH 101 I
14- 14- tPLZ
I I
I
I I
14-114- 1 PLH
i VH2-14^ 4 1
i-4 10.5
` __f
Si and S2 closed 1.5 V

V
VOL
i0.5 V V OH -.1.5 S1 and S2 closed
WAVEFORM 2
(See Note Cl ISee
51 open, S2 dosed
I 1.3 V
-
0V
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, THREE-STATE OUTPUTS
NOTES: C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. E. All input pulses are supplied by generators having the following characteristics: PRR < 1 MHz, Z ou t = 50 0 and for Series F. G. 54LS/74LS, t r s 1.5 ns, tr s 2.6 ns. When measuring propagation delay times of 3-state outputs, switches S1 and S2 are closed. The outputs are measured one at a time with one input transition per measurement.
1-50
TEXAS INSTRUMENTS
POST OFFICE BOX 655012 DALLAS, 11XAS 75205

TYPICAL CHARACTERISTICS
SERIES 54/74t
OUTPUT VOLTAGE 111511 LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT VCS 5V RL 400 S-1
4.0
3.6
Mil.
TA - 25'C
30 TA = -55 E
li.
2.5
Ni
I
INPUT VOLTAGE
TA -55 C :;' , 2.0 0 1.5 O 1.0 05 0 ! 1 1A = 125'Eh 1 i
I 02 04 06 00 1 12 14 16 16 2 V1--Input Voltage-V
05
0 1_
0 -5
I -10 -15 -20 -25 -30
10H-High-Level Output Current-mit
FIGURE Al
LOW.LEVEL OUTPUT VOLTAGE vs
LOW LEVEL OUTPUT CURRENT
FIGURE
A2
AVERAGE PROPAGATION DELAY TIME vs

FREE AIR TEMPERATURE
06
- I I VEE = 5 V VI 2.4 V
1111111IMN O MOW !
OA 0.3 02 -
0.5
0
10
15 20
TA. -55 C
40
!
^^
35
30
25 ,t 20 CL =
EL = 15 pF I
N
I
I 0 - 75 -50 -25 0
'
25
30
35 40
L _1 5 50 75 100 125
IOL - Low Level-Output Currant-OA
TA -Free Air T roperature-"C
FIGURE A3
PROPAGATION DELAY TIME, LOW-TO-HIGH LEVEL OUTPUT vs rerr AIR TEMPERATURE.
FIGURE A4
PROPAGATION DELAY TIME. HIGH-T01-0141.LEVEL OUTPUT
vs
FREE AIR TEMPERATURE 40 VEc - 5 V
40
VEC 5 1., 35 - RI. 40011
1;11
E
26
r RL=400 11
1
30
s 25 co
II 20 21
14
mein cL.,54F m os
25 50 75 100
125 TA-Free Alf Tempe ature- C
E.; 0
25
20
15
15
it to
- 75 -50 -25 0 25 50 75 100 125 7 A Free AirT mper tore- C
-75 -50 -25 0
FIGURE A5
tData for temperatures below 0C and above 70C are applicable for Series 54 circuits only. Data as shown are applicable specifically for the NAND gates with totem-pole outputs.
FIGURE A6
TEXAS
INSTRUMENTS
1-51
SERIES 54LS/74LSt
OUTPUT VOLTAGE vs INPUT VOLTAGE (DIODE INPUT) 4.0 OUTPUT VOLTAGE vs INPUT VOLTAGE IPNP INPUT) 0.5 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT (STANDARD OUTPUT) VCc - 5 V vi 2 V TA = 125 C
elms
_
vcc -sv RL = 2 kfit
3.5
MEMO! TA - 25 C
.o
25
ik 0.4
U
CD CD
2.0
15
n TA=125 C TA -- 55C
2.0
5
TA = -55
C/
TA = 25 C
10 OS
5 I 0 01 O
uogewA ol ui
0 0.2 04 06 08 1 12 1 4 1 6 1 8 2
0 02 0.4 0 6 0 8 1 12 put Volt, geV
1.6 18 2
1 2 3 4 5 6 7 B 9 10 10L Low Le el Outpu CurrentmA
v i --i
Tut Volt 91V
FIGURE D1
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT (BUFFER OUTPUT) 4.0
VOL Low - Lev el Ou tpu t Voltage V
FIGURE D2
FIGURE D3
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
POWER DISSIPATION PER GATE FREQUENCY 2

PO Power Dissipa tion Per GatemW
VCC =5V
3.5 I4 3.0 5 2.5 tf, 2.0 TA = 25 C

7;
VCC= 5 v TA = 25 C Duty Cycle
1111111
al_ .21
15
10
CL -2
1-
.I
TA = 25 C
E .' OS
00 INLLow Level 0 tout Current ;r1A
-10 -20 -30 -40 -50 -60 -70

10,-1-11411 Level Output Current -mil
-80
0.1
0.4
40
I--FrequencyMHz
FIGURE D4
PROPAGAT 10,1 DLEAY 1 5
FIGURE D5
FIGURE D6
1 1 1101 1 AerATION DELAY TIMES vs LOAD CAPACITANCE 20 113
F FILE AIR TEMPERATURE
1.;
14
2 0 10 20 30 40 50 60 70 80 90 100 CL-Load Capecitance-pF
-75 -50 -25 0
25 50 75 100 125
TA-Free-Air Temperature- C
FIGURE D7
FIGURE D8
tData for temperatures below 0C and above 70C are applicable for Series 54LS circuits only.
1-52
TEXAS 4,4# INSTRUMENTS

SERIES 54S/74St
INPUT CLAMPING DIODE 0,JFITcrT :0 TT-rsst7 116010 VO4766,1' FORV:ARD VOLTAGE vs
1- 1iLl - AIR TEMPERATURE

Vcc = !Li EL = 280 12 0.92 I 0.88
40
EINIERIL
3. 0 . 8 2 2.5 20 1.5 1.0
L,_ 5 V
t 0.76 0.72 , 0 68
"'AMINE.
I L-10 rnA
064
0 0 02 04 0.6 08 10 1.2 1.4 16 1 8 2 0 V1Input VoltageV 0.60 75 50 25 0 25 50 76 100 126 TAFree-Air Tempe eture C
FIGURE El
HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT I
TA -
FIGURE E2
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
0 10 20 30 40 50 60 70 80 JOHHO-Level Output CurrentmA I0LLow-Level Output CurrentmA
FIGURE E3
INPUT CURRENT
FIGURE E4
HIGH LEVEL INPUT CURRENT
INPUT VOLTAGE 10 4 2
FREE-AIR TEMPERATURE VCC = 5. Vi 2.7 1.
11
07
. 0 6
94 02 o 1
. 5. 0 07
004 0 02
0.01 75 50 26 0 25 60 75 100 125

Iq sErcesAir TemperatureC
FIGURE E5
tData for temperatures below 0C and above 70C are applicable for Series 54S circuits only. Data as shown are applicable specifically for the NAND gates with totem-pole outputs.
FIGURE E6
TEXAS k; INSTRUMENTS
1-53
Genera l Info rmation
IIIII 11111 II OM MINIM
0.84
-0.80
I IIIII ENRI I FI 20L 25 mA

I
IIIIIIII NEIN
SERIES 545/74S t
PROPAGATION DELAY TIME,
LOW-TO-HIGH-LEVEL OUTPUT vs FREE-AIR TEMPERATURE
10
if
28
Si
6
5V EMM N VCC RL 280 SI MINEIMIE CL -15O pF..,
PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT vs SUPPLY VOLTAGE 10 9 RL 280 S2 TA 25 C CL . 150 pF
UOIM UIJ OI U1 I RJOUGD
1.11110193111.! 1 3 54 .11111MMEM11111111 .7 i 3 MINCISIMENIESE
4! rg 00
K p pI
6 5 CL . 50 pF
0; 4
I
75 50 25 0 TAFree.0,0 Temperature C
125
3 51
1 0 45
CL 16 pF
25 50 75 100
475
50
5.25
55
VccSupply VoltageV
FIGURE E7
PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs FREE-AIR TEMPERATURE 10 9
FIGURE E8
PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT vs SUPPLY VOLTAGE 10 RL`28O0 TA 25 C CL . 150 pF
an
EN
v. - 5 V
NM
Ili,
CL= 50 pF
RL .250 a
CL= 50 pF
4 3
2
--8.1
mmiglEill
Illffilmill
0
15 pF
r
50 25 0 25 50 75 100 125 TAFree-AIR TEMPERATURE C
4.5
475
50
5.25
55
VccSupply VoltageV
FIGURE E9
AVERAGE PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE
10
FIGURE El 0
POWER DISSIPATION PER GATE FREQUENCY 80 VCC - 5 V AL 280a ; 70 VCC . 6 V CL .15 pF TA 26C Duty Cycle 50%
$.7
CL 150 pF 7
5 a .
50 40
30
a
8'
0 -75 50 25 0 25 60 75 100 125

TAFree Air T I 0 PeraI 0 re 0
7 10
20
40 70 100
1 F equencyMHz
FIGURE El 1
tData for temperatures below 0C and above 70C are applicable for Series 54S circuits only. Data as shown are applicable specifically for the NAND gates with totem-pole outputs.
FIGURE E12
1-54
TEXAS INSTRUMENTS
TYPICAL CHARACTERISTICS FOR FLIP-FLOPS
SERIES 54S/74S t
HIGH LEVEL OUTPUT VOLTAGE vs HIGH LEVEL OUTPUT CURRENT 10 VCCSV 0.8 07 -TA= -55C 5 06 LOW-LEVEL OUTPUT VOLTAGE LOW LEVEL OUTPUT CURRENT
05 D
4
i O
J O
03 02
-...!
MIIII4W,.. ,"" %1 - I,/

TA = 125 C --/ , I 30 35 40
0 0 -10 -20 -30 -40 -50 -60 -70 -80 I0H-High-Level Output Current -mA 0 5 10 15 20 25
IOL-Low.Level Output Currant-PIA
FIGURE E13
S112, 1 5113 INPUT CURRENT vs INPUT VOLTAGE 10 0 -2
FIGURE E14
HIGH LEVEL INPUT CURRENT
V5
FR EEAIR TEMPERATURE Vcc 1, 4 VI. 2.7
iorr
4
6
4
0
/K INPUTS I -- 1 -1 ,-PRESET/CLEAR INPUTS

04 0 02
CLOCKINPUT
r
1 VCC = 5 V TA - 25 C
1 2 3 4
01
0 07 002 001 -75 -60 -25 0 25 50
1 004
75 100 125
VI-Input Voltage-V
TA-Free4ur Temperature- C
FIGURE E15
2112. 'S113, '5114 AVERAGE PROPAGATION DELAY TIME, CLOCK TO OUTPUT vs FREE-AIR TEMPERATURE V66 .5 V R1 28011
FIGURE E16
1 5112, 1 5113, '5114 AVERAGE PROPAGATION DELAY TIME, CLOCK TO OUTPUT vs LOAD CAPACITANCE
U....
CL
1 0 pF
16 MCC` 5 14 _EL-280 TA c' 12 10
02
C
2 -75
L .50pF
J....
6 4 2 00
50 25 0
25 50 75 100 125
25 50 76
100 125 160 175 200
CL-Load Capaenance-PE
FIGURE E17
tData for temperatures below 0C and above 70C are applicable for Series 54S circuits only.
FIGURE E18
TEXAS INSTRUMENTS
1-55
Ge nera l In forma tion
TA
25 C

TTL Logic Databook TexasInstruments

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The TTL Data Book

1-3 1-7 1-39 1-43 1-45 1-51

SN74LS78A SN7483A SN74LS83A SN7485 SN74LS85 SN74S85

Page No. 2-587 2 587 2-593 2-597 2-601

SN54S181 SN54S182 SN54LS183 SN54190

SN745181 ....... SN74S182 SN74LS183

2-601 2-611 2-617

SN54279 SN54LS279A SN54LS280

SN74279 SN74LS279A . SN74LS280

2-771 2-771 2-775

uoR e wa olui l eiau aD

SN54LS604 SN54LS606 SN54LS607 SN54LS610 SN54LS612 SN54LS620

Gene ra l Info rm ation

rInnl A B '9 ' 1A 'B IB

SD: SC.. SD' SC

SDADOO1B SDLD001A SDI. I SD/ I i ' 'A 113 '

IA SDI SDA.,.....71B grIl 0001A . )001A .. )001B '00018 : )001A SDAD0018 SC

POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS

TECHNOLOGY DESCRIPTION TYPE STD TTL Dual 4-Input Triple 3-Input

LITERATURE HC AC ACT NUMBER SDLD001A

SDAD00113 SDLD001A SDAD00113

Quad 2-Input '03 '1003 B

)001B )001A 'D0018 )001B SDAD00113

LITERATURE HC AC ACT NUMBER

= Denotes available technology. Denotes planned new.

Gen e ra lInfo rmation

A Dual 4-Input '21

SDATIRR18 SD' SC SD SC' SDI. SD/ 'A

11 Triple 3-Input '1011 '11011

08 Quad 2-Input '1008 '11008

......A...J01B SCLD0018 SDFD001 SDAD001 B SCADOO1A

DESCRIPTION Triple 3-Input

NUMBER SCLD001B SDLDO01A SDAD001 B B

gilt!, D0018 10018 .,Apoo 1 A SDAD001 B SCLD001B SDADOO1B

'11032 Hex 2-Input 832 '1832

LITERATURE HC AC ACT NUMBER SDLD001A SCLD0018 SDL0001A SDLD001A

TECHNOLOGY DESCRIPTION 8-Input

-= Denotes available technology.

'266 '810 '7266

SDAD001B SDI Iloo1A

S..' 113 SCLD001B

Quad ExclusiveOR/-NOR Gates

'55 '64 '54 '51

LITERATURE HC HCT NUMBER

LITERATURE AS HC HCT NUMBER

LITERATURE AS HC HCT NUMBER

POST OFFICE BOX 655012 DALLAS, TEXAS 75265

TBA = Denotes information To Be Announced.

DRIVER AND BUS TRANSCEIVERS

LITERATURE HC HCT - NUMBER )001B )001 B SDAD00113 SDLD001A

A A A A A A A A A DRIVERS WITH OPEN-COLLECTOR OUTPUTS TECHNOLOGY A

SDADOO1B SDADOO1B SDADOO1B )001A )001B SDLD001A SCLD001B SDLD001A

' 365 Noninverting Hex Buffers/ Drivers '367 '368 '366

TYPE '757 760 '756 '763

LITERATURE HC HCT NUMBER SDADOO1B SDADOO1B SDADOO1B SDADOO1B

= Denotes available technology. . Denotes planned new.

TEXAS IN STRU M ENTS

Gen e ralInform atio n

U OR BILUN LII I MIBUOD

SDA0001B )001A )001

DRIVERS WITH 3-STATE OUTPUTS

TEXAS Ail INSTRUMENTS

DRIVERS WITH 3-STATE OUTPUTS (continued)

TECHNOLOGY DESCRIPTION TYPE STD TTL LS S ALS AS F HC HCT AC ACT BCT