ABHINAV R.

DUBEY
3230 SW Archer Road, Apt#G233 Email:abhinavrdubey@ufl.edu
GAINESVILLE, FL 32608 United States Phone:9047559884
Objective: Seeking an intern/ co- op/ full time in the field of Electrical & Computer Engineering
EDUCATIONAL QUALIFICATIONS
University of Florida Gainesville, USA
MS, Electrical and Computer Engineering GPA: 3.33/4 August 2008 – Present
Jamia Millia Islamia New Delhi, India
B.Tech, Electronics & Communication Engineering GPA: 8.31/10 July 2004 - June 2008
PROJECTS
• Developed 32- bit optimized Instruction Set Simulator (ISS) in Java. Stage first involved implementation of five
stage pipelined processor with data forwarding followed by implementing of Tomasolu's Algorithm with branch
prediction as optimization.
• Design and layout a 16x8 static random address memory block using .24um technology: All the elements of the
memory block were designed with minimized SRAM area as well as power dissipation and analyses of the performance
was done in terms of energy delay product, static noise margins.
• Design and layout of Low power 2's complement radix-4 Booth's multiplier algorithm by minimizing switching
activities of partial products and clock gating in- order to synchronize the inputs from serial to parallel interface. The
booth's algorithm multiplier was optimized for power by adopting architectural and circuit level techniques.
• Design & Implementation of Gm- C Continuous- Time 4th Order Butterworth Lowpass Filter: A tunable filter
implemented using high linearity Transconductor- C filter with Common Mode Feedback (CMFB) circuitry.
• Implementation of a tuning circuit that sets the unity gain frequency of an integrator to the frequency of an input
sine wave, utilizing a comparator which compares the outputs of two peak detectors. The cutoff frequency was held
constant to a tolerance of 10% for temperatures down to 30º C and a Vdd value up to 2.9V (16%).
• Implementation of remote controlled vehicle using Dual Tone Multi Frequency (DTMF) tones and modifying it
into line follower using Infrared- Red (IR) sensors.
• Implementation of Red- Black Tree in C + + and used random mode input for performance measurement.
• Designed a program in C + + for implementation of K- Map.
• Current member of the team involved in developing and maintaining website paniit2009.org
• Complete analysis project on audio codecs and its classification.
• Design and implementation of a fixed sample rate 31st order FIR filter for a GSM transceiver. Windowed and
un-Windowed versions of various designs using the windowed, LMS and Equiripple methods were compared for stop-
band and pass- band characteristics.
• Design, test, and implement a receiver using a narrow passband digital filter that can detect the presence of the
broadcast tone. Hence an elliptic bandpass IIR filter was designed after comparison with other IIR filter models.
Filter's noise performance analysis was done in the presence of a tone and broadband noise and was implemented as a
Direct II and Cascade filter.
• Designed a Vending Machine controller using VHDL to perform the tasks of accepting coins, dispensing soda
and change. Synthesized the VHDL code to generate the RTL schematic and layout.
• Designed a Fibonacci calculator on VHDL using DIME TALK interface for implementation on VIRTEX4
FPGA kits.
INTERNSHIP
• Practical Training at Alcatel- Lucent Technologies, India gave me firsthand experience of telecommunication
systems design and switched networks
GRADUATE COURSES
• Bipolar Analog IC Design, MOS Analog IC Design, Reconfigurable Computing, VLSI Circuits &Technology,
Advanced VLSI, Advanced Data Structures, Computer Architecture, Digital Filtering, Wireless Communication
TECHNICAL SKILLS
• Language: Java, C + +, VHDL
• Important Tools: MATLAB, LTSpice, Cadence, Spectre, Virtuoso, Circuitmaker, HTML, Dreamweaver, PLONE