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MICROCONTROLLER SMALL QUESTIONS

1. Different types of processors studied in the cde!ic yer"


A# $%$&' $%$( processors.
). *ht type of instruction set +Microprocessor nd Microcontro,,er"
A#Microprocessor instruction set is -ILO. Micr%contro,,er instruction set is
-I-O.
/# *ht is CISC"
A# Co!p,e0 instruction set code.
1# *ht is RISC"
A#Reduced instruction set co!puter.
&# Different 2et3een RISC nd CISC"
CISC
RISC
1# E!phsis on hrd3re
1# E!phsis on soft3re
)# Inc,udes !u,tic,oc4 co!p,e0 instructions )# Sin5,e c,oc4' Reduced
instructions
/# Lod nd store incorported in instructions
/# Lod nd store
re independent instructions
1# S!,, code si6e' 7i5h cyc,es per second
1# Lo3 cyc,es per
second' ,o5ic code si6es
&# Trnsistors used for storin5 co!p,e0 instructions
&# Spends !ore
trnsistors on !e!ory re5isters
(# Me!ory ,ess
(# Me!ory !ore
(# 7o3 !ny ddress ,ines re8uire interfcin5 $9: of !e!ory"
1/ Adders ,ines.
;# *ht is pro5r! counter"
A# It is used to incre!ent the ddress of !e!ory ,oction.
$# :uffer<= Used to 3or4 s !p,ifier or dri>er
?# -ro! 3hich re dt e0ecuted s fst<Accu!u, tor.
1%# @rincip,e of instruction set=-I-O< -irst In -irst Out.
11# Definition of instruction cyc,e< E0ecution cyc,e A-etch Cyc,e=The
ti!e t4en to e0ecute n instruction.
1)# *ht is Microcontro,,er"
A# It is hi5h,y inte5rted de>ice' *hich inc,udes on one chip' A,, or !ost of
the prts needed to perfor! n pp,iction contro, function'
1/# *ht is interrupt ,tency" 7o3 cn you reduce it"
A# The ti!e e,psed 2et3een the rise of n interrupt nd the strt of
ser>icin5 the interrupt is c,,ed interrupt ,tency'
11# *ht is Microprocessor"
A# Microprocessor is pro5r!=contro,,ed de>ice' 3hich fetches the
instructions fro! !e!ory' decodes nd e0ecutes the instructions. Most
Micro @rocessors re sin5,e= Chip de>ices.
1&# Bi>e e0!p,es for $C1(C/) 2it Microprocessors"
A#$=2it processor =$%$&DE$%C($%%F 1(=2it @rocessor=$%$&C($%%%CE$%%%F /)=
2it @rocessor=$%/$(C$%1$(.
1&. *hy $%$& processor is c,,ed n $ 2it processor"
A# :ecuse $%$&processor hs $ 2it ALU GArith!etic Lo5ic Unit#. Si!i,r,y
$%$( processor hs 1(2it ALU.
1(. *ht is 1stC)ndC/rdC1th processor"
A# The processor !de of @MOSCNMOSC7MOSC7CMOS is c,,ed 1stC)ndC/rdC1th
5enertion processors nd !de up of 1C$C1(C/) 2its.
1;. Define 7CMOS"
A# 7i5h density N=type Co!p,e!entry Met, O0ide Si,icon -ie,d Effect
Trnsister.
1$. *ht does !icroprocessor speed depend on"
A# The processin5 speed depends on DATA :US *IDT7.
1?. Is ddress 2us uni direction,"
A# The ddress 2us is uni direction, 2ecuse the ddress infor!tion is ,3ys 5i>en 2y the !icroprocessor to
ddress !e!ory ,oction of ICO de>ices.
)%. Is the dt 2us is 2i=direction,"
A# The dt 2us is 2i=direction, 2ecuse s!e 2us is used for trnsfer of
dt 2et3een !icro processor nd !e!ory or ICO de>ices in the 2oth
direction.
)1. *ht is disd>nt5e of !icroprocessor"
A# It hs ,i!ittions on si6e of dt' !ost !icroprocessor does not support
f,otin5 point opertions.
)). *ht is the difference 2et3een !icroprocessor
.!icrocontro,,er"
A# In !icroprocessor !ore op=codes' fe3 2it hnd,in5 instructions.In
!icrocontro,,er fe3er op=codes' !ore 2it hnd,in5 instructions nd ,so it is
defined s de>ice
tht inc,udes !icroprocessor' !e!ory' inputCoutput
si5n, ,ines on sin5,e chip.
)/. *ht is !ent 2y LATC7"
A# Ltch is D=type f,ip f,op used s te!porry stor5e de>ice.
)1.*hy does !icroprocessor contin ROM chips"
A# Microprocessors contin ROM chips 2ecuse it contins instructions to
e0ecute dt.
)&. *ht is difference 2et3een pri!ryHsecondry stor5e de>ice"
A#In pri!ry stor5e de>ice the stor5e cpcity is ,i!ited. It hs >o,ti,e
!e!ory.
In secondry stor5e de>ice the stor5e cpcity is ,r5e. It is non=>o,ti,e
!e!ory.
)(. *ht is difference 2et3een sttic .dyn!ic RAM"
A# The processin5 speed depends on DATA :US *IDT7.
1?. Is ddress 2us uni direction,"
A# The ddress 2us is uni direction, 2ecuse the ddress infor!tion is ,3ys 5i>en 2y the !icroprocessor to
ddress !e!ory ,oction of ICO de>ices.
)%. Is the dt 2us is 2i=direction,"
A# The dt 2us is 2i=direction, 2ecuse s!e 2us is used for trnsfer of
dt 2et3een !icro processor nd !e!ory or ICO de>ices in the 2oth
direction.
)1. *ht is disd>nt5e of !icroprocessor"
A# It hs ,i!ittions on si6e of dt' !ost !icroprocessor does not support
f,otin5 point opertions.
)). *ht is the difference 2et3een !icroprocessor
.!icrocontro,,er"
A# In !icroprocessor !ore op=codes' fe3 2it hnd,in5 instructions.In
!icrocontro,,er fe3er op=codes' !ore 2it hnd,in5 instructions nd ,so it is
defined s de>ice
tht inc,udes !icroprocessor' !e!ory' inputCoutput
si5n, ,ines on sin5,e chip.
)/. *ht is !ent 2y LATC7"
A# Ltch is D=type f,ip f,op used s te!porry stor5e de>ice.
)1.*hy does !icroprocessor contin ROM chips"
A# Microprocessors contin ROM chips 2ecuse it contins instructions to
e0ecute dt.
)&. *ht is difference 2et3een pri!ryHsecondry stor5e de>ice"
A#In pri!ry stor5e de>ice the stor5e cpcity is ,i!ited. It hs >o,ti,e
!e!ory.
In secondry stor5e de>ice the stor5e cpcity is ,r5e. It is non=>o,ti,e
!e!ory.
)(. *ht is difference 2et3een sttic .dyn!ic RAM"
A#Sttic RAM< No refreshin5'( to $ MOS trnsistors re re8uired to for! one
!e!ory ce,,. Infor!tion stored s >o,t5e ,e>e, in f,ip f,op.
Dyn!ic RAM< Refreshed periodic,,y' / to 1 trnsistors re re8uired to for!
one !e!ory ce,,.
);. *ht is cche !e!ory"
A#Cche !e!ory is s!,, hi5h speed !e!ory. It is used for te!porry stor5e if dt .the infor!tion
2et3een !in !e!ory .C@U.The cche !e!ory is on,y in RAM.
)$. *ht is Interrupt"
A#Interrupt is si5n, send 2y e0tern, de>ice to processor so s to re8uest
the processor to for! prticu,r 3or4.
)?. *ht is c,,ed Scrtch pd of co!puter"
A# Cche !e!ory is Scrtch pd of co!puter.
/%. *hich trnsistor is used in ech ce,, of E@ROM"
A# -AMOS G-,otin5 5te A>,nche inIection MOS# trnsistor is used in ech
ce,, of E@ROM.
/1. *ht is difference 2et3een RAM . ROM"
A#RAM< Rndo! Access Me!ory' hi5h speed' Jo,ti,e !e!ory.
ROM< Red On,y Me!ory' Lo3 speed' on=>o,ti,e !e!ory.
/). *ht is co!pi,er"
A#Co!pi,er is used to trns,te the hi5h=,e>e, ,n5u5e pro5r! into
!chine code t ti!e.
//. *hich processor structure is pipe,ined"
A#A,, H$( processors h>e pipe,ined structure.
/1. *ht is f,5"
A#-,5 is f,ip f,op used to store the infor!tion 2out the sttus of
processor nd the sttus of the instruction e0ecuted !ost recent,y.
/&. *ht is stc4"
A#Sttic RAM< No refreshin5'( to $ MOS trnsistors re re8uired to for! one
!e!ory ce,,. Infor!tion stored s >o,t5e ,e>e, in f,ip f,op.
Dyn!ic RAM< Refreshed periodic,,y' / to 1 trnsistors re re8uired to for!
one !e!ory ce,,.
);. *ht is cche !e!ory"
A#Cche !e!ory is s!,, hi5h speed !e!ory. It is used for te!porry stor5e if dt .the infor!tion
2et3een !in !e!ory .C@U.The cche !e!ory is on,y in RAM.
)$. *ht is Interrupt"
A#Interrupt is si5n, send 2y e0tern, de>ice to processor so s to re8uest
the processor to for! prticu,r 3or4.
)?. *ht is c,,ed Scrtch pd of co!puter"
A# Cche !e!ory is Scrtch pd of co!puter.
/%. *hich trnsistor is used in ech ce,, of E@ROM"
A# -AMOS G-,otin5 5te A>,nche inIection MOS# trnsistor is used in ech
ce,, of E@ROM.
/1. *ht is difference 2et3een RAM . ROM"
A#RAM< Rndo! Access Me!ory' hi5h speed' Jo,ti,e !e!ory.
ROM< Red On,y Me!ory' Lo3 speed' on=>o,ti,e !e!ory.
/). *ht is co!pi,er"
A#Co!pi,er is used to trns,te the hi5h=,e>e, ,n5u5e pro5r! into
!chine code t ti!e.
//. *hich processor structure is pipe,ined"
A#A,, H$( processors h>e pipe,ined structure.
/1. *ht is f,5"
A#-,5 is f,ip f,op used to store the infor!tion 2out the sttus of
processor nd the sttus of the instruction e0ecuted !ost recent,y.
/&. *ht is stc4"
A#Stc4 is portion of RAM used for s>in5 the content of @ro5r! Counter
.Bener, purpose re5isters.
/(. Cn ROM 2e used s Stc4"
A#ROM cnnot 2e used s Stc4 2ecuse it is not possi2,e to 3rite to ROM.
/;. *ht is NJ=RAM"
A#Non=>o,ti,e Red *rite Me!ory' ,so c,,ed -,sh !e!ory. It is ,so no3
s Shdo3 RAM.
A#Stc4 is portion of RAM used for s>in5 the content of @ro5r! Counter
.Bener, purpose re5isters.
/(. Cn ROM 2e used s Stc4"
A#ROM cnnot 2e used s Stc4 2ecuse it is not possi2,e to 3rite to ROM.
/;. *ht is NJ=RAM"
A#Non=>o,ti,e Red *rite Me!ory' ,so c,,ed -,sh !e!ory. It is ,so no3
s Shdo3 RAM.
Interview Questions Answers
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