2W4 35th A n n u l IEEE Power Electronics Specialists Conference Aachen, Germany, 2004

A Simple SVPWM Algorithm for Multilevel Inverters

Lei Hu, Hongyan Wang, Yan Deng and Xiangning He

College of Electrical Engineering, Zhejiang University
Hangzhou, China
Email: paulhulei@hohnail.com

Abstract-In this paper, a simple space vector pulse width with the level increasing.
modulation (SVPWM) algorithm for multilevel inverters is D

proposed. With the proposed method, the three nearest

compound vectors can be selected easily and the dwelling time
of each vector can be simply calculated for either three-level
inverter or inverters with more levels. The simulation and
experimentation of a three-level inverter verified its validity.

I. INTRODUCTION
In conventional two-level inverter configurations, the
harmonic contents reduction of an inverter output current is
achieved mainly by increasing the switching frequency. But
the switching frequency is restricted by the switching loss in
high power and high voltage applications [3]. In such
applications, multilevel inverters have been widely used in Fig. 1. Circuit diagram of a three-level diode-clamped invener
recent years for the advantage of low harmonic output at low
switching frequency. At the same time, low blocking voltage In this paper, a simple method is proposed to implement
in the switching devices can be achieved. There are three the processes above and the procedure introduced is common
main kinds of multilevel inverter topologies: diode-clamped for both the low-level and high-level inverters. The proposed
inverter, flying capacitor inverter and cascaded inverter. algorithm for a three-level inverter (shown as Fig.1) is
Various Pulse Width Modulation (PWM) algorithms have verified by simulation and experiment.
been studied to control the multilevel inverter systems and
Space Vector Pulse Width Modulation (SVPWM) method is 11. SIMPLE
SVPWM ALGORITHM
a valid one. The most significant advantages of SVPWM are
Table I shows the possible switching states for the
-
fast dvnamic resDonse and wide linear ranxe of fundamental
voltage compared with the conventional PWM. But when it
is applied to the diode-clamped inverter and flying capacitor
inverter, the SVPWM strategy also has to solve the
neutral-point voltage unbalance problem.
statS St, Sh S,. S4, V"*
Generally speaking, there are three main steps to obtain P ON ON OFF OFF V I
the proper switching states during each sample period for the 0 OFF ON ON OFF Vd2
SVPWM method [I-3,5-61: N OFF OFF ON ON 0
1) Choose the proper basic vectors.
2) Calculate the dwelling time of each selected vectors.
3) Select the proper sequence of the pulse. three-level inverter of Fig.1. Three kinds of switching states
It is not easy to implement the steps above directly with the exist in each phase. Fig.2 shows the basic space voltage
reference voltage vector amplitude and phase, especially in vectors of a three-phase three-level inverter [1,3,5,6]. The
the case of high-level inverters. The most direct way of zero voltage vector V, has three switching states (PPP, 000
calculating the time is to decompose all the vectors into real and NNN). Each of the small voltage vectors (VI - V,) has
part and imaginary part [SI. Another efficient way is to two states. Each of the middle vectors (V,, VI,, VI*, VI,, VI,,
calculate the time according to reference voltage vector of V18) and the large vectors (V,, V,, VI,, VI,, V,,, VI,) has only
each phase [3][6]. Many papers discussed the methods to one state respectively. The different switching states of the
solve the problem and they mainly focus on the last two small vectors have different effects on the neutral-point
processes because the first one is fairly simple for the voltage.
three-level inverters. But for higher level inverters, all the Generally, in SVPWM techniques, the reference voltage
three processes become complex. In [3], a new way was vector V, is located in a triangle, in which three voltage
proposed to deal with the inverter as a reduced lower level vectors are corresponding to the three apexes. They are
inverter but the calculation complexity will also increase selected to minimize the harmonic components of the output

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 2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004

line-to-line voltage [I]. For example, when V, falls in the

triangle formed by the apexes of vectors VI, V7 and V,, which
means that V, should be composed of VI, V7 and V,.

(00) (m-1 0) (Vrm0) (m 0) (M 0)

Fig. 4. Decomposing the reference vector
Fig. 2. Space vector of the three-level inverter

Universally, a (M+l)-level inverter is discussed here. As

The dwelling time of each vector should satisfy the shown in Fig.4, by decomposing V, into the m and n axis, it is
following equations: easy to obtain the values of V, and V, as (3) and (4):

5t , +V, t, + Vats= V,T (1)

t , +t, +t,=T
(2)
Where T is the sample period and tl, t,, ts are the dwelling (4)
time of V,, V7 and Vs respectively.
Because ofthe symmetry ofthe six regions, only region A
Where V, is the magnitude of the vector V,. It is easy to
will be analyzed to illustrate how the proposed method works.
obtain the relationship between V, and the coordinate scale
There are four steps described as follows.
(Vm, V,) by law of cosine:

v,=
J vm’+vm~-2v,vmcos”
3
(5)

Step 2: Selecting the three nearest vectors.

Assume that V, and V, satisfy the inequalities below
(also shown in Fig.4):

m-I<V,<m (6)
n-lcVm<n (7)
(0 0) 0 0) (20)
Fig. 3. The m-n coardinates of region A
Where m and n are integers. There are three possible
cases:
Step I : Pre-treatment ofthe basic vectors a) V, +Vm<m+n-l . That means V, is located in the
Region A is redrawn for convenience as shown in Fig.3. A
left-bottom shadow triangle. The vectors (m-I, n-I), (m-I, n)
new coordinates namely m-n coordinates can be established
and (m. n-I) are the nearest vectors and should be chosen.
as illustrated in the figure. Different from the rectangular
coordinates, the new coordinates have two axes intersecting b) V, +V, >m+n-l . That means V, is located in the
with the angle o f d 3 . 0 n l y the first quadrant of the coordinate right-top shadow triangle. The vectors (m-I, n), (m. n- 1) and
is used because the vectors located in other regions can be (m. n) are the nearest vectors and should be chosen.
transformed to the first quadrant by clockwise rotating an c) V, +V, =m+n-l . Vr lies at the middle line and either a)
angle of k*n/3 (k=l, 2, 3 , 4 or 5 for Region B, C, D, E or F
o r b ) can be chosen.
respectively). In the new coordinates system, the original
voltage vector is represented as the coordinate scale. The
basic voltage vectors correspond to the integer scales.

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20% 35th Annual IEEE Power Electronics Specialists Conference Aachen. Germany. 2004

Step 3: Calculate the dwelling time of the selected vectors.
Here the dwelling time of each vector is calculated.
Assume the three nearest vectors are (ma, nl), (m2, n,) and
(m3, n3) and tl, tz and t3 are their dwelling time respectively.
By solving equation set, the dwelling time of the three
selected vectors can finally be yielded as follows:
modulation or not simply by checking the following
inequality:
V, +V, >M ( 1 1)
A useful method to deal with over modulation is to replace
the vector V, by V; as illustrated in Fig.5. The magnitudes of
V;, V’, and V’, are obtained by their original values
multiplied by a factor of M/(V,,,, +V,). And the consequent
steps are the same as the normal modulation SVPWM.

111. SIMULATION AND EXPERIMENTAL

RESULTS
The simulation of a three-level inverter shown in Fig. I was
done under the conditions listed in Table 11.
TABLE I1
SIMULATION AND EXPERIMENTAL CONDITIONS

Sam lin time

DC-link volta e
Because the differences among m,, m2 or m3 and the Load inductance er hase
differences among n,, n2 or n3 are either 0 or I , it is very easy Load resistance er hase
to compute the values of expressions (8) to (IO). Out ut fre uen 50 Hz
Modulation index mi) 0.7 or 0.4
Step 4: Neutral-Point Potential Controls
The neutral point potential balance is very important for
the multilevel inverter control. In [3], two methods are
summarized to keep the neutral point voltage balance.
1) The first method is to select the proper switching
sequence. For example, when V, falls in the triangle formed
by the apexes of vectors VI, V, and V,, the switching
sequence can be selected as P00-PON-00N-ONN or
PPO-P00-PON-00N. The two sequences lead to the same
output voltage but have the opposite effects on the

Ar
neutral-point voltage.
2) The other method is to re-arrange the time distribution
of the redundant voltage vectors.
Both methods are applicable and the first one is selected at
the next part.

e
(Vrm’O)(Vrm 0)
Fig. 5. Over-modulation mode

~,~ ~,~ ~,~ . . ,~ . .. .

, J , ,
~ ~~ ~ ~ ~ ~

Over modulation control I , , ’ ,

0 0.2 0. OB 0.8 1 12 1.4 1.8 1.8 2
However, there is one exception when the reference I d
voltage vector lies outside the hexagon. In this case, the over (b)
modulation mode occurs and the output line voltages distort. Fig. 6 . Simulation results for m,=0.7(a) the line voltage and current: (b)
The following process should be added to step I. the FFT ofthe line voltage (THD=38.0%)
It is easy to judge whether the SVPWM is in over

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2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004

Fig.6 shows the simulation results of the line voltage, The angle e is in the range of(0, d 3 ) . The values ofk, and
current and the FFT result of the line voltage for the k, were pre-calculated and stored in the ROM, that can
modulation index of0.7. Fig.7 shows the simulation result of greatly reduce the DSP working time.
the line voltage, current and the FFT result ofthe line voltage Fig.8 (a) and Fig.9 (a) show the experimental results of
for the modulation index of 0.4. The Total Harmonic line voltage and current for the modulation index of 0.7 and
Distortion (THD) is about 38.0% for m,=0.7 and 60.9% for 0.4 respectively. Fig.8 (b) and Fig.9 (b) show the FFT results
mi=0.4. of the line voltage for the modulation index of 0.7 and 0.4
respectively. The neutral-point voltage is balanced for both
cases. The experimental results are coincident with the
simulation results, which shows the validity of the proposed
control algorithm.

IV. CONCLUSION
0 0.01 0.32 0.m 0 w 0.05 0.03 A new simple SVPWM method is proposed and verified
by simulation and experiment of a three-level inverter. It is
4
I obvious that the validity of the algorithm in multilevel
inverters with more levels is similar as in three-level inverter.
Compared with conventional methods, this method has the
advantage of ease implementing, especially for the inverters
with more levels.
1
0 001 0.w om 0.w O M 0.03

(a) . . .
........... ...........
10'
. :,:
. . . . . . =. ,. ~. . . .i ,.i . . I
......
i,i
. ..
. ..
. ..
. ..
. ..
~,
....... ........ .......
~ ~ ~

..
. ............ .. .. ........ .. .. . . . .
. . . . . . . . . . . . . . . . . . . . . . . ..,
~I i . .

. ..........................

. .
. .
. . . . . . . . . . . . . . . . . . . . .......
. . . . . .
. . . .
b I i d s x L I w F i I V I ms . .
10~2
0 02 04 0.0 0.8 I 12 1.4 I6 I S 2 1,4.l,h,*lgFt.,DI* 6"s , I , , , , , , , ,
, , , , , I , , ,, I, , , ,I ,, ,
x 10.
(a)
(b)
Fig. 1.Simulation results for m d . 4 (a) the line voltage and current; (b) I

the FFT of the line voltage (THD=60.9%)

. . . . . . .
. . . . . . . .
A three-level inverter lab prototype was completed to
realize the proposed algorithm with the same conditions . . . . . . .
. . . . . .
listed in Table II. A DSP TMS320F240 was employed to
control the inverter. It is hard to implement the calculation . . . . .
.
.
.
.
.
.
.
tasks of equations (3) and (4) in real time by using the 16-bit
fixed-point DSP. The two equations were reformed as:
. . . .

Here mi is the modulation index and:

(b)
Fig. 8. Experiment results for m,=0.7 (a) the line voltage and current: (b)
2M .
k,=-sinO the FFT of line voltage
J;

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[SI 7. Maruyama, M. Kumano, and M. Ashiya, “A new asynchronous

PWM methad for a three-level inverler,” in Conf Rec. 1991 IEEE In:.
Power Elecrronics Specialists Cont. pp.366-37 I
[6] Jae Hyeong Seo, Chang Ho Choi ,“Compensation far the
. . . . . . . . . . . . . . . neutral-point potential variation in three-level space vector PWM,” in
Conf Rec. 2001 IEEE AppliedPmver Electronics Conference and
Exposition, vol. 2, pp.1138-1146

1->j””b ..........

b
. .

I . . . : . .

..........
:
, [ t a = z i n ~ r ”S n L
[,*n&,Lrn~,”,5rn,, , I , , , ,
] , . . ,. A
. .
,,, , , , , , I , , , , I , , ,

(a)
1 I

. . . .
. . . . . .
............... ...................
. . . . . .
. . . . . .
. . . . . . .
. . . .
. . . . . .
. . . . .
. . . .

. . . .
. . .

(b)
Fig. 9. Experiment results far m,=0.4 (a) the line voltage and current: (b)
the FFT of line voltage

ACKNOWLEDGMENT
This work is supported by the National Nature Science
Foundation of China (50277035 and 50307012).

REFERENCES
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Jae Hyeong Seo, Chang Ho Choi, 2nd Dong Seok Hyun, “A new
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A. Cataliotli, F. Genduso, G. U.Gallurn, “A new over modulation
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