Dell Inspiron n4030 - Wistron Dj1 Calpella Uma 10212-Sb - Rev SB

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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DJ1 Calpella UMA X01
Cover Page
A3
1 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Cover Page
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Cover Page
A3
<Core Design>
Intel PCH
2010-04-23
REV : X01
DJ1 Calpella UMA Schematics Document
Arrandale
DY : Nopop Component
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Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Block Diagram
<Core Design>
A3
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Block Diagram
<Core Design>
A3
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Block Diagram
<Core Design>
A3
Thermal
KBC
Int.
KB
INPUTS
SYSTEM DC/DC
+PWR_SRC
OUTPUTS
26
LPC Bus
TPS51611
256kB
+CPU_GFX_CORE
Flash ROM
Intel CPU
DDRIII
800/1066
Slot 0
DDRIII 800/1066 Channel A
Slot 1
8,9,10,11,12,13,14
19
18
DJ1 UMA Block Diagram
+0.75V_DDR_VTT
+3.3V_RTC_LDO
ISL62882
INPUTS
+VCC_CORE
OUTPUTS
SYSTEM DC/DC
RT8207GQW
+V_DDR_REF
OUTPUTS
CPU DC/DC
+PWR_SRC
+1.5V_SUS
INPUTS
RT8205BGQW
+PWR_SRC
+5V_ALW
OUTPUTS
+3.3V_ALW
TPS51218
OUTPUTS
SYSTEM DC/DC
INPUTS
+PWR_SRC
INPUTS
SYSTEM DC/DC
+1.5V_RUN
OUTPUTS
BQ24745
INPUTS
MAXIM CHARGER
+PWR_SRC
+PBATT
+5V_ALW2
+DC_IN
Bluetooth
73
USB 2.0 x 1
76
PCIE
63
54
CAMERA
Right Side:
USB x 2
USB 2.0 x 1
USB 2.0 x 2
USB 2.0
CRT
LVDS(Dual Channel)
LCD
Arrandale
RGB CRT
Intel
59 59
S
A
T
A
ODD
14 USB 2.0/1.1 ports
PCH
S
A
T
A
High Definition Audio
SATA ports (6)
LPC I/F
ACPI 1.1
HDD
PCI/PCI BRIDGE
32
CardReader
Realtek
RTS5138
SD/MMC/MS/
MS Pro/xD
USB2.0
Azalia
CODEC
AZALIA
2CH SPEAKER
30
HP1
Internal Analog MIC
55
NPCE781BA0DX
NUVOTON
SPI
39
PCIE ports (8)
39,40
INPUTS
SYSTEM DC/DC
+5V_RUN
OUTPUTS
26
+5V_ALW
APL5930
+3.3V_ALW
+3.3V_RUN +3.3V_ALW
+1.8V_RUN
USB 2.0 x 2
L6: Bottom
L5 GND
+PWR_SRC
Fan
DDRIII 800/1066 Channel B
DDRIII
800/1066
Clock Generator
54
7
37
SLG8SP585
62
25 68
20,21,22,23,24,25,26,27,28
68
Touch
PAD
PCB LAYER
L3: Signal
L4: Signal
L2: VCC
L1: Top
Project code : 91.4EK01.001
PCB P/N : 48.4EK19.0SB
Revision : 10212-SB
92HD79B1
EMC2102
DMIx4
71
58
S
P
I
4MB
Flash ROM
62
+1.5V_SUS
SYSTEM DC/DC
Switches
INPUTS OUTPUTS
+1.05V_VTT
+15V_ALW
10/100 NIC
PCIE x 1
ATHEROS
RJ45
CONN
I
/
O

B
o
a
r
d
C
o
n
n
e
c
t
o
r
Left Side:
USB x 1
AR8152/AR8151
PCIE x 1
47,48
49
46
50
53
51
42
MIC IN
802.11a/b/g
Mini-Card
FDIx4x2(UMA)
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5
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3
3
2
2
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1
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B B
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Title
Date: Sheet of
Wistron Corporation
Power Block Diagram
A3
3 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Block Diagram
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Block Diagram
A3
<Core Design>
Charger
BQ24745
+PBATT
Adapter
Battery
TPS51125
+5V_ALW2
Regulator LDO Switch
+5V_ALW
+3.3V_RTC_LDO
AO4468
+5V_RUN
G547F2P81U-GP
+5V_USB1
+3.3V_ALW
ISL62882
+VCC_CORE
TPS51218
+PWR_SRC TPS51116
+0.75V_DDR_VTT +V_DDR_REF +1.5V_SUS
Power Shape
AO4407A
+15V_ALW
+1.05V_VTT
APL5930
+1.8V_RUN
AO4468
+1.5V_RUN
G547F2P81U-GP
+5V_USB2
AO3403
+3.3V_LAN
AO4468
+3.3V_RUN
RTS5159
+3.3V_RUN_CARD
SI3456DDV
+LCDVDD
2000mA 2000mA 6330mA
10330mA 82mA
2000mA 300mA
6661mA
300mA 1761mA
11145mA
48000mA 24800mA
1000mA
3500mA
16825mA
TPS51611
+CPU_GFX_CORE
22000mA
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Date: Sheet of
Wistron Corporation
SMBUS Block Diagram
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
SMBUS Block Diagram
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
SMBUS Block Diagram
A2
<Core Design>
LDDC_CLK
LDDC_DATA
+3.3V_RUN

TPDATA
TPCLK
+5V_RUN

TouchPad Conn.
TPDATA
TPCLK PSCLK1
PSDAT1
LCD CONN
PCH SMBus Block Diagram
PCH
SMBCLK
SMBDATA
GPIO62/SDA2
GPIO61/SCL2
KBC
CLK_SMB
Thermal
SCL
SDA
+3.3V_RUN

SRN2K2J-1-GP
+3.3V_ALW

SRN2K2J-1-GP
+3.3V_RUN
DMN66D0LDW-7-GP

DAT_SMB
KBC_SCL1
KBC_SDA1
Minicard
WLAN
SMB_DATA
SMB_CLK
SCL1
SDA1
BAT_SCL
BAT_SDA
SMBus address:D2
SMBus Address:A0
SMBus Address:A4
DIMM 1
SCL
SDA
+KBC_PWR

DIMM 2
SCL
SDA
SMBus address:16
PCH_SMB_CLK
PCH_SMB_DATA
PCH_SMBCLK
PCH_SMBDATA
PBAT_SMBCLK1
PBAT_SMBDAT1
KBC SMBus Block Diagram
Battery Conn.
PCH_SMBCLK
PCH_SMBDATA
Clock
Generator
SCLK
SDATA
PCH_SMBCLK
PCH_SMBDATA
BQ24745
SCL
SDA
TPDATA
TPCLK
+3.3V_RUN
DMN66D0LDW-7-GP

THERM_SCL
THERM_SDA
SMBus address:7A
PCH_SMBDATA
PCH_SMBCLK

SMBus address:12
+3.3V_RUN

+3.3V_RUN
DMN66D0LDW-7-GP

+3.3V_RUN

SRN2K2J-1-GP

+5V_CRT_RUN

SRN2K2J-1-GP
CRT CONN
DDC_CLK_CON
DDC_DATA_CON
GMCH_DDCCLK
GMCH_DDCDATA
SRN10KJ-5-GP
SRN4K7J-8-GP
SRN4K7J-8-GP
SRN2K2J-1-GP
NPCE781BA0DX
SRN100J-3-GP
XDP
SML0CLK
SML0DATA
SML0_CLK
SML0_DATA

18
19
7
76
23
SRN4K7J-8-GP
+3.3V_ALW

23
PCH
SML1CLK/GPIO58
SML1DATA/GPIO75
L_DDC_CLK
L_DDC_DATA
CRT_DDC_CLK
CRT_DDC_DATA
+3.3V_ALW

SRN2K2J-1-GP
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Thermal/Audio Block Diagram
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Custom
<Core Design>
Thermal Block Diagram
Thermal
EMC2102
DP1
DN1
SC470P50V3JN-2GP
DP2
DN2
DP3
DN3
Audio Block Diagram
Codec
ALC269Q_VB5
HP
OUT
MIC
IN
SPEAKER
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F
SPKR_PORT_D_L-
SPKR_PORT_D_R+
EMC2102_DP3
EMC2102_DN3
MMBT3904-3-GP
HP1_PORT_B_L
HP1_PORT_B_R
Analog
MIC
PORTC_L
PORTC_R
VREFOUT_C
SC470P50V3JN-2GP
Put under CPU.
EMC2102_DP1
EMC2102_DN1
MMBT3904-3-GP
SC470P50V3JN-2GP
Place near CPU
and PCH.
MMBT3904-3-GP
System Sensor(UMA only)
EMC2102_DP1
EMC2102_DN1
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Date: Sheet of
Wistron Corporation
Table of Content
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Table of Content
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Table of Content
A3
<Core Design>
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
Low (0):
High (1) :
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC
CFG[0]
CFG[7]
Calpella Schematic Checklist Rev.0_7
INIT3_3V# Weak internal pull-down. Do not pull high.
GNT3#/
GPIO55
Default Mode:
Low (0) = Top Block Swap Mode
GNT0#,
GNT1#/GPIO51
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Processor Strapping PCH Strapping
Default (SPI):
GNT2#/
GPIO53
Default - Internal pull-up.
Low (0)
GPIO33 Default:
Disable ME in Manufacturing Mode:
SPI_MOSI
CFG[4] Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[3]
Internal weak Pull-down.
Connect to Vcc3_3 with
8.2-k- 10-k weak pull-up resistor.
Enable iTPM:
Disable iTPM:
NV_ALE Enable Danbury:
Disable Danbury:
Pin Name
USB Table PCIE Routing
LANE3 LAN
NC_CLE Weak internal pull-up. Do not pull low.
Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1: Embedded
DisplayPort
Presence
Calpella Schematic Checklist Rev.0_7
0: Enabled - An external Display Port device is
connected to the Embedded Display Port.
PCI-Express Static
Lane Reversal
1:
0:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Configuration
Select
1:
0:
Single PCI-Express Graphics
Bifurcation enabled
Reserved -
Temporarily used
for early
Clarksfield
samples.
Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor
Note: Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
1
1
1
0
GPIO15
GPIO8
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Internal pull-up.
(Connect to ground with 4.7-k weak
pull-down resistor).
INTVRMEN High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI: Connect GNT1# to ground with 1-k
pull-down resistor. Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with
1-k pull-down resistor.
= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).
Do not pull low.
Connect to ground with 1-k
pull-down resistor.
Connect to Vcc3_3 with 8.2-k weak pull- up resistor.
Left floating, no pull-down required.
Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Connect to ground with 4.7-k weak pull-down
resistor.
Flash Descriptor Security will be overridden.
Flash Descriptor Security will be in effect.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
LANE2 MiniCard WLAN
13 X
X
12 X
WLAN (I/O Board)
USB0 (I/O Board)
10
0
11
USB3
Pair
4
USB
5
2
3
1
Device
X 6
7
8
9
X
BLUETOOTH
USB2
CARD READER
X
CAMERA
X
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FSC
CK_PWRGD
CLK_XTAL_OUT CLK_XTAL_IN
CPU_STOP#
CLK_CPU_BCLK1
CLK_CPU_BCLK1#
CLK_IN_DMI
CLK_IN_DMI#
CLK_PCIE_SATA1
CLK_PCIE_SATA1#
CLK_MCH_DREFCLK1
CLK_MCH_DREFCLK1#
CLK_XTAL_IN
CLK_XTAL_OUT
CK_PWRGD
CPU_STOP#
FSC
PCH_SMBCLK
PCH_SMBDATA
+3.3V_RUN
+3.3V_RUN_SL585 +1.05V_VTT
+1.05V_RUN_SL585_IO
+1.05V_VTT
+3.3V_RUN_SL585
+3.3V_RUN
+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO
CLKIN_DMI# 23
CLKIN_DMI 23
CLK_CPU_BCLK 23
CLK_CPU_BCLK# 23
CLK_PCIE_SATA 23
CLK_PCIE_SATA# 23
DREFCLK# 23
DREFCLK 23
CLK_PCH_14M 23
PCH_SMBDATA 18,19,23,76
PCH_SMBCLK 18,19,23,76
VR_CLKEN# 47
Title
Date: Sheet of
Wistron Corporation
Clock Generator SLG8SP585
7 90 Thursday, April 22, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
FSC 0 1
133MHz
100MHz
(Default)
SPEED
SSID = CLOCK
1
2
C715
SC12P50V2JN-3GP
C715
SC12P50V2JN-3GP
1 2
R701
2K2R2J-2-GP
R701
2K2R2J-2-GP
1 2
X701
X-14D31818M-37GP
82.30005.901
X701
X-14D31818M-37GP
82.30005.901
1
2
EC701
SC4D7P50V2CN-1GP
DY
EC701
SC4D7P50V2CN-1GP
DY
V
D
D
_
D
O
T
1
V
S
S
_
D
O
T
2
DOT_96
3
DOT_96#
4
V
D
D
_
2
7
5
27MHZ
6
27MHZ_SS
7
V
S
S
_
2
7
8
V
S
S
_
S
A
T
A
9
SRC_1/SATA
10
SRC_1/SATA#
11
V
S
S
_
S
R
C
1
2
SRC_2
13
SRC_2#
14
V
D
D
_
S
R
C
_
I
O
1
5
CPU_STOP#
16
V
D
D
_
S
R
C
1
7
V
D
D
_
C
P
U
_
I
O
1
8
CPU_1#
19
CPU_1
20
V
S
S
_
C
P
U
2
1
CPU_0#
22
CPU_0
23
V
D
D
_
C
P
U
2
4
CKPWRGD/PD#
25
V
S
S
_
R
E
F
2
6
XTAL_OUT
27
XTAL_IN
28
V
D
D
_
R
E
F
2
9
REF_0/CPU_SEL
30
SDA
31
SCL
32
G
N
D
3
3
U701
SLG8SP585VTR-GP
U701
SLG8SP585VTR-GP
1
2
C701
S
C
1
U
1
0
V
2
K
X
-
1
G
P
DY
C701
S
C
1
U
1
0
V
2
K
X
-
1
G
P
DY
1
2 3
4
R
N
0R4P2R-PAD
RN702
R
N
0R4P2R-PAD
RN702
1
2 3
4
R
N
0R4P2R-PAD
RN703
R
N
0R4P2R-PAD
RN703
1
2 3
4
R
N
0R4P2R-PAD
RN704
R
N
0R4P2R-PAD
RN704
1
2
C703
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C703
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1
2
C707
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C707
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1
2
R705
10KR2J-3-GP
R705
10KR2J-3-GP
1
2
C702
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
C702
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
1
2
C711
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C711
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1 2 R709
0R0603-PAD-1-GP
R709
0R0603-PAD-1-GP
G
S
D
...
.
.
Q701
2N7002E-1-GP
...
.
.
Q701
2N7002E-1-GP
1
2
C705
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C705
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1
2
R704
4K7R2J-2-GP
DY
R704
4K7R2J-2-GP
DY
1 2 R708
0R0603-PAD-1-GP
R708
0R0603-PAD-1-GP
1
2
R707
10KR2J-3-GP
R707
10KR2J-3-GP
1
2
C704
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C704
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1
2
C709
S
C
1
U
1
0
V
2
K
X
-
1
G
P
DY
C709
S
C
1
U
1
0
V
2
K
X
-
1
G
P
DY
1
2 3
4
R
N
0R4P2R-PAD
RN701
R
N
0R4P2R-PAD
RN701
1
2
C708
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C708
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1
2
C710
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
C710
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
1
2
C712
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
C712
S
C
D
1
U
1
6
V
2
Z
Y
-
2
G
P
1 2
R703
33R2J-2-GP
R703
33R2J-2-GP
1
2
C714
SC12P50V2JN-3GP
C714
SC12P50V2JN-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXP_RBIAS
PEG_IRCOMP_R
DMI_PTX_CRXN0 22
DMI_CTX_PRXN0 22
DMI_PTX_CRXN1 22
DMI_PTX_CRXN2 22
DMI_PTX_CRXN3 22
DMI_PTX_CRXP0 22
DMI_PTX_CRXP1 22
DMI_PTX_CRXP2 22
DMI_PTX_CRXP3 22
DMI_CTX_PRXN1 22
DMI_CTX_PRXN2 22
DMI_CTX_PRXN3 22
DMI_CTX_PRXP0 22
DMI_CTX_PRXP1 22
DMI_CTX_PRXP2 22
DMI_CTX_PRXP3 22
FDI_TXN0 22
FDI_TXN1 22
FDI_TXN2 22
FDI_TXN3 22
FDI_TXN4 22
FDI_TXN5 22
FDI_TXN6 22
FDI_TXN7 22
FDI_TXP0 22
FDI_TXP1 22
FDI_TXP2 22
FDI_TXP3 22
FDI_TXP4 22
FDI_TXP5 22
FDI_TXP6 22
FDI_TXP7 22
FDI_FSYNC0 22
FDI_FSYNC1 22
FDI_LSYNC0 22
FDI_LSYNC1 22
FDI_INT 22
Title
Date: Sheet of
Wistron Corporation
CPU (PCIE/DMI/FDI)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (PCIE/DMI/FDI)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (PCIE/DMI/FDI)
<Core Design>
Main:62.10053.601
2nd :62.10040.611
3rd :62.10055.321
SSID = CPU
1 2 R801 49D9R2F-GP R801 49D9R2F-GP
1 2 R802 750R2F-GP R802 750R2F-GP
DMI_RX0#
A24
DMI_RX1#
C23
DMI_RX2#
B22
DMI_RX3#
A21
DMI_RX0
B24
DMI_RX1
D23
DMI_RX2
B23
DMI_RX3
A22
DMI_TX0#
D24
DMI_TX1#
G24
DMI_TX2#
F23
DMI_TX3#
H23
DMI_TX0
D25
DMI_TX1
F24
DMI_TX3
G23
DMI_TX2
E23
FDI_TX0#
E22
FDI_TX1#
D21
FDI_TX2#
D19
FDI_TX3#
D18
FDI_TX4#
G21
FDI_TX5#
E19
FDI_TX6#
F21
FDI_TX7#
G18
FDI_TX0
D22
FDI_TX1
C21
FDI_TX2
D20
FDI_TX3
C18
FDI_TX4
G22
FDI_TX5
E20
FDI_TX6
F20
FDI_TX7
G19
FDI_FSYNC0
F17
FDI_FSYNC1
E17
FDI_INT
C17
FDI_LSYNC0
F18
FDI_LSYNC1
D17
PEG_ICOMPI
B26
PEG_ICOMPO
A26
PEG_RBIAS
A25
PEG_RCOMPO
B27
PEG_RX0#
K35
PEG_RX1#
J34
PEG_RX2#
J33
PEG_RX3#
G35
PEG_RX4#
G32
PEG_RX5#
F34
PEG_RX6#
F31
PEG_RX7#
D35
PEG_RX8#
E33
PEG_RX9#
C33
PEG_RX10#
D32
PEG_RX11#
B32
PEG_RX12#
C31
PEG_RX13#
B28
PEG_RX14#
B30
PEG_RX15#
A31
PEG_RX0
J35
PEG_RX1
H34
PEG_RX2
H33
PEG_RX3
F35
PEG_RX4
G33
PEG_RX5
E34
PEG_RX6
F32
PEG_RX7
D34
PEG_RX8
F33
PEG_RX9
B33
PEG_RX10
D31
PEG_RX11
A32
PEG_RX12
C30
PEG_RX13
A28
PEG_RX14
B29
PEG_RX15
A30
PEG_TX0#
L33
PEG_TX1#
M35
PEG_TX2#
M33
PEG_TX3#
M30
PEG_TX4#
L31
PEG_TX5#
K32
PEG_TX6#
M29
PEG_TX7#
J31
PEG_TX8#
K29
PEG_TX9#
H30
PEG_TX10#
H29
PEG_TX11#
F29
PEG_TX12#
E28
PEG_TX13#
D29
PEG_TX14#
D27
PEG_TX15#
C26
PEG_TX0
L34
PEG_TX1
M34
PEG_TX2
M32
PEG_TX3
L30
PEG_TX4
M31
PEG_TX5
K31
PEG_TX6
M28
PEG_TX7
H31
PEG_TX8
K28
PEG_TX9
G30
PEG_TX10
G29
PEG_TX11
F28
PEG_TX12
E27
PEG_TX13
D28
PEG_TX14
C27
PEG_TX15
C25
P
C
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S
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CPU1A
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CPU1A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_CLK#_R
PEG_CLK_R
VDDPWRGOOD_R
BCLK_CPU_P_R
BCLK_CPU_N_R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
SKTOCC#_R
H_CATERR#
H_CATERR#
H_CPURST#
PLT_RST#_R
BCLK_ITP_P
BCLK_ITP_N
SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
H_PWRGD_XDP
SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0
PM_EXTTS#1_C
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
XDP_TDI
XDP_TDO
XDP_TRST#
XDP_TCLK
XDP_PREQ#
XDP_TDI_R
XDP_TMS
H_CPURST#
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
H_DBR#_R
XDP_TRST#
XDP_DBRESET#
XDP_OBS0
XDP_OBS1
XDP_OBS3
XDP_OBS2
XDP_OBS5
XDP_OBS4
XDP_OBS7
XDP_OBS6
XDP_OBS1
XDP_OBS5
H_CPUPWRGD_XDP
XDP_TDI
XDP_RST#_R
XDP_TDO
XDP_OBS2
XDP_TMS
BCLK_ITP_N
XDP_OBS6
H_PWRGD
PM_PWRBTN#_XDP
XDP_PRDY#
XDP_OBS3
XDP_OBS7
PCIE_CLK_XDP_P
BCLK_ITP_P
XDP_TRST#
XDP_OBS0
H_PWRGD_XDP
XDP_OBS4
H_CPURST# XDP_RST#_R
XDP_PREQ#
PM_EXTTS#0_C
XDP_TCLK
VCCPWRGOOD
H_PROCHOT#
SM_DRAMRST#
VTT_PWRGD_R3 VDDPWRGOOD_R
VDDPWRGOOD_R
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+3.3V_RUN
+1.5V_RUN
+1.5V_SUS
CLK_EXP_N 23
CLK_EXP_P 23
H_PM_SYNC 22
PM_DRAM_PWRGD 22
BCLK_CPU_P 25
BCLK_CPU_N 25
H_PECI 25
H_PWRGD 25,42
PLT_RST# 21,37,70,76
H_VTTPWRGD 49
PM_EXTTS#1 19
SML0_DATA 23
XDP_DBRESET# 22
PM_PWRBTN#_R 22
PLT_RST# 21,37,70,76
H_THERMTRIP# 25,37,42
PM_EXTTS#0 18
SML0_CLK 23
VTT_PWRGD 37,42,49
H_PROCHOT# 47
PM_EXTTS#0_C 53
DDR3_DRAMRST# 18,19
DDR_RST_GATE 25
VDDPWRGOOD_KBC 37
Title
Date: Sheet of
Wistron Corporation
CPU (THERMAL/CLOCK/PM )
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
Processor Compensation Signals
Processor Pullups
DDR3 Compensation Signals
Scan Chain
(Default)
Stuff --> R921, R924, R926
No Stuff --> R922, R925
CPU Only
GMCH Only
Stuff --> R921, R922
No Stuff --> R924, R926, R925
Stuff --> R926, R925
No Stuff --> R921, R922, R924
JTAG MAPPING
SSID = CPU
1119
No Stuff
1.27k 3k
0.75k S3 circuit
R920 R919
1.1k
Normal
1 2 R910 24D9R2F-L-GP R910 24D9R2F-L-GP
1
2
C915
SCD047U16V2ZY-1GP
C915
SCD047U16V2ZY-1GP
1
2 3
4
R
N
0R4P2R-PAD
RN906
R
N
0R4P2R-PAD
RN906
1 2
R903 20R2F-GP R903 20R2F-GP
1
2
C902
SCD1U16V2KX-3GP
DY
C902
SCD1U16V2KX-3GP
DY
1
2 3
4
RN905
SRN10KJ-5-GP
RN905
SRN10KJ-5-GP
1 2 R933 68R2-GP R933 68R2-GP
1 2 R911 130R2F-1-GP R911 130R2F-1-GP
1 2
R921 0R2J-2-GP
DY
R921 0R2J-2-GP
DY
G
S
D
. . .
.
.
Q901
2N7002E-1-GP
. . .
.
.
Q901
2N7002E-1-GP
1 2 R902 49D9R2F-GP R902 49D9R2F-GP
1 2
R925 0R2J-2-GP
DY
R925 0R2J-2-GP
DY
1
2
R919
1K1R2F-GP
DY
R919
1K1R2F-GP
DY
1 2
R914 51R2J-2-GP
DY
R914 51R2J-2-GP
DY
1
2 3
4
R
N
0R4P2R-PAD
RN903
R
N
0R4P2R-PAD
RN903
1 2
R930 0R2J-2-GP
DY
R930 0R2J-2-GP
DY
1
2
R937
750R2F-GP
R937
750R2F-GP
1 2
R931 1KR2J-1-GP
DY
R931 1KR2J-1-GP
DY
1 2 R907 100R2F-L1-GP-U R907 100R2F-L1-GP-U
1 2 R926
0R0402-PAD
R926
0R0402-PAD
1 2
R977
1K6R2F-GP
R977
1K6R2F-GP
1 2
R917 51R2J-2-GP
DY
R917 51R2J-2-GP
DY
1 2
R918 51R2J-2-GP
DY
R918 51R2J-2-GP
DY
1 2
R935 0R2J-2-GP
DY
R935 0R2J-2-GP
DY
B
1
A
2
GND
3
Y
4
VCC
5
U927
74LVC1G08GW-1-GP
U927
74LVC1G08GW-1-GP
1 2
R932 0R2J-2-GP
DY
R932 0R2J-2-GP
DY
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
64
61
NP1
NP2
62
63
XDP1
PAD-60P-GP
DY
XDP1
PAD-60P-GP
DY
1 2
R913
1K6R2F-GP
R913
1K6R2F-GP
1 2
R906 49D9R2F-GP R906 49D9R2F-GP
1 2 R908
0R0402-PAD
R908
0R0402-PAD
SM_RCOMP1
AM1
SM_RCOMP2
AN1
SM_DRAMRST#
F6
SM_RCOMP0
AL1
BCLK#
B16
BCLK
A16
BCLK_ITP#
AT30
BCLK_ITP
AR30
PEG_CLK#
D16
PEG_CLK
E16
DPLL_REF_SSCLK#
A17
DPLL_REF_SSCLK
A18
CATERR#
AK14
COMP3
AT23
PECI
AT15
PROCHOT#
AN26
THERMTRIP#
AK15
RESET_OBS#
AP26
VCCPWRGOOD_1
AN14
VCCPWRGOOD_0
AN27
SM_DRAMPWROK
AK13
VTTPWRGOOD
AM15
RSTIN#
AL14
PM_EXT_TS0#
AN15
PM_EXT_TS1#
AP15
PRDY#
AT28
PREQ#
AP27
TCK
AN28
TMS
AP28
TRST#
AT27
TDI
AT29
TDO
AR27
TDI_M
AR29
TDO_M
AP29
DBR#
AN25
BPM0#
AJ22
BPM1#
AK22
BPM2#
AK24
BPM3#
AJ24
BPM4#
AJ25
BPM5#
AH22
BPM6#
AK23
BPM7#
AH23
COMP2
AT24
PM_SYNC
AL15
TAPPWRGOOD
AM26
COMP1
G16
COMP0
AT26
SKTOCC#
AH24
C
L
O
C
K
S
M
I
S
C
T
H
E
R
M
A
L
P
W
R

M
A
N
A
G
E
M
E
N
T
D
D
R
3

M
I
S
C
J
T
A
G

&

B
P
M
2 OF 9
A
U
B
U
R
N
D
A
L
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CPU1B
C
L
O
C
K
S
M
I
S
C
T
H
E
R
M
A
L
P
W
R

M
A
N
A
G
E
M
E
N
T
D
D
R
3

M
I
S
C
J
T
A
G

&

B
P
M
2 OF 9
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CPU1B
1 2
R978
1K6R2F-GP
DY
R978
1K6R2F-GP
DY
1
2
R928
51R2J-2-GP
R928
51R2J-2-GP
1
2
R934
1KR2J-1-GP
R934
1KR2J-1-GP
1 2
R901 20R2F-GP R901 20R2F-GP
1 2 R909
0R0402-PAD
R909
0R0402-PAD
1 2 R912
0R0402-PAD
R912
0R0402-PAD
1 2 R904 68R2-GP
DY
R904 68R2-GP
DY
1 2
R929 0R2J-2-GP
DY
R929 0R2J-2-GP
DY
1 2
R927 1KR2J-1-GP
DY
R927 1KR2J-1-GP
DY
1
2
C901
SCD1U16V2KX-3GP
DY
C901
SCD1U16V2KX-3GP
DY
1
2 3
4
R
N
0R4P2R-PAD
RN901
R
N
0R4P2R-PAD
RN901
1
2
C903
SCD1U10V2KX-5GP
C903
SCD1U10V2KX-5GP
1
2
R924
0R0402-PAD
R924
0R0402-PAD
1
2
R915
750R2F-GP
R915
750R2F-GP
1 2
R916 51R2J-2-GP
DY
R916 51R2J-2-GP
DY
1
2
R923
51R2J-2-GP
R923
51R2J-2-GP
1 TP901 TPAD14-GP TP901 TPAD14-GP
1 2
R905 49D9R2F-GP R905 49D9R2F-GP
1 2
R922 0R2J-2-GP
DY
R922 0R2J-2-GP
DY
1 2
R988
100KR2J-1-GP
R988
100KR2J-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1
M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_A14
M_A_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_A14
M_A_DQS#0
M_A_DQS#3
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1
M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_DQS5
M_A_DQS7
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS0
M_A_DQS1
M_A_DQS6
M_B_A15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_A_DQ[63..0] 18
M_B_DQ[63..0] 19
M_CLK_DDR0 18
M_CLK_DDR#0 18
M_CKE0 18
M_CS#1 18
M_CS#0 18
M_CLK_DDR1 18
M_CLK_DDR#1 18
M_CKE1 18
M_ODT1 18
M_ODT0 18
M_CLK_DDR2 19
M_CLK_DDR#2 19
M_CKE2 19
M_CS#3 19
M_CS#2 19
M_ODT3 19
M_ODT2 19
M_CLK_DDR3 19
M_CLK_DDR#3 19
M_CKE3 19
M_A_BS0 18
M_A_BS1 18
M_A_BS2 18
M_B_BS0 19
M_B_BS1 19
M_B_BS2 19
M_A_CAS# 18
M_A_RAS# 18
M_A_WE# 18
M_B_CAS# 19
M_B_RAS# 19
M_B_WE# 19
M_A_DM[7..0] 18
M_A_DQS#[7..0] 18
M_A_DQS[7..0] 18
M_A_A[15..0] 18
M_B_DQS#[7..0] 19
M_B_DM[7..0] 19
M_B_DQS[7..0] 19
M_B_A[15..0] 19
Title
Date: Sheet of
Wistron Corporation
CPU (DDR)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (DDR)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (DDR)
<Core Design>
SSID = CPU
SA_BS0
AC3
SA_BS1
AB2
SA_BS2
U7
SA_CAS#
AE1
SA_RAS#
AB3
SA_WE#
AE9
SA_CK0
AA6
SA_CK1
Y6
SA_CK0#
AA7
SA_CK1#
Y5
SA_CKE0
P7
SA_CKE1
P6
SA_CS0#
AE2
SA_CS1#
AE8
SA_ODT0
AD8
SA_ODT1
AF9
SA_DM0
B9
SA_DM1
D7
SA_DM2
H7
SA_DM3
M7
SA_DM4
AG6
SA_DM5
AM7
SA_DM6
AN10
SA_DM7
AN13
SA_DQS0
C8
SA_DQS0#
C9
SA_DQS1
F9
SA_DQS1#
F8
SA_DQS2
H9
SA_DQS2#
J9
SA_DQS3
M9
SA_DQS3#
N9
SA_DQS4
AH8
SA_DQS4#
AH7
SA_DQS5
AK10
SA_DQS5#
AK9
SA_DQS6
AN11
SA_DQS6#
AP11
SA_DQS7
AR13
SA_DQS7#
AT13
SA_MA0
Y3
SA_MA1
W1
SA_MA2
AA8
SA_MA3
AA3
SA_MA4
V1
SA_MA5
AA9
SA_MA6
V8
SA_MA7
T1
SA_MA8
Y9
SA_MA9
U6
SA_MA10
AD4
SA_MA11
T2
SA_MA12
U3
SA_MA13
AG8
SA_MA14
T3
SA_MA15
V9
SA_DQ0
A10
SA_DQ1
C10
SA_DQ2
C7
SA_DQ3
A7
SA_DQ4
B10
SA_DQ5
D10
SA_DQ6
E10
SA_DQ7
A8
SA_DQ8
D8
SA_DQ9
F10
SA_DQ10
E6
SA_DQ11
F7
SA_DQ12
E9
SA_DQ13
B7
SA_DQ14
E7
SA_DQ15
C6
SA_DQ16
H10
SA_DQ17
G8
SA_DQ18
K7
SA_DQ19
J8
SA_DQ20
G7
SA_DQ21
G10
SA_DQ22
J7
SA_DQ23
J10
SA_DQ24
L7
SA_DQ25
M6
SA_DQ26
M8
SA_DQ27
L9
SA_DQ28
L6
SA_DQ29
K8
SA_DQ30
N8
SA_DQ31
P9
SA_DQ32
AH5
SA_DQ33
AF5
SA_DQ34
AK6
SA_DQ35
AK7
SA_DQ36
AF6
SA_DQ37
AG5
SA_DQ38
AJ7
SA_DQ39
AJ6
SA_DQ40
AJ10
SA_DQ41
AJ9
SA_DQ42
AL10
SA_DQ43
AK12
SA_DQ44
AK8
SA_DQ45
AL7
SA_DQ46
AK11
SA_DQ47
AL8
SA_DQ48
AN8
SA_DQ49
AM10
SA_DQ50
AR11
SA_DQ51
AL11
SA_DQ52
AM9
SA_DQ53
AN9
SA_DQ54
AT11
SA_DQ55
AP12
SA_DQ56
AM12
SA_DQ57
AN12
SA_DQ58
AM13
SA_DQ59
AT14
SA_DQ60
AT12
SA_DQ61
AL13
SA_DQ62
AR14
SA_DQ63
AP14
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
3 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1C
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
3 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1C
SB_BS0
AB1
SB_BS1
W5
SB_BS2
R7
SB_CAS#
AC5
SB_RAS#
Y7
SB_WE#
AC6
SB_CK0
W8
SB_CK1
V7
SB_CK0#
W9
SB_CK1#
V6
SB_CKE0
M3
SB_CKE1
M2
SB_CS0#
AB8
SB_CS1#
AD6
SB_ODT0
AC7
SB_ODT1
AD1
SB_DM0
D4
SB_DM1
E1
SB_DM2
H3
SB_DM3
K1
SB_DM4
AH1
SB_DM5
AL2
SB_DM6
AR4
SB_DM7
AT8
SB_DQS4
AG2
SB_DQS4#
AH2
SB_DQS5
AL5
SB_DQS5#
AL4
SB_DQS6
AP5
SB_DQS6#
AR5
SB_DQS7
AR7
SB_DQS7#
AR8
SB_DQS0
C5
SB_DQS0#
D5
SB_DQS1
E3
SB_DQS1#
F4
SB_DQS2
H4
SB_DQS2#
J4
SB_DQS3
M5
SB_DQS3#
L4
SB_MA0
U5
SB_MA1
V2
SB_MA2
T5
SB_MA3
V3
SB_MA4
R1
SB_MA5
T8
SB_MA6
R2
SB_MA7
R6
SB_MA8
R4
SB_MA9
R5
SB_MA10
AB5
SB_MA11
P3
SB_MA12
R3
SB_MA13
AF7
SB_MA14
P5
SB_MA15
N1
SB_DQ0
B5
SB_DQ1
A5
SB_DQ2
C3
SB_DQ3
B3
SB_DQ4
E4
SB_DQ5
A6
SB_DQ6
A4
SB_DQ7
C4
SB_DQ8
D1
SB_DQ9
D2
SB_DQ10
F2
SB_DQ11
F1
SB_DQ12
C2
SB_DQ13
F5
SB_DQ14
F3
SB_DQ15
G4
SB_DQ16
H6
SB_DQ17
G2
SB_DQ18
J6
SB_DQ19
J3
SB_DQ20
G1
SB_DQ21
G5
SB_DQ22
J2
SB_DQ23
J1
SB_DQ24
J5
SB_DQ25
K2
SB_DQ26
L3
SB_DQ27
M1
SB_DQ28
K5
SB_DQ29
K4
SB_DQ30
M4
SB_DQ31
N5
SB_DQ32
AF3
SB_DQ33
AG1
SB_DQ34
AJ3
SB_DQ35
AK1
SB_DQ36
AG4
SB_DQ37
AG3
SB_DQ38
AJ4
SB_DQ39
AH4
SB_DQ40
AK3
SB_DQ41
AK4
SB_DQ42
AM6
SB_DQ43
AN2
SB_DQ44
AK5
SB_DQ45
AK2
SB_DQ46
AM4
SB_DQ47
AM3
SB_DQ48
AP3
SB_DQ49
AN5
SB_DQ50
AT4
SB_DQ51
AN6
SB_DQ52
AN4
SB_DQ53
AN3
SB_DQ54
AT5
SB_DQ55
AT6
SB_DQ56
AN7
SB_DQ57
AP6
SB_DQ58
AP8
SB_DQ59
AT9
SB_DQ60
AT7
SB_DQ61
AP9
SB_DQ62
AR10
SB_DQ63
AT10
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

-

B
4 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1D
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

-

B
4 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG0
CFG0
CFG4
CFG7
CFG3
SA_DIMM_VREF#
SB_DIMM_VREF#
CFG3
CFG7
CFG4
Title
Date: Sheet of
Wistron Corporation
CPU (RESERVED)
11 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (RESERVED)
11 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (RESERVED)
11 90 Friday, April 16, 2010
<Core Design>
PCI-Express Configuration Select
CFG0
1:Single PEG
0:Bifurcation enabled
CFG4 - Display Port Presence
CFG4
1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.
CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
CFG3 - PCI-Express Static Lane Reversal
CFG3
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
SSID = CPU
1
2
R1102
3KR2J-2-GP
DY
R1102
3KR2J-2-GP
DY
1
2
R1104
3KR2F-GP
DY
R1104
3KR2F-GP
DY
1
2
R1101
3KR2F-GP
DY
R1101
3KR2F-GP
DY
1
2
R1103
3KR2F-GP
DY
R1103
3KR2F-GP
DY
CFG0
AM30
CFG1
AM28
CFG2
AP31
CFG3
AL32
CFG4
AL30
CFG5
AM31
CFG6
AN29
CFG7
AM32
CFG8
AK32
CFG9
AK31
CFG10
AK28
CFG11
AJ28
CFG12
AN30
CFG13
AN32
CFG14
AJ32
CFG15
AJ29
CFG16
AJ30
CFG17
AK30
RSVD#AH25
AH25
RSVD#AK26
AK26
RSVD#AJ26
AJ26
RSVD#AJ27
AJ27
RSVD_TP#H16
H16
RSVD#AL28
AL28
RSVD#AL29
AL29
RSVD#AP30
AP30
RSVD#AP32
AP32
RSVD#AL27
AL27
RSVD#AT31
AT31
RSVD#AT32
AT32
RSVD#AP33
AP33
RSVD#AR33
AR33
RSVD#AR32
AR32
RSVD#J28
J28
RSVD#J29
J29
RSVD#A19
A19
RSVD#B19
B19
RSVD#A20
A20
RSVD#B20
B20
RSVD#T9
T9
RSVD#U9
U9
RSVD#AB9
AB9
RSVD#AC9
AC9
RSVD_TP#AA5
AA5
RSVD_TP#AA4
AA4
RSVD_TP#R8
R8
RSVD_TP#AA2
AA2
RSVD_TP#AA1
AA1
RSVD_TP#R9
R9
RSVD_TP#AD3
AD3
RSVD_TP#AG7
AG7
RSVD_TP#AD2
AD2
RSVD_TP#AE3
AE3
RSVD_TP#V4
V4
RSVD_TP#V5
V5
RSVD_TP#N2
N2
RSVD_TP#W3
W3
RSVD_TP#W2
W2
RSVD_TP#N3
N3
RSVD_TP#AD5
AD5
RSVD_TP#AE5
AE5
RSVD_TP#AD7
AD7
RSVD_TP#AD9
AD9
RSVD#AL26
AL26
RSVD#AP25
AP25
RSVD#AL25
AL25
RSVD#AL24
AL24
RSVD#AL22
AL22
RSVD#AJ33
AJ33
RSVD#AG9
AG9
RSVD#M27
M27
RSVD#L28
L28
SA_DIMM_VREF#
J17
SB_DIMM_VREF#
H17
RSVD#G25
G25
RSVD#G17
G17
RSVD#E31
E31
RSVD#E30
E30
RSVD#AJ13
AJ13
RSVD#AJ12
AJ12
RSVD_TP#E15
E15
RSVD_TP#F15
F15
KEY
A2
RSVD#D15
D15
RSVD#C15
C15
RSVD#AJ15
AJ15
RSVD#AH15
AH15
VSS
AP34
RSVD_NCTF#AR2
AR2
R
E
S
E
R
V
E
D
5 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1E
R
E
S
E
R
V
E
D
5 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1E
1 TP1116 TP1116
1 TP1117 TP1117
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_VID6
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VTTVID1
TP_VSS_SENSE_VTT
+VCC_CORE
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+VCC_CORE
+VCC_CORE
H_VID[6..0] 47
VCC_SENSE 47
VSS_SENSE 47
PSI# 47
PM_DPRSLPVR 47
IMVP_IMON 47
VTT_SENSE 49
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_CORE)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_CORE)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_CORE)
<Core Design>
PROCESSOR CORE POWER
The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
H_VTTVID1 = Low, 1.1V
H_VTTVID1 = High, 1.05V
48A
SSID = CPU
2010/04/19
X01
1
2
C1214
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1214
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1206
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1206
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1238
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1238
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1221
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1221
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
R1201
100R2F-L1-GP-U
R1201
100R2F-L1-GP-U
1
2
C1209
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1209
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1212
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1212
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1234
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C1234
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
C1218
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1218
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
R1204
100R2F-L1-GP-U
R1204
100R2F-L1-GP-U
1
2
C1211
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1211
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1237
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1237
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1240
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1240
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1226
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C1226
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
C1210
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1210
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1217
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1217
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1224
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1224
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1236
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1236
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1235
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1235
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1230
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1230
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1205
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1205
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1223
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1223
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1202
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1202
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1222
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C1222
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
C1229
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1229
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1220
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1220
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1243
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1243
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1227
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1227
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1201
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1201
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1213
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1213
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1219
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
C1219
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
1
2
C1241
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1241
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1231
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1231
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1232
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1232
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1225
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1225
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1216
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1216
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1 TP1201TPAD14-GP TP1201TPAD14-GP
1
2
C1208
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1208
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1233
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1233
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1203
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
C1203
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
ISENSE
AN35
VTT_SENSE
B15
PSI#
AN33
VID0
AK35
VID1
AK33
VID2
AK34
VID3
AL35
VID4
AL33
VID5
AM33
VID6
AM35
PROC_DPRSLPVR
AM34
VTT_SELECT
G15
VCC_SENSE
AJ34
VSS_SENSE_VTT
A15
VCC
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VTT0
AF10
VTT0
AE10
VTT0
AC10
VTT0
AB10
VTT0
Y10
VTT0
W10
VTT0
U10
VTT0
T10
VTT0
J12
VTT0
J11
VTT0
AH14
VTT0
AH12
VTT0
AH11
VTT0
AH10
VTT0
J14
VTT0
J13
VTT0
H14
VTT0
H12
VTT0
G14
VTT0
G13
VTT0
G12
VTT0
G11
VTT0
F14
VTT0
F13
VTT0
F12
VTT0
F11
VTT0
E14
VTT0
E12
VTT0
D14
VTT0
D13
VTT0
D12
VTT0
D11
VTT0
C14
VTT0
C13
VTT0
C12
VTT0
C11
VTT0
B14
VTT0
B12
VTT0
A14
VTT0
A13
VTT0
A12
VTT0
A11
VSS_SENSE
AJ35
VTT0
J16
VTT0
J15
P
O
W
E
R
C
P
U

C
O
R
E

S
U
P
P
L
Y
1
.
1
V

R
A
I
L

P
O
W
E
R
S
E
N
S
E

L
I
N
E
S
C
P
U

V
I
D
S
6 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1F
P
O
W
E
R
C
P
U

C
O
R
E

S
U
P
P
L
Y
1
.
1
V

R
A
I
L

P
O
W
E
R
S
E
N
S
E

L
I
N
E
S
C
P
U

V
I
D
S
6 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1F
1
2
C1215
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1215
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1242
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1242
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1207
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C1207
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
C1204
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
C1204
S
C
1
0
U
1
0
V
5
Z
Y
-
1
G
P
DY
1
TP1202TPAD14-GP TP1202TPAD14-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GFX_IMON_C
+1.05V_VTT
+1.5V_RUN
+1.05V_VTT
+1.05V_VTT
+1.8V_RUN
+1.05V_VTT
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS
+1.5V_RUN
+1.5V_SUS
+CPU_GFX_CORE
VCC_AXG_SENSE 53
VSS_AXG_SENSE 53
GFX_VR_EN 53
GFX_DPRSLPVR 53
GFX_IMON 53
GFX_VID6 53
GFX_VID5 53
GFX_VID4 53
GFX_VID3 53
GFX_VID2 53
GFX_VID1 53
GFX_VID0 53
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_GFXCORE)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_GFXCORE)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VCC_GFXCORE)
<Core Design>
Please note that the VTT Rail
Values are: Auburndale VTT=1.05V
18A
1.35A
3A
Clarksfield VTT=1.1V
SSID = CPU
425302_425302_Calpella_S3PowerReduction_WhitePape
Revision 0.7
22A
2010/04/19
X01
1
2
C1306 S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1306 S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1316 S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1316 S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1309
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1309
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1312
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1312
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1323
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1323
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
R1304 0R2J-2-GP
DY
R1304 0R2J-2-GP
DY
1
2
C1304 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1304 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1324
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1324
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1376
SCD1U10V2KX-4GP
DYC1376
SCD1U10V2KX-4GP
DY
1
2
C1310
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1310
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1313
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1313
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1325
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1325
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1317
SC10U6D3V5MX-3GP
DY
C1317
SC10U6D3V5MX-3GP
DY
1
2
C1326
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1326
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1320 S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
C1320 S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1
2
C1301 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1301 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1377
SCD1U10V2KX-4GP
DYC1377
SCD1U10V2KX-4GP
DY
1
2
C1311
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1311
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1378
SCD1U10V2KX-4GP
DYC1378
SCD1U10V2KX-4GP
DY
1
2
C1315
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1315
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1
2
C1322
SC10U6D3V5MX-3GP
C1322
SC10U6D3V5MX-3GP
1
2
C1314
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
DY
C1314
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
DY
1
2
C1321
S
C
2
D
2
U
6
D
3
V
3
K
X
-
G
P
C1321
S
C
2
D
2
U
6
D
3
V
3
K
X
-
G
P
GFX_VID0
AM22
GFX_VID1
AP22
GFX_VID2
AN22
GFX_VID3
AP23
GFX_VID4
AM23
GFX_VID5
AP24
GFX_VID6
AN24
GFX_VR_EN
AR25
GFX_DPRSLPVR
AT25
GFX_IMON
AM24
VAXG_SENSE
AR22
VSSAXG_SENSE
AT22
VAXG1
AT21
VAXG2
AT19
VAXG3
AT18
VAXG4
AT16
VAXG5
AR21
VAXG6
AR19
VAXG7
AR18
VAXG8
AR16
VAXG9
AP21
VAXG10
AP19
VAXG11
AP18
VAXG12
AP16
VAXG13
AN21
VAXG14
AN19
VAXG15
AN18
VAXG16
AN16
VAXG17
AM21
VAXG18
AM19
VAXG19
AM18
VAXG20
AM16
VAXG21
AL21
VAXG22
AL19
VAXG23
AL18
VAXG24
AL16
VAXG25
AK21
VAXG26
AK19
VAXG27
AK18
VAXG28
AK16
VAXG29
AJ21
VAXG30
AJ19
VAXG31
AJ18
VAXG32
AJ16
VAXG33
AH21
VAXG34
AH19
VAXG35
AH18
VAXG36
AH16
VTT1
J24
VTT1
J23
VTT1
H25
VTT1
K26
VTT1
J27
VTT1
J26
VTT1
J25
VTT1
H27
VTT1
G28
VTT1
G27
VTT1
G26
VTT1
F26
VTT1
E26
VTT1
E25
VDDQ
AJ1
VDDQ
AF1
VDDQ
AE7
VDDQ
AE4
VDDQ
AC1
VDDQ
AB7
VDDQ
AB4
VDDQ
Y1
VDDQ
W7
VDDQ
W4
VDDQ
U1
VDDQ
T7
VDDQ
T4
VDDQ
P1
VDDQ
N7
VDDQ
N4
VDDQ
L1
VDDQ
H1
VTT1
P10
VTT1
N10
VTT1
L10
VTT1
K10
VTT1
L26
VTT1
L27
VTT1
M26
VTT1
J22
VTT1
J20
VTT1
J18
VTT1
H21
VTT1
H20
VTT1
H19
P
O
W
E
R
G
R
A
P
H
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C
S

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D
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G
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H
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C
S
D
D
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3

-

1
.
5
V

R
A
I
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S
F
D
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G

&

D
M
I
S
E
N
S
E
L
I
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S
1
.
1
V
1
.
8
V
7 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1G
P
O
W
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R
G
R
A
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S

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3

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.
5
V

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S
1
.
1
V
1
.
8
V
7 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1G
1
2
C1328
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1328
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1305 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1305 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1302 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1302 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
TC1301
SE330U2D5VDM-2GP
DY
TC1301
SE330U2D5VDM-2GP
DY
1
2
C1307 S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C1307 S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C1379
SCD1U10V2KX-4GP
DYC1379
SCD1U10V2KX-4GP
DY
1
2
C1318 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1318 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1308
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C1308
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1 2 R1305 4K7R2J-2-GP R1305 4K7R2J-2-GP
1
2
C1319 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1319 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C1303 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C1303 S
C
1
U
6
D
3
V
2
K
X
-
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF4
TP_MCP_VSS_NCTF3
TP_MCP_VSS_NCTF2
Title
Date: Sheet of
Wistron Corporation
CPU (VSS)
14 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VSS)
14 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CPU (VSS)
14 90 Friday, April 16, 2010
<Core Design>
SSID = CPU
VSS
AT20
VSS
AT17
VSS
AR31
VSS
AR28
VSS
AR26
VSS
AR24
VSS
AR23
VSS
AR20
VSS
AR17
VSS
AR15
VSS
AR12
VSS
AR9
VSS
AR6
VSS
AR3
VSS
AP20
VSS
AP17
VSS
AP13
VSS
AP10
VSS
AP7
VSS
AP4
VSS
AP2
VSS
AN34
VSS
AN31
VSS
AN23
VSS
AN20
VSS
AN17
VSS
AM29
VSS
AM27
VSS
AM25
VSS
AM20
VSS
AM17
VSS
AM14
VSS
AM11
VSS
AM8
VSS
AM5
VSS
AM2
VSS
AL34
VSS
AL31
VSS
AL23
VSS
AL20
VSS
AL17
VSS
AL12
VSS
AL9
VSS
AL6
VSS
AL3
VSS
AK29
VSS
AK27
VSS
AK25
VSS
AK20
VSS
AK17
VSS
AJ31
VSS
AJ23
VSS
AJ20
VSS
AJ17
VSS
AJ14
VSS
AJ11
VSS
AJ8
VSS
AJ5
VSS
AJ2
VSS
AH35
VSS
AH34
VSS
AH33
VSS
AH32
VSS
AH31
VSS
AH30
VSS
AH29
VSS
AH28
VSS
AH27
VSS
AH26
VSS
AH20
VSS
AH17
VSS
AH13
VSS
AH9
VSS
AH6
VSS
AH3
VSS
AG10
VSS
AF8
VSS
AF4
VSS
AF2
VSS
AE35
VSS
AE34
VSS
AE33
VSS
AE32
VSS
AE31
VSS
AE30
VSS
AE29
VSS
AE28
VSS
AE27
VSS
AE26
VSS
AE6
VSS
AD10
VSS
AC8
VSS
AC4
VSS
AC2
VSS
AB35
VSS
AB34
VSS
AB33
VSS
AB32
VSS
AB31
VSS
AB30
VSS
AB29
VSS
AB28
VSS
AB27
VSS
AB26
VSS
AB6
VSS
AA10
VSS
Y8
VSS
Y4
VSS
Y2
VSS
W35
VSS
W34
VSS
W33
VSS
W32
VSS
W31
VSS
W30
VSS
W29
VSS
W28
VSS
W27
VSS
W26
VSS
W6
VSS
V10
VSS
U8
VSS
U4
VSS
U2
VSS
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
T6
VSS
R10
VSS
P8
VSS
P4
VSS
P2
VSS
N35
VSS
N34
VSS
N33
VSS
N32
VSS
N31
VSS
N30
VSS
N29
VSS
N28
VSS
N27
VSS
N26
VSS
N6
VSS
M10
VSS
L35
VSS
L32
VSS
L29
VSS
L8
VSS
L5
VSS
L2
VSS
K34
VSS
K33
VSS
K30
VSS
8 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1H
VSS
8 OF 9
A
U
B
U
R
N
D
A
L
E
CPU1H
1 TP1403 TP1403
VSS
K27
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS
H35
VSS
H32
VSS
H28
VSS
H26
VSS
H24
VSS
H22
VSS
H18
VSS
H15
VSS
H13
VSS
H11
VSS
H8
VSS
H5
VSS
H2
VSS
G34
VSS
G31
VSS
G20
VSS
G9
VSS
G6
VSS
G3
VSS
F30
VSS
F27
VSS
F25
VSS
F22
VSS
F19
VSS
F16
VSS
E35
VSS
E32
VSS
E29
VSS
E24
VSS
E21
VSS
E18
VSS
E13
VSS
E11
VSS
E8
VSS
E5
VSS
E2
VSS
D33
VSS
D30
VSS
D26
VSS
D9
VSS
D6
VSS
D3
VSS
C34
VSS
C32
VSS
C29
VSS
C28
VSS
C24
VSS
C22
VSS
C20
VSS
C19
VSS
C16
VSS
B31
VSS
B25
VSS
B21
VSS
B18
VSS
B17
VSS
B13
VSS
B11
VSS
B8
VSS
B6
VSS
B4
VSS
A29
VSS_NCTF#AT35
AT35
VSS_NCTF#AT1
AT1
VSS_NCTF#AR34
AR34
VSS_NCTF#B34
B34
VSS_NCTF#B2
B2
VSS_NCTF#B1
B1
VSS_NCTF#A35
A35
VSS
A27
VSS
A23
VSS
A9
RSVD_NCTF#AT33
AT33
RSVD_NCTF#AT34
AT34
RSVD_NCTF#AP35
AP35
RSVD_NCTF#AR35
AR35
RSVD_NCTF#AT3
AT3
RSVD_NCTF#AR1
AR1
RSVD_NCTF#AP1
AP1
RSVD_NCTF#AT2
AT2
RSVD_NCTF#C1
C1
RSVD_NCTF#A3
A3
RSVD_NCTF#C35
C35
RSVD_NCTF#B35
B35
RSVD_NCTF#A34
A34
RSVD_NCTF#A33
A33
VSS
9 OF 9
A
U
B
U
R
N
D
A
L
E
N
C
T
F

T
E
S
T

P
I
N
:
A
3
5
,
A
T
1
,
A
T
3
5
,
B
1
,
A
3
,
A
3
3
,
A
3
4
,
A
P
1
,
A
P
3
5
,
A
R
1
,
A
R
3
5
,
A
T
2
,
A
T
3
,
A
T
3
3
,
A
T
3
4
,
B
3
5
,
C
1
,
C
3
5
CPU1I
VSS
9 OF 9
A
U
B
U
R
N
D
A
L
E
N
C
T
F

T
E
S
T

P
I
N
:
A
3
5
,
A
T
1
,
A
T
3
5
,
B
1
,
A
3
,
A
3
3
,
A
3
4
,
A
P
1
,
A
P
3
5
,
A
R
1
,
A
R
3
5
,
A
T
2
,
A
T
3
,
A
T
3
3
,
A
T
3
4
,
B
3
5
,
C
1
,
C
3
5
CPU1I
1 TP1405 TP1405
1 TP1406 TP1406
1 TP1404 TP1404
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
15 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
15 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
15 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
16 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
16 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
16 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
17 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
17 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
17 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_DQS#0
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DM4
M_A_DQS3
M_A_DQ0
M_A_DQS#5
M_A_A2
SA0_DIM0
SA0_DIM0
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DM5
M_A_DQS4
SODIMM0_1_SMB_CLK_R
M_A_A3
M_A_DQS#6
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
SA1_DIM0
M_A_DQ1
M_A_A4
M_A_DM0
M_A_DM6
M_A_DQS5
M_A_DQS#7
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQS#1
M_A_A5
M_A_DQ2
SA1_DIM0
M_A_DM1
M_A_DQS6
M_A_DM7
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQS0
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A6
M_A_DQ3
M_A_DQS#2
M_A_DQS7
M_A_DM2
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQS1
M_A_A13
M_A_A14
M_A_A15
M_A_A12
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQS#3
M_A_A0
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DM3
SODIMM0_1_SMB_DATA_R
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQS2
M_A_DQS#4
+1.5V_SUS
+1.5V_SUS
+3.3V_RUN
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+V_DDR_REF
+V_DDR_REF
M_A_WE# 10
M_CS#0 10
M_A_CAS# 10
DDR3_DRAMRST# 9,19
M_ODT0 10
M_ODT1 10
M_CKE0 10
M_CKE1 10
M_CS#1 10
M_CLK_DDR0 10
M_CLK_DDR#0 10
M_CLK_DDR1 10
M_CLK_DDR#1 10
M_A_BS2 10
M_A_BS0 10
M_A_BS1 10
M_A_RAS# 10
M_A_DQ[63..0] 10
M_A_DQS#[7..0] 10
M_A_DQS[7..0] 10
M_A_A[15..0] 10
M_A_DM[7..0] 10
PM_EXTTS#0 9
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM1
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM1
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM1
<Core Design>
Place these caps
close to VTT1 and
VTT2.
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
SODIMM A DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMA.
H =5.2mm
62.10017.P11
SSID = MEMORY
1
2
C1805 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1805 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
DM1
DDR3-204P-46-GP
DM1
DDR3-204P-46-GP
1
2
C1804 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
C1804 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
1
2
C
1
8
2
0
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
8
2
0
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C1810 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
C1810 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
1
2
TC1801 S
E
3
3
0
U
2
D
5
V
D
M
-2
G
P
DY
TC1801 S
E
3
3
0
U
2
D
5
V
D
M
-2
G
P
DY
1
2
C
1
8
2
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
8
2
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1808 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1808 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C
1
8
2
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
8
2
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
8
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
8
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
34
RN1801
SRN10KJ-5-GP
RN1801
SRN10KJ-5-GP
1
2
C1807 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1807 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C1826
SCD1U10V2KX-5GP
C1826
SCD1U10V2KX-5GP
1
2
C
1
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
1
8
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
8
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C1803 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
C1803 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
1
2
C1806 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
C1806 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
1 2 R1804 0R0402-PAD R1804 0R0402-PAD
1
2
C1809 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
C1809 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
1
2
C1817
SCD1U10V2KX-5GP
C1817
SCD1U10V2KX-5GP
1
2
C1801
SCD1U10V2KX-5GP
C1801
SCD1U10V2KX-5GP
1
2
C
1
8
1
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
8
1
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1802
SC2D2U10V3KX-1GP DY
C1802
SC2D2U10V3KX-1GP DY
1
2
C1818
SC2D2U10V3KX-1GP
DY
C1818
SC2D2U10V3KX-1GP
DY
1 2 R1805 0R0402-PAD R1805 0R0402-PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A1
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQS#0
M_B_DQ43
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ15
M_B_DM4
M_B_DQS3
M_B_DQ0
M_B_A2
M_B_DQS#5
SA0_DIM1
SA1_DIM1
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQS4
M_B_DM5
M_B_A3
M_B_DQS#6
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
SA1_DIM1
M_B_DQ1
M_B_DM0
M_B_A4
M_B_DQS5
M_B_DM6
M_B_DQS#7
M_B_DQ53
M_B_DQ52
M_B_DQ24
M_B_DQ55
M_B_DQ54
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQS#1
M_B_DQ2
M_B_A5
M_B_DM1
M_B_DM7
M_B_DQS6
M_B_DQ57
M_B_DQ56
M_B_DQS0
M_B_DQ59
M_B_DQ58
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_A7
M_B_A6
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_DQ3
M_B_DQS#2
M_B_DM2
M_B_DQS7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQS1
M_B_A12
M_B_A15
M_B_A14
M_B_A13
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQS#3
M_B_A0
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DM3
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQS2
M_B_DQS#4
SODIMM1_1_SMB_CLK_R
SODIMM1_1_SMB_DATA_R
SA0_DIM1
+3.3V_RUN
+1.5V_SUS
+3.3V_RUN
+1.5V_SUS
+0.75V_DDR_VTT
+V_DDR_REF
+V_DDR_REF
M_B_WE# 10
M_CS#2 10
DDR3_DRAMRST# 9,18
M_B_CAS# 10
M_ODT2 10
M_ODT3 10
M_CKE2 10
M_CKE3 10
M_CS#3 10
M_CLK_DDR2 10
M_CLK_DDR#2 10
M_CLK_DDR3 10
M_CLK_DDR#3 10
M_B_BS0 10
M_B_BS2 10
M_B_BS1 10
M_B_RAS# 10
M_B_DQ[63..0] 10
M_B_DQS[7..0] 10
M_B_A[15..0] 10
M_B_DQS#[7..0] 10
M_B_DM[7..0] 10
PM_EXTTS#1 9
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DDR3-SODIMM2
<Core Design>
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
Place these caps
close to VTT1 and
VTT2.
SODIMM B DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMB.
H = 9.2mm
62.10017.N71
SSID = MEMORY
1
2
C1906 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1906 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C1902
SC2D2U10V3KX-1GP
DY
C1902
SC2D2U10V3KX-1GP
DY
1
2
C
1
9
2
0
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
9
2
0
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
34
RN1901
SRN10KJ-5-GP
RN1901
SRN10KJ-5-GP
1
2
C
1
9
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
9
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2 R1904 0R0402-PAD R1904 0R0402-PAD
1
2
C1923
SCD1U10V2KX-5GP
C1923
SCD1U10V2KX-5GP
1
2
C1924
SC2D2U10V3KX-1GP
DY
C1924
SC2D2U10V3KX-1GP
DY
1 2 R1905 0R0402-PAD R1905 0R0402-PAD
1
2
C1909 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1909 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C1907 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1907 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C1925
SCD1U10V2KX-5GP
C1925
SCD1U10V2KX-5GP
1
2
C
1
9
1
9
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
9
1
9
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
DM2
DDR3-204P-43-GP
DM2
DDR3-204P-43-GP
1
2
C
1
9
2
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
9
2
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
9
1
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
9
1
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1901
SCD1U10V2KX-5GP
C1901
SCD1U10V2KX-5GP
1
2
C
1
9
1
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
9
1
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
1
9
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
9
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1912 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
C1912 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
1
2
C1910 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1910 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
C1905 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
C1905 S
C
1
0
U
1
0
V
5
Z
Y
-1
G
P
DY
1
2
C1911 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
C1911 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
1
2
C1908 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
C1908 S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_VBG
LIBG
PCH_LCDVDD_EN
LCTRL_DATA
LCTRL_DATA
LCTRL_CLK
LDDC_CLK_PCH
LDDC_DATA_PCH
LDDC_DATA_PCH
LDDC_CLK_PCH
LCTRL_CLK
CRT_IREF
PCH_CRT_DDCCLK
PCH_CRT_DDCDATA
+3.3V_RUN
+3.3V_RUN
PCH_CRT_HSYNC 55
LDDC_CLK_PCH 54
LDDC_DATA_PCH 54
PCH_LVDSA_TX0 54
PCH_CRT_VSYNC 55
PCH_LVDSA_TX1 54
PCH_LVDSA_TX2 54
PCH_LVDSA_TX0# 54
PCH_LVDSA_TX1# 54
PCH_LVDSA_TX2# 54
PCH_LVDSA_TXC# 54
PCH_LVDSA_TXC 54
PCH_LBKLT_CTL 54
PCH_LCDVDD_EN 54
PCH_VGA_BLEN 37
PCH_CRT_BLUE 55
PCH_CRT_GREEN 55
PCH_CRT_DDCCLK 55
PCH_CRT_DDCDATA 55
PCH_CRT_RED 55
Title
Date: Sheet of
Wistron Corporation
PCH (LVDS/CRT/DDI)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (LVDS/CRT/DDI)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (LVDS/CRT/DDI)
<Core Design>
SSID = PCH
Place near PCH
Impedance:85 ohm
2.5V Tolerance
Need Level Shift
Close to ball <600mil
CRT SMBUS
Close PCH
1 2 3 4
5678
RN2002
SRN2K2J-4-GP
RN2002
SRN2K2J-4-GP
1
2
R2002
2K37R2F-GP
R2002
2K37R2F-GP
1 2
R2003
100KR2J-1-GP
DY
R2003
100KR2J-1-GP
DY
12
3 4
RN2003
SRN2K2J-1-GP
RN2003
SRN2K2J-1-GP
1 2 3 4
5678
RN2005
SRN150F-1-GP
RN2005
SRN150F-1-GP
L_BKLTCTL
Y48
L_BKLTEN
T48
L_CTRL_CLK
AB46
L_CTRL_DATA
V48
L_DDC_CLK
AB48
L_DDC_DATA
Y45
L_VDD_EN
T47
LVDSA_CLK#
AV53
LVDSA_CLK
AV51
LVDSA_DATA#0
BB47
LVDSA_DATA#1
BA52
LVDSA_DATA#2
AY48
LVDSA_DATA#3
AV47
LVDSA_DATA0
BB48
LVDSA_DATA1
BA50
LVDSA_DATA2
AY49
LVDSA_DATA3
AV48
LVDSB_CLK#
AP48
LVDSB_CLK
AP47
LVDSB_DATA#0
AY53
LVDSB_DATA#1
AT49
LVDSB_DATA#2
AU52
LVDSB_DATA#3
AT53
LVDSB_DATA0
AY51
DDPB_0N
BD42
DDPB_1N
BJ42
LVD_VREFH
AT43
LVD_VREFL
AT42
DDPD_2N
BF37
DDPD_3N
BE36
DDPB_2N
BB40
DDPB_3N
AW38
DDPC_0N
BE40
DDPC_1N
BF41
DDPC_2N
BD38
DDPC_3N
BB36
DDPD_0N
BJ40
DDPD_1N
BJ38
DDPB_0P
BC42
DDPB_1P
BG42
DDPD_2P
BH37
DDPD_3P
BD36
DDPB_2P
BA40
DDPB_3P
BA38
LVDSB_DATA1
AT48
LVDSB_DATA2
AU50
LVDSB_DATA3
AT51
LVD_IBG
AP39
LVD_VBG
AP41
DDPC_1P
BH41
DDPC_0P
BD40
DDPC_2P
BC38
DDPC_3P
BA36
DDPD_0P
BG40
DDPD_1P
BG38
CRT_BLUE
AA52
CRT_DDC_CLK
V51
CRT_DDC_DATA
V53
CRT_GREEN
AB53
CRT_HSYNC
Y53
CRT_IRTN
AB51
CRT_RED
AD53
CRT_VSYNC
Y51
DAC_IREF
AD48
SDVO_CTRLCLK
T51
SDVO_CTRLDATA
T53
DDPC_CTRLCLK
Y49
DDPC_CTRLDATA
AB49
DDPD_CTRLCLK
U50
DDPD_CTRLDATA
U52
DDPB_AUXN
BG44
DDPC_AUXN
BE44
DDPD_AUXN
BC46
DDPB_AUXP
BJ44
DDPC_AUXP
BD44
DDPD_AUXP
BD46
DDPB_HPD
AU38
DDPC_HPD
AV40
DDPD_HPD
AT38
SDVO_TVCLKINP
BG46
SDVO_TVCLKINN
BJ46
SDVO_STALLP
BG48
SDVO_STALLN
BJ48
SDVO_INTP
BH45
SDVO_INTN
BF45
L
V
D
S
D
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g
i
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a
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I
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t
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C
R
T
4 OF 10 U2001D
IBEXPEAK-M-GP-NF
L
V
D
S
D
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g
i
t
a
l

D
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s
p
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I
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t
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f
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C
R
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4 OF 10 U2001D
IBEXPEAK-M-GP-NF
1 2
R2001 1KR2J-1-GP R2001 1KR2J-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_FB_R
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_TRDY#
PCI_STOP#
PCI_GNT0#
PCI_PLOCK#
PCI_PLTRST#
PCI_REQ0#
PCI_REQ1#
PCI_GNT3#
PCI_REQ3#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
PCH_PME#
USB_OC#2_3
SMC_WAKE_SCI#_R
USB_OC#0_1
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
USB_OC#6_7
USB_RBIAS_PN
PCI_GNT1#
PCI_GNT3#
NV_ALE
NV_CLE
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_REQ0#
PCI_GNT2#
NV_RCOMP
USB_OC#4_5
PCIRST#
PCI_REQ3#
PCI_REQ2#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
INT_PIRQE#
INT_PIRQG#
PCI_PLTRST#
PCLK_KBC_R
INT_PIRQE#
INT_PIRQH#
INT_PIRQF#
PCI_REQ1#
PCI_STOP# INT_PIRQC#
PCI_DEVSEL#
PCI_REQ2#
INT_PIRQB#
INT_PIRQD#
PCI_PLOCK#
INT_PIRQA#
PCI_TRDY#
PCI_FRAME#
PCLK_FWH_R
SMC_WAKE_SCI#_R
USB_OC#10_11
USB_OC#6_7 USB_OC#8_9
USB_OC#2_3
USB_OC#12_13 USB_OC#4_5
USB_OC#0_1
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CLK_PCI_FB 23
USB_OC#2_3 63
USB_OC#0_1 63
PLT_RST# 9,37,70,76
USB_PN2 63
USB_PP2 63
USB_PN10 32
USB_PP10 32
USB_PN11 54
USB_PP11 54
PCLK_KBC 37
USB_PN5 76
USB_PP5 76
USB_PN9 73
USB_PP9 73
USB_PP3 63
USB_PN3 63
PCLK_FWH 70
USB_PN0 76
USB_PP0 76
Title
Date: Sheet of
Wistron Corporation
PCH (PCI/USB/NVRAM)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (PCI/USB/NVRAM)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (PCI/USB/NVRAM)
<Core Design>
0 1
1 1
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS Location PCI_GNT#0
0 1 Reserved
SPI(Default)
PCI
0 0 LPC
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
Danbury Technology:
Disabled when Low.
Enable when High.
10
0
11
USB3
Pair
4
USB
5
2
3
1
Device
X 6
7
8
9
X
BLUETOOTH
USB2
CARD READER
X
CAMERA
X
X
12 X
13 X
WLAN (I/O Board)
USB0 (I/O Board)
SSID = PCH
1 2 R2110 22R2J-2-GP
DY
R2110 22R2J-2-GP
DY
1
TP2100 TP2100
1
2
3
4
5 6
7
8
9
10
RN2104
SRN10KJ-L3-GP
RN2104
SRN10KJ-L3-GP
1
2
3
4
5 6
7
8
9
10
RN2102
SRN8K2J-2-GP-U
RN2102
SRN8K2J-2-GP-U
1 2
R2109
4K7R2J-2-GP
DY
R2109
4K7R2J-2-GP
DY
1 2
R2108 22R2J-2-GP R2108 22R2J-2-GP
1 TP2108 TPAD14-GPTP2108 TPAD14-GP
1
2
3
4
5 6
7
8
9
10
RN2101
SRN8K2J-2-GP-U
RN2101
SRN8K2J-2-GP-U
AD0
H40
AD1
N34
AD2
C44
AD20
C42
AD21
K46
AD22
M51
AD23
J52
AD24
K51
AD25
L34
AD26
F42
AD27
J40
AD28
G46
AD29
F44
AD3
A38
AD30
M47
AD31
H36
AD4
C36
AD5
J34
AD6
A40
AD7
D45
AD8
E36
AD9
H48
C/BE0#
J50
C/BE1#
G42
C/BE2#
H47
C/BE3#
G34
PCIRST#
K6
PERR#
E50
PIRQA#
G38
PIRQB#
H51
PIRQC#
B37
PIRQD#
A44
PLOCK#
D49
PLTRST#
D5
PME#
M7
REQ0#
F51
REQ1#/GPIO50
A46
REQ2#/GPIO52
B45
REQ3#/GPIO54
M53
SERR#
E44
STOP#
D41
TRDY#
C48
NV_ALE
BD3
NV_CE#0
AY9
NV_CE#1
BD1
NV_CE#2
AP15
NV_CE#3
BD8
NV_CLE
AY6
NV_DQS0
AV9
NV_DQS1
BG8
NV_DQ0/NV_IO0
AP7
NV_DQ1/NV_IO1
AP6
NV_DQ10/NV_IO10
BD6
NV_DQ11/NV_IO11
BB7
NV_DQ12/NV_IO12
BC8
NV_DQ13/NV_IO13
BJ8
NV_DQ14/NV_IO14
BJ6
NV_DQ15/NV_IO15
BG6
NV_DQ2/NV_IO2
AT6
NV_DQ3/NV_IO3
AT9
NV_DQ4/NV_IO4
BB1
NV_DQ5/NV_IO5
AV6
NV_DQ6/NV_IO6
BB3
NV_DQ7/NV_IO7
BA4
NV_DQ8/NV_IO8
BE4
NV_DQ9/NV_IO9
BB6
NV_RB#
AV7
NV_RCOMP
AU2
NV_WR#0_RE#
AY8
NV_WR#1_RE#
AY5
NV_WE#_CK0
AV11
NV_WE#_CK1
BF5
USBP0N
H18
USBP0P
J18
USBP10N
A22
USBP10P
C22
USBP11N
G24
USBP11P
H24
USBP12N
L24
USBP12P
M24
USBP13N
A24
USBP13P
C24
USBP1N
A18
USBP1P
C18
USBP2N
N20
USBP2P
P20
USBP3N
J20
USBP3P
L20
USBP4N
F20
USBP4P
G20
USBP5N
A20
USBP5P
C20
USBP6N
M22
USBP7N
B21
USBP7P
D21
USBP8N
H22
USBP8P
J22
USBP9N
E22
USBP9P
F22
USBRBIAS#
B25
USBRBIAS
D25
USBP6P
N22
AD10
E40
AD11
C40
AD12
M48
AD13
M45
AD14
F53
AD15
M40
AD16
M43
AD17
J36
AD18
K48
AD19
F40
DEVSEL#
F46
FRAME#
C46
GNT0#
F48
GNT1#/GPIO51
K45
GNT2#/GPIO53
F36
GNT3#/GPIO55
H53
PIRQE#/GPIO2
B41
PIRQF#/GPIO3
K53
PIRQG#/GPIO4
A36
PIRQH#/GPIO5
A48
IRDY#
A42
PAR
H44
OC0#/GPIO59
N16
OC1#/GPIO40
J16
OC2#/GPIO41
F16
OC3#/GPIO42
L16
OC4#/GPIO43
E14
OC5#/GPIO9
G16
OC6#/GPIO10
F12
OC7#/GPIO14
T15
CLKOUT_PCI0
N52
CLKOUT_PCI1
P53
CLKOUT_PCI2
P46
CLKOUT_PCI3
P51
CLKOUT_PCI4
P48
P
C
I
N
V
R
A
M
U
S
B
5 OF 10 U2001E
IBEXPEAK-M-GP-NF
P
C
I
N
V
R
A
M
U
S
B
5 OF 10 U2001E
IBEXPEAK-M-GP-NF
1
TP2102 TP2102
1
2
3
4 5
6
7
8
RN2103
SRN10KJ-7GP
RN2103
SRN10KJ-7GP
B
1
A
2
GND
3
Y
4
VCC
5
U2101
74LVC1G08GW-1-GP
DY
U2101
74LVC1G08GW-1-GP
DY
1 2
R2104 0R0402-PAD R2104 0R0402-PAD
1 2
R2111 22R2J-2-GP R2111 22R2J-2-GP
1 2
R2106
22D6R2F-L1-GP
R2106
22D6R2F-L1-GP
1
2
C2101
SC220P50V2KX-3GP
DY
C2101
SC220P50V2KX-3GP
DY
1
TP2101 TP2101
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_SLP_S3#_R
PM_PWRBTN#_R
PM_RSMRST#_R
SIO_SLP_M#_R
PM_RI#
DMI_IRCOMP_R
PM_SLP_DSW#
PCH_SLP_S5#
PM_SLP_LAN#
PM_CLKRUN#
PM_BATLOW#_R
LAN_RST#1
PCIE_WAKE#
PM_RI#
PM_DRAM_PWRGD
H_PM_SYNC
PM_PWRGD
SUS_PWR_ACK
PM_CLKRUN#
PM_SLP_S4#_R
PCH_RSMRST#
SUS_PWR_ACK
PM_SUS_STAT#
AC_PRESENT
PCH_SUSCLK
PM_BATLOW#_R
AC_PRESENT_EC
+3.3V_RUN
+3.3V_ALW
+1.05V_VTT
+3.3V_RUN
DMI_CTX_PRXP0 8
DMI_CTX_PRXP1 8
DMI_CTX_PRXP2 8
DMI_CTX_PRXP3 8
PM_PWRBTN# 37
PCH_RSMRST# 37 PM_SLP_S4# 37,50
PM_SLP_S3# 37,42,50,51
DMI_PTX_CRXN0 8
DMI_PTX_CRXN1 8
DMI_PTX_CRXN2 8
DMI_PTX_CRXN3 8
DMI_PTX_CRXP0 8
DMI_PTX_CRXP1 8
DMI_PTX_CRXP2 8
DMI_PTX_CRXP3 8
XDP_DBRESET# 9
PM_PWROK 37
PM_DRAM_PWRGD 9
H_PM_SYNC 9
DMI_CTX_PRXN0 8
DMI_CTX_PRXN1 8
DMI_CTX_PRXN2 8
DMI_CTX_PRXN3 8
PM_CLKRUN# 37
PM_PWRBTN#_R 9
PCIE_WAKE# 76
AC_PRESENT_EC 37
SUS_PWR_DN_ACK 37
PCH_SUSCLK_KBC 37
PCH_SUSCLK_2102 39
FDI_TXN0 8
FDI_TXN1 8
FDI_TXN3 8
FDI_TXN4 8
FDI_TXN5 8
FDI_TXN6 8
FDI_TXN7 8
FDI_TXN2 8
FDI_TXP0 8
FDI_TXP1 8
FDI_TXP3 8
FDI_TXP4 8
FDI_TXP5 8
FDI_TXP6 8
FDI_TXP7 8
FDI_TXP2 8
FDI_INT 8
FDI_FSYNC0 8
FDI_FSYNC1 8
FDI_LSYNC0 8
FDI_LSYNC1 8
Title
Date: Sheet of
Wistron Corporation
PCH (DM I/FDI/PM)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (DM I/FDI/PM)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (DM I/FDI/PM)
<Core Design> Option to " Disable " clkrun.
Pulling it down will keep the clks running.
SSID = PCH
1
1
1 2
R2214
10KR2J-3-GP
R2214
10KR2J-3-GP
1 2
R2204
49D9R2F-GP
R2204
49D9R2F-GP
1
TP2202
TPAD14-GP
TP2202
TPAD14-GP
1 2 R2220 10R2J-2-GP R2220 10R2J-2-GP
1
1 2 R2211 0R0402-PAD R2211 0R0402-PAD
1 2
R2203
10KR2J-3-GP
R2203
10KR2J-3-GP
1 2 R2212 0R0402-PAD R2212 0R0402-PAD
1 2 R2208 10KR2J-3-GP R2208 10KR2J-3-GP
1 2
R2213 0R0402-PAD R2213 0R0402-PAD
1 2 R2202 1KR2J-1-GP R2202 1KR2J-1-GP
1 2 R2219 0R2J-2-GP R2219 0R2J-2-GP
DMI0RXN
BC24
DMI1RXN
BJ22
DMI2RXN
AW20
DMI3RXN
BJ20
DMI0RXP
BD24
DMI1RXP
BG22
DMI2RXP
BA20
DMI3RXP
BG20
DMI0TXN
BE22
DMI1TXN
BF21
DMI2TXN
BD20
DMI3TXN
BE18
DMI0TXP
BD22
DMI1TXP
BH21
DMI2TXP
BC20
DMI3TXP
BD18
DMI_ZCOMP
BH25
DMI_IRCOMP
BF25
FDI_RXN0
BA18
FDI_RXN1
BH17
FDI_RXN2
BD16
FDI_RXN3
BJ16
FDI_RXN4
BA16
FDI_RXN5
BE14
FDI_RXN6
BA14
FDI_RXN7
BC12
FDI_RXP0
BB18
FDI_RXP1
BF17
FDI_RXP2
BC16
FDI_RXP3
BG16
FDI_RXP4
AW16
FDI_RXP5
BD14
FDI_RXP6
BB14
FDI_RXP7
BD12
FDI_FSYNC0
BF13
FDI_FSYNC1
BH13
FDI_LSYNC0
BJ12
FDI_LSYNC1
BG14
FDI_INT
BJ14
PMSYNCH
BJ10
TP23
N2
SLP_M#
K8
SLP_S3#
P12
SLP_S4#
H7
SLP_S5#/GPIO63
E4
SYS_RESET#
T6
SYS_PWROK
M6
PWRBTN#
P5
RI#
F14
WAKE#
J12
SUS_STAT#/GPIO61
P8
SUSCLK/GPIO62
F3
ACPRESENT/GPIO31
P7
LAN_RST#
A10
MEPWROK
K5
BATLOW#/GPIO72
A6
PWROK
B17
CLKRUN#/GPIO32
Y1
SUS_PWR_DN_ACK/GPIO30
M1
RSMRST#
C16
DRAMPWROK
D9
SLP_LAN#/GPIO29
F6
D
M
I
F
D
I
S
y
s
t
e
m

P
o
w
e
r

M
a
n
a
g
e
m
e
n
t
3 OF 10 U2001C
IBEXPEAK-M-GP-NF
D
M
I
F
D
I
S
y
s
t
e
m

P
o
w
e
r

M
a
n
a
g
e
m
e
n
t
3 OF 10 U2001C
IBEXPEAK-M-GP-NF
1
2
R2215
10KR2J-3-GP
DY
R2215
10KR2J-3-GP
DY
1 2 R2210 0R0402-PAD R2210 0R0402-PAD
1
1
2
3
4 5
6
7
8
RN2201
SRN10KJ-6-GP
RN2201
SRN10KJ-6-GP
1 2 R2218 0R0402-PAD R2218 0R0402-PAD
1
2
R2205
10KR2J-3-GP
R2205
10KR2J-3-GP
1 2 R2209 10KR2J-3-GP R2209 10KR2J-3-GP
1 2 R2216 0R0402-PAD R2216 0R0402-PAD
1 2 R2207 0R0402-PAD R2207 0R0402-PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_SMB_DATA
PCH_SMB_CLK
TPM_ID1
PCH_GPIO11
LPD_SPI_INTR#
KBC_SCL1
KBC_SDA1
CLK_EXP_N
CLK_EXP_P
PEG_CLKREQ#
CLK_PCH_14M
CLK_PCI_FB
XCLK_RCOMP
XTAL25_IN
PCH_SMB_DATA
PCH_SMB_CLK
SML0_CLK
SML0_DATA
CL_CLK
CL_DATA
CL_RST#
CLK_PCH_GPIO64
CLK48_GPIO
CLK_PCIE_SATA
CLK_PCIE_SATA#
DREFCLK
DREFCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLKIN_DMI#
CLKIN_DMI PCIE_CLK_RQ0#
PCIE_CLK_RQ0#
PCH_SMB_CLK
PCH_SMB_DATA
KBC_SDA1
KBC_SCL1
SML0_DATA
SML0_CLK
PCIE_C_TXP3
PCIE_C_TXN3
PCIE_CLK_RQ5#
PCIE_CLK_RQ3#
CLK_PCIE_LAN1#
CLK_PCIE_LAN1
MINI1_CLK_REQ#
PEG_B_CLKRQ#
PEG_B_CLKRQ#
PCIE_CLK_RQ5#
PCIE_CLK_RQ1#
PCIE_CLK_RQ1#
PCIE_CLKRQ4#
PCIE_C_TXP2
PCIE_C_TXN2
PCIE_CLKRQ4#
MINI1_CLK_REQ#
CLK_PCIE_MINI1R#
CLK_PCIE_MINI1R
XTAL25_OUT
+1.05V_VTT
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW +3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
CLK_EXP_N 9
CLK_EXP_P 9
CLK_PCH_14M 7
CLK_PCI_FB 21
SML0_CLK 9
SML0_DATA 9
CLK_PCIE_SATA 7
CLK_PCIE_SATA# 7
DREFCLK 7
DREFCLK# 7
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
CLKIN_DMI 7
CLKIN_DMI# 7
PCIE_RXN3 76
PCIE_RXP3 76
PCIE_TXN3 76
PCIE_TXP3 76
CLK_48M_CARD 32
CLK_PCIE_LAN# 76
CLK_PCIE_LAN 76
KBC_SDA1 37
KBC_SCL1 37
PCIE_RXN2 76
PCIE_RXP2 76
PCIE_TXN2 76
PCIE_TXP2 76
CLK_PCIE_MINI1# 76
CLK_PCIE_MINI1 76
MINI1_CLK_REQ# 76
Title
Date: Sheet of
Wistron Corporation
PCH (PCI-E/SMBUS/CLOCK/CL)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
LAN
WLAN
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN
SSID = PCH
1 2
R2304
10KR2J-3-GP
R2304
10KR2J-3-GP
1
2 3
4
RN2308
SRN10KJ-5-GP
RN2308
SRN10KJ-5-GP
1
1 2
R2309 0R2J-2-GP R2309 0R2J-2-GP
1
1234
5 6 7 8
RN2301
SRN2K2J-2-GP
RN2301
SRN2K2J-2-GP
1 2
R2302
10KR2J-3-GP
R2302
10KR2J-3-GP
1 2
R2303
10KR2J-3-GP
R2303
10KR2J-3-GP
1 2 R2307 33R2J-2-GP R2307 33R2J-2-GP
1 2 C2303 SCD1U10V2KX-5GP C2303 SCD1U10V2KX-5GP
1
2 3
4
RN2303
SRN2K2J-1-GP
RN2303
SRN2K2J-1-GP
1
1
2 3
4
R
N
0R4P2R-PAD
RN2304
R
N
0R4P2R-PAD
RN2304
12
3 4
RN2302
SRN2K2J-1-GP
RN2302
SRN2K2J-1-GP
1 2
R2301
10KR2J-3-GP
R2301
10KR2J-3-GP
1
2 3
4
R
N
0R4P2R-PAD
RN2309
R
N
0R4P2R-PAD
RN2309
1
2
3
4 5
6
7
8
RN2307
SRN10KJ-7GP
RN2307
SRN10KJ-7GP
1
1
2
3 4
5
6
Q2301
DMN66D0LDW-7-GP
Q2301
DMN66D0LDW-7-GP
1
1 2
R2305 10KR2J-3-GP R2305 10KR2J-3-GP
1 2 R2306 90D9R2F-1-GP R2306 90D9R2F-1-GP
PERN1
BG30
PERP1
BJ30
PERN2
AW30
PERP2
BA30
PERN3
AU30
PERP3
AT30
PERN4
BA32
PERP4
BB32
PERN5
BF33
PERP5
BH33
PERN6
BA34
PERP6
AW34
PERN7
AT34
PERP7
AU34
PERN8
BG34
PERP8
BJ34
PETN1
BF29
PETP1
BH29
PETN2
BC30
PETP2
BD30
PETN3
AU32
PETP3
AV32
PETN4
BD32
PETP4
BE32
PETN5
BG32
PETP5
BJ32
PETN6
BC34
PETP6
BD34
PETN7
AU36
PETP7
AV36
PETN8
BG36
PETP8
BJ36
SMBALERT#/GPIO11
B9
SMBCLK
H14
SMBDATA
C8
SML0CLK
C6
SML0DATA
G8
CLKOUT_PCIE0N
AK48
CLKOUT_PCIE0P
AK47
CLKOUT_PCIE1N
AM43
CLKOUT_PCIE1P
AM45
CLKOUT_PCIE2N
AM47
CLKOUT_PCIE2P
AM48
CLKOUT_PCIE3N
AH42
CLKOUT_PCIE3P
AH41
CLKOUT_PCIE4N
AM51
CLKOUT_PCIE4P
AM53
CLKOUT_PCIE5N
AJ50
CLKOUT_PCIE5P
AJ52
SML0ALERT#/GPIO60
J14
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
CLKIN_BCLK_N
AP3
CLKIN_BCLK_P
AP1
CLKIN_DMI_N
AW24
CLKIN_DMI_P
BA24
CLKIN_DOT_96N
F18
CLKIN_DOT_96P
E18
CLKIN_SATA_N/CKSSCD_N
AH13
CLKIN_SATA_P/CKSSCD_P
AH12
XTAL25_IN
AH51
XTAL25_OUT
AH53
REFCLK14IN
P41
CLKIN_PCILOOPBACK
J42
CLKOUT_PEG_A_N
AD43
CLKOUT_PEG_A_P
AD45
PEG_A_CLKRQ#/GPIO47
H1
PCIECLKRQ0#/GPIO73
P9
PCIECLKRQ1#/GPIO18
U4
PCIECLKRQ2#/GPIO20
N4
PCIECLKRQ3#/GPIO25
A8
PCIECLKRQ4#/GPIO26
M9
PCIECLKRQ5#/GPIO44
H6
CLKOUTFLEX0/GPIO64
T45
CLKOUTFLEX1/GPIO65
P43
CLKOUTFLEX2/GPIO66
T42
CLKOUTFLEX3/GPIO67
N50
CLKOUT_DMI_N
AN4
CLKOUT_DMI_P
AN2
PEG_B_CLKRQ#/GPIO56
P13
CLKOUT_PEG_B_P
AK51
CLKOUT_PEG_B_N
AK53
SML1ALERT#/GPIO74
M14
SML1CLK/GPIO58
E10
SML1DATA/GPIO75
G12
XCLK_RCOMP
AF38
CLKOUT_DP_P/CLKOUT_BCLK1_P
AT3
CLKOUT_DP_N/CLKOUT_BCLK1_N
AT1
P
C
I
-
E
*
S
M
B
u
s
C
o
n
t
r
o
l
l
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r
F
r
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m

C
L
K

B
U
F
F
E
R
P
E
G
C
l
o
c
k

F
l
e
x
L
i
n
k
2 OF 10 U2001B
IBEXPEAK-M-GP-NF
P
C
I
-
E
*
S
M
B
u
s
C
o
n
t
r
o
l
l
e
r
F
r
o
m

C
L
K

B
U
F
F
E
R
P
E
G
C
l
o
c
k

F
l
e
x
L
i
n
k
2 OF 10 U2001B
IBEXPEAK-M-GP-NF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX2
SM_INTRUDER#
SRTCRST#
PCH_INTVRMEN
PCH_RTCX1
PCH_RTCRST#
ACZ_SPKR
SATAICOMP
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
ACZ_SPKR
SATA_DET#0_R
SATA_DET#1_R
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
ACZ_BIT_CLK
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDATAOUT_R
PCH_SPI_CLK
SPI_MOSI_R
PCH_SPI_CS0#
PCH_SPI_DI
PCH_SPI_DO
SPI_CLK_R
SPI_CS#0_R
LPC_LAD[0..3]
SATA_TXN1_C
SATA_TXP1_C
SATA_TXN0_C
SATA_TXP0_C
INT_SERIRQ
PCH_RTCX2
PCH_RTCX1
+RTC_CELL
+RTC_CELL
+1.05V_VTT
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
INT_SERIRQ 37
LPC_LFRAME# 37,70
LPC_LAD[0..3] 37,70
PCH_SDOUT_CODEC 30
PCH_SDIN_CODEC 30
PCH_SPI_CS0# 62
PCH_SPI_DI 62
PCH_SPI_DO 62
PCH_SPI_CLK 62
SATA_RXN1_C 59
SATA_RXP1_C 59
SATA_TXN1 59
SATA_TXP1 59
SATA_RXN0_C 59
SATA_RXP0_C 59
SATA_TXN0 59
SATA_TXP0 59 ACZ_SPKR 30
SATA_LED# 66
ME_UNLOCK# 37
PCH_AZ_CODEC_RST# 30
PCH_AZ_CODEC_SYNC 30
PCH_AZ_CODEC_BITCLK 30
Title
Date: Sheet of
Wistron Corporation
PCH (SPI/RTC/LPC/SATA/IHDA)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
Title
Date: Sheet of
Wistron Corporation
<Core Design>
HDD
No Reboot Strap R23
HDA_SPKR
Low = Default
High = No Reboot
NO REBOOT STRAP
ODD
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable internal VRs
SSID = PCH
82.30001.841
RTCX1
B13
RTCX2
D13
INTVRMEN
A14
INTRUDER#
A16
HDA_BCLK
A30
HDA_SYNC
D29
HDA_RST#
C30
HDA_SDIN0
G30
HDA_SDIN1
F30
HDA_SDIN2
E32
HDA_SDO
B29
SATALED#
T3
FWH0/LAD0
D33
FWH1/LAD1
B33
FWH2/LAD2
C32
FWH3/LAD3
A32
LDRQ1#/GPIO23
F34
FWH4/LFRAME#
C34
LDRQ0#
A34
RTCRST#
C14
HDA_SDIN3
F32
HDA_DOCK_EN#/GPIO33
H32
HDA_DOCK_RST#/GPIO13
J30
SRTCRST#
D17
SATA0RXN
AK7
SATA0RXP
AK6
SATA0TXN
AK11
SATA0TXP
AK9
SATA1RXN
AH6
SATA1RXP
AH5
SATA1TXN
AH9
SATA1TXP
AH8
SATA2RXN
AF11
SATA2RXP
AF9
SATA2TXN
AF7
SATA2TXP
AF6
SATA3RXN
AH3
SATA3RXP
AH1
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
AD9
SATA4RXP
AD8
SATA4TXN
AD6
SATA4TXP
AD5
SATA5RXN
AD3
SATA5RXP
AD1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
AF15
SPI_CLK
BA2
SPI_CS0#
AV3
SPI_CS1#
AY3
SPI_MOSI
AY1
SPI_MISO
AV1
SATA0GP/GPIO21
Y9
SATA1GP/GPIO19
V1
JTAG_TCK
M3
JTAG_TMS
K3
JTAG_TDI
K1
JTAG_TDO
J2
TRST#
J4
SERIRQ
AB9
SPKR
P1
SATAICOMPO
AF16
R
T
C
I
H
D
A
S
A
T
A
L
P
C
S
P
I
J
T
A
G
1 OF 10 U2001A
IBEXPEAK-M-GP-NF
R
T
C
I
H
D
A
S
A
T
A
L
P
C
S
P
I
J
T
A
G
1 OF 10 U2001A
IBEXPEAK-M-GP-NF
1
2 3
4
RN2401
SRN20KJ-GP-U
RN2401
SRN20KJ-GP-U
1 2
R2412
37D4R2F-GP
R2412
37D4R2F-GP
1 2
R2410 1KR2J-1-GP
DY
R2410 1KR2J-1-GP
DY
1
2
R2416
10KR2J-3-GP
R2416
10KR2J-3-GP
1 2
R2411 10KR2J-3-GP R2411 10KR2J-3-GP
1 2
R2401
10MR2J-L-GP
R2401
10MR2J-L-GP
1
2
3
4 5
6
7
8
RN2402
SRN33J-7-GP
RN2402
SRN33J-7-GP
1 2
R2404 330KR2F-L-GP R2404 330KR2F-L-GP
2
1
G2401
GAP-OPEN
G2401
GAP-OPEN
1
2
C2401
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C2401
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2 3
4
X2401
X-32D768KHZ-40GPU
X2401
X-32D768KHZ-40GPU
1 2
R2406 1MR2J-1-GP R2406 1MR2J-1-GP
1
2
R2417
10KR2J-3-GP
R2417
10KR2J-3-GP
1
2
C
2
4
0
2
S
C
1
5
P
5
0
V
2
J
N
-
2
-
G
P
C
2
4
0
2
S
C
1
5
P
5
0
V
2
J
N
-
2
-
G
P
1
2
C2404
SC1U10V3KX-3GP
C2404
SC1U10V3KX-3GP
1 2 R2415 15R2J-GP R2415 15R2J-GP
1
2
C2403
SC15P50V2JN-2-GP
C2403
SC15P50V2JN-2-GP
1
2 3
4
RN2403
SRN15J-2-GP
RN2403
SRN15J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_NCTF_1
PCH_NCTF_2
PCH_NCTF_4
PCH_NCTF_3
PCH_THERMTRIP_R
CLK_SATA_OE#
PCH_GPIO28
PCH_GPIO39
PCH_GPIO36
PCH_GPIO37
PCH_TEMP_ALERT#_C
DGPU_HOLD_RST#
STP_PCI#
S_GPIO
S_GPIO
SIO_EXT_SCI#
HOST_ALTERT#1
PCH_GPIO57
HOST_ALTERT#1
DGPU_HOLD_RST#
PCH_GPIO37
PCH_GPIO45
INIT3_3V#
SIO_EXT_WAKE#
SIO_EXT_SMI#
PCH_GPIO17
PCH_GPIO22
PCH_GPIO17
PCH_GPIO22
PCH_GPIO24
PCH_GPIO27
PCH_GPIO57
PCH_GPIO36
PCH_GPIO38
PCH_GPIO48
PCH_GPIO48
SIO_EXT_SMI#
SIO_EXT_SCI#
PCH_GPIO12
PCH_GPIO38
PCH_GPIO45
DDR_RST_GATE
PCH_GPIO6
PCH_GPIO6
SIO_EXT_WAKE#
PCH_GPIO28
DDR_RST_GATE
PCH_TEMP_ALERT#_C
PCH_GPIO39
STP_PCI#
PCH_GPIO12
PCH_GPIO24
+1.05V_VTT
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
SIO_A20GATE 37
H_PWRGD 9,42
SIO_RCIN# 37
BCLK_CPU_N 9
BCLK_CPU_P 9
H_PECI 9
SIO_EXT_SCI# 37
SIO_EXT_WAKE# 37
SIO_EXT_SMI# 37
DDR_RST_GATE 9
PCH_TEMP_ALERT# 37
Title
Date: Sheet of
Wistron Corporation
PCH (GPIO/CPU)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (GPIO/CPU)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (GPIO/CPU)
<Core Design>
Placed Within 2" from PCH
SSID = PCH
1
2 3
4
RN2503
SRN10KJ-5-GP
RN2503
SRN10KJ-5-GP
1
2
R2508
10KR2J-3-GP
R2508
10KR2J-3-GP
1
2
R2525
10KR2J-3-GP
R2525
10KR2J-3-GP
1
2 3
4
RN2506
SRN10KJ-5-GP
RN2506
SRN10KJ-5-GP
1
2 3
4
RN2502
SRN10KJ-5-GP
RN2502
SRN10KJ-5-GP
1
2 3
4
RN2509
SRN10KJ-5-GP
RN2509
SRN10KJ-5-GP
1
2 3
4
RN2504
SRN100KJ-6-GP
RN2504
SRN100KJ-6-GP
1 2
R2519 10KR2J-3-GP R2519 10KR2J-3-GP
1
2
C2502
SC47P50V2JN-3GP
DY
C2502
SC47P50V2JN-3GP
DY
GPIO27
AB12
GPIO28
V13
GPIO24
H10
GPIO57
F8
LAN_PHY_PWR_CTRL/GPIO12
K9
VSS_NCTF_1
A4
VSS_NCTF_2
A49
VSS_NCTF_3
A5
VSS_NCTF_4
A50
VSS_NCTF_5
A52
VSS_NCTF_6
A53
VSS_NCTF_7
B2
VSS_NCTF_8
B4
VSS_NCTF_9
B52
VSS_NCTF_10
B53
VSS_NCTF_11
BE1
VSS_NCTF_12
BE53
VSS_NCTF_13
BF1
VSS_NCTF_14
BF53
VSS_NCTF_15
BH1
VSS_NCTF_16
BH2
VSS_NCTF_17
BH52
VSS_NCTF_18
BH53
VSS_NCTF_19
BJ1
VSS_NCTF_20
BJ2
VSS_NCTF_21
BJ4
VSS_NCTF_22
BJ49
VSS_NCTF_23
BJ5
VSS_NCTF_24
BJ50
VSS_NCTF_25
BJ52
VSS_NCTF_26
BJ53
VSS_NCTF_27
D1
VSS_NCTF_28
D2
VSS_NCTF_29
D53
VSS_NCTF_30
E1
VSS_NCTF_31
E53
TACH2/GPIO6
D37
TACH0/GPIO17
F38
TACH3/GPIO7
J32
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
SATA3GP/GPIO37
AB13
SATA5GP/GPIO49
AA4
SCLOCK/GPIO22
Y7
SLOAD/GPIO38
V3
SDATAOUT0/GPIO39
P3
SDATAOUT1/GPIO48
AB6
A20GATE
U2
PROCPWRGD
BE10
RCIN#
T1
PECI
BG10
THRMTRIP#
BD10
GPIO8
F10
CLKOUT_PCIE6N
AH45
CLKOUT_PCIE6P
AH46
PCIECLKRQ6#/GPIO45
H3
CLKOUT_PCIE7N
AF48
CLKOUT_PCIE7P
AF47
PCIECLKRQ7#/GPIO46
F1
TP5
AY46
TP4
AY45
TP6
AV43
TP7
AV45
BMBUSY#/GPIO0
Y3
TP16
M30
TP17
N30
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
GPIO15
T7
TACH1/GPIO1
C38
TP13
AK42
TP3
BB22
TP1
BA22
TP2
AW22
TP14
M32
TP15
N32
SATA2GP/GPIO36
AB7
NC_5
T39
INIT3_3V#
P6
STP_PCI#/GPIO34
M11
SATACLKREQ#/GPIO35
V6
SATA4GP/GPIO16
AA2
TP24
C10
TP8
AF13
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
AM3
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
AM1
TP19
AA23
TP18
H12
G
P
I
O
M
I
S
C
N
C
T
F
R
S
V
D
C
P
U

6 OF 10 U2001F
IBEXPEAK-M-GP-NF
G
P
I
O
M
I
S
C
N
C
T
F
R
S
V
D
C
P
U

6 OF 10 U2001F
IBEXPEAK-M-GP-NF
1
2 3
4
RN2507
SRN10KJ-5-GP
RN2507
SRN10KJ-5-GP
1
2 3
4
RN2505
SRN56J-4-GP
RN2505
SRN56J-4-GP
1 2
R2514 100KR2J-1-GP
DY
R2514 100KR2J-1-GP
DY
1
2 3
4
RN2501
SRN10KJ-5-GP
RN2501
SRN10KJ-5-GP
1 2
R2513 1KR2J-1-GP R2513 1KR2J-1-GP
1
2
C2501
SC47P50V2JN-3GP
DY
C2501
SC47P50V2JN-3GP
DY
1 2
R2510
10KR2J-3-GP
R2510
10KR2J-3-GP
1
2
R2503
10KR2J-3-GP
R2503
10KR2J-3-GP
1 2
R2524 10KR2J-3-GP R2524 10KR2J-3-GP
1 2
R2515 10KR2J-3-GP R2515 10KR2J-3-GP
1 2
R2518 0R0402-PAD R2518 0R0402-PAD
1 TP2506TPAD14-GP TP2506TPAD14-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCAPLL_EXP
VCCAFDIPLL
VCCAFDI_VRM
VCCAFDI_VRM
PCH_VCCME3_3
+1.8VS_VCCTX_LVDS
+VCCA_DAC_1_2
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+3.3V_RUN
+1.05V_VTT
+1.8V_RUN
+3.3V_RUN
+1.8V_RUN
+1.05V_VTT
+1.05VS_VCC_DMI
+3.3V_RUN
+3.3V_RUN
+5V_RUN +3.3V_CRT_LDO
+1.8V_RUN
+3VS_VCCA_LVD +3.3V_RUN
+3.3V_RUN
+3.3V_CRT_LDO
Title
Date: Sheet of
Wistron Corporation
PCH (POWER1)
26 90 Wednesday, April 21, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (POWER1)
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (POWER1)
<Core Design>
1.524A
3.208A
357mA
85mA
156mA
61mA
357mA
35mA
SSID = PCH
3.3V CRT LDO
Second 74.09091.H3F
2010/04/21
X01
1 2
L2603 HCB1608KF-181-GP
DY
L2603 HCB1608KF-181-GP
DY
1
2
C2602
SC1U6D3V2KX-GP
DY
C2602
SC1U6D3V2KX-GP
DY
1 2
R2606 0R0402-PAD R2606 0R0402-PAD
1
2
C2613
SC1U10V3KX-3GP
C2613
SC1U10V3KX-3GP
1
2
C2620
SC1U6D3V2KX-GP
DY
C2620
SC1U6D3V2KX-GP
DY
1
2
C2601
SC10U6D3V5KX-1GP
C2601
SC10U6D3V5KX-1GP
1
2
C2617
SC10U6D3V5MX-3GP
DY
C2617
SC10U6D3V5MX-3GP
DY
1
2
R2605
0R0402-PAD
R2605
0R0402-PAD
1
2
C2607
SCD1U10V2KX-5GP
C2607
SCD1U10V2KX-5GP
1
2
C2619
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C2619
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C2610 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C2610 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C2618
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C2618
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1 2
R2611
0R0805-PAD-2-GP
R2611
0R0805-PAD-2-GP
1
2
C2614
SCD1U10V2KX-5GP
C2614
SCD1U10V2KX-5GP
1
2
C2611
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
C2611
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
1
2
C2615
SCD1U10V2KX-5GP
C2615
SCD1U10V2KX-5GP
1 2
L2602 HCB1608KF-181-GP L2602 HCB1608KF-181-GP
1
2
C2609
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
C2609
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
1
2
C2603 S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C2603 S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
EN
1
GND
2
VIN
3
VOUT
4
NC#5
5
U2601
RT9198-33PBG-GP
DY
U2601
RT9198-33PBG-GP
DY
1
2
C2612 S
C
1
U
6
D
3
V
2
K
X
-
G
P
C2612 S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C2621
SC1U10V2KX-1GP
DY
C2621
SC1U10V2KX-1GP
DY
1
2
C2608
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
C2608
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
1 2
C2616
SCD1U10V2KX-5GP
DY
C2616
SCD1U10V2KX-5GP
DY
1 2
R2603
0R0603-PAD-1-GP
R2603
0R0603-PAD-1-GP
1
2
C2606S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C2606S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
R2601 0R0402-PAD R2601 0R0402-PAD
1
2
C2622
SCD1U10V2KX-5GP
C2622
SCD1U10V2KX-5GP
1
2
C2605 S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C2605 S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
VCCCORE
AB24
VCCCORE
AB26
VCCCORE
AB28
VCCCORE
AD26
VCCCORE
AD28
VCCCORE
AF26
VCCCORE
AF28
VCCCORE
AF30
VCCCORE
AF31
VCCCORE
AH26
VCCCORE
AH28
VCCCORE
AH30
VCCCORE
AH31
VCCCORE
AJ30
VCCCORE
AJ31
VCCPNAND
AK19
VCCPNAND
AK20
VCCIO
AN23
VCCIO
AN24
VCCIO
AN26
VCCIO
AN28
VCCIO
AN30
VCCIO
AN31
VCCIO
AT26
VCCIO
AT28
VCCIO
AU26
VCCIO
AU28
VCCIO
AV26
VCCIO
AV28
VCCIO
AW26
VCCIO
AW28
VCCIO
BA26
VCCIO
BA28
VCCIO
BB26
VCCIO
BB28
VCCIO
BC26
VCCIO
BC28
VCCIO
BD26
VCCIO
BD28
VCCIO
BE26
VCCIO
BE28
VCCIO
BG26
VCCIO
BG28
VCCIO
BH27
VCCIO
BJ26
VCCIO
BJ28
VCCADAC
AE50
VCCADAC
AE52
VCCTX_LVDS
AP43
VCCTX_LVDS
AP45
VCCALVDS
AH38
VCCVRM
AT24
VCCVRM[1]
AT22
VCCAPLLEXP
BJ24
VCCFDIPLL
BJ18
VCCPNAND
AK13
VCCPNAND
AK15
VCCPNAND
AM12
VCCPNAND
AM13
VCCIO
AK24
VCCTX_LVDS
AT45
VCCTX_LVDS
AT46
VSSA_DAC
AF53
VSSA_LVDS
AH39
VSSA_DAC
AF51
VCCIO
AM23
VCC3_3
AB34
VCC3_3
AB35
VCC3_3
AD35
VCC3_3
AN35
VCCME3_3
AM8
VCCME3_3
AM9
VCCME3_3
AP11
VCCME3_3
AP9
VCCPNAND
AK16
VCCPNAND
AM15
VCCPNAND
AM16
VCCDMI
AT16
VCCDMI
AU16
VCCIO
AN20
VCCIO
AN22
POWER
V
C
C

C
O
R
E
D
M
I
P
C
I

E
*

C
R
T
L
V
D
S
F
D
I
N
A
N
D

/

S
P
I
H
V
C
M
O
S
7 OF 10 U2001G
IBEXPEAK-M-GP-NF
POWER
V
C
C

C
O
R
E
D
M
I
P
C
I

E
*

C
R
T
L
V
D
S
F
D
I
N
A
N
D

/

S
P
I
H
V
C
M
O
S
7 OF 10 U2001G
IBEXPEAK-M-GP-NF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCRTCEXT
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+1.05VALW_INT_VCCSUS
+VCCSST
+1.05VS_VCCA_B_DPL
+5VS_PCH_VCC5REF
+5VALW_PCH_VCC5REFSUS
DCPSUSBYP
VCCSATAPLL
VCCACLK
+1.05VS_VCCA_A_DPL
+1.05V_VTT
+1.8V_RUN
+1.05V_VTT
+1.05V_VTT
+RTC_CELL
+3.3V_ALW
+3.3V_RUN
+1.05V_VTT
+1.05V_VTT
+3.3V_ALW
+5V_RUN
+5V_ALW
+1.05V_VTT
+3.3V_ALW +3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+1.05V_VTT
+1.05V_VTT
+3.3V_RUN
+3.3V_ALW
+1.8V_RUN
+3VS_+1.5VS_HDA_IO
Title
Date: Sheet of
Wistron Corporation
PCH (POWER2)
27 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (POWER2)
27 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (POWER2)
27 90 Friday, April 16, 2010
<Core Design>
1.998A
72mA
73mA
163mA
1mA
2mA
6mA
SSID = PCH
1
2
C2730
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C2730
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C2729
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C2729
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2
C2717
SCD1U10V2KX-5GP
C2717
SCD1U10V2KX-5GP
1
2
C2715
SC1U10V2KX-1GP
C2715
SC1U10V2KX-1GP
1
2
C2705
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C2705
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
2
1
D2701
CH751H-40PT-GP
D2701
CH751H-40PT-GP
1
2
C
2
7
2
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
2
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2
L2703 0R0805-PAD L2703 0R0805-PAD
1
2
C2706
SC1U10V2KX-1GP
DY
C2706
SC1U10V2KX-1GP
DY
1
2
C2728
SC4D7U10V5KX-4GP
C2728
SC4D7U10V5KX-4GP
1
2
C2734
SC10U6D3V5MX-3GP
DY
C2734
SC10U6D3V5MX-3GP
DY
1
2
C
2
7
0
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
0
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2
R2702 100R2F-L1-GP-U R2702 100R2F-L1-GP-U
1
2
C
2
7
2
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
2
6
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2 R2707 0R0402-PAD R2707 0R0402-PAD
2
1
D2702
CH751H-40PT-GP
D2702
CH751H-40PT-GP
1
2
C2711
SC1U6D3V2KX-GP
C2711
SC1U6D3V2KX-GP
1
2
C2733
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C2733
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C2716
SCD1U10V2KX-5GP
C2716
SCD1U10V2KX-5GP
1
2
C2710
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
C2710
S
C
1
U
6
D
3
V
2
K
X
-
G
P
DY
1
2
C2719
SC1U6D3V2KX-GP
C2719
SC1U6D3V2KX-GP
1
2
C2712
SC1U10V2KX-1GP
C2712
SC1U10V2KX-1GP
1 2
L2702 0R0805-PAD L2702 0R0805-PAD
1
2
C2703
SCD1U10V2KX-5GP
C2703
SCD1U10V2KX-5GP
DCPSUSBYP
Y20
VCCME
AD38
VCCME
AD39
VCCME
AD41
VCCME
AF41
VCCME
AF42
VCCSUSHDA
L30
VCCSUS3_3
U23
VCCIO
V23
VCCIO
AD19
VCCIO
AF20
VCCIO
AF19
VCCME
V39
VCCME
V41
VCCME
V42
VCCME
Y39
VCCME
Y41
VCCME
Y42
V5REF
K49
VCC3_3
J38
VCC3_3
L38
VCC3_3
M36
VCC3_3
N36
VCC3_3
P36
VCC3_3
U35
VCCRTC
A12
VCCSUS3_3
A26
VCCSUS3_3
A28
VCCSUS3_3
B27
VCCSUS3_3
C26
VCCSUS3_3
C28
VCCSUS3_3
E26
VCCSUS3_3
E28
VCCSUS3_3
F26
VCCSUS3_3
F28
VCCSUS3_3
G26
VCCSUS3_3
G28
VCCSUS3_3
H26
VCCSUS3_3
H28
VCCSUS3_3
J26
VCCSUS3_3
J28
VCCSUS3_3
L26
VCCSUS3_3
L28
VCCSUS3_3
M26
VCCSUS3_3
M28
VCCSUS3_3
N26
VCCSUS3_3
N28
VCCSUS3_3
P26
VCCSUS3_3
P28
VCCSUS3_3
U24
VCCSUS3_3
U26
VCCSUS3_3
U28
VCCSUS3_3
V28
VCCIO
AD20
VCCIO
AD22
VCCIO
AH19
VCCADPLLA
BB53
VCCADPLLB
BD51
VCCIO
AJ35
V5REF_SUS
F24
VCCIO
AH20
VCCIO
AB19
VCCIO
AB20
VCCIO
AB22
VCCIO
AF22
VCC3_3
AD13
VCCIO
AH22
VCCVRM
AT20
DCPSUS
Y22
VCCIO
AF34
VCCIO
AH34
VCCLAN
AF23
VCCLAN
AF24
VCCADPLLA
BB51
VCCADPLLB
BD53
VCCVRM
AU24
VCCACLK
AP51
VCCACLK
AP53
DCPRTC
V9
VCCIO
AF32
VCCME
AF43
VCCIO
AH35
VCCIO
AH23
DCPSST
V12
VCCSATAPLL
AK1
VCCSATAPLL
AK3
VCCME
AA34
VCCME
Y34
VCCME
Y35
VCCME
AA35
VCC3_3
V15
VCC3_3
V16
VCC3_3
Y16
VCCSUS3_3
P18
VCCSUS3_3
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCIO
V24
VCCIO
V26
VCCIO
Y24
VCCIO
Y26
V_CPU_IO
AT18
V_CPU_IO
AU18
POWER
S
A
T
A
U
S
B
C
l
o
c
k

a
n
d

M
i
s
c
e
l
l
a
n
e
o
u
s
H
D
A
C
P
U
P
C
I
/
G
P
I
O
/
L
P
C
R
T
C
P
C
I
/
G
P
I
O
/
L
P
C
10 OF 10 U2001J
IBEXPEAK-M-GP-NF
POWER
S
A
T
A
U
S
B
C
l
o
c
k

a
n
d

M
i
s
c
e
l
l
a
n
e
o
u
s
H
D
A
C
P
U
P
C
I
/
G
P
I
O
/
L
P
C
R
T
C
P
C
I
/
G
P
I
O
/
L
P
C
10 OF 10 U2001J
IBEXPEAK-M-GP-NF
1
2
C2720
SC1U6D3V2KX-GP
C2720
SC1U6D3V2KX-GP
1
2
C2704
SC10U6D3V5KX-1GP
C2704
SC10U6D3V5KX-1GP
1
2
C2708
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C2708
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C
2
7
2
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
2
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C
2
7
2
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
2
7
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C2725
SC1U6D3V2KX-GP
C2725
SC1U6D3V2KX-GP
1
2
C2714
SC1U6D3V2KX-GP
C2714
SC1U6D3V2KX-GP
1 2
R2701 100R2F-L1-GP-U R2701 100R2F-L1-GP-U
1
2
C2732
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C2732
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C2718
SC1U6D3V2KX-GP
C2718
SC1U6D3V2KX-GP
1
2
C2709
SCD1U10V2KX-5GP
C2709
SCD1U10V2KX-5GP
1
2
C
2
7
1
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
2
7
1
3
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C2735
SC10U6D3V5MX-3GP
DY
C2735
SC10U6D3V5MX-3GP
DY
1
2
C2731
SC1U10V2KX-1GP
C2731
SC1U10V2KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
PCH (VSS)
28 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (VSS)
28 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
PCH (VSS)
28 90 Friday, April 16, 2010
<Core Design>
SSID = PCH
VSS
AA19
VSS
AA20
VSS
AA22
VSS
AA24
VSS
AA26
VSS
AA28
VSS
AA30
VSS
AA31
VSS
AA32
VSS
AB11
VSS
AB15
VSS
AB23
VSS
AB30
VSS
AB31
VSS
AB32
VSS
AB39
VSS
AB43
VSS
AB47
VSS
AB5
VSS
AB8
VSS
AC2
VSS
AC52
VSS
AD11
VSS
AD12
VSS
AD16
VSS
AD23
VSS
AD30
VSS
AD31
VSS
AD32
VSS
AD34
VSS
AD42
VSS
AD46
VSS
AD49
VSS
AD7
VSS
AE2
VSS
AE4
VSS
AF12
VSS
AF35
VSS
AP13
VSS
AF45
VSS
AF46
VSS
AF49
VSS
AF5
VSS
AF8
VSS
AG2
VSS
AG52
VSS
AH11
VSS
AH15
VSS
AH16
VSS
AH24
VSS
AH32
VSS
AH43
VSS
AH47
VSS
AH7
VSS
AJ19
VSS
AJ2
VSS
AJ20
VSS
AJ22
VSS
AJ23
VSS
AJ26
VSS
AJ28
VSS
AJ32
VSS
AJ34
VSS
AT5
VSS
AJ4
VSS
AK12
VSS
AK26
VSS
AK22
VSS
AK23
VSS
AK28
VSS
AK30
VSS
AK31
VSS
AK32
VSS
AK34
VSS
AK35
VSS
AK38
VSS
AK43
VSS
AK46
VSS
AK49
VSS
AK5
VSS
AK8
VSS
AL2
VSS
AL52
VSS
AM11
VSS
AM20
VSS
AM22
VSS
AM24
VSS
AM26
VSS
AM28
VSS
AM30
VSS
AM31
VSS
AM32
VSS
AM34
VSS
AM35
VSS
AM38
VSS
AM39
VSS
AM42
VSS
AU20
VSS
AM46
VSS
AV22
VSS
AM49
VSS
AM7
VSS
BB10
VSS
AN32
VSS
AN50
VSS
AN52
VSS
AP12
VSS
AP42
VSS
AP46
VSS
AP49
VSS
AP5
VSS
AP8
VSS
AR2
VSS
AR52
VSS
AT11
VSS
AT32
VSS
AT36
VSS
AT41
VSS
AT47
VSS
AT7
VSS
AV12
VSS
AV16
VSS
AV20
VSS
AV24
VSS
AV30
VSS
AV34
VSS
AV38
VSS
AV42
VSS
AV46
VSS
AV49
VSS
AV5
VSS
AV8
VSS
AW14
VSS
AW18
VSS
AW2
VSS
BF9
VSS
AW32
VSS
AW36
VSS
AW40
VSS
AW52
VSS
AY11
VSS
AY43
VSS
AY47
VSS
Y13
VSS
AU4
VSS
AN34
VSS
AA50
VSS
AB16
VSS
AV18
VSS
AU22
VSS
AM19
VSS
AM41
VSS
AN19
VSS
AH49
VSS
BA12
VSS
AH48
VSS
BA42
VSS
AD24
VSS
BB44
8 OF 10 U2001H
IBEXPEAK-M-GP-NF
8 OF 10 U2001H
IBEXPEAK-M-GP-NF
VSS
AY7
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B31
VSS
B35
VSS
B39
VSS
B43
VSS
B47
VSS
B7
VSS
BG12
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB24
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB42
VSS
BB49
VSS
BB5
VSS
BC10
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC32
VSS
BC36
VSS
BC40
VSS
BC44
VSS
BC52
VSS
BH9
VSS
BD48
VSS
BD49
VSS
BD5
VSS
BE12
VSS
BE16
VSS
BE20
VSS
BE24
VSS
BE30
VSS
BE34
VSS
BE38
VSS
BE42
VSS
BE46
VSS
BE48
VSS
BE50
VSS
BE6
VSS
BE8
VSS
BF3
VSS
BF49
VSS
BF51
VSS
BG18
VSS
BG24
VSS
BG4
VSS
BG50
VSS
BH11
VSS
BH15
VSS
BH19
VSS
BH23
VSS
BH31
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH47
VSS
BH7
VSS
C12
VSS
C50
VSS
D51
VSS
E12
VSS
E16
VSS
E20
VSS
E24
VSS
E30
VSS
E34
VSS
E38
VSS
E42
VSS
E46
VSS
E48
VSS
K47
VSS
K7
VSS
L14
VSS
L18
VSS
L2
VSS
L22
VSS
L32
VSS
L36
VSS
L40
VSS
L52
VSS
M12
VSS
M16
VSS
M20
VSS
N38
VSS
M34
VSS
M38
VSS
M42
VSS
M46
VSS
M49
VSS
M5
VSS
M8
VSS
N24
VSS
P11
VSS
P22
VSS
P30
VSS
P32
VSS
P34
VSS
P42
VSS
P45
VSS
P47
VSS
R2
VSS
R52
VSS
T12
VSS
T41
VSS
T46
VSS
T49
VSS
T5
VSS
T8
VSS
U30
VSS
U31
VSS
U32
VSS
U34
VSS
P38
VSS
V11
VSS
P16
VSS
V19
VSS
V20
VSS
V22
VSS
V30
VSS
V31
VSS
V32
VSS
V34
VSS
E6
VSS
E8
VSS
F49
VSS
F5
VSS
G10
VSS
G14
VSS
G18
VSS
G2
VSS
G22
VSS
G32
VSS
G36
VSS
G40
VSS
G44
VSS
G52
VSS
V35
VSS
V38
VSS
V43
VSS
V45
VSS
V46
VSS
V47
VSS
V49
VSS
V5
VSS
V7
VSS
V8
VSS
W2
VSS
W52
VSS
Y11
VSS
Y12
VSS
Y15
VSS
Y19
VSS
Y23
VSS
Y28
VSS
Y30
VSS
Y31
VSS
Y32
VSS
Y38
VSS
Y43
VSS
Y46
VSS
Y5
VSS
Y6
VSS
Y8
VSS
P49
VSS
P24
VSS
AD15
VSS
AF39
VSS
H16
VSS
H20
VSS
H30
VSS
H34
VSS
H38
VSS
H42
VSS
T43
VSS
AD51
VSS
AT8
VSS
AD47
VSS
Y47
VSS
AT12
VSS
AM6
VSS
AT13
VSS
AM5
VSS
AK45
VSS
AK39
VSS
AV14
VSS
K11
VSS
K43
VSS
H49
VSS
H5
VSS
J24
9 OF 10 U2001I
IBEXPEAK-M-GP-NF
9 OF 10 U2001I
IBEXPEAK-M-GP-NF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
29 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
29 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
29 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SENSE_B
AUD_SPK_R-
AUD_PC_BEEP
PCH_SDIN_CODEC_C0
AUD_DVDDCORE
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_BITCLK
AUD_HP1_JACK_L
AUD_HP1_JACK_R
PUMP_CAPN
AUD_SENSE_A
AUD_SPK_R+
AUD_SENSE_A
AUD_VREFOUT_B
AUD_EXT_MIC_L
AUD_EXT_MIC_R
PUMP_CAPP
AMP_MUTE#
KBC_BEEP_R
AUD_V_B
AUD_SENSE_B
AUD_VREG
AUD_SPK_L+
SB_SPKR_R
S
B
_
A
Z
_
C
O
D
E
C
_
S
D
O
U
T
1
PCH_SDOUT_CODEC
AUD_VREFFLT
AMP_MUTE#
AUD_SPK_L-
PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_RST#
PCH_SDOUT_CODEC
AUD_CAP2
AUD_VREFOUT_C
AUD_INT_MIC_R_L
+3.3V_RUN
+AVDD
+AVDD
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+PVDD
+AVDD
AUD_AGND
AUD_AGND
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
PCH_AZ_CODEC_SYNC 24
PCH_AZ_CODEC_RST# 24
PCH_SDIN_CODEC 24
PCH_AZ_CODEC_BITCLK 24
PCH_SDOUT_CODEC 24
AUD_HP1_JD# 60
EXT_MIC_JD# 60
INT_MIC_L_R 60
AUD_SPK_L+ 60
AUD_SPK_L- 60
AUD_SPK_R- 60
AUD_SPK_R+ 60
AUD_EXT_MIC_L 60
AUD_EXT_MIC_R 60
AUD_VREFOUT_B 60
AMP_MUTE# 37
ACZ_SPKR 24
KBC_BEEP 37
AUD_HP1_JACK_L2 60
AUD_HP1_JACK_R2 60
Title
Date: Sheet of
Wistron Corporation
Arsenal DJ1 Discrete
X01
Audio Codec 92HD79B1
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
X01
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
X01
Custom
<Core Design>
Close to codec
Close to Pin14
From SB
From EC
84mA
25mA
Close to Pin13
Azalia I/F
EMI
Close to codec
AUD_PC_BEEP
Trace width>15 mils
Close to codec
1 2 R3002
0R0603-PAD-1-GP
R3002
0R0603-PAD-1-GP
1
2
R3015
47R2J-2-GP
DY
R3015
47R2J-2-GP
DY
1 2 R3003
0R0603-PAD-1-GP
R3003
0R0603-PAD-1-GP
1
2
C
3
0
1
6
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
3
0
1
6
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DVDD_CORE
1
DVDD_IO
3
DMIC_CLK/GPIO1
2
DMIC0/GPIO2
4
SPKR_PORT_D_R-
43
SPKR_PORT_D_R+
44
PVDD
45
DMIC1/GPIO0/SPDIF_OUT_1
46
HDA_SDO
5
HDA_BITCLK
6
DVSS
7
HDA_SDI
8
DVDD
9
HDA_SYNC
10
HDA_RST#
11
SPDIF_OUT_0
48
EAPD
47
MONO_OUT
25
AVDD
38
AVSS
26
PVSS
42
AVSS
33
AVDD
27
PVDD
39
SPKR_PORT_D_L-
41
VREG
37
VREFFILT
21
CAP2
22
HP0_PORT_A_L
28
VREFOUT_A_OR_F
23
VREFOUT_C
24
HP0_PORT_A_R
29
CAP-
35
CAP+
36
SENSE_B
14
PORT_E_L
15
HP1_PORT_B_L
31
PORT_E_R
16
PORT_F_L
17
AVSS
30
PORT_F_R
18
PORT_C_L
19
PORT_C_R
20
PC_BEEP
12
HP1_PORT_B_R
32
SPKR_PORT_D_L+
40
SENSE_A
13
V-
34
GND
49
U3001
92HD79B1A5NLGXTAX-GP
U3001
92HD79B1A5NLGXTAX-GP
1 2 R3004
0R0603-PAD-1-GP
R3004
0R0603-PAD-1-GP
1
2
C3007
SC4D7P50V2CN-1GP
DY
C3007
SC4D7P50V2CN-1GP
DY
1
2
C
3
0
0
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
3
0
0
5
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C
3
0
0
1
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
3
0
0
1
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2 33R2J-2-GP R3001 33R2J-2-GP R3001
1
2
C
3
0
0
8
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
3
0
0
8
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1
2
C
3
0
1
7
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
3
0
1
7
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
3
0
0
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
3
0
0
2
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
R3019
2K49R2F-GP
R3019
2K49R2F-GP
1
2
C3022
SC2D2U10V3KX-1GP
C3022
SC2D2U10V3KX-1GP
1
2
R3021
20KR2F-L-GP
R3021
20KR2F-L-GP
1 2 R3007 2K2R2J-2-GP R3007 2K2R2J-2-GP
1 2 R3005 60D4R2F-GP R3005 60D4R2F-GP
1 2
R3022
39K2R2F-L-GP
R3022
39K2R2F-L-GP
1
2
R3008
10KR2J-3-GP
R3008
10KR2J-3-GP
1
2
C
3
0
1
0
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
3
0
1
0
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
3
0
1
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
3
0
1
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
C3012
SCD1U10V2KX-5GP
C3012
SCD1U10V2KX-5GP
1
2
C3003
SC10U6D3V5MX-3GP
C3003
SC10U6D3V5MX-3GP
1 2
R3010
499KR2F-1-GP
R3010
499KR2F-1-GP
1 2 C3011 SC1U10V3KX-3GP C3011 SC1U10V3KX-3GP
1 2 R3014 0R0603-PAD-1-GP R3014 0R0603-PAD-1-GP
1 2
R3009
120KR2F-L-GP
R3009
120KR2F-L-GP
1
2
C
3
0
1
5
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
3
0
1
5
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
R3018
2K49R2F-GP
R3018
2K49R2F-GP
1 2
R3016
20KR2F-L-GP
R3016
20KR2F-L-GP
1 2
C3013
SCD1U10V2KX-5GP
C3013
SCD1U10V2KX-5GP
1
2
C
3
0
0
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
3
0
0
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C3019
SC1000P50V3JN-GP-U
C3019
SC1000P50V3JN-GP-U
1
2
C
3
0
0
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
3
0
0
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 2 R3006 60D4R2F-GP R3006 60D4R2F-GP
1 2 R3017 0R0603-PAD-1-GP R3017 0R0603-PAD-1-GP
1
2
C3020
SCD1U10V2KX-5GP
DY
C3020
SCD1U10V2KX-5GP
DY
1
2
C
3
0
0
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
3
0
0
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 2 R3020 0R0603-PAD-1-GP R3020 0R0603-PAD-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
31 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
31 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
31 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RREF
USB_PN10_1
USB_PP10_1
R2_CLK_48M_CARD
V18
XD_D7
XD_D6/MS_BS
XD_D5/SD_D2/MS_D5
XD_D3/SD_D4/MS_D4
XD_D4/SD_D3/MS_D1
XD_D0/SD_CLK/MS_D2
XD_WP/SD_D6/MS_D6
XD_WE#/SD_CD#
CR_GPIO0
XD_D2/SD_CMD
XD_D1/SD_D5/MS_D0
XD_CD#
XD_RDY/SD_WP/MS_CLK_R
XD_RE#/MS_INS#
XD_CE#/SD_D1
XD_CLE/SD_D0/MS_D7
XD_ALE/SD_D7/MS_D3
USB_PN10_1
USB_PP10_1
+3.3V_RUN +3.3V_PHY
+3.3V_RUN_CARD
CLK_48M_CARD 23
XD_D7 71
XD_D6/MS_BS 71
XD_D5/SD_D2/MS_D5 71
XD_D0/SD_CLK/MS_D2 71
XD_WP/SD_D6/MS_D6 71
XD_D2/SD_CMD 71
XD_WE#/SD_CD# 71
XD_CD# 71
XD_ALE/SD_D7/MS_D3 71
XD_CE#/SD_D1 71
XD_RE#/MS_INS# 71
XD_RDY/SD_WP/MS_CLK 71
XD_CLE/SD_D0/MS_D7 71
USB_PP10 21
USB_PN10 21
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Card Reader-RTS5138
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Card Reader-RTS5138
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Card Reader-RTS5138
Custom
<Core Design>
SSID = SDIO
Place these close RTS5138
300mA
250mA
1
2
C
3
2
0
4
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
C
3
2
0
4
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
1
TP3201 TPAD14-GP TP3201 TPAD14-GP
1 2
R3203
10R2F-L-GP
DY
R3203
10R2F-L-GP
DY
1 2
C3207
SC100P50V2JN-3GP
DY
C3207
SC100P50V2JN-3GP
DY
1 2
R3206
22R2J-2-GP
R3206
22R2J-2-GP
1
2
C
3
2
0
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
3
2
0
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C3203
SCD1U10V2KX-5GP
C3203
SCD1U10V2KX-5GP
1 2
R3201
6K2R2F-GP
R3201
6K2R2F-GP
1
2
C3205
SCD1U10V2KX-5GP
C3205
SCD1U10V2KX-5GP
1 2 R3202
0R0603-PAD-1-GP
R3202
0R0603-PAD-1-GP
1
3 4
2
TR3201
DLW21HN900SQ2LGP-U
TR3201
DLW21HN900SQ2LGP-U
C
L
K
_
I
N
2
4
RREF
1
DM
2
DP
3
3V3_IN
4
CARD_3V3
5
V18
6
X
D
_
C
D
#
7
S
P
1
8
S
P
2
9
S
P
3
1
0
S
P
4
1
1
S
P
5
1
2
SP6
13
SP7
14
SP8
15
SP9
16
GPIO0
17
SP10
18
S
P
1
1
1
9
S
P
1
2
2
0
S
P
1
3
2
1
S
P
1
4
2
2
X
D
_
D
7
2
3
GND
25
U3201
RTS5138-GR-GP
U3201
RTS5138-GR-GP
1 2
C3206
SC10P50V2JN-4GP
DY
C3206
SC10P50V2JN-4GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
33 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
33 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
33 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
34 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
34 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
34 90 Friday, April 16, 2010
<Core Design>
(Blanking)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
35 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
35 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
35 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
36 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
36 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
36 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EC_SPI_CLK
EC_SPI_DO
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
ECSCI#_KBC
EC_SPI_CLK_C
KCOL15
KCOL16
BRIGHTNESS
ECSWI#_KBC
AD_OFF
KROW0
LPC_LAD0
KROW1
KBC_VCORF
KCOL1
KROW2
LPC_LAD1
KCOL2
KROW3
LPC_LAD2
KCOL3
VBAT
LPC_LAD3
KCOL4
KROW4
KROW5
KCOL5
KBC_PWRBTN_EC#
KCOL6
KROW6
AC_IN#_KBC
KROW7
EC_SPI_DI
KCOL7
KCOL8
KBC_XI
EC_SPI_CS#
KCOL17
KCOL0
E51_RxD
PLT_RST1#_1
PLT_RST1#_1
E51_TxD
E51_RxD
ECRST#
KBC_SDA1
ECSWI#_KBC
ECSMI#_KBC
ECSCI#_KBC
PCLK_KBC
P
C
L
K
_
K
B
C
_
R
C
PCB_VER1
PCB_VER0
E51_TxD
KBC_THERMTRIP#
H_THERMTRIP_R#
ECRST#
KBC_SCL1
KBC_SDA1
PCB_VER1
PM_PWROK_R
KBC_THERMTRIP#
KBC_RCID
PCB_VER0
CPUCORE_ON_R
KBC_SCL1
KBC_AGND
KB_DET#
LCD_CBL_DET#
BAT_SCL
BAT_SDA
KCOL0
KBC_THERMTRIP#
BLUETOOTH_EN
S5_ENABLE
KBC_BIOS_ID
IMVP_VR_ON VTT_PWRGD
DISCRETE_ID
EC_SHUTDOWN#
ECSMI#_KBC
IMVP_VR_ON
VTT_PWRGD_R
DG_DJ_DET KBC_ON#
AC_IN#_KBC
KBC_PWRBTN_EC#
KBC_ON_RC#
AC_IN#_KBC
DG_DJ_DET
EC_SHUTDOWN#
DISCRETE_ID KBC_BIOS_ID
ECRST#
AD_IA_R
ECSWI#_KBC
ECSCI#_KBC
ECSMI#_KBC
PSID_EC
KBC_RCID
SIO_RCIN#
SIO_A20GATE
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.05V_VTT
+KBC_PWR
+3.3V_RTC_LDO
+KBC_PWR
+KBC_PWR
+3.3V_RTC_LDO
+KBC_PWR
+3.3V_RTC_LDO
+KBC_PWR
+KBC_PWR
+KBC_PWR +KBC_PWR
+KBC_PWR
EC_SPI_DI 62
SIO_A20GATE 25
BAT_SDA 76
BAT_SCL 76
PM_CLKRUN# 22
AD_IA 76
PM_SLP_S3# 22,42,50,51
LPC_LFRAME# 24,70
KBC_BEEP 30
EC_SPI_CLK 62
SIO_RCIN# 25
LID_CLOSE# 69
INT_SERIRQ 24
KCOL[0..16] 68
KROW[0..7] 68
LPC_LAD[0..3] 24,70
EC_SPI_CS# 62
EC_SPI_DO 62
IMVP_PWRGD 47
TPCLK 68
TPDATA 68
PLT_RST# 9,21,70,76
S5_ENABLE 42
EC_SPI_WP#_R 62
USB_PWR_EN# 63
PURE_HW_SHUTDOWN# 39,42
THERM_SCL 39
THERM_SDA 39
SIO_EXT_SMI# 25
SIO_EXT_SCI# 25
SIO_EXT_WAKE# 25
E51_RxD 76
E51_TxD 76
BAT_IN# 76
PM_SLP_S4# 22,50
AMP_MUTE# 30
PM_PWROK 22
LCD_TST 54
LCD_CBL_DET# 54
KB_DET# 68
PM_PWRBTN# 22
PCH_RSMRST# 22
IMVP_VR_ON 47
PCH_VGA_BLEN 20
PM_LAN_ENABLE 76
3V_5V_POK 46
BLON_OUT 54
PWRLED# 66
AMBER_LED_KBC 66
LCD_TST_EN 54
AC_PRESENT_EC 22
BLUETOOTH_EN 73,76
PSID_DISABLE# 76
PCLK_KBC 21
PSID_EC 76
SUS_PWR_DN_ACK 22
KBC_SDA1 23
KBC_SCL1 23
VTT_PWRGD 9,42,49
PCH_SUSCLK_KBC 22
AC_IN# 76
KBC_PWRBTN# 76
ME_UNLOCK# 24
WHITE_LED_KBC 66
PCH_TEMP_ALERT# 25
WIFI_RF_EN 76
VDDPWRGOOD_KBC 9
Title
Date: Sheet of
Wistron Corporation
KBC Nuvoton NPCE781BA0DX
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A2
<Core Design>
CAP close to VCC-GND pin pair
1
0
0
1
1
1
VER1
MB VERSION
ID
X00
KBC CLK
EMI
X01
X02
A00
SSID = KBC
VER0
0
0
PH for DJ
Internal PL for DG
1
Project option
GPIO05
DG
GPIO24
(DISCRETE_ID) (KBC_BIOS_ID)
(GPIO24) (GPIO5)
GPU table
POP when support RCID function
2010/02/25
(GPIO91)
GPIO91
(DG_DJ_DET)
DJ1 DIS/UMA
DJ2 UMA 1 1 0
0
0
0
(KBC internal pull low) (KBC internal pull low) (KBC internal pull low)
DIS :1 UMA:0
DIS :1 UMA:0
2010/04/21
X01
1 2
R3751
0R2J-2-GP
R3751
0R2J-2-GP
1
2
R
3
7
2
6
1
0
K
R
2
J
-3
-G
P
R
3
7
2
6
1
0
K
R
2
J
-3
-G
P
1
2
C
3
7
0
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
C
3
7
0
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
1
2
C3714
SC470P50V3JN-2GP DY
C3714
SC470P50V3JN-2GP DY
1 2
R3735
10KR2J-3-GP
R3735
10KR2J-3-GP
1
2
R3721
0R0402-PAD
R3721
0R0402-PAD
1
2
R3714
10KR2J-3-GP
R3714
10KR2J-3-GP
1
2
R3722
10KR2J-3-GP
R3722
10KR2J-3-GP
1 2
R3719 10KR2J-3-GP
DY
R3719 10KR2J-3-GP
DY
1
2
C
3
7
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
G
S
D
...
.
.
Q3705
2N7002E-1-GP
...
.
.
Q3705
2N7002E-1-GP
1 TP3709 TP3709
1 2
R3705 10KR2J-3-GP
DY
R3705 10KR2J-3-GP
DY
1
2
R3710
100KR2J-1-GP
R3710
100KR2J-1-GP
1 2
R3716 100KR2J-1-GP R3716 100KR2J-1-GP
G
S
D
. . .
.
.
Q3706
2N7002E-1-GP
DY
. . .
.
.
Q3706
2N7002E-1-GP
DY
1 2
R3754
0R2J-2-GP
DY
R3754
0R2J-2-GP
DY
1
2 3
4
RN3705
SRN10KJ-5-GP
DY
RN3705
SRN10KJ-5-GP
DY
G
N
D
5
G
N
D
1
8
G
N
D
4
5
G
N
D
7
8
G
N
D
8
9
G
N
D
1
1
6
A
G
N
D
1
0
3
VCORF
44
GPIO10/LPCPD#
124
LRESET#
7
LCLK
2
LFRAME#
3
LAD0
126
LAD1
127
LAD2
128
LAD3
1
SERIRQ
125
GPIO11/CLKRUN#
8
KBRST#
122
GA20
121
ECSCI#/GPIO54
29
GPIO65/SMI#
9
GPIO67/PWUREQ#
123
V
D
D
4
V
C
C
1
9
V
C
C
4
6
V
C
C
7
6
V
C
C
8
8
A
V
C
C
1
0
2
G
P
IO
4
1
8
0
GPIO87/SIN_CR
113
GPO83/SOUT_CR/BADDR1
111
GPIO16
114
GPO84/BADDR0
112
GPIO06
93
GPIO53
28
GPIO36
15
GPIO51
26
GPIO47
24
GPIO24
6
GPIO34
14
GPIO45/E_PWM
22
GPIO70
73
GPIO40/F_PWM
16
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/TRST#
23
GPIO50/TDO
25
GPIO52/RDY#
27
GPI90/AD0
97
GPI91/AD1
98
GPI92/AD2
99
GPI93/AD3
100
GPI94
101
GPI95
105
GPI96
106
GPI97
107
VREF
104
GPIO77
84
GPIO76/SHBM
83
GPIO75
82
GPIO66/G_PWM
81
GPIO23
119
GPIO03
95
GPIO05
108
GPIO04
96
GPIO31
120
GPIO07
94
GPIO01/TB2
64
GPIO30
109
V
C
C
1
1
5
GPIO32/D_PWM
65
GPIO33/H_PWM
66
GPIO74/SDA2
68
GPIO73/SCL2
67
GPIO22/SDA1
69
GPIO17/SCL1
70
GPO82/TRIS#
110
GPIO81
91
GPIO71
74
GPIO72
75
LPC
SER/IR
SPI
GPIO
A/D
D/A
SP
SMB
1 OF 2 U3701A
NPCE781BA0DX-GP
LPC
SER/IR
SPI
GPIO
A/D
D/A
SP
SMB
1 OF 2 U3701A
NPCE781BA0DX-GP
1 2
R3732
0R0402-PAD
R3732
0R0402-PAD
1
2
R3750
0R2J-2-GP
DY
R3750
0R2J-2-GP
DY
1
2
3
D3704
BAT54C-U-GP
D3704
BAT54C-U-GP
1
2
3 4
5
6
Q3703
DMN66D0LDW-7-GP
Q3703
DMN66D0LDW-7-GP
1
2
3
D3703
BAS16-1-GP
D3703
BAS16-1-GP
1 2
R3752
0R2J-2-GP
DY
R3752
0R2J-2-GP
DY
1 2
R3739
0R2J-2-GP
DY
R3739
0R2J-2-GP
DY
1 2
R3717 10KR2J-3-GP R3717 10KR2J-3-GP
1 2
R3718 0R0402-PAD R3718 0R0402-PAD
1
2
R3727
100KR2J-1-GP DY
R3727
100KR2J-1-GP DY
1 2
C3711
SCD1U16V2KX-3GP
DY
C3711
SCD1U16V2KX-3GP
DY
1 2
R3706 10KR2J-3-GP R3706 10KR2J-3-GP
1 2
R3730
0R2J-2-GP
DY
R3730
0R2J-2-GP
DY
1 2
R3747 0R5J-5-GP
DY
R3747 0R5J-5-GP
DY
1 2 L3701 0R0603-PAD-1-GP L3701 0R0603-PAD-1-GP
1
2
C
3
7
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3713
SCD1U10V2KX-4GP
C3713
SCD1U10V2KX-4GP
1
2
R3725
10KR2J-3-GP
DY
R3725
10KR2J-3-GP
DY
1
2
R3734
4K7R2J-2-GP
DY
R3734
4K7R2J-2-GP
DY
1 2
R3753
0R2J-2-GP
DY
R3753
0R2J-2-GP
DY
1
2
C3715
SC1U10V3KX-3GP
DY
C3715
SC1U10V3KX-3GP
DY
1
2
R3707
2K2R2J-2-GP
DY
R3707
2K2R2J-2-GP
DY
1 2 R3729 0R0402-PAD R3729 0R0402-PAD
1
2
C
3
7
0
9
S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
C
3
7
0
9
S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
1 2
R3701 0R2J-2-GP
DY
R3701 0R2J-2-GP
DY
1
2
C3718
SC4D7P50V2CN-1GP
DY
C3718
SC4D7P50V2CN-1GP
DY
1
2 3
4
RN3704
SRN100KJ-6-GP
RN3704
SRN100KJ-6-GP
1 2
R3738 10KR2J-3-GP R3738 10KR2J-3-GP
1 2
R3715 0R0402-PAD R3715 0R0402-PAD
1
2
R
3
7
2
3
1
0
K
R
2
J
-3
-G
P
DY
R
3
7
2
3
1
0
K
R
2
J
-3
-G
P
DY
1
2
EC3701
SCD1U10V2KX-5GP
DY
EC3701
SCD1U10V2KX-5GP
DY
32KX1/32KCLKIN
77
32KX2
79
GPIO55/CLKOUT
30
VCC_POR#
85
KBSIN0
54
KBSIN1
55
KBSIN2
56
KBSIN3
57
KBSIN4
58
KBSIN5
59
KBSIN6
60
KBSIN7
61
KBSOUT0/JENK#
53
KBSOUT1/TCK
52
KBSOUT2/TMS
51
KBSOUT3/TDI
50
KBSOUT4/JEN0#
49
KBSOUT5/TDO
48
KBSOUT6/RDY#
47
KBSOUT7
43
KBSOUT8
42
KBSOUT9
41
KBSOUT10
40
KBSOUT11
39
KBSOUT12/GPIO64
38
KBSOUT13/GPIO63
37
KBSOUT14/GPIO62
36
KBSOUT15/GPIO61/XOR_OUT
35
GPIO60/KBSOUT16
34
GPIO57/KBSOUT17
33
GPIO56/TA1
31
GPIO14/TB1
63
GPIO15/A_PWM
32
GPIO13/C_PWM
62
F_SDI
86
F_SDO
87
F_CS0#
90
F_SCK
92
GPIO12/PSDAT3
13
GPIO25/PSCLK3
12
GPIO27/PSDAT2
11
GPIO26/PSCLK2
10
GPIO35/PSDAT1
71
GPIO37/PSCLK1
72
GPIO20/TA2
117
GPIO21/B_PWM
118
KBC
FIU
PS/2
2 OF 2 U3701B
NPCE781BA0DX-GP
KBC
FIU
PS/2
2 OF 2 U3701B
NPCE781BA0DX-GP
1 2
R3741 10KR2J-3-GP R3741 10KR2J-3-GP
1
2
C
3
7
0
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
0
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3712
SC1U10V3KX-3GP
C3712
SC1U10V3KX-3GP
1
2
3
D3702
BAS16-1-GP
D3702
BAS16-1-GP
1
2
R3704
2K2R2J-2-GP
R3704
2K2R2J-2-GP
1
2
C
3
7
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3716
SC4D7P50V2CN-1GP
DY
C3716
SC4D7P50V2CN-1GP
DY
1 2 R3702
0R2J-2-GP
DY
R3702
0R2J-2-GP
DY
1
2
R3740
2K2R2J-2-GP
DY
R3740
2K2R2J-2-GP
DY
1 2
R3736 10KR2J-3-GP R3736 10KR2J-3-GP
1
2
R3709
2K2R2J-2-GP
R3709
2K2R2J-2-GP
3
1
2
Q3702
PMBS3906-GP
Q3702
PMBS3906-GP
1
2
C
3
7
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
GND
1
RESET#
2
VCC
3
U3702
G690L293T73UF-GP
DY
U3702
G690L293T73UF-GP
DY
1
2 3
4
RN3703
SRN4K7J-8-GP
RN3703
SRN4K7J-8-GP
1 2
3
D3705
BAT54C-U-GP
D3705
BAT54C-U-GP 3
1
2
Q3701
PMBS3904-1-GP
Q3701
PMBS3904-1-GP
1
2
C3702
SC2D2U10V3KX-1GP
DY
C3702
SC2D2U10V3KX-1GP
DY
1
2
C
3
7
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
7
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
TP3710 TP3710
1
2
R3731
0R2J-2-GP
DY
R3731
0R2J-2-GP
DY
1 2
R3708
0R0402-PAD
R3708
0R0402-PAD
1
2
C
3
7
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
C
3
7
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
1
2
3
D3701
BAS16-1-GP
D3701
BAS16-1-GP
G
D
S
Q3704
SI2301CDS-T1-GE3-GP
Q3704
SI2301CDS-T1-GE3-GP
1 2
R3748 0R0402-PAD R3748 0R0402-PAD
1 2
R3720 10KR2J-3-GP R3720 10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
38 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
38 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
38 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_32K
EMC2102_SHDN
EMC2102_FAN_mode
V_DEGREE
EMC2102_DN3
EMC2102_FAN_DRIVE
EMC2102_DP3
EMC2102_VDD_3D3
EMC2102_CLK_SEL
EMC2102_FAN_TACH
THERM_POWER_OK#
THERMTRIP#
T
H
E
R
M
_
S
Y
S
_
S
H
D
N
#
EMC2102_DP1
EMC2102_DN1
EMC2102_DP2
CLK_32K CLK_32K CLK_32K_R
EMC2102_DN2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+KBC_PWR
+3.3V_RUN
THERM_SDA 37
THERM_SCL 37
EMC2102_FAN_DRIVE 58
EMC2102_FAN_TACH 58
PCH_SUSCLK_2102 22
RUN_ENABLE 42
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Thermal/Fan Controllor EMC2102
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Custom
<Core Design>
C3907 must be near Q3902
GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected
3.HW T8 sensor
C3908 must be
near EMC2102
Layout notice :
Both DN3 and DP3 routing 10 mil
trace width and 10 mil spacing.
GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale
GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled
TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)
32K suspend clock output
SSID = Thermal
T8 shutdown is set 88 deg-C.
C3906 must be
near EMC2102
Layout notice :
1. Place near CPU
and PCH.
Layout notice :
2.System Sensor
C3911 must be
near EMC2102
1
2
R3915
2K37R2F-GP
R3915
2K37R2F-GP
G
S
D
...
.
.
Q3904
2N7002E-1-GP
...
.
.
Q3904
2N7002E-1-GP
3
1
2
Q3901
PMBS3904-1-GP
Q3901
PMBS3904-1-GP
G
S
D
. . .
.
.
Q3903
2N7002E-1-GP
. . .
.
.
Q3903
2N7002E-1-GP
1
2
C3910
SCD1U10V2KX-5GP
C3910
SCD1U10V2KX-5GP
1
2
C3901
SC10U6D3V5MX-3GP
C3901
SC10U6D3V5MX-3GP
1
2
C3905
SC470P50V3JN-2GP
DY
C3905
SC470P50V3JN-2GP
DY
1
2 3
4
RN3901
SRN4K7J-8-GP
RN3901
SRN4K7J-8-GP
1
2
C3902
SCD1U10V2KX-5GP
C3902
SCD1U10V2KX-5GP
VDD_3V
1
DN1
2
DP1
3
DN2
4
DP2
5
DN3
6
DP3
7
S
H
D
N
_
S
E
L
9
F
A
N
_
M
O
D
E
1
0
T
R
I
P
_
S
E
T
1
1
S
Y
S
_
S
H
D
N
#
1
2
T
H
E
R
M
T
R
I
P
#
1
3
P
O
W
E
R
_
O
K
#
1
4
N
C
#
8
8
NC#15
15
RESET#
16
CLK_SEL
17
CLK_IN
18
ALERT#
19
GND
20
NC#21
21
S
M
D
A
T
A
2
2
S
M
C
L
K
2
3
V
D
D
_
5
V
b
2
4
F
A
N
b
2
5
F
A
N
a
2
6
V
D
D
_
5
V
a
2
7
T
A
C
H
2
8
G
N
D
2
9
EMC2102
U3901
EMC2102-DZK-GP
EMC2102
U3901
EMC2102-DZK-GP
1 2
R3905
49D9R2F-GP
R3905
49D9R2F-GP
1
2
C3908
SC470P50V3JN-2GP
C3908
SC470P50V3JN-2GP
1
2
R3914
10KR2F-2-GP
R3914
10KR2F-2-GP
C3907
SC470P50V3JN-2GP
DY
C3907
SC470P50V3JN-2GP
DY
3
1
2
Q3902
PMBS3904-1-GP
Q3902
PMBS3904-1-GP
1 2
R3916
10R2J-2-GP
R3916
10R2J-2-GP
1
2
C3909
SCD1U10V2KX-5GP
C3909
SCD1U10V2KX-5GP
1
2
C3911
SC470P50V3JN-2GP
DY
C3911
SC470P50V3JN-2GP
DY
1
2
R3901
10KR2J-3-GP
R3901
10KR2J-3-GP
1
2
C3912
SC4D7P50V2CN-1GP
DY
C3912
SC4D7P50V2CN-1GP
DY
3
1
2
Q3905
PMBS3904-1-GP
Q3905
PMBS3904-1-GP
1 2
R3906
0R0402-PAD
R3906
0R0402-PAD
1 2
R3909
10KR2J-3-GP
DY
R3909
10KR2J-3-GP
DY
1
2
C3906
SC470P50V3JN-2GP
C3906
SC470P50V3JN-2GP
1
2
C3903
SCD1U10V2KX-5GP
C3903
SCD1U10V2KX-5GP
1 2
R3913
0R0402-PAD
R3913
0R0402-PAD
1
2
C3904
SC470P50V3JN-2GP
C3904
SC470P50V3JN-2GP
1 2
R3910
10KR2J-3-GP
DY
R3910
10KR2J-3-GP
DY
1
2 3
4
RN3902
SRN10KJ-5-GP
RN3902
SRN10KJ-5-GP
1
2
R3912
10KR2J-3-GP
R3912
10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
40 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
40 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
40 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
41 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
41 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
41 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PWRGD_R
5V_RUN_ENABLE
3.3V_RUN_ENABLE
RUN_ON_5V#
RUN_ENABLE
1.5V_RUN_ENABLE
Q
4
2
0
3
_
D
Q
5
0
0
4
_
D
RUN_ON_5V#
RUN_ON_5V#
RUN_ON_5V#
+15V_ALW
+5V_ALW +5V_RUN
+3.3V_ALW +3.3V_RUN
+3.3V_RTC_LDO
+1.5V_RUN +1.5V_SUS
+1.5V_RUN
+0.75V_DDR_VTT
S5_ENABLE 37
H_PWRGD 9,25
3V_5V_EN 46
RUN_ENABLE 39
PM_SLP_S3# 22,37,50,51
VTT_PWRGD 9,37,49 0D75V_EN 50
Title
Date: Sheet of
Wistron Corporation
Power Plane Enable
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Plane Enable
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Plane Enable
A2
<Core Design>
Run Power
SSID = Reset.Suspend
G
G D
D
S
S
For CPU
Revision 0.7
425302_425302_Calpella_S3PowerReduction_WhitePape
Design current: 4459 mA
Peak current: 6370mA ( HD:1100 ODD:2500 )
11.6A
Rds=14m ohm ==> 0.09V
Design current: 2702mA
Peak current: 3861mA
11.6A
Rds=14m ohm ==> 0.054
Total= 4A
C
B
E
Q4201
CHT2222APT-GP
DY Q4201
CHT2222APT-GP
DY
1
2
3
D4201
BAS16-1-GP
D4201
BAS16-1-GP
1
2
C4201
SCD1U10V2KX-4GP
DY
C4201
SCD1U10V2KX-4GP
DY
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U4204
AO4468-GP
S
S
S
G D
D
D
D
U4204
AO4468-GP
1 2
R4201
1KR2J-1-GP
DY
R4201
1KR2J-1-GP
DY
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U4201
AO4468-GP
S
S
S
G D
D
D
D
U4201
AO4468-GP
1
2
C4206
SC10U10V5KX-2GP
C4206
SC10U10V5KX-2GP
1 2
R4204
100KR2J-1-GP
R4204
100KR2J-1-GP
1
2
C4207
SC10U6D3V5KX-1GP
C4207
SC10U6D3V5KX-1GP
123
4 5 6
Q4202
DMN66D0LDW-7-GP
Q4202
DMN66D0LDW-7-GP
GS
D
.
.
.
. .
Q4208
2N7002E-1-GP
.
.
.
. .
Q4208
2N7002E-1-GP
1
2
R
4
2
0
3
2
0
0
K
R
2
J
-L
1
-G
P
DY R
4
2
0
3
2
0
0
K
R
2
J
-L
1
-G
P
DY
1 2
R4221
10KR2J-3-GP
R4221
10KR2J-3-GP
1
2
R4220
22R2J-2-GP
R4220
22R2J-2-GP
1
2
C4210
SC10U6D3V5KX-1GP
C4210
SC10U6D3V5KX-1GP
GS
D
.
.
.
. .
Q4207
2N7002E-1-GP
.
.
.
. .
Q4207
2N7002E-1-GP
1
2
R4219
221R2F-2-GP
R4219
221R2F-2-GP
1 2
R4202 1KR2J-1-GP R4202 1KR2J-1-GP
GS
D
.
.
.
. .
Q4209
2N7002E-1-GP
.
.
.
. .
Q4209
2N7002E-1-GP
1 2
R4210
10KR2J-3-GP
R4210
10KR2J-3-GP
1 2
R4207
10KR2J-3-GP
R4207
10KR2J-3-GP
1
2
C4205
SCD01U50V2KX-1GP
C4205
SCD01U50V2KX-1GP
1 2
R5034
100KR2J-1-GP
R5034
100KR2J-1-GP
1
2
C4202
SC6800P25V2KX-1GP
C4202
SC6800P25V2KX-1GP
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U4203
AO4468-GP
S
S
S
G D
D
D
D
U4203
AO4468-GP
1
2
R4205
100KR2J-1-GP
R4205
100KR2J-1-GP
1
2
C4209
SCD01U50V2KX-1GP
C4209
SCD01U50V2KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
43 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
43 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
43 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
44 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
44 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
44 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
45 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
45 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
45 90 Friday, April 16, 2010
<Core Design>
(Blanking)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
P
D
3
9
0
4
_
1
P
D
3
9
0
3
_
1
51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK
51125_FB2
51125_TONSEL
3
D
3
V
_
A
U
X
_
S
5
_
5
_
5
1
1
2
5
51125_DRVL2
51125_FB1
51125_LL1
51125_VBST2_1 51125_VBST1_1
51125_SKIPSEL
51125_VBST2
3V_5V_POK
51125_DRVH1
51125_ENTIP1
51125_DRVL1
51125_DRVH2
51125_VO1
51125_LL2
51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK
51125_VBST1
51125_VO2
51125_FB1_R
51125_EN
51125_ENTRIP
51125_ENTIP2
51125_FB2_R
51125_VCLK 51125_VCLK
PD3903_2
P
D
3
9
0
3
_
0
4
51125_ENTIP1
51125_ENTIP2
51125_EN
+5V_PWR +15V_ALW
+5V_PWR
51125_VREF
+3.3V_ALW_2
+3.3V_ALW_2
+3D3V_PWR +5V_PWR
51125_VREF
+PWR_SRC
+3D3V_PWR
+3.3V_ALW_2
51125_VREF
+3.3V_ALW_2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+5V_ALW2 +3.3V_ALW
+3.3V_RTC_LDO
+3.3V_ALW_2
+PWR_SRC +PWR_SRC_5V
+PWR_SRC_5V
+PWR_SRC_3D3V
+PWR_SRC_3D3V
3V_5V_POK 37
3V_5V_EN 42
Title
Date: Sheet of
Wistron Corporation
TPS51125_5V/3D3V
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51125_5V/3D3V
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51125_5V/3D3V
A2
<Core Design>
Close to VFB Pin (pin5)
PWM only
VREF(2V)
Operating
Mode
OOA Auto Skip Auto Skip
SKIPSEL GND VREG3 or VREG5
enable both
LDOs, VCLK on
and ready to
turn on
switcher
channels
Open EN0 820k to
GND
Operating
Mode
enable both LDOs,
VCLK off and
ready to turn on
switcher channels
GND
disable all
circuit
Design Current =9.07A
14.25A<OCP<16.84A
Design Current = 8.4A
13.32A<OCP< 15.75A
D
S G
G
D
S
G
D
D
S G
S
PR4622
TPS51125 RT8205B
DY ASM
PR4605
TPS51125 RT8205B
0R3J 4R7
PR4604
TPS51125 RT8205B
0R3J 4R7
DY PR4616
TPS51125 RT8205B
DY
ASM
PR4617 ASM
460kHz
375kHz
CH1 CH2
VREF
TONSEL
300kHz
200kHz
VREG5
VREG3
250kHz
365kHz
TPS51125:
RT8205B:
305kHz
460kHz
375kHz
CH2 CH1
365kHz 460kHz
VREF
GND
TONSEL
245kHz
200kHz
VREG5
VREG3
365kHz
300kHz
265kHz
GND
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMB104T-3R3MS Cyntec 10.8mohm/11.8mohm Isat =16Arms 68.3R310.20C
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
PR4618
PR4619
ASM
ASM
DY
DY
Modify PU4603 to PTS51125
X01
2010/04/16
X01
X01 X01
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
1
2
PR4611
0R2J-2-GP
DY
PR4611
0R2J-2-GP
DY
1
2
PR4612
33KR2F-GP
PR4612
33KR2F-GP
1 2
PG4624
GAP-CLOSE-PWR
PG4624
GAP-CLOSE-PWR
1
2
PC4606
SCD1U25V3KX-GP
PC4606
SCD1U25V3KX-GP
1
2
PC4616
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
PC4616
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
1
2
PC4626
S
C
1
0
U
1
0
V
5
K
X
-2
G
P
PC4626
S
C
1
0
U
1
0
V
5
K
X
-2
G
P
1
2
PC4602
SCD1U25V3KX-GP
PC4602
SCD1U25V3KX-GP
1 2
3
PD4604
BAT54S-5-GP
PD4604
BAT54S-5-GP
1
2
PC4610 S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
PC4610 S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
1
2
PR4609
6K65R2F-GP
PR4609
6K65R2F-GP
1 2
PG4601
GAP-CLOSE-PWR
PG4601
GAP-CLOSE-PWR
1 2
PG4609
GAP-CLOSE-PWR
PG4609
GAP-CLOSE-PWR
1 2
PL4601
IND-3D3UH-147-GP
PL4601
IND-3D3UH-147-GP
1 2
PG4623
GAP-CLOSE-PWR-3-GP
PG4623
GAP-CLOSE-PWR-3-GP
1 2
PG4626
GAP-CLOSE-PWR
PG4626
GAP-CLOSE-PWR
1
2
PTC4603
S
T
1
0
0
U
6
D
3
V
B
M
-5
G
P
DY
PTC4603
S
T
1
0
0
U
6
D
3
V
B
M
-5
G
P
DY
1 2
PG4613
GAP-CLOSE-PWR
PG4613
GAP-CLOSE-PWR
1 2
PR4617
0R2J-2-GP
PR4617
0R2J-2-GP
123
4 5 6
PQ4602
DMN66D0LDW-7-GP
PQ4602
DMN66D0LDW-7-GP
1
2
P
C
4
6
0
3
S
C
1
K
P
5
0
V
2
K
X
-1
G
P
P
C
4
6
0
3
S
C
1
K
P
5
0
V
2
K
X
-1
G
P
1 2 3 4
5678
S S S G
DDDD
PU4605
F
D
S
6
6
9
0
A
S
-G
P
S S S G
DDDD
PU4605
F
D
S
6
6
9
0
A
S
-G
P
1 2
PG4616
GAP-CLOSE-PWR
PG4616
GAP-CLOSE-PWR
1 2
3
PD4603
BAT54S-5-GP
PD4603
BAT54S-5-GP 1 2
PG4607
GAP-CLOSE-PWR
PG4607
GAP-CLOSE-PWR
1 2
PG4625
GAP-CLOSE-PWR
PG4625
GAP-CLOSE-PWR
1 2
PG4630
GAP-CLOSE-PWR
PG4630
GAP-CLOSE-PWR
1 2
PG4617
GAP-CLOSE-PWR
PG4617
GAP-CLOSE-PWR
1 2 PR4619
0R2J-2-GP DY
PR4619
0R2J-2-GP DY
1 2
PG4610
GAP-CLOSE-PWR-3-GP
PG4610
GAP-CLOSE-PWR-3-GP
1 2
PC4617
SCD1U25V3KX-GP
PC4617
SCD1U25V3KX-GP
1
2
PR4603
140KR2B-GP
PR4603
140KR2B-GP
1
2
PR4606
2D2R5F-2-GP
PR4606
2D2R5F-2-GP
1
2
PC4614
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
PC4614
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
1 2
PG4631
GAP-CLOSE-PWR
PG4631
GAP-CLOSE-PWR
1
2
PG4620
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4620
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1
2
PC4620
SC330P50V3GN-GP
PC4620
SC330P50V3GN-GP
1
2
PC4613 S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
PC4613 S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
1 2
PG4605
GAP-CLOSE-PWR
PG4605
GAP-CLOSE-PWR
1
2
P
C
4
6
2
2
S
C
D
2
2
U
1
0
V
2
K
X
-1
G
P
P
C
4
6
2
2
S
C
D
2
2
U
1
0
V
2
K
X
-1
G
P
1 2
PG4621
GAP-CLOSE-PWR
PG4621
GAP-CLOSE-PWR
1
2
PTC4601 S
T
2
2
0
U
6
D
3
V
D
M
-1
5
G
P
PTC4601 S
T
2
2
0
U
6
D
3
V
D
M
-1
5
G
P
1
2
PTC4604 S
T
1
0
0
U
6
D
3
V
B
M
-5
G
P
DY
PTC4604 S
T
1
0
0
U
6
D
3
V
B
M
-5
G
P
DY
1 2
PR4620
0R2J-2-GP
PR4620
0R2J-2-GP
1234
5 6 7 8
SSSG
D D D D
PU4601
FDS8884-GP
SSSG
D D D D
PU4601
FDS8884-GP
1 2
PG4615
GAP-CLOSE-PWR
PG4615
GAP-CLOSE-PWR
1 2 PR4618
0R2J-2-GP
PR4618
0R2J-2-GP
1
2
PG4618 G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4618 G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PG4608
GAP-CLOSE-PWR
PG4608
GAP-CLOSE-PWR
1
2
PC4619
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
PC4619
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
1 2
PG4606
GAP-CLOSE-PWR
PG4606
GAP-CLOSE-PWR
1234
5 6 7 8
SSSG
D D D DPU4604
F
D
S
6
6
9
0
A
S
-G
P
SSSG
D D D DPU4604
F
D
S
6
6
9
0
A
S
-G
P
1
2
PTC4602 S
T
2
2
0
U
6
D
3
V
D
M
-1
5
G
P
PTC4602 S
T
2
2
0
U
6
D
3
V
D
M
-1
5
G
P
1
2
PC4611
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
PC4611
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
1
2
PC4601
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
PC4601
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
1 2
PG4612
GAP-CLOSE-PWR
PG4612
GAP-CLOSE-PWR
1
2
P
C
4
6
0
8
S
C
1
8
P
5
0
V
2
J
N
-1
-G
P
DY
P
C
4
6
0
8
S
C
1
8
P
5
0
V
2
J
N
-1
-G
P
DY
1 2
PG4614
GAP-CLOSE-PWR
PG4614
GAP-CLOSE-PWR
1
2
PC4621
SC680P50V3JN-GP
PC4621
SC680P50V3JN-GP
1 2
PR4608 820KR2F-GP
DY
PR4608 820KR2F-GP
DY
1 2
PC4618
SCD1U25V3KX-GP
PC4618
SCD1U25V3KX-GP
1 2
PG4603
GAP-CLOSE-PWR
PG4603
GAP-CLOSE-PWR
1
2
PC4605
SC18P50V2JN-1-GP
DY PC4605
SC18P50V2JN-1-GP
DY
1
2
PR4615
21K5R2F-GP
PR4615
21K5R2F-GP
1 2
PG4604
GAP-CLOSE-PWR
PG4604
GAP-CLOSE-PWR
1
2
PC4623
SC18P50V2JN-1-GP
DY PC4623
SC18P50V2JN-1-GP
DY
1 2
PG4629
GAP-CLOSE-PWR
PG4629
GAP-CLOSE-PWR
GS
D
.
.
.
. .
PQ4601
2N7002E-1-GP .
.
.
. .
PQ4601
2N7002E-1-GP
1
2
PC4615
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
DY
PC4615
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
DY
1
2
PR4610
0R2J-2-GP
DY
PR4610
0R2J-2-GP
DY
1 2
PG4627
GAP-CLOSE-PWR
PG4627
GAP-CLOSE-PWR
1
2
PR4601
100KR2J-1-GP
PR4601
100KR2J-1-GP
1 2
PG4628
GAP-CLOSE-PWR
PG4628
GAP-CLOSE-PWR
1 2 3 4
5678
S S S G
DDDD
PU4602
FDS8884-GP
S S S G
DDDD
PU4602
FDS8884-GP
1 2
PR4622
820KR3J-GP
DY
PR4622
820KR3J-GP
DY
V
IN
1
6
BOOT2
9
UGATE2
10
PHASE2
11
VOUT2
7
FB2
5
EN
13
ENTRIP2
6
REF
3
TONSEL
4
SKIPSEL
14
V
R
E
G
3
8
V
R
E
G
5
1
7
LG1_CP
18
GND
25
PGND
15
ENTRIP1
1
PGOOD
23
FB1
2
VOUT1
24
PHASE1
20
UGATE1
21
BOOT1
22
LGATE2
12
LGATE1
19
PU4603 PU4603
1 2
PR4605
0R3J-0-U-GP
PR4605
0R3J-0-U-GP
1
2
PR4607
2D2R5F-2-GP
PR4607
2D2R5F-2-GP
1
2
PR4613
10KR2F-2-GP
PR4613
10KR2F-2-GP
1
2
PC4607
SCD1U10V2KX-5GP
PC4607
SCD1U10V2KX-5GP
1
2
PR4614
100KR2J-1-GP
PR4614
100KR2J-1-GP
1
2
PR4602
127KR2F-GP
PR4602
127KR2F-GP
1
2
PC4624
SC18P50V2JN-1-GP DY
PC4624
SC18P50V2JN-1-GP DY
1 2
PR4604
0R3J-0-U-GP
PR4604
0R3J-0-U-GP
1 2
PL4602
IND-2D2UH-157-GP-U
PL4602
IND-2D2UH-157-GP-U
1 2
PG4602
GAP-CLOSE-PWR
PG4602
GAP-CLOSE-PWR
1 2
PG4611
GAP-CLOSE-PWR
PG4611
GAP-CLOSE-PWR
1 2 PR4621
0R2J-2-GP DY
PR4621
0R2J-2-GP DY
1 2
PG4622
GAP-CLOSE-PWR
PG4622
GAP-CLOSE-PWR
1
2
P
C
4
6
2
5 S
C
4
D
7
U
1
0
V
5
K
X
-4
G
P
P
C
4
6
2
5 S
C
4
D
7
U
1
0
V
5
K
X
-4
G
P
1 2
PR4616
0R2J-2-GP DY
PR4616
0R2J-2-GP DY
1
2
PC4609
SC1U25V3KX-1-GP
PC4609
SC1U25V3KX-1-GP
1
2
PC4604
SCD1U25V3KX-GP
PC4604
SCD1U25V3KX-GP
1 2
PG4619
GAP-CLOSE-PWR
PG4619
GAP-CLOSE-PWR
1
2
PC4612 S
C
1
0
U
2
5
V
6
K
X
-1
G
P
DY
PC4612 S
C
1
0
U
2
5
V
6
K
X
-1
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_VID4 H_VID4
H_VID0 H_VID0
H_VID5 H_VID5
H_VID1 H_VID1
H_VID6 H_VID6
H_VID2 H_VID2
PM_DPRSLPVR PM_DPRSLPVR
H_VID3 H_VID3
PSI# PSI#
ISEN1
62882_FB
ISEN2
6
2
8
8
3
_
V
I
N
6
2
8
8
3
_
V
D
D
62882_VW
6
2
8
8
2
_
V
I
D
4
6
2
8
8
2
_
V
I
D
3
6
2
8
8
2
_
V
I
D
2
6
2
8
8
2
_
C
L
K
_
E
N
#
H
_
V
I
D
6
H
_
V
I
D
5
H
_
V
I
D
4
H
_
V
I
D
3
H
_
V
I
D
2
H
_
V
I
D
1
H
_
V
I
D
0
6
2
8
8
2
_
V
I
D
1
LGATE1B
62882_FB_VSEN
6
2
8
8
2
_
V
I
D
0
6
2
8
8
2
_
D
P
R
S
L
P
V
R
6
2
8
8
2
_
V
I
D
6
6
2
8
8
2
_
V
I
D
5
62882_PGOOD
62882_RBIAS
62882_PSI#
6
2
8
8
2
_
R
T
N
6
2
8
8
2
_
V
R
_
O
N
ISEN1
PHASE1
UGATE1
BOOT1
IMVP_IMON
B
O
O
T
1
_
P
H
A
S
E
2
6
2
8
8
2
_
I
S
U
M
-
62882_RTN
VSUM+
V
S
U
M
_
R
R
VSUM-
V
S
U
M
_
R
C
62882_COMP_R
6
2
8
8
2
_
V
S
E
N
62882_NTC_R 62882_NTC
ISEN2
62882_FB2
62882_FB2
BOOT2
UGATE2
62882_COMP
PHASE2
LGATE2
62882_VCCP
LGATE1
V
S
U
M
-
V
S
U
M
-
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+PWR_SRC
+5V_RUN
+1.05V_VTT
+1.05V_VTT
+PWR_SRC
+1.05V_VTT
H_PROCHOT# 9
VR_CLKEN# 7
VCC_SENSE 12
VSS_SENSE 12
LGATE1 48
ISEN2 48
ISEN1 48
UGATE1 48
VSUM+ 48
IMVP_IMON 12
VSUM- 48
PHASE1 48
LGATE2 48
PHASE2 48
UGATE2 48
BOOT2 48
LGATE1B 48
PSI# 12
IMVP_PWRGD 37
IMVP_VR_ON 37
PM_DPRSLPVR 12
H_VID[6..0] 12
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
47 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
47 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
47 90 Monday, April 26, 2010
<Core Design>
Intel support POC (power on current).
NTC 10K close to Choke of Phase1
NTC 470K close to H/S MOSFET of Phase1
0919 SA
2010/04/19
X01
2010/04/19
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
2010/04/23
X01
1
2
PR4740
1
K
R
2
J
-
1
-
G
P
PR4740
1
K
R
2
J
-
1
-
G
P
1
2
P
R
4
7
3
8
0
R
0
4
0
2
-
P
A
D
P
R
4
7
3
8
0
R
0
4
0
2
-
P
A
D
1
2
P
R
4
7
0
6
0
R
0
4
0
2
-
P
A
D
P
R
4
7
0
6
0
R
0
4
0
2
-
P
A
D
1
2
PC4791
S
C
D
0
3
3
U
1
6
V
3
K
X
-
G
P
PC4791
S
C
D
0
3
3
U
1
6
V
3
K
X
-
G
P
1
2
PR4701
1K91R2F-1-GP
PR4701
1K91R2F-1-GP
1 2
PR4774
1R2F-GP
PR4774
1R2F-GP
1
2
PC4709 S
C
1
U
1
0
V
2
K
X
-
1
G
P
PC4709 S
C
1
U
1
0
V
2
K
X
-
1
G
P
1 2
PR4704 0R0402-PAD PR4704 0R0402-PAD
1
2
PC4702
S
C
1
U
1
0
V
2
K
X
-
1
G
P
PC4702
S
C
1
U
1
0
V
2
K
X
-
1
G
P
1 2
PR4794
NTC-470K-1-GP
DY
PR4794
NTC-470K-1-GP
DY
1 2
PR4796 147KR2F-GP PR4796 147KR2F-GP
1
2
P
R
4
7
3
2
0
R
0
4
0
2
-
P
A
D
P
R
4
7
3
2
0
R
0
4
0
2
-
P
A
D
1
2
PR4795
68R2-GP
PR4795
68R2-GP
1
2
PR4737
82D5R2F-1-GP
DY
PR4737
82D5R2F-1-GP
DY
1
2
PR4724
1
K
R
2
J
-
1
-
G
P
DY
PR4724
1
K
R
2
J
-
1
-
G
P
DY
1
2
PR4739
1
K
R
2
J
-
1
-
G
P
DY
PR4739
1
K
R
2
J
-
1
-
G
P
DY
1 2
PC4769
SCD01U50V2KX-1GP
DY
PC4769
SCD01U50V2KX-1GP
DY
1
2
P
R
4
7
2
2
0
R
0
4
0
2
-
P
A
D
P
R
4
7
2
2
0
R
0
4
0
2
-
P
A
D
1
2
PR4776
0R0402-PAD
PR4776
0R0402-PAD
1
2
PR4712
1
K
R
2
J
-
1
-
G
P
DY
PR4712
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4707 0R0402-PAD PR4707 0R0402-PAD
1
2
PR4745
1
K
R
2
J
-
1
-
G
P
PR4745
1
K
R
2
J
-
1
-
G
P
1
2
PR4702
100KR2F-L1-GP DY
PR4702
100KR2F-L1-GP DY
1 2
PR4789
4K02R2F-GP
DY
PR4789
4K02R2F-GP
DY
1
2
PR4709
1
K
R
2
J
-
1
-
G
P
PR4709
1
K
R
2
J
-
1
-
G
P
1
2
PC4778
SCD047U25V3KX-GP
PC4778
SCD047U25V3KX-GP
1 2
PC4765
SC150P50V2JN-3GP
PC4765
SC150P50V2JN-3GP
1
2
PR4731
1
1
K
R
2
F
-
L
-
G
P
PR4731
1
1
K
R
2
F
-
L
-
G
P
1 2 PR4727
1K4R2F-1-GP
PR4727
1K4R2F-1-GP
1
2
P
R
4
7
1
8
0
R
0
4
0
2
-
P
A
D
P
R
4
7
1
8
0
R
0
4
0
2
-
P
A
D
1 2
PR4790
0R0402-PAD
PR4790
0R0402-PAD
PGOOD
1
PSI#
2
RBIAS
3
VR_TT#
4
NTC
5
VW
6
COMP
7
FB
8
FB2
9
ISEN2
10
I
S
E
N
1
1
1
V
S
E
N
1
2
R
T
N
1
3
I
S
U
M
-
1
4
I
S
U
M
+
1
5
V
D
D
1
6
V
I
N
1
7
I
M
O
N
1
8
B
O
O
T
1
1
9
U
G
A
T
E
1
2
0
PHASE1
21
VSSP1
22
LGATE1A
23
LGATE1B
24
VCCP
25
LGATE2
26
VSSP2
27
PHASE2
28
UGATE2
29
BOOT2
30
V
I
D
0
3
1
V
I
D
1
3
2
V
I
D
2
3
3
V
I
D
3
3
4
V
I
D
4
3
5
V
I
D
5
3
6
V
I
D
6
3
7
V
R
_
O
N
3
8
D
P
R
S
L
P
V
R
3
9
C
L
K
_
E
N
#
4
0
GND
41
PU4701
ISL62882CHRTZ-T-GP
74.62882.A73
PU4701
ISL62882CHRTZ-T-GP
74.62882.A73
2
1
PC4749
SCD22U25V3KX-GP 2
1
PC4749
SCD22U25V3KX-GP
1
2
PC4771
SC330P50V2KX-3GP
PC4771
SC330P50V2KX-3GP
1 2
PC4767SC1000P50V3JN-GP-U PC4767SC1000P50V3JN-GP-U
1
2
PR4742
2K61R2F-1-GP
PR4742
2K61R2F-1-GP
1
2
P
R
4
7
1
3
0
R
0
4
0
2
-
P
A
D
P
R
4
7
1
3
0
R
0
4
0
2
-
P
A
D
1
2
PR4756
1
K
R
2
J
-
1
-
G
P
PR4756
1
K
R
2
J
-
1
-
G
P
1
2
PR4710
1
K
R
2
J
-
1
-
G
P
DY
PR4710
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4785
562R2F-GP
PR4785
562R2F-GP
1
2
PR4733
1
K
R
2
J
-
1
-
G
P
DY
PR4733
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4788
0R2J-2-GP
DY
PR4788
0R2J-2-GP
DY
1
2
PC4708
S
C
1
U
1
0
V
2
K
X
-
1
G
P
PC4708
S
C
1
U
1
0
V
2
K
X
-
1
G
P
1 2
PR4714
8K06R2F-GP
PR4714
8K06R2F-GP
1
2
PR4757
1
K
R
2
J
-
1
-
G
P
DY
PR4757
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4703 0R0402-PAD PR4703 0R0402-PAD
1 2
PC4770
SC390P50V2KX-GP
PC4770
SC390P50V2KX-GP
1
2
PC4790
SCD22U16V3KX-1-GP
PC4790
SCD22U16V3KX-1-GP
1
2
PC4772
SC330P50V2KX-3GP
PC4772
SC330P50V2KX-3GP
1
2
P
R
4
7
1
7
1
0
K
R
2
F
-
2
-
G
P
P
R
4
7
1
7
1
0
K
R
2
F
-
2
-
G
P
1
2
P
R
4
7
0
8
0
R
0
4
0
2
-
P
A
D
P
R
4
7
0
8
0
R
0
4
0
2
-
P
A
D
1 2
PC4768
SC10P50V2JN-4GP
PC4768
SC10P50V2JN-4GP
1
2
PR4723
1
K
R
2
J
-
1
-
G
P
PR4723
1
K
R
2
J
-
1
-
G
P
1 2
PR4784 0R0402-PAD PR4784 0R0402-PAD
1
2
P
R
4
7
6
4
0
R
0
4
0
2
-
P
A
D
P
R
4
7
6
4
0
R
0
4
0
2
-
P
A
D
1
2
PR4799
1K91R2F-1-GP
PR4799
1K91R2F-1-GP
1
2
TC4704
S
E
1
0
0
U
2
5
V
M
-
1
1
G
P
DY
TC4704
S
E
1
0
0
U
2
5
V
M
-
1
1
G
P
DY
1
2
PR4734
1
K
R
2
J
-
1
-
G
P
PR4734
1
K
R
2
J
-
1
-
G
P
1
2
PC4710
S
C
D
2
2
U
2
5
V
3
K
X
-
G
P
PC4710
S
C
D
2
2
U
2
5
V
3
K
X
-
G
P
2
1 PC4750 S
C
D
2
2
U
2
5
V
3
K
X
-
G
P
2
1 PC4750 S
C
D
2
2
U
2
5
V
3
K
X
-
G
P
1 2
PR4793412KR2F-GP PR4793412KR2F-GP
1
2
PR4719
1
K
R
2
J
-
1
-
G
P
DY
PR4719
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4711 0R0402-PAD PR4711 0R0402-PAD
1
2
TC4705
S
E
1
0
0
U
2
5
V
M
-
1
1
G
P
DY
TC4705
S
E
1
0
0
U
2
5
V
M
-
1
1
G
P
DY
1
2
P
R
4
7
5
5
0
R
0
4
0
2
-
P
A
D
P
R
4
7
5
5
0
R
0
4
0
2
-
P
A
D
1
2
PR4765
1
K
R
2
J
-
1
-
G
P
PR4765
1
K
R
2
J
-
1
-
G
P
1
2
PC4704
SCD22U25V3KX-GP
PC4704
SCD22U25V3KX-GP
1
2
PR4798
1
K
R
2
J
-
1
-
G
P
DY
PR4798
1
K
R
2
J
-
1
-
G
P
DY
1 2
PR4705
2K8R2F-GP
PR4705
2K8R2F-GP
1
2
PR4762
NTC-10K-27-GP
PR4762
NTC-10K-27-GP
1 2
PC4748
SC22P50V2JN-4GP
PC4748
SC22P50V2JN-4GP
1
2
PC4779
SC1000P50V3JN-GP-U
PC4779
SC1000P50V3JN-GP-U
1 2 PR4773
2D2R3J-2-GP
PR4773
2D2R3J-2-GP
1
2
PR4720
1
K
R
2
J
-
1
-
G
P
PR4720
1
K
R
2
J
-
1
-
G
P
1
2
PR4766
1
K
R
2
J
-
1
-
G
P
DY
PR4766
1
K
R
2
J
-
1
-
G
P
DY
1
2
P
R
4
7
4
4
0
R
0
4
0
2
-
P
A
D
P
R
4
7
4
4
0
R
0
4
0
2
-
P
A
D
1
2
PR4797
1
K
R
2
J
-
1
-
G
P
PR4797
1
K
R
2
J
-
1
-
G
P
1
2
PC4784
SCD01U50V2KX-1GP
DY
PC4784
SCD01U50V2KX-1GP
DY
1
2
PC4786
SCD1U25V3KX-GP
PC4786
SCD1U25V3KX-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PHASE2
B00T2_R
+
V
C
C
_
C
O
R
E
_
P
H
A
S
E
2
P
H
A
S
E
2
_
R
ISEN2
UGATE2
VSUM+
VSUM-
ISEN1
LGATE2
PHASE1
LGATE1
VSUM+
ISEN1
VSUM-
ISEN2
P
H
A
S
E
1
_
R
+
V
C
C
_
C
O
R
E
_
P
H
A
S
E
1
UGATE1
LGATE1B
S
N
U
B
B
E
R
_
1
S
N
U
B
B
E
R
_
2
BOOT2
+PWR_SRC
+VCC_CORE
+VCC_CORE
+PWR_SRC
ISEN2 47
VSUM+ 47
VSUM- 47
ISEN1 47
UGATE2 47
PHASE2 47
BOOT2 47
LGATE2 47
UGATE1 47
PHASE1 47
LGATE1 47
LGATE1B 47
ISEN1 47
VSUM+ 47
VSUM- 47
ISEN2 47
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Berry X01
ISL62883_CPU_CORE
A3
<Core Design>
Design Current = 34A
Imax=48A
57.6A<OCP<67.2A
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.36UH PCMC104T-R36MN1R05J Cyntec 1.05mohm/ 68.R3610.20C
O/P cap: 330U 2V EEFSX0D331XE 6mOhm 3.4Arms Panasonic/79.33719.20L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
1 2
PR4847 10KR2F-2-GP PR4847 10KR2F-2-GP
1
2
P
R
4
8
2
8
2
D
2
R
5
J
-
1
-
G
P
DY
P
R
4
8
2
8
2
D
2
R
5
J
-
1
-
G
P
DY
1
2
PTC4809
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4809
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1
2
P
C
4
8
3
3
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY
P
C
4
8
3
3
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2 3 4
5678
S S G
DDDD
S
PQ4841
SI7686DP-T1-GP
DY
S S G
DDDD
S
PQ4841
SI7686DP-T1-GP
DY
1 2
PR4887 3K65R2F-1-GP PR4887 3K65R2F-1-GP
1
2
PC4816
S
C
D
1
U
5
0
V
3
K
X
-
G
P
PC4816
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1 2
PR4891 3K65R2F-1-GP PR4891 3K65R2F-1-GP
1
2
P
G
4
8
1
2
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
4
8
1
2
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
PC4814
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
PC4814
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
1 2
PR4871 10KR2F-2-GP PR4871 10KR2F-2-GP
1 2
PR4872
2D2R3J-2-GP
PR4872
2D2R3J-2-GP
1
2
PTC4808
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4808
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1 2 3 4
5678
S S S
DDDD
G
PU4805
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
S S S
DDDD
G
PU4805
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
1
2
PTC4807
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4807
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1 2
PC4806
SCD22U25V3KX-GP
PC4806
SCD22U25V3KX-GP
1 2
PL4814
IND-D36UH-30-GP-U
PL4814
IND-D36UH-30-GP-U
1
2
PC4820
S
C
D
1
U
2
5
V
3
K
X
-
G
P
PC4820
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1 2
PR4846 10KR2F-2-GP DY PR4846 10KR2F-2-GP DY
1
2
PC4811
S
C
D
1
U
2
5
V
3
K
X
-
G
P
PC4811
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
P
G
4
8
1
3
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
4
8
1
3
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
PC4817
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
PC4817
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2 3 4
5678
S S S
DDDD
G
PU4807
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
S S S
DDDD
G
PU4807
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
1
2
PC4812
S
C
D
1
U
5
0
V
3
K
X
-
G
P
PC4812
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1 2
PR4870 10KR2F-2-GP DY PR4870 10KR2F-2-GP DY
1
2
PC4856
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
PC4856
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
1
2
PC4818
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
PC4818
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
PC4813
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
PC4813
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2
PL4817
IND-D36UH-30-GP-U
PL4817
IND-D36UH-30-GP-U
1 2 3 4
5678
S S G
DDDD
S
PQ4833
SI7686DP-T1-GP
S S G
DDDD
S
PQ4833
SI7686DP-T1-GP
1 2
PR4892 1R2F-GP PR4892 1R2F-GP
1
2
PTC4805
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4805
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1 2 3 4
5678
S S G
DDDD
S
PQ4840
SI7686DP-T1-GP
S S G
DDDD
S
PQ4840
SI7686DP-T1-GP
1
2
PC4819
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
PC4819
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
1 2 3 4
5678
S S G
DDDD
S
PQ4834
SI7686DP-T1-GP
DY
S S G
DDDD
S
PQ4834
SI7686DP-T1-GP
DY
1 2 3 4
5678
S S S
DDDD
G
PU4806
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
S S S
DDDD
G
PU4806
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
1
2
PTC4810
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4810
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1
2
P
G
4
8
1
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
4
8
1
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
P
G
4
8
1
5
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
4
8
1
5
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2 3 4
5678
S S S
DDDD
G
PU4808
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
S S S
DDDD
G
PU4808
S
I
R
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
1 2
PR4886 1R2F-GP PR4886 1R2F-GP
1
2
P
C
4
8
3
4
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY
P
C
4
8
3
4
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
PTC4806
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
PTC4806
S
T
3
3
0
U
2
V
D
M
-
4
-
G
P
1
2
P
R
4
8
2
9
2
D
2
R
5
J
-
1
-
G
P
DY
P
R
4
8
2
9
2
D
2
R
5
J
-
1
-
G
P
DY
1
2
PC4815
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
PC4815
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+
1
.0
5
V
_
V
T
T
_
V
O
U
T
51218_1.05VTT_CCM
51117B_LL1_VTT
51218_DRVL_VTT
51218_DRVH_VTT
51218_VBST_VTT
1.05V_EN
5
1
2
1
8
_
S
W
_
G
N
D
_
V
T
T
51218_1.05VTT_TRIP
51218_VFB
VTT_PWRGD
H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD H_VTTPWRGD
H_VTTPWRGD_R
H_VTTPWRGD H_VTTPWRGD
51218_DRVL_VTT
51218_SW_VTT 51218_VFB
+1.05V_VTT +1.05VTT_PWR
+1.05VTT_PWR
+5V_ALW
+1.05V_VTT_PWR_SRC
+1.05V_VTT_PWR_SRC +PWR_SRC
+3.3V_ALW
+1.05V_VTT +1.05VTT_PWR
+1.05V_VTT
+3.3V_RUN
RUNPWROK 50,51
H_VTTPWRGD 9
VTT_PWRGD 9,37,42
VTT_SENSE 12
Title
Date: Sheet of
Wistron Corporation
TPS51218_+1.05V_VTT
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51218_+1.05V_VTT
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51218_+1.05V_VTT
A2
<Core Design>
R2
R1
30.79A<OCP<36.39A
Vout=0.704V*(R1+R2)/R2
TPS51218 for +1.05V_VTT
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
Frequency setting
470K -->290KHz
200K -->340KHz
100K -->380KHz
39K -->430KHz
2010/04/21
X01
1 2
PG4911
GAP-CLOSE-PWR
PG4911
GAP-CLOSE-PWR
1
2
C4901
SCD1U10V2KX-4GP
C4901
SCD1U10V2KX-4GP
1 2
PG4915
GAP-CLOSE-PWR
PG4915
GAP-CLOSE-PWR
1 2
PC4906
SCD1U25V3KX-GP
PC4906
SCD1U25V3KX-GP
1
2
3 4
5
6
PQ4901
DMN66D0LDW-7-GP
PQ4901
DMN66D0LDW-7-GP
1
2
PC4912
SCD1U25V3KX-GP
DY
PC4912
SCD1U25V3KX-GP
DY
1
2
P
C
4
9
0
2
S
C
D
1
U
5
0
V
3
K
X
-G
P
P
C
4
9
0
2
S
C
D
1
U
5
0
V
3
K
X
-G
P
1 2
PG4905
GAP-CLOSE-PWR
PG4905
GAP-CLOSE-PWR
1
2
PC4907
SCD022U25V2KX-GP
PC4907
SCD022U25V2KX-GP
1
2
P
R
4
9
0
6
2
0
K
R
2
F
-L
-G
P
P
R
4
9
0
6
2
0
K
R
2
F
-L
-G
P
1
2
P
R
4
9
0
5
1
0
K
R
2
F
-2
-G
P
P
R
4
9
0
5
1
0
K
R
2
F
-2
-G
P
1 2
PG4908
GAP-CLOSE-PWR
PG4908
GAP-CLOSE-PWR
1
2
P
G
4
9
2
1
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
9
2
1
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PG4914
GAP-CLOSE-PWR
PG4914
GAP-CLOSE-PWR
1 2
PG4916
GAP-CLOSE-PWR
PG4916
GAP-CLOSE-PWR
1 2
PG4928
GAP-CLOSE-PWR
PG4928
GAP-CLOSE-PWR
1 2
PG4927
GAP-CLOSE-PWR
PG4927
GAP-CLOSE-PWR
1 2
PG4917
GAP-CLOSE-PWR
PG4917
GAP-CLOSE-PWR
1
2
PR4909
1KR2J-1-GP
PR4909
1KR2J-1-GP
1
2
PR4904
2D2R5J-1-GP DY
PR4904
2D2R5J-1-GP DY
1 2
PG4910
GAP-CLOSE-PWR
PG4910
GAP-CLOSE-PWR
1 2
PR4902 73K2R2F-GP PR4902 73K2R2F-GP
1 2
PG4904
GAP-CLOSE-PWR
PG4904
GAP-CLOSE-PWR
1 2
R4905
1KR2J-1-GP
R4905
1KR2J-1-GP
1 2
PG4907
GAP-CLOSE-PWR
PG4907
GAP-CLOSE-PWR
1 2
PG4918
GAP-CLOSE-PWR
PG4918
GAP-CLOSE-PWR
1 2
PG4912
GAP-CLOSE-PWR
PG4912
GAP-CLOSE-PWR
DRVL
6
V5IN
7
SW
8
DRVH
9
VBST
10
GND
11
PGOOD
1
TRIP
2
EN
3
VFB
4
RF
5
PU4901
TPS51218DSCR-GP-U1
PU4901
TPS51218DSCR-GP-U1
1 2
PG4903
GAP-CLOSE-PWR
PG4903
GAP-CLOSE-PWR
1 2
PG4926
GAP-CLOSE-PWR
PG4926
GAP-CLOSE-PWR
1 2
PG4919
GAP-CLOSE-PWR
PG4919
GAP-CLOSE-PWR
1 2
PG4913
GAP-CLOSE-PWR
PG4913
GAP-CLOSE-PWR
1
2
PR4907
10KR2J-3-GP
PR4907
10KR2J-3-GP
1
2
PTC4901
S
E
3
3
0
U
2
V
D
M
-L
-G
P
PTC4901
S
E
3
3
0
U
2
V
D
M
-L
-G
P
1 2 3 4
5678
S S G
DDDD
S
PU4902
SI7686DP-T1-GP
S S G
DDDD
S
PU4902
SI7686DP-T1-GP
1 2
PR4912
10R2J-2-GP
DY
PR4912
10R2J-2-GP
DY
1 2
PG4902
GAP-CLOSE-PWR
PG4902
GAP-CLOSE-PWR
1 2
PG4920
GAP-CLOSE-PWR
PG4920
GAP-CLOSE-PWR
1 2
PG4925
GAP-CLOSE-PWR
PG4925
GAP-CLOSE-PWR
1 2
PG4901
GAP-CLOSE-PWR
PG4901
GAP-CLOSE-PWR
1
2
P
C
4
9
0
1
S
C
4
D
7
U
6
D
3
V
5
K
X
-3
G
P
P
C
4
9
0
1
S
C
4
D
7
U
6
D
3
V
5
K
X
-3
G
P
1 2
PL4902
COIL-D56UH-2-GP
PL4902
COIL-D56UH-2-GP
1
2
PC4911
S
C
3
3
0
P
5
0
V
2
K
X
-3
G
P
DY
PC4911
S
C
3
3
0
P
5
0
V
2
K
X
-3
G
P
DY
1
2
P
C
4
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
P
C
4
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
1 2
PG4909
GAP-CLOSE-PWR
PG4909
GAP-CLOSE-PWR
1
2
P
C
4
9
0
5
S
C
4
D
7
U
2
5
V
5
K
X
-G
P
P
C
4
9
0
5
S
C
4
D
7
U
2
5
V
5
K
X
-G
P
1
2
PC4908
SC1U10V2KX-1GP
PC4908
SC1U10V2KX-1GP
1 2
PR4901
0R3J-0-U-GP
PR4901
0R3J-0-U-GP
1
2
PR4903
470KR2F-GP
PR4903
470KR2F-GP
1 2
PG4906
GAP-CLOSE-PWR
PG4906
GAP-CLOSE-PWR
1
2
PR4908
100KR2J-1-GP
PR4908
100KR2J-1-GP
1 2 3 4
5678
S S S G
DDDD
PU4903
SIR164DP-T1-GE3-GP
S S S G
DDDD
PU4903
SIR164DP-T1-GE3-GP
1
2
P
C
4
9
0
4
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
P
C
4
9
0
4
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
1
2
PTC4902
S
E
3
3
0
U
2
V
D
M
-L
-G
P
PTC4902
S
E
3
3
0
U
2
V
D
M
-L
-G
P
1
2
P
C
4
9
0
3
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
P
C
4
9
0
3
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPS51116_TON
T
P
S
5
1
1
1
6
_
R
E
F
TPS51116_VBST
51116_VDD
TPS51116_ILIM
TPS51116_PHS_SET
TPS51116_VDDQSNS
TPS51116_UGT
TPS51116_VBST
51116_VDDQSET
TPS51116_LGT
TPS51116_PHS
TPS51116_NC#12
0D75V_EN
TPS51116_UGT
TPS51116_VBST1
TPS51116_PHS
TPS51116_VDDQSNS
TPS51116_LGT
51116_VDDQSET
0D75V_EN_L
1.5V_RUN_CPU_EN#
1.5V_RUN_CPU_EN
+1.5V_SUS
+1.5V_SUS_P
+5116_PWR_SRC
+5116_PWR_SRC
+0D75V_DDR_P +0.75V_DDR_VTT
+PWR_SRC
+0D75V_DDR_P
+0D75V_DDR_P
+3.3V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+1.5V_SUS_P
+5V_ALW
+V_DDR_REF
+1.5V_SUS_P
+5V_ALW
+1.5V_SUS_P
+5116_PWR_SRC
+1.5V_RUN
+5V_ALW
+3.3V_RUN
PM_SLP_S4# 22,37
RUNPWROK 49,51
0D75V_EN 42
0D75V_EN 42
PM_SLP_S3# 22,37,42,51
Title
Date: Sheet of
Wistron Corporation
TPS51116_+1.5V_SUS
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51116_+1.5V_SUS
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
TPS51116_+1.5V_SUS
Custom
<Core Design>
VDDQSET VDDQ (V) VTTREF and VTT NOTE
GND
V5IN
FB Resistors
2.5
Adjustable
1.8
VVDDQSNS/2
VVDDQSNS/2
VVDDQSNS/2
DDR
DDR2
1.5 V < VVDDQ < 3 V
State S3 S5 VDDR VTTREF VTT
S0
S3
S4/S5
Hi Hi
Hi Lo
Lo Lo
On
On
On
On
On
Off Off Off
Off(Hi-Z)
SSID = PWR.Plane.Regulator_1p5v0p75v
RT: ASM
TI: Non_ASM
22.71A<OCP< 26.84A
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5uH PCMC104T-1R5 Cyntec DCR:3.8mohm Isat=33Arms 68.1R510.10J
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 2.7Arms PANASONIC/ 79.22719.20L
Switching freq-->400KHz
x01 change tolerant 20091117
X02-20091224
x01 change tolerant 20091118
S3 Power Reduction
X01
2010/04/16
X01
2010/04/16
Modify PU5002 to PTS51116
X01
2010/04/16
X01
2010/04/16
X01
2010/04/21
1 2 PR5011 620KR2F-GP
DY
PR5011 620KR2F-GP
DY
1
2
PC5024
SCD1U10V2KX-5GP
DY
PC5024
SCD1U10V2KX-5GP
DY
1 2
PG5006
GAP-CLOSE-PWR
PG5006
GAP-CLOSE-PWR
1 2
PG5012
GAP-CLOSE-PWR
PG5012
GAP-CLOSE-PWR
1 2
PG5008
GAP-CLOSE-PWR
PG5008
GAP-CLOSE-PWR
1
2
P
C
5
0
0
7
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
P
C
5
0
0
7
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
1 2
PL5001
COIL-1D5UH-25-GP
PL5001
COIL-1D5UH-25-GP
1
2
PC5002
SC1U10V3KX-3GP
PC5002
SC1U10V3KX-3GP
G
S
D
. . .
.
.
PQ5002
2N7002E-1-GP
84.2N702.D31
DY
. . .
.
.
PQ5002
2N7002E-1-GP
84.2N702.D31
DY
1 2 3 4
5678
S S S
DDDD
G
PU5001
S
IR
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
S S S
DDDD
G
PU5001
S
IR
4
6
0
D
P
-
T
1
-
G
E
3
-
G
P
1 2 PR5019
0R0402-PAD
PR5019
0R0402-PAD
1 2
PG5007
GAP-CLOSE-PWR
PG5007
GAP-CLOSE-PWR
VTT
24
V
T
T
R
E
F
5
FB
9
VTTSNS
2
V
D
D
P
1
5
VLDOIN
23
PHASE
20
UGATE
21
C
S
1
6
S5
11
VTTGND
1
PGOOD
13
VDDQ
8
BOOT
22
LGATE
19
G
N
D
3
MODE
4
PGND
18
DEM
6
S3
10
NC#17
17
V
D
D
1
4
TON
12
NC#7
7
G
N
D
2
5
PU5002 PU5002
1 2 PR5002 0R2J-2-GP PR5002 0R2J-2-GP
1 2
PG5002
GAP-CLOSE-PWR
PG5002
GAP-CLOSE-PWR
1 2
PG5011
GAP-CLOSE-PWR
PG5011
GAP-CLOSE-PWR
1
2
P
T
C
5
0
0
2
S
E
2
2
0
U
2
V
D
M
-
8
G
P
P
T
C
5
0
0
2
S
E
2
2
0
U
2
V
D
M
-
8
G
P
1
2
P
C
5
0
0
4
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
P
C
5
0
0
4
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
P
T
C
5
0
0
1
S
E
2
2
0
U
2
V
D
M
-
8
G
P
DY
P
T
C
5
0
0
1
S
E
2
2
0
U
2
V
D
M
-
8
G
P
DY
1 2
PG5015
GAP-CLOSE-PWR
PG5015
GAP-CLOSE-PWR
1 2
PG5004
GAP-CLOSE-PWR
PG5004
GAP-CLOSE-PWR
1
2
PR5009
30KR2F-GP
PR5009
30KR2F-GP
1
2
P
C
5
0
1
3
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
P
C
5
0
1
3
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1
2
PR5004
20KR2J-L2-GP
PR5004
20KR2J-L2-GP
2
1
PD5001
CH551H-30PT-GP
DY
PD5001
CH551H-30PT-GP
DY
3
1
2
PQ5001
PMBS3904-1-GP
DY
PQ5001
PMBS3904-1-GP
DY
1 2
PG5019
GAP-CLOSE-PWR
PG5019
GAP-CLOSE-PWR
1 2
PG5001
GAP-CLOSE-PWR
PG5001
GAP-CLOSE-PWR
1 2
PG5021
GAP-CLOSE-PWR
PG5021
GAP-CLOSE-PWR
1 2 PR5001 1M1R2J-GP
DY
PR5001 1M1R2J-GP
DY
1
2
PC5015
SC330P50V2KX-3GP
DY
PC5015
SC330P50V2KX-3GP
DY
1
2
PR5016
100KR2J-1-GP
DY
PR5016
100KR2J-1-GP
DY
1 2
PR5014
0R2J-2-GP
DY
PR5014
0R2J-2-GP
DY
1
2
PC5020
SC1U10V3KX-3GP
DY
PC5020
SC1U10V3KX-3GP
DY
1 2
PG5005
GAP-CLOSE-PWR
PG5005
GAP-CLOSE-PWR
1 2
PG5018
GAP-CLOSE-PWR
PG5018
GAP-CLOSE-PWR
1 2
PR5003 0R3J-0-U-GP PR5003 0R3J-0-U-GP
1
2
PC5021
SCD033U16V3KX-GP
PC5021
SCD033U16V3KX-GP
1
2
P
C
5
0
0
9
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
P
C
5
0
0
9
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
1
2
P
C
5
0
1
1
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
P
C
5
0
1
1
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
1 2
PG5009
GAP-CLOSE-PWR
PG5009
GAP-CLOSE-PWR
1
2
PR5010
30KR2F-GP
PR5010
30KR2F-GP
1
2
P
C
5
0
1
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
P
C
5
0
1
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
P
C
5
0
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
P
C
5
0
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
PG5014
GAP-CLOSE-PWR
PG5014
GAP-CLOSE-PWR
1 2
PR5017
4K7R2J-2-GP
DY
PR5017
4K7R2J-2-GP
DY
1
2
P
C
5
0
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
P
C
5
0
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
PG5013
GAP-CLOSE-PWR
PG5013
GAP-CLOSE-PWR
1 2 PR5013
0R0603-PAD
PR5013
0R0603-PAD
1 2
PG5017
GAP-CLOSE-PWR
PG5017
GAP-CLOSE-PWR
1 2
PR5005
0R2J-2-GP
DY
PR5005
0R2J-2-GP
DY
1
2
P
C
5
0
1
0
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
P
C
5
0
1
0
S
C
1
0
U
1
0
V
5
K
X
-
2
G
P
1
2
PR5018
10KR2J-3-GP
DY
PR5018
10KR2J-3-GP
DY
1 2
PG5020
GAP-CLOSE-PWR
PG5020
GAP-CLOSE-PWR
1 2
PC5012
SCD1U25V3KX-GP
PC5012
SCD1U25V3KX-GP
1 2
PG5003
GAP-CLOSE-PWR
PG5003
GAP-CLOSE-PWR
1 2
PG5010
GAP-CLOSE-PWR
PG5010
GAP-CLOSE-PWR
1
2
PC5017
SC1KP50V2KX-1GP
DY
PC5017
SC1KP50V2KX-1GP
DY
1 2 3 4
5678
S S G
DDDD
S
PU5003
SI7686DP-T1-GP
S S G
DDDD
S
PU5003
SI7686DP-T1-GP
1
2
PC5018
SC1U10V3KX-3GP
PC5018
SC1U10V3KX-3GP
1
2
P
C
5
0
0
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
P
C
5
0
0
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
PC5016
SC18P50V2JN-1-GP
DY
PC5016
SC18P50V2JN-1-GP
DY
1 2
PC5003
SC1KP50V2KX-1GP
PC5003
SC1KP50V2KX-1GP
1
2
PR5006
5D1R3J-GP
PR5006
5D1R3J-GP
1
2
P
G
5
0
1
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
5
0
1
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
PC5022
SCD1U10V2KX-5GP
DY
PC5022
SCD1U10V2KX-5GP
DY
1
2
P
C
5
0
0
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
P
C
5
0
0
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
PR5008
2D2R5F-2-GP
DY
PR5008
2D2R5F-2-GP
DY
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
5
9
1
2
_
1
.
8
V
_
R
U
N
_
F
B
1D8V_RUN_EN
+1.8V_RUN_P
+1.8V_RUN_P +1.8V_RUN
+3.3V_ALW +1.8V_RUN_VIN
+5V_ALW
+1.8V_RUN_VIN
PM_SLP_S3# 22,37,42,50
RUNPWROK 49,50
Title
Date: Sheet of
Wistron Corporation
APL5930_+1.8V_RUN
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
APL5930_+1.8V_RUN
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
APL5930_+1.8V_RUN
A3
<Core Design>
SSID = PWR.Plane.Regulator_1p8v
Vout=0.8V*(R1+R2)/R2
APL5930 for +1.8V_RUN
2010/04/19
X01
1
2
PR5105
13K3R2F-L1-GP
PR5105
13K3R2F-L1-GP
1
2
P
C
5
1
0
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
P
C
5
1
0
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
P
R
5
1
0
4
1
6
K
5
R
2
F
-
2
-
G
P
P
R
5
1
0
4
1
6
K
5
R
2
F
-
2
-
G
P
1
2
P
C
5
1
0
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
P
C
5
1
0
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
PR5108
47KR2J-2-GP
DY
PR5108
47KR2J-2-GP
DY
1 2
PG5104
GAP-CLOSE-PWR
PG5104
GAP-CLOSE-PWR
1 2
PG5102
GAP-CLOSE-PWR
PG5102
GAP-CLOSE-PWR
1 2
PG5103
GAP-CLOSE-PWR
PG5103
GAP-CLOSE-PWR
1 2
PR5102 0R0402-PAD PR5102 0R0402-PAD
1
2
P
C
5
1
0
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
P
C
5
1
0
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
P
C
5
1
0
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
P
C
5
1
0
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
GND
1
FB
2
VOUT#3
3
VOUT#4
4
VIN#5
5
VCNTL
6
POK
7
EN
8
VIN#9
9
PU5102
APL5930KAI-TRG-GP
PU5102
APL5930KAI-TRG-GP
1
2
P
C
5
1
0
6
S
C
6
8
P
5
0
V
2
J
N
-
1
G
P
P
C
5
1
0
6
S
C
6
8
P
5
0
V
2
J
N
-
1
G
P
1
2P
C
5
1
0
5
S
C
4
7
0
0
P
5
0
V
2
K
X
-
1
G
P
DY P
C
5
1
0
5
S
C
4
7
0
0
P
5
0
V
2
K
X
-
1
G
P
DY
1
2
P
C
5
1
0
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
P
C
5
1
0
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1 2
PG5105
GAP-CLOSE-PWR
PG5105
GAP-CLOSE-PWR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
52 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
52 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
52 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
51611_CSP_R
51611_VR_TT 6236A_BOOT_C
5
1
6
1
1
_
P
G
O
O
D
51611_PHASE 51611_THERM_R
5
1
6
1
1
_
R
F
51611_CSP_CSN
51611_VSNS
51611_GSNS
5
1
6
1
1
_
V
R
E
F
F
5
1
6
1
1
_
IS
L
E
W
5
1
6
1
1
_
V
R
_
O
N
GFX_DPRSLPVR
51611_CSP
5
1
6
1
1
_
D
R
O
O
P
5
1
6
1
1
_
O
S
R
S
E
L
51611_CSP
51611_CSN
51611_CSP_G
51611_VSNS
5
1
6
1
1
_
V
5
F
IL
T
5
1
6
1
1
_
T
O
N
S
E
L
51611_BOOT
51611_UGATE
51611_THERM
5
1
6
1
1
_
C
L
K
E
N
51611_CSN_R
51611_GSNS
5
1
6
1
1
_
T
R
IP
S
E
L
51611_LGATE
51611_CSN
51611_VREFF
51611_VREFF
+VGFXCORE_PWR_SRC
+CPU_GFX_CORE
6263AGND
+5V_ALW
51611_VREFF
51611_VREFF
+3.3V_ALW
6263AGND
+3.3V_RUN
+PWR_SRC +VGFXCORE_PWR_SRC
+CPU_GFX_CORE
+3.3V_RUN
VSS_AXG_SENSE 13
VCC_AXG_SENSE 13
GFX_DPRSLPVR 13
GFX_IMON 13
GFX_VID0 13
GFX_VID1 13
GFX_VID2 13
GFX_VID3 13
GFX_VID4 13
GFX_VID5 13
GFX_VID6 13
GFX_VR_EN 13
PM_EXTTS#0_C 9
Title
Date: Sheet of
Wistron Corporation
Arsenal DJ1 UMA X01
TPS51611_+GFX_CORE
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Arsenal DJ1 UMA X01
TPS51611_+GFX_CORE
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Arsenal DJ1 UMA X01
TPS51611_+GFX_CORE
A2
<Core Design>
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
I0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
SSID = CPU.GFX.Regulator
27.2<OCP<32.15A
Close to VGA
Close to choke (L5301)
2010/04/19
X01
2010/04/19
X01
2010/04/19
X01
2010/04/21
X01
2010/04/21
X01
2010/04/21
X01
1 2
PG5325
GAP-CLOSE-PWR-3-GP
PG5325
GAP-CLOSE-PWR-3-GP
1
2
PR5325
18K7R2F-GP
PR5325
18K7R2F-GP
1 2
PR5328
24K3R2F-1-GP
PR5328
24K3R2F-1-GP
1
2
P
C
5
3
1
2
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
5
3
1
2
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2
PL5301
COIL-D56UH-2-GP
PL5301
COIL-D56UH-2-GP
1 2
PC5301
SC2D2U10V3KX-1GP
PC5301
SC2D2U10V3KX-1GP
1 2
PG5308
GAP-CLOSE-PWR
PG5308
GAP-CLOSE-PWR
1
2
PC5326
S
C
D
0
1
U
5
0
V
3
K
X
-4
D
L
G
P
PC5326
S
C
D
0
1
U
5
0
V
3
K
X
-4
D
L
G
P
1
2
PR5319
1K91R2F-1-GP
PR5319
1K91R2F-1-GP
1 2
PC5323
SC33P50V2JN-3GP
PC5323
SC33P50V2JN-3GP
1
2
PC5320
SC33P50V2JN-3GP
PC5320
SC33P50V2JN-3GP
1 2 3 4
5678
S S G
DDDD
S
PU5302
SI7686DP-T1-GP
S S G
DDDD
S
PU5302
SI7686DP-T1-GP
1 2
PR5320 11K8R2F-GP
DY
PR5320 11K8R2F-GP
DY
1
2
P
C
5
3
1
9
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
5
3
1
9
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
P
R
5
3
1
4
0
R
0
4
0
2
-P
A
D
P
R
5
3
1
4
0
R
0
4
0
2
-P
A
D
GND
1
CSP
2
CSN
3
GNDSNS
4
VSNS
5
THERM
6
VR_TT#
7
IMON
8
D
P
R
S
L
P
9
V
ID
6
1
0
V
ID
5
1
1
V
ID
4
1
2
V
ID
3
1
3
V
ID
2
1
4
V
ID
1
1
5
V
ID
0
1
6
DRVH
17
VBST
18
LL
19
DRVL
20
V5IN
21
MODE
22
PGOOD
23
CLKEN#
24
V
R
_
O
N
2
5
T
R
IP
S
E
L
2
6
T
O
N
S
E
L
2
7
O
S
R
S
E
L
2
8
IS
L
E
W
2
9
V
5
F
IL
T
3
0
D
R
O
O
P
3
1
V
R
E
F
3
2
G
N
D
3
3
PU5301
TPS51611RHBR-GP
74.51611.073
PU5301
TPS51611RHBR-GP
74.51611.073
1
2
PC5302
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
PC5302
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
1
2
P
C
5
3
1
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
5
3
1
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2
PR5311
90K9R2F-GP
PR5311
90K9R2F-GP
1
2
P
R
5
3
1
5
0
R
2
J
-2
-G
P
DY
P
R
5
3
1
5
0
R
2
J
-2
-G
P
DY
1
2
PC5321
S
C
D
0
1
5
U
5
0
V
3
K
X
-G
P
PC5321
S
C
D
0
1
5
U
5
0
V
3
K
X
-G
P
1
2
PR5334
100R2F-L1-GP-U
PR5334
100R2F-L1-GP-U
1
2
PC5315
SCD22U10V2KX-1GP
PC5315
SCD22U10V2KX-1GP
1 2 PC5314
SC68P50V2JN-1GP
PC5314
SC68P50V2JN-1GP
1
2
PR5330
86K6R2F-GP
PR5330
86K6R2F-GP
1
2
P
T
C
5
3
0
2
S
E
3
3
0
U
2
V
D
M
-L
-G
P
P
T
C
5
3
0
2
S
E
3
3
0
U
2
V
D
M
-L
-G
P
1
2
P
R
5
3
1
7
0
R
0
4
0
2
-P
A
D
P
R
5
3
1
7
0
R
0
4
0
2
-P
A
D
1 2
1
2
P
R
5
3
1
8
0
R
2
J
-2
-G
P
DY
P
R
5
3
1
8
0
R
2
J
-2
-G
P
DY
1 2
PG5324
GAP-CLOSE-PWR-3-GP
PG5324
GAP-CLOSE-PWR-3-GP
1 2
PR5322 0R2J-2-GP
DY
PR5322 0R2J-2-GP
DY
1
2
PC5324
SC33P50V2JN-3GP
PC5324
SC33P50V2JN-3GP
1
2
P
R
5
3
1
3
0
R
0
4
0
2
-P
A
D
P
R
5
3
1
3
0
R
0
4
0
2
-P
A
D
1 2 3 4
5678
S S S G
DDDD PU5303
S
IR
1
6
4
D
P
-T
1
-G
E
3
-G
P
S S S G
DDDD PU5303
S
IR
1
6
4
D
P
-T
1
-G
E
3
-G
P
1 2
PC5313 SC2D2U10V3KX-1GP PC5313 SC2D2U10V3KX-1GP
1
2
PC5317
SC3300P50V2KX-1GP
PC5317
SC3300P50V2KX-1GP
1 2
PR5310 0R0402-PAD PR5310 0R0402-PAD
1 2
PR5332
330R2F-GP
PR5332
330R2F-GP
1
2
PR5331
29K4R2F-GP
PR5331
29K4R2F-GP
1
2
PTC5301
SE330U2VDM-L-GP
PTC5301
SE330U2VDM-L-GP
1 2
PC5325
SC33P50V2JN-3GP
PC5325
SC33P50V2JN-3GP
1 2
PG5303
GAP-CLOSE-PWR
PG5303
GAP-CLOSE-PWR
1 2
PR5321 NTC-100K-10-GP
DY
PR5321 NTC-100K-10-GP
DY
1
2
P
R
5
3
0
1
1
0
K
R
2
F
-2
-G
P
DY
P
R
5
3
0
1
1
0
K
R
2
F
-2
-G
P
DY
1
2
PR5324
2
D
2
R
3
J
-2
-G
P
DY
PR5324
2
D
2
R
3
J
-2
-G
P
DY
1
2
PC5318
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
DY
PC5318
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
DY
1 2
PG5311
GAP-CLOSE-PWR
PG5311
GAP-CLOSE-PWR
1
2
PC5322
SC33P50V2JN-3GP
PC5322
SC33P50V2JN-3GP
1 2
PG5305
GAP-CLOSE-PWR
PG5305
GAP-CLOSE-PWR
1 2
PG5301
GAP-CLOSE-PWR
PG5301
GAP-CLOSE-PWR
1
2
PG5322
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG5322
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PR5333 0R0402-PAD PR5333 0R0402-PAD
1
2
P
R
5
3
1
6
0
R
2
J
-2
-G
P
DY
P
R
5
3
1
6
0
R
2
J
-2
-G
P
DY
1 2
PR5327
330R2F-GP
PR5327
330R2F-GP
1
2
PC5303
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
PC5303
S
C
1
0
U
2
5
V
6
K
X
-1
G
P
1
2
PG5323
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG5323
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P 1 2
PC5316
SCD22U16V3KX-2-GP
PC5316
SCD22U16V3KX-2-GP
1
2
PR5335
100R2F-L1-GP-U
PR5335
100R2F-L1-GP-U
1
2
PR5326
NTC-100K-10-GP
PR5326
NTC-100K-10-GP
1 2
PR5323
2D2R3J-2-GP
PR5323
2D2R3J-2-GP
1
2
PC5304
SCD1U25V2KX-GP
DY
PC5304
SCD1U25V2KX-GP
DY
PCH_LVDSA_TXC
PCH_LVDSA_TX1#
PCH_LVDSA_TX1
PCH_LVDSA_TXC#
PCH_LVDSA_TX2#
PCH_LVDSA_TX2
PCH_LVDSA_TX0
LCD_CBL_DET#_C
LCD_DET_G
PCH_LVDSA_TX0#
LCD_BRIGHTNESS
LDDC_CLK_PCH
LDDC_DATA_PCH
USB_CAMERA-
USB_CAMERA+
BLON_OUT_C
LCD_TST_C
LCD_TST
LCD_BRIGHTNESS
LCD_TST_C
LCD_DET_G
LCD_CBL_DET#_C
BLON_OUT_C
LCDVCC_EN
FPVCC_CTL3
F
P
V
C
C
_
C
T
L
1
LCDVDD_1
GFX_PWR_SRC +PWR_SRC
+3.3V_RUN
+3.3V_CAMERA
GFX_PWR_SRC
+LCDVDD
+3.3V_RUN
+3.3V_CAMERA +3.3V_RUN
+15V_ALW
+3.3V_RUN
+LCDVDD
+5V_ALW
PCH_LBKLT_CTL 20
PCH_LVDSA_TXC 20
PCH_LVDSA_TX0# 20
PCH_LVDSA_TX0 20
PCH_LVDSA_TX1# 20
PCH_LVDSA_TX1 20
PCH_LVDSA_TX2# 20
PCH_LVDSA_TX2 20
PCH_LVDSA_TXC# 20
LDDC_CLK_PCH 20
LDDC_DATA_PCH 20
LCD_TST 37
BLON_OUT 37
LCD_CBL_DET# 37
USB_PP11 21
USB_PN11 21
LCD_TST_EN 37
PCH_LCDVDD_EN 20
Title
Date: Sheet of
Wistron Corporation
LCD/Inverter Connector
A3
54 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A3
54 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A3
54 90 Monday, April 26, 2010
<Core Design>
SSID = VIDEO
SSID = VIDEO
SSID = Inverter
LVDS CONNECTOR
INVERTER POWER
20.F1093.040
Camera Power
For EMI request
LCD POWER
1
2
C5402
SC1KP50V2KX-1GP
C5402
SC1KP50V2KX-1GP
1 2
R5410 100R2J-2-GP R5410 100R2J-2-GP
1 2
R5415 100R2J-2-GP R5415 100R2J-2-GP
1 2
R5412 100R2J-2-GP R5412 100R2J-2-GP
1
2
C
5
4
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
4
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
R5406
100KR2J-1-GP
DY
R5406
100KR2J-1-GP
DY
1
3 4
2
TR5401
DLW21HN900SQ2LGP-U
TR5401
DLW21HN900SQ2LGP-U
1 2
R5413 330KR2J-L1-GP R5413 330KR2J-L1-GP
1
2
C5403
SCD1U50V3KX-GP
C5403
SCD1U50V3KX-GP
1 2
R5411
0R0603-PAD-1-GP
R5411
0R0603-PAD-1-GP
1
2
R5401
10KR2J-3-GP
DY
R5401
10KR2J-3-GP
DY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
LCD1
IPEX-CONN40-2R-GP-U
LCD1
IPEX-CONN40-2R-GP-U
1
2
3 4
5
6
Q5402
DMN66D0LDW-7-GP
Q5402
DMN66D0LDW-7-GP
2
1
3
R1
R2
Q5403
PDTC144EU-1-GP
R1
R2
Q5403
PDTC144EU-1-GP
1
2
3 D5401
BAT54C-U-GP
D5401
BAT54C-U-GP
1 2
F5401
POLYSW-1D1A24V-GP-U
F5401
POLYSW-1D1A24V-GP-U
1
2
R5418
150R3J-L-GP
R5418
150R3J-L-GP
1
2
R5404
100KR2J-1-GP
R5404
100KR2J-1-GP
1
2E
C
5
4
0
6
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
5
4
0
6
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
EC5403
SCD1U16V2KX-3GP
DY
EC5403
SCD1U16V2KX-3GP
DY
1 2
R5416 100R2J-2-GP R5416 100R2J-2-GP
1
2
C5407
SC10U6D3V5MX-3GP
C5407
SC10U6D3V5MX-3GP
1
2E
C
5
4
0
5
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
5
4
0
5
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1 2
C5409 SCD1U25V2KX-GP C5409 SCD1U25V2KX-GP
1 2
R5417 100R2J-2-GP R5417 100R2J-2-GP
1
2
3 4
5
6
D
D
G
D
D
S
Q5401
SI3456DDV-T1-GE3-GP
D
D
G
D
D
S
Q5401
SI3456DDV-T1-GE3-GP
1
2
C
5
4
1
1
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
C
5
4
1
1
S
C
1
0
U
6
D
3
V
5
K
X
-
1
G
P
DY
1
2
R5407
100KR2J-1-GP
DY
R5407
100KR2J-1-GP
DY
1 2
R5419 100KR2J-1-GP R5419 100KR2J-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_G
CRT_R
CRT_B
HSYNC_5
VSYNC_5 JVGA_VS
JVGA_HS
CRT_B
CRT_R
CRT_G
DDC_DATA_CON
JVGA_HS
JVGA_VS
DDC_CLK_CON
+5V_CRT_RUN
DDC_DATA_CON
DDC_CLK_CON
CRT_B
CRT_R
CRT_G
CRT_B
DDC_CLK_CON
DDC_DATA_CON
CRT_R
JVGA_VS
CRT_G
JVGA_HS
DDC_CLK_CON
DDC_DATA_CON
+5V_CRT_RUN
+5V_RUN
+5V_RUN
+5V_CRT_RUN
+5V_CRT_RUN
+5V_CRT_RUN
+5V_CRT_RUN
+3.3V_RUN
+5V_CRT_RUN +5V_CRT_RUN_R
PCH_CRT_GREEN 20
PCH_CRT_RED 20
PCH_CRT_BLUE 20
PCH_CRT_HSYNC 20
PCH_CRT_VSYNC 20
PCH_CRT_DDCDATA 20
PCH_CRT_DDCCLK 20
Title
Date: Sheet of
Wistron Corporation
CRT Connector
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CRT Connector
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CRT Connector
<Core Design>
CLOSE TO
TRANSFORMER
Hsync & Vsync level shift
Layout Note:
*Pi-filter & 150 Ohm pull-down
resistors should be as close
as to CRT CONN.
* RGB signal will hit 75 Ohm
first, then pi-filter, finally
CRT CONN.
SSID = VIDEO
20.20401.015
1
2
C5511
SCD01U16V2KX-3GP
C5511
SCD01U16V2KX-3GP
1 AFTP5506 AFTP5506
1
2
R
5
5
0
1
1
5
0
R
2
F
-
1
-
G
P
R
5
5
0
1
1
5
0
R
2
F
-
1
-
G
P
1
2 3
4
RN5502
SRN33J-5-GP-U
DY
RN5502
SRN33J-5-GP-U
DY
1 TP5505 TP5505
1
2
C5512
SCD1U16V2KX-3GP
DY
C5512
SCD1U16V2KX-3GP
DY
1 2 L5503 BLM15BB220SS1D-GP L5503 BLM15BB220SS1D-GP
1
2
R
5
5
0
2
1
5
0
R
2
F
-
1
-
G
P
R
5
5
0
2
1
5
0
R
2
F
-
1
-
G
P
1 2
R5504
0R3J-0-U-GP
R5504
0R3J-0-U-GP
1 2
34
RN5501
SRN2K2J-1-GP
RN5501
SRN2K2J-1-GP
1
2
C
5
5
1
6
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
C
5
5
1
6
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
R
5
5
0
3
1
5
0
R
2
F
-
1
-
G
P
R
5
5
0
3
1
5
0
R
2
F
-
1
-
G
P
1
2
C
5
5
0
7
S
C
8
P
2
5
0
V
2
C
C
-
G
P
C
5
5
0
7
S
C
8
P
2
5
0
V
2
C
C
-
G
P
1
2
C
5
5
0
5
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY C
5
5
0
5
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY
1
2
C
5
5
0
4
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY C
5
5
0
4
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY
1 AFTP5503 AFTP5503
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
CRT1
VIDEO-15-127-GP-U
CRT1
VIDEO-15-127-GP-U
1
2
3 4
5
6
Q5501
DMN66D0LDW-7-GP
Q5501
DMN66D0LDW-7-GP
2 1
D5502
CH551H-30PT-GP
D5502
CH551H-30PT-GP
1 AFTP5501 AFTP5501
1
2
C
5
5
0
8
S
C
8
P
2
5
0
V
2
C
C
-
G
P
C
5
5
0
8
S
C
8
P
2
5
0
V
2
C
C
-
G
P
1
2
3
D5504
BAV99PT-GP-U
DY
D5504
BAV99PT-GP-U
DY
1
2
C
5
5
1
5
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
C
5
5
1
5
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
5 6
1
4
4
7
U5501B
TSAHCT125PW-GP
DY
U5501B
TSAHCT125PW-GP
DY
2 3
1
4
1
7
U5501A
TSAHCT125PW-GP
DY
U5501A
TSAHCT125PW-GP
DY
1
2
3
D5501
BAV99PT-GP-U
DY
D5501
BAV99PT-GP-U
DY
1
2
C5513
SC22P50V2JN-4GP
DY
C5513
SC22P50V2JN-4GP
DY
1 AFTP5508 AFTP5508
12 11
1
4
1
3
7
U5501D
TSAHCT125PW-GP
DY
U5501D
TSAHCT125PW-GP
DY
1 2
F5501
FUSE-1D1A6V-4GP-U
DY
69.50007.691
F5501
FUSE-1D1A6V-4GP-U
DY
69.50007.691
1
2
3
D5503
BAV99PT-GP-U
DY
D5503
BAV99PT-GP-U
DY
1 AFTP5504 AFTP5504
1 AFTP5502 AFTP5502
9 8
1
4
1
0
7
U5501C
TSAHCT125PW-GP
DY
U5501C
TSAHCT125PW-GP
DY
1
2
C5514
SC22P50V2JN-4GP
DY
C5514
SC22P50V2JN-4GP
DY
1
2
C
5
5
0
9
S
C
8
P
2
5
0
V
2
C
C
-
G
P
C
5
5
0
9
S
C
8
P
2
5
0
V
2
C
C
-
G
P
1
2 3
4
RN5504
SRN100J-3-GP
RN5504
SRN100J-3-GP
1 TP5509 TP5509
1
2
C
5
5
0
6
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY C
5
5
0
6
S
C
8
P
2
5
0
V
2
C
C
-
G
P
DY
1 AFTP5507 AFTP5507
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
56 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
56 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
56 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
HDMI
A3
57 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
HDMI
A3
57 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
HDMI
A3
57 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH 39
EMC2102_FAN_DRIVE 39
Title
Date: Sheet of
Wistron Corporation
ITP/Fan Connector
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
ITP/Fan Connector
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
ITP/Fan Connector
A3
<Core Design>
3 1
Fan Connector
SSID = Thermal
ITP Connector CPU
TCK(PIN AC5)
FBO(PIN 11)
TCK(PIN 5)
ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
SSID = User.Interface
*Layout* 15 mil
20.D0210.103
20.F1293.003
1 AFTP5801 AFTP5801
K
A
D5801
RB551V30-GP
D5801
RB551V30-GP
4
1
2
3
5
FAN1
FOX-CON3-6-GP-U
FAN1
FOX-CON3-6-GP-U
1 AFTP5802 AFTP5802
1
2
C5801
SC10U6D3V5MX-3GP
C5801
SC10U6D3V5MX-3GP
1 AFTP5803 AFTP5803
SATA_RX1-_C
SATA_RX1+_C
SATA_RXP0
SATA_RXN0
+5V_RUN
+5V_RUN
+3.3V_RUN
SATA_TXN1 24
SATA_RXN1_C 24
SATA_TXP1 24
SATA_RXP1_C 24
SATA_TXN0 24
SATA_TXP0 24
SATA_RXN0_C 24
SATA_RXP0_C 24
Title
Date: Sheet of
Wistron Corporation
HDD/ODD
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
HDD/ODD
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
HDD/ODD
A3
<Core Design>
SATA HDD Connector
SSID = SATA
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
ODD Connector
22.10300.961
22.10300.811
22.10300.421
22.10300.471
1
2
C5906
SCD1U16V2KX-3GP
C5906
SCD1U16V2KX-3GP
1
2
C5909
SCD1U10V2KX-5GP
C5909
SCD1U10V2KX-5GP
1
2
C5910
SC10U10V5KX-2GP
C5910
SC10U10V5KX-2GP
GND
S1
GND
S4
GND
S7
V33
P1
V33
P2
V33
P3
GND
P4
GND
P5
GND
P6
V5
P7
V5
P8
V5
P9
GND
P10
DAS/DSS
P11
GND
P12
V12
P13
V12
P14
V12
P15
NP1
NP1
NP2
NP2
A+
S2
A-
S3
B+
S6
B-
S5
23
23
24
24
HDD1
SKT-SATA7P-15P-23-GP
HDD1
SKT-SATA7P-15P-23-GP
S1
S2
S3
S4
S5
S6
S7
NP1
NP2
8
9
P1
P2
P3
P4
P5
P6
ODD1
SKT-SATA7P-6P-4-GP
ODD1
SKT-SATA7P-6P-4-GP
1
2
C5903
SC10U6D3V5MX-3GP
DY
C5903
SC10U6D3V5MX-3GP
DY
1
2
C5901
SCD1U16V2KX-3GP
DY
C5901
SCD1U16V2KX-3GP
DY
1
2
C5902
SC10U6D3V5MX-3GP
C5902
SC10U6D3V5MX-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SPK_L+
AUD_SPK_R-
AUD_SPK_L-
AUD_SPK_R+
AUD_HP1_JACK_R1
AUD_HP1_JACK_L1
AUD_HP1_JD#
AUD_HP1_JACK_R1
AUD_HP1_JACK_L1
AUD_HP1_JD#
AUD_HP1_JACK_L2
AUD_HP1_JACK_R2
MIC_IN_L_C
MIC_IN_R_C
EXT_MIC_JD#
MIC_IN_R_C AUD_EXT_MIC_R
AUD_EXT_MIC_L MIC_IN_L_2
MIC_IN_R_2
MIC_IN_L_C
AUD_SPK_L- 30
AUD_SPK_L+ 30
AUD_SPK_R- 30
AUD_SPK_R+ 30
INT_MIC_L_R 30
AUD_HP1_JACK_L2 30
AUD_HP1_JACK_R2 30
AUD_HP1_JD# 30
AUD_EXT_MIC_R 30
AUD_EXT_MIC_L 30
EXT_MIC_JD# 30
AUD_VREFOUT_B 30
Title
Date: Sheet of
Wistron Corporation
Audio Jack
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Audio Jack
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Audio Jack
A3
<Core Design>
Speaker
Connector
Internal
Microphone
SSID = AUDIO
600ohm 100MHz
200mA 0.5ohm DC
LINE1 OUT
20.F0693.004
MIC
IN
2010/04/21
X01
1
AFTP6008 AFTP6008
1
AFTP6003 AFTP6003
1
2
EC6011
SC1KP50V2KX-1GP
EC6011
SC1KP50V2KX-1GP
1 2
34
RN6001
SRN4K7J-8-GP
RN6001
SRN4K7J-8-GP
1
AFTP6010 AFTP6010
1
2
EC6010
SC1KP50V2KX-1GP
EC6010
SC1KP50V2KX-1GP
1
2E
C
6
0
0
2
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
2
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
2
E
C
6
0
0
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
E
C
6
0
0
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 AFTP6001 AFTP6001
1
AFTP6006 AFTP6006
1
2
EC6007
SC1KP50V2KX-1GP
EC6007
SC1KP50V2KX-1GP
5
1
2
3
4
6
SPK1
FOX-CON4-19-GP
20.F0711.004
SPK1
FOX-CON4-19-GP
20.F0711.004
1 AFTP6009 AFTP6009
1 2
R6009 0R3J-0-U-GP R6009 0R3J-0-U-GP
1
2
E
C
6
0
0
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
AFTP6007 AFTP6007
1
2
MIC1
MICROPHONE-40-GP-U1
MIC1
MICROPHONE-40-GP-U1
1
2
3
4
5
6
7
8
MICIN1
PHONE-JK383-GP
22.10133.K31
MICIN1
PHONE-JK383-GP
22.10133.K31
1
2
E
C
6
0
0
6
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
E
C
6
0
0
6
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1
AFTP6011 AFTP6011
1 2
L6002
BLM18BD601SN1D-GP
L6002
BLM18BD601SN1D-GP
1
2E
C
6
0
0
1
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
1
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
AFTP6005 AFTP6005
1 2
L6001
BLM18BD601SN1D-GP
L6001
BLM18BD601SN1D-GP
1
2
C
6
0
0
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
6
0
0
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
AFTP6013 AFTP6013
1
AFTP6002 AFTP6002
1
2
3
4
5
6
7
8
LINEOUT1
PHONE-JK383-GP
22.10133.K31
LINEOUT1
PHONE-JK383-GP
22.10133.K31
1 2
R6010 0R3J-0-U-GP R6010 0R3J-0-U-GP
1
2E
C
6
0
0
4
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
4
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
2
E
C
6
0
0
9
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
9
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
AFTP6012 AFTP6012
1
AFTP6004 AFTP6004
1
2E
C
6
0
0
3
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
6
0
0
3
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
61 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
61 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
61 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_SPI_DI_R
PCH_SPI_WP#
PCH_SPI_HOLD_0#
PCH_SPI_HOLD_0#
RTC_PWR
RTC_PWR_L
+RTC_VCC
EC_SPI_DO_R
EC_SPI_CS#
EC_SPI_DI_R
EC_SPI_WP#
EC_SPI_HOLD#
EC_SPI_HOLD#
PCH_SPI_CS0#
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+RTC_CELL
+3.3V_RTC_LDO
+RTC_VCC
+KBC_PWR
+KBC_PWR
+KBC_PWR
PCH_SPI_CLK 24
PCH_SPI_DI 24
PCH_SPI_DO 24
EC_SPI_DO 37
EC_SPI_DI 37
EC_SPI_WP#_R 37
EC_SPI_CS# 37
EC_SPI_CLK 37
PCH_SPI_CS0# 24
Title
Date: Sheet of
Wistron Corporation
Flash/RTC
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Flash/RTC
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Flash/RTC
A3
<Core Design>
SPI FLASH ROM (32M bits) for PCH
SSID = Flash.ROM
Width=20mils
RTC Connector
SSID = RBATT
SPI FLASH ROM (2M bits) for KBC
62.70001.011
1 2
34
RN6201
SRN4K7J-8-GP
RN6201
SRN4K7J-8-GP
1
2
EC6205
SC4D7P50V2CN-1GP
DY
EC6205
SC4D7P50V2CN-1GP
DY
1 2 R6204 0R2J-2-GP R6204 0R2J-2-GP
1
2
C6204
SC10U6D3V5MX-3GP
DY
C6204
SC10U6D3V5MX-3GP
DY
1
2
C6206
SCD1U10V2KX-5GP
C6206
SCD1U10V2KX-5GP
1 TP6201 TP6201
1
2
C6207
SC1U10V3KX-3GP
C6207
SC1U10V3KX-3GP
1 2
34
RN6202
SRN100KJ-6-GP
RN6202
SRN100KJ-6-GP
1 TP6202 TP6202
CS#
1
SO
2
WP#
3
GND
4
SI
5
SCK
6
NC#7
7
VCC
8
U6201
MX25L3205DM2I-12G-GP
U6201
MX25L3205DM2I-12G-GP
1
2
EC6202
SC4D7P50V2CN-1GP
DY
EC6202
SC4D7P50V2CN-1GP
DY
1
2
EC6201
SC4D7P50V2CN-1GP
DY
EC6201
SC4D7P50V2CN-1GP
DY
1
2
R6203
100KR2J-1-GP
DY
R6203
100KR2J-1-GP
DY
1
2
EC6204
SC4D7P50V2CN-1GP
DY
EC6204
SC4D7P50V2CN-1GP
DY
1
2
R6210
10KR2J-3-GP
R6210
10KR2J-3-GP
1
2
EC6206
SC4D7P50V2CN-1GP
DY
EC6206
SC4D7P50V2CN-1GP
DY
1
2
R6209
100KR2J-1-GP
R6209
100KR2J-1-GP
1
2
C6203
SCD1U10V2KX-5GP
C6203
SCD1U10V2KX-5GP
1 2
R6206 33R2J-2-GP R6206 33R2J-2-GP
PWR
1
GND
2
NP1
NP1
NP2
NP2
RTC1
BAT-CON2-1-GP-U
RTC1
BAT-CON2-1-GP-U
1 2
R6207
0R0402-PAD
R6207
0R0402-PAD
1 2 R6205 0R2J-2-GP R6205 0R2J-2-GP
1
2
EC6203
SC4D7P50V2CN-1GP
DY
EC6203
SC4D7P50V2CN-1GP
DY
1
2
R6202
4K7R2J-2-GP
R6202
4K7R2J-2-GP
CS#
1
SO
2
WP#
3
GND
4
SI
5
SCLK
6
HOLD#
7
VCC
8
U6202
MX25L2005C-12G-GP
U6202
MX25L2005C-12G-GP
1
2
C6201
SC10U6D3V5MX-3GP
DY
C6201
SC10U6D3V5MX-3GP
DY
1 2
R6208
1KR2J-1-GP
R6208
1KR2J-1-GP
1
2
3
U6203
SDMG0340LC7F-GP-U
U6203
SDMG0340LC7F-GP-U
1 2
R6201
15R2J-GP
R6201
15R2J-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5V_USB2
USB_P3+
USB_P3-
USB_P2-
USB_P2+
USB_P2- USB_P2+
USB_P3- USB_P3+
USB_P2-
USB_P2+
USB_P3-
USB_P3+
USB_P3+
USB_PN2 USB_P2-
USB_P2+ USB_PP2
USB_P3-
USB_PP3
USB_PN3
+5V_USB1 +5V_ALW
+5V_USB2
+5V_USB2
+5V_USB2
+5V_ALW
+5V_USB2
+5V_USB2
USB_OC#0_1 21
USB_PWR_EN# 37
USB_OC#2_3 21
USB_PWR_EN# 37
USB_PN2 21
USB_PP2 21
USB_PN3 21
USB_PP3 21
Title
Date: Sheet of
Wistron Corporation
USB
<Core Design>
Title
Date: Sheet of
Wistron Corporation
USB
<Core Design>
Title
Date: Sheet of
Wistron Corporation
USB
<Core Design>
IO Board USB Power
at least 80 mil
at least 80 mil
SSID = USB
Right USB Power
at least 80 mil
at least 80 mil
22.10254.451
USB POWER SW
Main UP7534BRA8-15 P/N:74.07534.079
SEC AP2101MPG-13 P/N: 74.02101.079
1
2 3
4
D6302
PRTR5V0U2X-GP
DY
D6302
PRTR5V0U2X-GP
DY
1
2
T
C
6
3
0
1
S
T
1
0
0
U
6
D
3
V
B
M
-
7
G
P
T
C
6
3
0
1
S
T
1
0
0
U
6
D
3
V
B
M
-
7
G
P
GND
1
VIN
2
VIN
3
EN#
4
OC#
5
VOUT#6
6
VOUT#7
7
VOUT#8
8
U6302
UP7534BRA8-15-GP
U6302
UP7534BRA8-15-GP
1
2
C
6
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
6
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
6
3
0
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
6
3
0
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
6
3
0
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
6
3
0
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
R
6
3
0
1
1
0
0
K
R
2
J
-
1
-
G
P
DY
R
6
3
0
1
1
0
0
K
R
2
J
-
1
-
G
P
DY
1 AFTP6302 AFTP6302
1 AFTP6304 AFTP6304
1
3 4
2
TR6302
DLW21HN900SQ2LGP-U
TR6302
DLW21HN900SQ2LGP-U
1
3 4
2
TR6301
DLW21HN900SQ2LGP-U
TR6301
DLW21HN900SQ2LGP-U
1 AFTP6301 AFTP6301
1
2
C6304
SC1U10V3KX-3GP
C6304
SC1U10V3KX-3GP
1
2
C
6
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
6
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P1 AFTP6306 AFTP6306
GND
1
VIN
2
VIN
3
EN#
4
OC#
5
VOUT#6
6
VOUT#7
7
VOUT#8
8
U6301
UP7534BRA8-15-GP
U6301
UP7534BRA8-15-GP
6 8
1
2
3
4
7 5
USB3
SKT-USB8-29-GP
USB3
SKT-USB8-29-GP
1 AFTP6305 AFTP6305
1
2 3
4
D6301
PRTR5V0U2X-GP
DY
D6301
PRTR5V0U2X-GP
DY
6 8
1
2
3
4
7 5
USB1
SKT-USB8-29-GP
USB1
SKT-USB8-29-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Reserved
A3
64 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Reserved
A3
64 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
Reserved
A3
64 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
65 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
65 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
65 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_LED_B
BAT_LED_B
LED_PWR#
LED_BAT#
HDD_LED HDD_LED_R
SATA_LED#_R
BREATHE_LED#_R POWER_SW_LED_FRONT
PWRLED#_R
+5V_ALW
+5V_RUN
+5V_ALW
AMBER_LED_KBC 37
WHITE_LED_KBC 37
SATA_LED# 24
PWRLED# 37
Title
Date: Sheet of
Wistron Corporation
LED
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
LED
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
LED
A3
<Core Design>
BATT LED
POWER LED
Amber
White
Battery LED
83.00326.G70
83.01222.K70
HDD LED
83.01221.R70
White
83.01221.R70
BREATHE PWR LED (Front)
White
1 2
R6601
330R2J-3-GP
R6601
330R2J-3-GP 1
3
2
LED1
LED-OW-3-GP
LED1
LED-OW-3-GP
1 2
R6605 330R2J-3-GP R6605 330R2J-3-GP
1 2
R6608
0R2J-2-GP
R6608
0R2J-2-GP 1 2
3
A K
LED3
LED-W-27-GP
A K
LED3
LED-W-27-GP
1 2
R6602
330R2J-3-GP
R6602
330R2J-3-GP
E
B
C
R 1
R 2
Q6604
PDTA144VT-GP
84.00144.P11
R 1
R 2
Q6604
PDTA144VT-GP
84.00144.P11
1
2
EC6601
SC220P50V2KX-3GP
DY
EC6601
SC220P50V2KX-3GP
DY
E
B
C
R1
R2
Q6601
PDTC124EU-1-GP
R1
R2
Q6601
PDTC124EU-1-GP
1
2
EC6602
SC220P50V2KX-3GP
DY
EC6602
SC220P50V2KX-3GP
DY
1 2
R6609
0R2J-2-GP
R6609
0R2J-2-GP
1 2
3
A K
LED2
LED-W-27-GP
A K
LED2
LED-W-27-GP
E
B
C
R 1
R 2
Q6605
PDTA144VT-GP
84.00144.P11
R 1
R 2
Q6605
PDTA144VT-GP
84.00144.P11
1 2
R6604
330R2J-3-GP
R6604
330R2J-3-GP
E
B
C
R1
R2
Q6602
PDTC124EU-1-GP
R1
R2
Q6602
PDTC124EU-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
67 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
67 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
67 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPDATA
+5V_RUN
TPCLK
KCOL10
KCOL11
KCOL9
KCOL14
KCOL13
KCOL15
KCOL16
KCOL12
KCOL0
KCOL2
KCOL1
KCOL3
KCOL8
KCOL6
KCOL7
KCOL4
KCOL5
KROW0
KROW3
KROW1
KROW5
KROW2
KROW4
KROW6
KROW7
+5V_RUN
+5V_RUN
KROW[0..7] 37
KCOL[0..16] 37
TPCLK 37
TPDATA 37
KB_DET# 37
Title
Date: Sheet of
Wistron Corporation
Key Board/Touch Pad
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Key Board/Touch Pad
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Key Board/Touch Pad
A3
<Core Design>
SSID = Touch.Pad SSID = KBC
Internal KeyBoard Connector TouchPad Connector
20.K0461.030
20.K0320.004
20.K0382.004
Main 20.K0259.030
20.K0421.030
1
AFTP6823 AFTP6823
1
AFTP6808 AFTP6808
1
2
3
4
5
6
TP1
ACES-CON4-10-GP-U
TP1
ACES-CON4-10-GP-U
1
AFTP6814 AFTP6814
1
AFTP6804 AFTP6804
1
AFTP6821 AFTP6821
1
AFTP6806 AFTP6806
1
2
C6803
SC33P50V2JN-3GP
DY
C6803
SC33P50V2JN-3GP
DY
1
AFTP6825 AFTP6825
1
AFTP6813 AFTP6813
1
AFTP6811 AFTP6811
1
AFTP6803 AFTP6803
1
AFTP6817 AFTP6817
1
AFTP6828 AFTP6828
1
AFTP6831 AFTP6831
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KB1
HRS-CON30-1-GP-U
KB1
HRS-CON30-1-GP-U
1
AFTP6822 AFTP6822
1
AFTP6810 AFTP6810
1
AFTP6802 AFTP6802
1
AFTP6816 AFTP6816
1
2
C6804
SC33P50V2JN-3GP
DY
C6804
SC33P50V2JN-3GP
DY
1
AFTP6820 AFTP6820
1
AFTP6809 AFTP6809
1
AFTP6826 AFTP6826
1
AFTP6827 AFTP6827
1
AFTP6812 AFTP6812
1
AFTP6830 AFTP6830
1
AFTP6805 AFTP6805
1
AFTP6819 AFTP6819
1
AFTP6807 AFTP6807
1
AFTP6829 AFTP6829
1
2
C6802
SCD1U10V2KX-5GP
C6802
SCD1U10V2KX-5GP
1
AFTP6824 AFTP6824
1
AFTP6815 AFTP6815
1
AFTP6801 AFTP6801
1 2
34
RN6801
SRN10KJ-5-GP
RN6801
SRN10KJ-5-GP
1
AFTP6818 AFTP6818
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LID_CLOSE# LID_CLOSE#_1
+3.3V_ALW
+3.3V_ALW
LID_CLOSE# 37
Title
Date: Sheet of
Wistron Corporation
Hall Sensor
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Hall Sensor
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Hall Sensor
A3
<Core Design>
1 2
R6902
0R0402-PAD
R6902
0R0402-PAD
VSS
1
VDD
2
OUT
3
HSC1
S-5711ACDL-M3T1S-GP
HSC1
S-5711ACDL-M3T1S-GP
1
2
C6902
SCD047U16V2KX-1-GP
DY
C6902
SCD047U16V2KX-1-GP
DY
1
2
R6901
100KR2J-1-GP
DY
R6901
100KR2J-1-GP
DY
1
2
C6903
SCD1U10V2KX-5GP
C6903
SCD1U10V2KX-5GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_LAD3
LPC_LFRAME#
LPC_LAD1
LPC_LAD2
LPC_LAD0
+3.3V_RUN
PLT_RST# 9,21,37,76
PCLK_FWH 21
LPC_LAD3 24,37
LPC_LFRAME# 24,37
LPC_LAD0 24,37
LPC_LAD1 24,37
LPC_LAD2 24,37
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
<Core Design>
1
2
3
4
5
6
7
8
9
10
11
12
GF1
MLX-CON10-7-GP
DY
GF1
MLX-CON10-7-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XD_D6/MS_BS
XD_ALE/SD_D7/MS_D3
XD_D4/SD_D3/MS_D1
XD_D2/SD_CMD
XD_CLE/SD_D0/MS_D7
XD_D0/SD_CLK/MS_D2
XD_RE#/MS_INS#
XD_WP/SD_D6/MS_D6
XD_RDY/SD_WP/MS_CLK
XD_D2/SD_CMD
XD_WE#/SD_CD#
XD_CD#
XD_D4/SD_D3/MS_D1
XD_D4/SD_D3/MS_D1
XD_D3/SD_D4/MS_D4
XD_D1/SD_D5/MS_D0
XD_RDY/SD_WP/MS_CLK
XD_RDY/SD_WP/MS_CLK
XD_CLE/SD_D0/MS_D7
XD_D6/MS_BS
XD_RE#/MS_INS#
XD_D2/SD_CMD XD_WE#/SD_CD#
XD_WE#/SD_CD#
XD_RE#/MS_INS#
XD_D5/SD_D2/MS_D5
XD_CD#
XD_D0/SD_CLK/MS_D2
XD_ALE/SD_D7/MS_D3
XD_D7
XD_WP/SD_D6/MS_D6
XD_CE#/SD_D1
XD_D1/SD_D5/MS_D0
XD_D5/SD_D2/MS_D5
XD_D0/SD_CLK/MS_D2
XD_D1/SD_D5/MS_D0
XD_D3/SD_D4/MS_D4
XD_D2/SD_CMD
XD_D7
XD_RDY/SD_WP/MS_CLK
XD_CE#/SD_D1
XD_D0/SD_CLK/MS_D2
XD_RDY/SD_WP/MS_CLK
XD_WE#/SD_CD#
XD_D2/SD_CMD
XD_CLE/SD_D0/MS_D7
XD_D4/SD_D3/MS_D1
XD_D5/SD_D2/MS_D5
XD_CE#/SD_D1
+3.3V_RUN_CARD
+3.3V_RUN_CARD
XD_D2/SD_CMD 32
XD_CD# 32
XD_WE#/SD_CD# 32
XD_D6/MS_BS 32
XD_D2/SD_CMD 32
XD_RE#/MS_INS# 32
XD_D7 32
XD_WP/SD_D6/MS_D6 32
XD_WE#/SD_CD# 32
XD_RE#/MS_INS# 32
XD_ALE/SD_D7/MS_D3 32
XD_CE#/SD_D1 32
XD_CLE/SD_D0/MS_D7 32
Title
Date: Sheet of
Wistron Corporation
CARD Reader CONN
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CARD Reader CONN
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
CARD Reader CONN
A3
<Core Design>
SSID = SDIO SD/XD/MS Card Reader
For EMI
20.I0081.011
20.I0109.001
1 TP7101 TP7101
1
2
C
7
1
0
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
7
1
0
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1 TP7107 TP7107
1 TP7117 TP7117
1 TP7118 TP7118
1 TP7108 TP7108
1 TP7119 TP7119
1 TP7109 TP7109
1
2
C
7
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
7
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1 TP7121 TP7121
1
2E
C
7
1
0
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2E
C
7
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 TP7111 TP7111
1
2E
C
7
1
0
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2E
C
7
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 TP7112 TP7112
1 TP7110 TP7110
1 TP7113 TP7113
1
2E
C
7
1
0
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 TP7102 TP7102
1 TP7114 TP7114
1
2
C
7
1
0
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
C
7
1
0
4
S
C
D
1
U
1
0
V
2
K
X
-
5
G
P
1 TP7103 TP7103
1 TP7115 TP7115
1
2E
C
7
1
0
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 TP7104 TP7104
XD_R/B
1
XD_RE
2
XD_CE
3
XD_CLE
4
XD_ALE
5
XD_WE
6
XD_WP
7
XD_D0
8
XD_D1
9
SD_DAT2
10
SD_DAT3
11
SD_CMD
12
MS_VCC
14
MS_SCLK
15
MS_DATA3
16
MS_INS
17
MS_DATA2
18
MS_DATA0
19
MS_DATA1
20
MS_BS
21
SD_VCC
23
SD_CLK
24
SD_DAT0
25
XD_D2
26
XD_D3
27
XD_D4
28
SD_DAT1
29
XD_D5
30
XD_D6
31
XD_D7
32
XD_VCC
33
XD_CD_SW
34
SD_WP_SW
35
SD_CD_SW
36
4IN1_GND
37
4IN1_GND
38
4IN1_GND
13
4IN1_GND
22
NP2
NP2
NP1
NP1
CARD1
CARDBUS36P-1-GP
CARD1
CARDBUS36P-1-GP
1 TP7116 TP7116
1
2
C
7
1
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
7
1
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1 TP7105 TP7105
1
2E
C
7
1
0
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C
7
1
0
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
7
1
0
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2E
C
7
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
RESERVED
A3
72 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
RESERVED
A3
72 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
RESERVED
A3
72 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_ACT
+3.3V_RUN
WLAN_ACT
BLUETOOTH_EN
USB_PP9
USB_PN9
BLUETOOTH_GPIO5
BDC_ON
BT_LED
USB_PP9
BLUETOOTH_DET#
WLAN_ACT
BLUETOOTH_EN
BT_ACT
USB_PN9
BLUETOOTH_GPIO3
USB_PN9
BT_ACT
WLAN_ACT
USB_PP9
BLUETOOTH_EN
+3.3V_RUN
USB_PP9 21
USB_PN9 21
BLUETOOTH_EN 37,76
WLAN_ACT 76
BT_ACT 76
Title
Date: Sheet of
Wistron Corporation
Bluetooth
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Bluetooth
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Bluetooth
A3
<Core Design>
Bluetooth Module conn.
20.F0987.014
1 AFTP7319 AFTP7319
1 AFTP7317 AFTP7317
1 AFTP7308 AFTP7308
1
2
C
7
3
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
7
3
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1 AFTP7318 AFTP7318
1 AFTP7316 AFTP7316
1
2
R
7
3
0
4
1
0
K
R
2
J
-
3
-
G
P
R
7
3
0
4
1
0
K
R
2
J
-
3
-
G
P
1 AFTP7315 AFTP7315
1 AFTP7314 AFTP7314
1 AFTP7309 AFTP7309
1
2E
C
7
3
0
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
3
0
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
R
7
3
0
5
1
0
0
K
R
2
J
-
1
-
G
P
DY
R
7
3
0
5
1
0
0
K
R
2
J
-
1
-
G
P
DY
1 AFTP7312 AFTP7312
1 AFTP7313 AFTP7313
15
NP1
2
4
6
8
10
12
14
NP2
16
1
3
5
7
9
11
13
BT1
HRS-CONN14D-GP-U
BT1
HRS-CONN14D-GP-U
1 AFTP7310 AFTP7310
1 AFTP7311 AFTP7311
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
74 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
74 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
74 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
75 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
75 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
75 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_TXN2
PCIE_TXP2
USB_PN0
USB_PP0
USB_PN5
USB_PP5
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_RXN2
PCIE_RXP2
+3.3V_ALW
+KBC_PWR
+5V_ALW
+1.5V_RUN
+5V_USB1
+PWR_SRC
+PWR_SRC
+3.3V_RUN
BAT_IN# 37
AC_IN# 37
PSID_EC 37
WIFI_RF_EN 37
MINI1_CLK_REQ# 23
PCIE_WAKE# 22
KBC_PWRBTN# 37
PSID_DISABLE# 37
BT_ACT 73
PM_LAN_ENABLE 37
PLT_RST# 9,21,37,70
AD_IA 37
WLAN_ACT 73
E51_RXD 37
E51_TXD 37
CLK_PCIE_MINI1# 23
CLK_PCIE_MINI1 23
PCIE_TXP2 23
PCIE_TXN2 23
PCIE_TXP3 23
PCIE_TXN3 23
USB_PN0 21
USB_PP0 21
PCIE_RXN2 23
PCIE_RXP2 23
USB_PN5 21
USB_PP5 21
CLK_PCIE_LAN# 23
CLK_PCIE_LAN 23
PCIE_RXN3 23
PCIE_RXP3 23
BAT_SDA 37
BAT_SCL 37
BLUETOOTH_EN 37,73
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
IO Board Connector
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
IO Board Connector
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella UMA
X01
IO Board Connector
A3
<Core Design>
SSID = PWR.Support
WLAN CLK
WLAN SMBUS
USB Port
20.F1563.060
WLAN USB
LAN CLK
WLAN PCIE
WLAN PCIE
LAN PCIE
LAN PCIE
BATT SMBUS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
61
6
2
63
64 66
N
P
1
N
P
2
6
5
IOBD1
ACES-CONN60C-1-GP-U
IOBD1
ACES-CONN60C-1-GP-U
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
77 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
77 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
77 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
78 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
78 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
A3
78 90 Friday, April 16, 2010
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PWR_SRC
+1.05V_VTT
+3.3V_RUN
+1.5V_RUN
+5V_ALW
+1.8V_RUN
+3.3V_ALW
+PWR_SRC +3.3V_RUN
+3.3V_RUN +1.05V_VTT
+1.05V_VTT
+3.3V_RUN +3.3V_ALW
+1.8V_RUN +5V_ALW
+1.8V_RUN +5V_ALW
+1.8V_RUN +1.05V_VTT +PWR_SRC +3.3V_RUN
+3.3V_ALW
+1.05V_VTT
AUD_AGND
Title
Date: Sheet of
Wistron Corporation
UNUSED PARTS/EMI Capacitors
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
A3
<Core Design>
SSID = Mechanical
34.4F822.002
For Audio EMI
2010/04/19
X01
2010/04/19
X01
2010/04/20
X01
2010/04/20
X01
1
2E
C
7
9
2
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
2
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2E
C
7
9
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
SPR1
SPRING-14-GP
SPR1
SPRING-14-GP
1
2
E
C
7
9
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
E
C
7
9
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
H18
HOLE237R95-GP
H18
HOLE237R95-GP
1 2 C7910 SCD1U25V2ZY-1GP
DY
C7910 SCD1U25V2ZY-1GP
DY
1
2E
C
7
9
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2
EC7958
SCD1U10V2KX-4GP
DY
EC7958
SCD1U10V2KX-4GP
DY
1 2
EC7967
SCD1U10V2KX-4GP
DY
EC7967
SCD1U10V2KX-4GP
DY
1
2E
C
7
9
4
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
4
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2E
C
7
9
6
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
6
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2
EC7977 SCD1U10V2KX-4GP
DY
DY
1
2E
C
7
9
6
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
6
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
H2
HT85BE95R29-U-5-GP
H2
HT85BE95R29-U-5-GP
1
2E
C
7
9
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
H8
HOLE237R95-GP
H8
HOLE237R95-GP
1
H23
HOLE197R166-GP
DY
H23
HOLE197R166-GP
DY
1 2
DY
DY
1
2
E
C
7
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
E
C
7
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2E
C
7
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
E
C
7
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2
DY
DY
1
H21
HOLE197R166-GP
DY
H21
HOLE197R166-GP
DY
1
H4
HT85BE95R29-U-5-GP
H4
HT85BE95R29-U-5-GP
1 2
EC7970
SCD1U10V2KX-4GP
DY
EC7970
SCD1U10V2KX-4GP
DY
1
2E
C
7
9
2
6
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DJ1 Calpella UMA
X01
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Reserved
C
88 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
C
88 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Reserved
C
88 90 Friday, April 16, 2010
<Core Design>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Change History
A3
89 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Change History
A3
89 90 Monday, April 26, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Change History
A3
89 90 Monday, April 26, 2010
<Core Design>
Date Request By Page# Item
1
Rev. Solution Description Issue description
46 2010/04/16 Power team PU4603 (RT8205) shortage risk X01 Change to TPS51125
2 PU5002 (RT8207) shortage risk Change to TPS51116, DY PR5011 X01 50 2010/04/16 Power team
3 49 2010/04/16 EE
PM_PWROK to +1.05V_VTT power down sequence
out of SPEC
Modify PC4907=0.022U,PR5004, add R4905=1K X01
4 55 2010/04/16 EE For SIV CRT test fail item Modify RN5504=100 Ohm X01
5 Power team 2010/04/16 50 Cost down DY PTC5001 X01
6 53/13 2010/04/19 Power team
Change PC5321=0.015U, PC5326=0.01U, PR5312
Mount PC5319,PC5312,PC5311,C1325,C1328,C1323
Power team request
7
X01
47/12 2010/04/19 Power team
Modify PR4705=2,8K, PR4727=1.4K
Mount C1214=C1236=C1241=C1208=C1231=10U
X01 Power team request
8 X01 79 2010/04/19 ME For EMI Add SPR1
9 79 2010/04/21-22 EMC For EMI
Add EC7972-EC7981(DY)
Mount EC7938,EC7947,EC7954
X01
10 2010/04/21
26/37/47
/51/53/
EE Cost down
Change 0 Ohm resistance to 0 Ohm pad:
R2611,R2603,L3701,PR4706,PR4708,PR4713,PR4718,
PR4722,PR4732,PR4738,PR4744,PR4755,PR4764,
PR4707,PR4711,PR4776,PR4784,PR4703,PR4704,
PR4790,PR5102,PR5310,PR5313,PR5314,PR5317,
PR5333
11 60 2010/04/21 EE for audio vender's segguest Modify R6009,R6010 to 0 Ohm resistances
X01
X01
12 37 2010/04/21 EE For version ID Mount R3722, DY R3725 X01
13 46 2010/04/22 Power team For power snubber Mount PR4606=PR4607=2R2, PC4620=330P, PC4621=680P X01
14 46 2010/04/22 Power team For OCP Modify PR4603=140K
X01
15 47 2010/04/23 Power team Modify PR4717=10K X01 For power snubber
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
DJ1 Calpella Discrete X01
Power Sequence
A1
90 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Sequence
A1
90 90 Friday, April 16, 2010
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Power Sequence
A1
90 90 Friday, April 16, 2010
<Core Design>
+1.05V_VTT
T3
T30
SUS_PWR_DN_ACK
PCH to KBC GPI94
+KBC_PWR
+PWR_SRC
H_VTTPWRGD
S5_ENABLE
KBC GPIO43 to PCH
PCH to KBC GPI94
TPS51125 to KBC GPIO46
IMVP_VR_ON
(DC mode)
(AC mode)
KBC GPO53 to ISL62883
+5V_ALW
+VCC_CORE
>30us
SUS_PWR_DN_ACK
KBC GPIO43 to PCH
CK_PWRGD
+3.3V_ALW
T33
>1ms
AC
ISL62883 to CLOCKGEN
T31
KBC_PWRBTN_EC# GPIO3
32
T13
H_PWRGD
PLT_RST#
IMVP_PWRGD
ISL62884 to KBC GPO14
T38
H_CPURST#
T34
KBC LRESET#
T4
T25
T5
T19
T29
PM_PWROK
EC_ENABLE# (GPIO51) keep low
3V_5V_POK
( >99ms )
+1.8V_RUN
T6
PM_PWRBTN#
T7
T8
PCH_SUSCLK_KBC
PCH to KBC GPIO01
RUNPWROK
T10
KBC GPO16 to LAN
T11
PCH_SUSCLK_KBC
+V_DDR_REF(0.9V)
PCH to KBC GPIO00
+15V_ALW
+0.75V_DDR_VTT
+5V_RUN
+15V_ALW
TPS51125 to KBC GPIO46
+1.5V_RUN
+3.3V_RUN
DJ1 Calpella UMA-Power Up Sequence
KBC_PWRBTN_EC#
PM_SLP_S3#
T7
+3.3V_LAN
TPS51218 to KBC GPI34
PCH_RSMRST#(EC Delay 40ms)
+5V_ALW
S5_ENABLE
PM_SLP_S4#
+3.3V_ALW KBC GPIO36 control
+3.3V_RTC_LDO
T4
PM_PWRBTN#
KBC_PWRBTN_EC#
AC
KBC GPO84 to PCH
T12
CPU CORE Power
<3ms
T5
T14
T15
PCH_RTCRST#
+PWR_SRC
+RTC_VCC
T2
3V_5V_POK
T1
+1.5V_SUS
T3
PCH_RTCRST#
+RTC_VCC
T1
T8
<200ms
T10
T11
>10ms
>10ms
T21
+5V_ALW & +3.3V_ALW need meet 0.7V difference
+5V_RUN & +3.3V_RUN need meet 0.7V difference
T9
PM_PWRBTN#
AC
Press Power button
T6
PM_LAN_ENABLE
T18
T24
T20
AC_PRESENT_EC
T22
T23
T16
T17
KBC GPO84 to PCH
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable
>1ms
T35
+VCC_CORE
T37
T39
0.05ms< <650ms
3ms< <20ms T36
>1ms
VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
PCH_RSMRST#
Press Power button
+3.3V_RTC_LDO
T2
red word: KBC GPIO
KBC_PWRBTN_EC# GPIO3
KBC GPIO36 control
Delay 10ms
KBC GPIO47 to PCH
T9
+1.05V_VTT
H_VTTPWRGD
>30us
T13
DC
T25
T26
T27
T28
+1.8V_RUN
RUNPWROK
KBC GPO16 to LAN
+V_DDR_REF(0.9V)
+5V_RUN
+1.5V_RUN
+3.3V_RUN
PM_SLP_S3#
+3.3V_LAN
TPS51218 to KBC GPI34
PM_SLP_S4#
T14
T15
+1.5V_SUS
T20
+5V_RUN & +3.3V_RUN need meet 0.7V difference
PM_LAN_ENABLE
T18
T24
T19
T21
T22
T16
T17
PCH_RSMRST#
T30
VTT_PWRGD
IMVP_VR_ON
KBC GPO53 to ISL62883
+VCC_CORE
CK_PWRGD
T33
>1ms
ISL62883 to CLOCKGEN
T31
T32
H_PWRGD
PLT_RST#
IMVP_PWRGD
ISL62884 to KBC GPO14
T38
H_CPURST#
T34
KBC LRESET#
PM_PWROK
( >99ms )
CPU CORE Power
<3ms
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable
>1ms
T35
+VCC_CORE
T37
T39
0.05ms< <650ms
3ms< <20ms T36
>1ms
Delay 10ms
KBC GPIO47 to PCH
red word: KBC GPIO
T12
VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
VTT_PWRGD
GFX_VR_EN
T27
T26
+CPU_GFX_CORE
T28
T23
GFX_VR_EN
+CPU_GFX_CORE
T29
+0.75V_DDR_VTT

Dell Inspiron n4030 - Wistron Dj1 Calpella Uma 10212-Sb - Rev SB

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Dell Inspiron n4030 - Wistron Dj1 Calpella Uma 10212-Sb - Rev SB

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