724 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 52, NO.

11, NOVEMBER 2005

A New Compact Temperature-Compensated

CMOS Current Reference
Franco Fiori, Member, IEEE, and Paolo Stefano Crovetti, Member, IEEE

Abstract—This paper describes a new circuit integrated on

silicon, which generates temperature-independent bias currents.
Such a circuit is firstly employed to obtain a current reference
with first-order temperature compensation, then it is modified to
obtain second-order temperature compensation. The operation
principle of the new circuits is described and the relationships
between design and technology process parameters are derived.
These circuits have been designed by a 0.35 m BiCMOS tech-
nology process and the thermal drift of the reference current has
been evaluated by computer simulations. They show good thermal
performance and in particular, the new second-order tempera-
ture-compensated current reference has a mean temperature drift
of only 28 ppm C in the temperature range between 30 C and
100 C.
Index Terms—Analog integrated circuits, current reference, cur-
vature compensation, MOS integrated circuits, temperature com-
pensation, temperature drift. (a) (b) (c)
Fig. 1. MOS current references. (a) Standard MOS current reference. (b)
First-order temperature-compensated MOS current reference. (c) Modified
I. INTRODUCTION first-order temperature-compensated MOS current reference.

P RESENT day high-performance analog, digital and power

electronic systems require very stable, temperature-inde-
pendent voltage and current references for proper operation.
To this purpose, many high precision, temperature-compensated
reference circuits have been proposed in the literature over the
last decades [1]–[3] and, in particular, many efforts have been
made in order to develop reliable voltage and current references
in CMOS technology.
Many CMOS voltage references derive from bipolar bandgap
topologies, which have been adapted to CMOS exploiting the
parasitic lateral bipolar junction transistors (BJTs) in CMOS
processes [4], [5]. Furthermore, all-MOS voltage references
have also been proposed which exploit either the differences
in enhancement and depletion MOS devices [6] or the thermal
properties of MOS transistors biased in the weak inversion
region [7] or, more recently, the mutual compensation of
threshold voltage and mobility temperature drift [8]–[12].
Among these solutions, the circuits that show the best tem-
perature performance (second-order temperature-compensated
references) are usually complex and require a large silicon area
[13]–[15].
This paper proposes a new compact temperature-independent
current reference, which is made by only five MOS transistors
and two integrated resistors. Nevertheless, its performances over
temperature are comparable with those of much more complex
Manuscript received January 16, 2003; revised April 7, 2005. This paper was
recommended by Associate Editor E. M. Drakakis.
The authors are with the Dipartimento di Elettronica, Politecnico di Torino,
Torino I-10129, Italy (e-mail: fiori@polito.it).
Digital Object Identifier 10.1109/TCSII.2005.852529
1057-7130/$20.00 © 2005 IEEE
and area-consuming MOS and BJT references, as it shows a
mean temperature drift of 28 ppm C in the temperature range
between C and 100 C.
The paper has the following structure. In Section II, a
common CMOS current reference is considered and it is
pointed out how its temperature stability cannot be improved
by design. In Section III, a new current reference topology
is presented as a solution to overcome the limitations of the
standard CMOS reference and it is shown how first-order
temperature compensation can be achieved. In Section IV the
new circuit is further modified in order to obtain second-order
temperature compensation. In Section V the performances over
temperature of two new current references are discussed on the
basis of computer simulations and finally, in Section VI, some
concluding remarks are drawn.
II. TEMPERATURE DRIFT OF A STANDARD CMOS
CURRENT REFERENCE
In this section, the standard CMOS current reference shown
in Fig. 1(a) is analyzed and its limitations in terms of thermal
drift are highlighted. This circuit will be modified in the fol-
lowing in order to achieve first-order and second-order temper-
ature compensation.
The circuit shown in Fig. 1(a) is made up by two cross-con-
nected current mirrors: the current mirror and the
Widlar current mirror . In particular, the cur-
rent mirror fixes the ratio between the currents
flowing in the two branches, while the Widlar current mirror
defines the value of the reference current .

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 FIORI AND CROVETTI: NEW COMPACT TEMPERATURE-COMPENSATED CMOS CURRENT REFERENCE 725

All the MOS transistors in this circuit work in the saturation re- ical mechanisms [16]. Therefore, a reference current with a zero
gion, therefore their drain current can be expressed in terms temperature coefficient can be obtained if the ratio and the sign
of their gate-to-source voltage as follows [16] of these terms are properly chosen by design and first-order tem-
perature compensation is thus achievable.
(1)
This general reasoning can be formalized by the computation
where is the mobility of electrons (holes) in nMOS (pMOS) of the temperature coefficient of the current with reference to
devices, is the gate capacitance per unit of area, is the the new structure. If the current ratio is temperature indepen-
aspect ratio of the MOS device and is the threshold voltage. dent, as in the standard MOS current mirror , from (5),
With reference to the circuit in Fig. 1(a), the Kirchoff’s the temperature coefficient of the current can be expressed as
voltage law (KVL) equation
(6)
can be written as The details of this derivation are reported in Appendix I. On the
basis of (6), if
(2)
(7)
in which , where is the mobility of electrons
in nMOS transistors and is the aspect ratio of the transistor
can be set to zero if
.
The only temperature-dependent quantities in (2) are and (8)
, therefore the temperature coefficient of the reference cur-
rent can be written as Furthermore, assuming that condition (7) is not verified for
(3) a given set of process parameters, first-order temperature com-
pensation can be achieved as well, with reference to the modi-
or
fied circuit shown in Fig. 1(c). In this case, the first-order tem-
(4) perature coefficient is given by

where the notation for the relative temperature coefficient (9)

is adopted.
The temperature coefficient of the reference current only
depends on and on which are process parameters and
therefore, it cannot be set to zero through design. A compensa-
tion of the temperature drift of the reference current could be
possible by design if the voltage drop across would be given
by the sum of two terms with different temperature coefficients.
On the basis of this consideration, the new first-order tempera-
ture-compensated current reference has been developed.
III. FIRST-ORDER TEMPERATURE INDEPENDENT
CURRENT REFERENCE
This section presents a new first-order temperature-compen-
sated current reference, which overcomes the limitations of the
circuit previously discussed. In particular, the standard current
reference in Fig. 1(a) has been modified as shown in Fig. 1(b).
In this new circuit the diode-connected nMOS transistor has
been added. On the basis of (1), the KVL
gives
(5)
With reference to this circuit, the voltage drop across resistor
is given by the sum of two terms with different temperature
coefficients. In particular, one term is related to the overdrive
voltages of transistors , and and has a positive tem-
perature drift that is due to the negative drift of the mobility ,
while the other term is the threshold voltage whose (typ-
ically negative) temperature drift is related to different phys-
and can be set to zero if
(10)
which is positive if condition (7) is not verified.
In conclusion, first-order temperature compensation can
be achieved for any set of technological parameters by the
approach described in this section, using either the circuit
topology in Fig. 1(b) or the one in Fig. 1(c) and sizing the
resistance according either to (8) or to (10). Furthermore, it
can be observed that such a temperature compensation can be
achieved independently of the reference current value.
IV. SECOND-ORDER TEMPERATURE COMPENSATION
The circuits in Fig. 1(b) and in Fig. 1(c) provide a first-order
temperature-independent current reference but they are not suit-
able to achieve second-order temperature compensation through
design. This limitation can be overcome if a third, independent,
temperature drift mechanism is added. In particular, with ref-
erence to (5), second-order temperature compensation can be
achieved if the current ratio is temperature dependent. As the
MOS inverse Widlar mirror shown in Fig. 2(a) provides a tem-
perature-dependent current ratio, such a mirror is employed to
achieve second-order temperature compensation in the new ref-
erence circuit shown in Fig. 2(b).
In particular, it is shown that the first-order and second-order
temperature coefficients of the current ratio in an inverse
Widlar current mirror depend on its design parameters, there-
fore this mirror can be sized to show exactly the temperature de-
pendence which is required to obtain second-order temperature

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 726 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 52, NO. 11, NOVEMBER 2005

From (13), if and only if , as a conse-

quence, from the temperature derivative of and from (12),
second-order temperature compensation is achieved if

(14)

where is the second-order relative temperature coefficient

of the quantity , i.e., .
Equation (14) expresses the condition which should be re-
spected by the first-order and second-order temperature coeffi-
(a) (b) cients and of the current ratio in order to set to zero
Fig. 2. Second-order temperature compensation. (a) MOS inverse Widlar the second-order temperature coefficient of the reference cur-
current mirror. (b) Second-order temperature-compensated MOS current rent , thus obtaining a second-order temperature-independent
reference. circuit. In the following it is shown how a CMOS inverse Widlar
current mirror can be designed to obtain the temperature-de-
compensation in the circuit in Fig. 2(b). The above reasoning is pendent current ratio which is required in (14) to achieve
deepened in the following on the basis of the expressions of the second-order temperature compensation.
first-order and second-order temperature coefficients and design
equations for the second-order temperature-compensated cur- B. Temperature Drift of the Current Ratio in a CMOS Inverse
rent reference are derived. Widlar Current Mirror
The MOS inverse Widlar mirror shown in Fig. 2(a) provides
A. Temperature Coefficients of the Reference Current a temperature-dependent current ratio which is exploited
With reference to the circuit in Fig. 2(b), the first-order and in the circuit of Fig. 2(b) to achieve second-order temperature
the second-order temperature coefficients of the current can compensation. In fact, with reference to the current mirror in
be derived on the basis of (5) taking into account that the MOS Fig. 2(a), the current ratio can be expressed in terms of the
inverse Widlar mirror provides a temperature-de- design parameters of the circuit and of the current as
pendent current ratio . Under this assumption, the first-order
temperature coefficient can be written as shown in (11) at the (15)
bottom of the page. Such an expression is derived from (5) by
the same approach which has been presented in Appendix I. where in which is the mobility of holes
According to (11), shown at the bottom of the page, the first- in pMOS devices and .
order temperature coefficient is set to zero if On the basis of (15), the first-order and the second-order tem-
perature coefficients of the current ratio are derived
(12)
(16)

where
(17)

where and .
Equations (16) and (17) express the first- and second-order
temperature coefficients of the current ratio as a function of
The first-order temperature coefficient (11) is written in the form
process parameters and of the value of the current ratio mul-
where the denominator is a finite
tiplied by , so they can be employed in (14) to find out the
quantity, therefore implies that and, if
values of and which are suitable to achieve second-order
the first-order temperature coefficient is set to zero, the second-
temperature compensation.
order temperature coefficient of the reference current can be ex-
pressed as
V. COMPUTER SIMULATION RESULTS
A first-order temperature-compensated and a second-order
(13)
temperature-compensated current reference have been de-

(11)

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 FIORI AND CROVETTI: NEW COMPACT TEMPERATURE-COMPENSATED CMOS CURRENT REFERENCE
TABLE I
CURRENT REFERENCE CIRCUITS PERFORMANCES
(a)
(b)
Fig. 3. Reference current versus temperature. (a) first-order
temperature-compensated current reference. (b) Second-order
temperature-compensated current reference.
signed according to the criteria which have been presented in
the previous Sections. Both the new current references have
been designed and simulated by ELDO [17] with reference
to the models of the devices available in a 0.35 m BiCMOS
technology. The main electrical characteristics of these two
circuits are summarized in Table I, where their performances
are also compared with the current references presented in
[8]–[11].
The reference current versus temperature of the first-order
reference shown in Fig. 1(b) is plotted in Fig. 3(a). It can be
observed that the reference current, which has a nominal value
of 15.150 A at 30 C, has a residual temperature drift of about
500 nA (about 3.3%) in the temperature range between C same circuit in which the body terminals of transistors
and C, i.e., in this range it shows a mean temperature drift
of about 130 ppm C, which can be suitable to most low-cost
applications.
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727
Fig. 4. Untrimmed second-order temperature-compensated current reference:
process corner sensitivity and body effect (continuous line: nominal value,
dotted line: min corner, dashed line: max corner, dash-dot line: circuit with the
body terminals of M1 and M2 tied to GND).
In Fig. 3(b), the reference current versus temperature in the
second-order temperature-compensated reference in Fig. 2(b) is
plotted. It can be observed that this current reference, which has
a nominal value of 13.650 A, has a residual temperature drift
of about 25 nA (about 1800 ppm) in the temperature range
between between C and C, i.e., in this interval it
shows a mean temperature drift of 28 ppm C. Based on this re-
sults, the second-order temperature-compensated circuit shows
a temperature drift which is one order of magnitude less than the
first-order temperature-compensated circuit in the same temper-
ature range. Such a temperature drift, which makes the circuit
suitable to high-precision applications, is achieved for the nom-
inal values of the components and can be obtained in actual in-
tegrated circuits by resistor trimming.
The effect of process corner variations of technology param-
eters is shown in Fig. 4, in which the temperature drift of the
untrimmed circuit is plotted over the process corners (dotted
line: min corner, straight line: typical value, dashed line: max
corner). It can be observed that the nominal value of the ref-
erence current is rather sensitive to process corner variations,
while its temperature drift (about 150 ppm C in the worst
case), even though is worsened, is still comparable to the drift
of most current references in the literature.
In Fig. 4, the influence of the body effect is also shown. In
particular, the dash-dotted line gives the temperature drift of the
and
are tied to ground. The influence of the body effect is less
severe than process corner variations and it can be taken into
account in the design of the circuit.
 728 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 52, NO. 11, NOVEMBER 2005
VI. CONCLUSION
In this paper, new first-order and second-order temperature-
compensated compact CMOS current references have been pre-
sented and analyzed. These circuits, which require a silicon area
of only 4200 m , have been compared in terms of perfor-
mances with MOS current references known in the literature.
The second-order temperature-compensated circuit, in partic-
ular, achieves a nominal (trimmed) mean temperature drift of
only 28 ppm C in the temperature range between C and
100 C, which is better than MOS current references previously
known in the literature. Even in the presence of process corners
variations, the untrimmed mean temperature drift of the refer-
ence current is about 150 ppm C and it is still comparable with
state-of-the-art current references. Both the first-order and the
second-order temperature-compensated current references have
been designed by a 0.35 m BiCMOS technology process and
their performances have been verified through computer simu-
lations.
APPENDIX
The first-order temperature coefficient of the reference cur-
rent is obtained from the total differential of (5), which defines
implicitly the reference current as a function of technology and
design parameters. This differential is evaluated assuming the
current and the absolute temperature as independent vari-
ables and taking into account that the only temperature-depen-
dent quantities which appear in (5) are , and . This
differential, on the basis of (5), can be written as
(18)
From (18), the derivative of the reference current with respect
to the absolute temperature is obtained
(19)
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and then, the relative temperature coefficient of the reference
current
(20)
The first-order temperature coefficient of the reference cur-
rent in the second-order temperature-compensated circuit can
be obtained in a similar way, if one also considers the tempera-
ture dependence of .
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