DEPARTMENT OF ELECTRICAL & ELECTRONIC ENGINEERING

BANGLADESH UNIVERSITY OF ENGINEERING & TECHNOLOGY

COURSE NO.: EEE 210
EXPERIMENT NO. 01
Name ! "#e E$%e&'me(": STUDY OF DIODES AND ITS APPLICATIONS.
OB)ECTIVE
The objective of this experiment is to simulate
I-V characteristics of diodes.
Clipper and clamper circuits.
Diode bridge rectifier.
Regulated power supplies using diodes.
THEORY
p-n junction diode is a two-terminal device that acts as a one-wa! conductor. "hen a diode is
forward biased as shown in #ig. $%a&' current ID flows through the diode and current is given b!

= $
T
a
nV
V
S D
e I I
%$&
where' n is the idealit! factor and $ n (. I) is the reverse-saturation current and VT *+T,- is
the thermal voltage. VT is about ...(/V at room temperature.
Va


D$
0 $12..$
$3
V R
-
"hen it is reverse biased as shown in #ig. $%b&' ID * -I) %for see e-n. %(&&. s it is generall! in p
%pico-amp& range' in man! applications this current is neglected and diode is considered open.

S
V
V
S D
I e I I
T
R
=

=

$
for 4V4 55VT %(&
The material for p-n junction diode is silicon semiconductor. )emiconductors are a group of
materials having electrical conductivit! intermediate between metals and insulators.
6etals7 l %aluminum&' Cu%copper&'u%gold&.
Insulators7 Ceramic' "ood ' rubber.
)emiconductor7 )i %silicon&' 8e %germanium&' 8as %gallium-arsenide&.
P*"+%e S','-(:
"hen an intrinsic silicon semiconductor is doped with l impurities' it becomes p-t!pe. t
thermal e-uilibrium'
po*1 and no * ni
(
,1

where' po is the hole concentration ' no is the electron concentration ' 1 is the doping densit! of
impurities%acceptor atoms&'

ni is the intrinsic concentration. ni * $.9x$.
$.
cm
-:
for )i at room
temperature .
N*"+%e .','-(:
"hen an intrinsic silicon semiconductor is doped with ;%phosphorous& impurities it becomes n-
t!pe . t thermal e-uilibrium' no*1D and ;o* ni
(
,1D. <ere' 1D is the doping densit! of
impurities %donor atoms&.
In semiconductor both holes and electrons contribute to current.
;age $ of =
#ig.$%a&
C/&&e("*V,"a0e C#a&a-"e&'."'-.
Vin is the cut-in voltage. Its value is usuall! ..9V. t this voltage' diode is forward biased but
even then I is ver! small and it is usuall! neglected. "hen diode is reverse biased and V> V3'
diode drives into brea+down and a large current will flow. The current can be limited b! using
resistor in diode circuit. If the slope %dI,dV& is ver! steep' the brea+down mechanism is called
?ener brea+down. ?ener diode can be used in regulator circuit.
P'e-e1'.e*L'(ea& 2& Ba""e&+*P,/.*Re.'."a(-e3 m4e,:
RD@...(9An,ID
Sma,, .'0(a, a- m4e,
The previous models represent the dc behaviour of the diode
"hen there are small changes of current through the diode need a small signal or ac model
small change in forward current through the diode will give rise to a corresponding change
in forward voltage
;age ( of =
V
in
*..9V
Reverse Brea+down
V
I
#ig. $%b&
I,V * %-,+BT&I.exp%-V,+BT& -I,+BT
This gives rise to an effective resistance of the diode to small currents
- the DC16IC #DR"RD RE)I)T1CE of the diode
&D 5 V6I 5 7BT68I
t room temp rD ...(9,I * $,2.I
D!namic resistance onl! changes slightl! for small changes in temp.
Dhmic resistance decreases with increase in T -(.9 mV,3
C,'%%e& a(4 -,am%e& -'&-/'".:
Fimiter or clippers are used to cut-off or eliminate a portion of an ac signal. limiter can be
realiGed b! using diode and resistor as shown in #ig $.
Input to a limiter Dutput

The clamper circuit is one that will clamp a signal to a different dc level.
Input to a clamper Dutput

PIV2
Pea7 I(9e&.e V,"a0e3
;IV is the pea+ reverse voltage that appears across the diode when it is reverse-biased.
;IV * Vm
;age : of =
V
0
I
dV
dI
t
V
i
t
V
o
t
Vi
V
o
$.V
t
2V
-/V
D'4e Re-"'!'e&.
Diodes can be used to RECTI#C D,; from ac suppl! to produce a dc suppl!
on 0ve half c!cle of I,; wave
diode is fwd. biased
diode conducts
on -ve half' diode rev. biased
diode is rev. biased
diode does not conduct
<F#-"VE RECTI#IER
o
V R
L
V
i
V
o
V
i
t
t
C
HW Rectified O/P
HW Rectifier
I
(without C)
verage voltage %as seen on dc voltmeter&
Va9e 5 V%6
rms voltage %as seen on ac voltmeter&
V&m. 5 V%62
Smoothing
V
o
t
HW Rectified O/P
Ripple voltage
Charging
i!charging
Pea" Voltage
dc Voltage
V
p
V
dc
#$oothed
V
r
Output Voltage
If a capacitor is placed across output
capacitor charges on rising edge of 0ve half-c!cle
discharges on falling edge
D,; is smoothed
ctual pea+ D,; will be reduced from pea+ I,; b! value of forward. bias
Vp%out& * Vp%in& - ..H V
Ripple voltage
finite load current I causes capacitor voltage to drop b! V
r
during ac c!cle
ripple in D,; is approx. sawtooth in shape neglect charging time
assume discharge ta+es one complete period %T&
Charge flowing from capacitor in time T
I * IT
;age 2 of =
#all in capacitor voltage * p+-p+ ripple
Vr * I,C * IT,C
But T * $,f %f is ac fre-uenc!&
V&2H:3 5 I6C! H: R'%%,e V,"a0e
s the ripple voltage increases the average %dc& D,; voltage decreases
Vdc * Vp -$,(%Vr&
V4- 5 V% ; 0.<C! H: 4- V,"a0e
Ripple factor defines magnitude of smoothing effect
& 5 2V&6V4-3 100= R'%%,e !a-"&
Full Wave Rectifier
Better rectification is obtained if circuit conducts on both I,; half-c!cles
Dn first half-c!cle
"hen terminal is 0ve' D$ conducts to ma+e top end of load 0ve
t same time terminal B is -ve' D: conducts to lower end of load
Dn next half c!cle
Terminal is -ve and B is 0ve' D( conducts to top end of load' D2 conducts to lower end
Va9e 5 2V%6 %without smoothing capacitor&
#or #" rectification' ripple fre-uenc! is twice ac I,; fre-uenc!
V&2F:3 5 0.< C! R'%%,e 9,"a0e
V4- 5 V% ; 0.2< C! 4- V,"a0e %as seen on dc voltmeter&
%
&
'
(
R
L
)
*
ac
Input !ignal
Output !ignal
t
t
C
N. B. Ripple Voltage*)IRT%%R6)%V%R$7(&&JR6)%V%R$7(&&-V8%V%R$7(&&JV8%V%R$7(&&&&
;age 9 of =
0 V
V
dc
V
p
V
r
PROCEDURE
I*V C#a&a-"e&'."'-. ! D'4e 1N>001
F'0.1. DC a(a,+.'. ! D1N>001
D&a1 "#e -'&-/'" .#1( '( F'0. 1 '( PS%'-e .-#ema"'-.. U.e a(+ ! "#e 1N>001?1N>00@ a.
4'4e m4/,e.
He&eA !& 4e"e&m'('(0 "#e I*V -#a&a-"e&'."'-. a DC S1ee% ! V1 !&m ;<V " B10 9,". 1',,
Ce (ee4e4. Se" "#e '(-&eme(" ! V1 " 0.1 9,". '( ,'(ea& .1ee% m4e.
R/( "#e .'m/,a"'(.
OC"a'( I*V -#a&a-"e&'."'- ! "#e 4'4e '( "#e %&Ce.
B+ -#a(0'(0 "#e DC .1ee% 4e"e&m'(e "#e !,,1'(0:
a& Reverse saturation current.
b& Diode brea+down voltage.
OC"a'( P'e-e1'.e ,'(ea& m4e, !& "#e 4'4e 1#e( V1510V 2Hme :&73.
To obtain this choose B'a. P'(" De"a', from Se"/% A(a,+.'..
Run the simulation and clic+ on the Enable Bias Current Displa!.
1ote the diode current %ID&.
Determine RD.
#or finding VTD from the I-V curve' clic+ on the T00,e C/&.& button. )elect one
point near ID' right-clic+ on the same point. Clic+ another point near the first one.
Dbtain voltage and current magnitudes at two selected points %V$' I$' V(' I(& from the
P&Ce C/&.& menu. Then use the following formula7
VTD * V$-I$J %V$-V(& , %I$-I(&
Re%,a-e "#e 4'4e '( F'0. 1 1'"# a De(e& 4'4e 2D1N@<03 a(4 &e%ea" ."e%. 1 " <2C3 2Hme
:&73.
;age / of =
C,'%%e& C'&-/'"
F'0.2. C,'%%e& C'&-/'"
2.1. D&a1 "#e -'&-/'" .#1( '( F'0. 2 '( PS%'-e .-#ema"'-. /.'(0 1N>001 2& a(+
"#e&3 a. 4'4e m4/,e.
2.2. He&eA !& 4e"e&m'('(0 "#e '(%/" 9.. /"%/" -#a&a-"e&'."'-. V1 '. .e" " 1EHF a(4
10V 2%ea73. C((e-" 9,"a0e ma&7e&. a. '(4'-a"e4 '( F'0. 2. Se" "&a(.'e(" a(a,+.'. /%"
<m..
2.G. R/( "#e .'m/,a"'(.
2.>. OC.e&9e "#e '(%/" 2V13 a(4 /"%/" 2a" D1H. A(4e "e&m'(a,3 9,"a0e. '( "#e
%&Ce.
2.<. C#a(0e V2 !&m ;1V " >V '( 1V ."e%. OC.e&9e a(4 ("'!+ 1#a" #a%%e(..
2.I. E$%,a'( "#e 9a,/e ! /"%/" 9,"a0e '! V2 '. .e" " ;<V.
C,am%e& C'&-/'"
F'0.G. C,am%e& C'&-/'"
:.$. Draw the circuit shown in #ig. : in ;)pice schematics using $12..$ %or an! other&
as diode module.
:.(. <ere' for determining the input vs. output characteristics V$ is set to $3<G and $.V
%pea+&. )et R$ * $6' C$ * $# and V( * 9V. Connect voltage mar+ers as indicated in #ig.
:. )et transient anal!sis upto 9ms.
:.:. Run the simulation.
:.2. Dbserve the input %V$& and output %across R$& voltages in the probe.
:.9. Change V( from K2V to 2V in (V step. Dbserve and notif! what happens.
:./. )et R$ * (9.' C$ * $# and V( * .V. Dbserve the output voltage waveform and
explain it.
;age H of =
:.H. Lsing s-uare wave' repeat steps ( to / and notif! if there is an! difference source is
changed from sinusoidal to s-uare.
:.A. Change the polarit! of Diode and using sinusoidal source' repeat steps ( to /.
D'4e B&'40e Re-"'!'e& a(4 Re0/,a"e4 P1e& S/%%,+
F'0.>. D'4e C&'40e &e-"'!'e&
Draw the bridge rectifier circuit as in #ig. 2. Lse $12..$ as diode module. TM$ is a transformer
having part name NM#R6OFI1ERP. Double-clic+ it and set F$ and F( to $..m<.
)et V$ to $.V' 9. <G. Run )imulation.
Dbserve the waveform across R(.
1otif! the average voltage across R( %Vdc& and ripple voltage across the same. lso find the
R6) value of the ripple voltage %Vac&. Compare with theoretical values. Q#or finding the average
and R6) values of an! signal use V8 and R6) functions. Clic+ Ndd traceP icon. Then select
Nnalog operators and functionsP from the N#unction and 6acrosP pop-up menu. )elect
appropriate functions as necessar!.R
Connect a capacitor across R( and use values of ((#' 2H# and $..#. Repeat step : and 2 in
each case. Comment on the results.
F'0.<. Re0/,a"e4 DC P1e& S/%%,+
The final stage is to remove the ripples and get a better DC voltage using a ?ener regulator.
Draw the circuit of #ig. 9' using RF * 9.. and C( * $..#. Configure the ?ener diode model
%)elect the Gener diode' then go to Edit 6odel& with V? * 9V %Bv in the Edit Instant model&.
Chose value of R: properl! %around (..&. "ith the load RF disconnected' design the circuit for
a ripple level of ..$V and a maximum diode current of $.m.
#or the circuit of #ig. 9 with a load RF*9..' estimate the change in output voltage due to the
load. "hat is the maximum load %minimum load resistance& that can be tolerated b! the designed
suppl! circuitS
;age A of =
P&e%a&e4 C+ : Yea.'& A&a!a"A A#ma4 E#"e.#am/, I.,amA S#a'7# A.'! Ma#m4
;age = of =