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FACULTY OF SCIENCE
Department of Computer Science
IT322: Microprocessor Based Design
Lecture 13: Modes of Operation

Different Modes of Operation

The 8088/8086 can operate in two modes:

(1) Maximum mode.
(2) Minimum mode

Maximum mode

This mode supports existence of more than one processor in a system i.e. multiprocessor system.
In a multiprocessor system environment more than one processor exists in the system, and each
processor is executing its own program.

In this system the resources which are common to the processors are called global resources;
resources assigned to specific processors are called local or private resources. A microprocessor
and associated co-processor also forms multiprocessor system.
In maximum mode of operation 8086/88 provides facilities (i.e by generating suitable signals)
for implementing allocation of global resources and passing bus control to other microprocessor
or co processor.
Math coprocessor
Math coprocessors were additional chips which could be purchased with 386 and older chips.
This additional chip was left as an option to help reduce the cost of computers. Coprocessors
allow the hardware for floating-point math. Math coprocessors will speed your computer's
operation when utilizing software applications that take advantage of its capabilities. Computers
now no longer require the extra purchase of the math compressor. Below is a listing of computer
processors and their coprocessors.
Processor Coprocessor
8086 8087
8088 8087
80286 80287
80386SX 80387SX
80386SL 80387SX
80386SLC 80387SX
80486SLC 80387SX
80486SLC2 80387SX
80386DX 80387DX
80486SX 80487SX, DX2/Overdrive
80487SX Included
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80486SX2 DX2/Overdrive
80486DX Included
80486DX2 Included
80486DX4 Included
Pentium/Pentium-MMX Included
Pentium Pro Included
Pentium II Included
Pentium III Included
Minimum mode
This mode of 8086/88 is used for implementing single processor based systems.

Selection of mode

The input pin MN/MX is used to select the mode of operation i.e logic 1 minimum mode of
operation, logic 0 maximum mode of operation.
Internal details of 8086
It consists of an Execution Unit (EU) and a Bus Interface Unit (BIU).

the EU and BIU can operate in parallel thus enhancing speed of operation
BIU pre-fetches instructions in the instruction queue, which can store up to 6 bytes (form of
pipe-lining)
There is a control unit associated to each of the EU and BIU units.

Bus Interface Unit

The BIU manages all external bus operations:-

I/O read and write.
Memory read/write.
Address generation and storing of pre-fetched instructions.

The Bus Interface Unit (BIU) consists of the following:-

Instruction Queue: this allows the next instructions or data to be fetched from memory
while the processor is executing the current instruction. The memory interface is usually
much slower than the processor execution time, so this decouples the memory cycle time
from the execution time. It is a first in first out memory.
Segment Registers
Instruction pointer

Execution Unit

The EU does the following:-
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Decodes the instructions fetched by BIU.
Execution of the instruction

It contains the Arithmetic and Logic Unit (ALU). ALU is used to perform Arithmetic operations
(ADD, SUB, MULT, and DIV), logical operations (OR, AND, XOR, Complementing, Shifting
and Rotations).

The figure below shows the internal organization of the 8086.


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CPU Support Chips

8088 microprocessor by itself is not a microcomputer because it does not contain any memory or I/O
ports. It can compute and take logical decisions but 8088 by itself cannot remember the computed results
or communicate the same to the external world.

Therefore to assist the microprocessor in all possible communications with memory and I/O devices, a
number of general-purpose programmable peripheral interface devices were developed. These devices are
called I/O chips or supporting chips.

These supporting chips performfunctions such as: -

(i) Input/output.
(ii) Introducing time delays.
(iii) Counting.
(iv) Interrupt handling e.t.c.

Supporting chips include:-

(i) The Programmable Peripheral Interface Adaptor- 8255A.
(ii) The Programmable Interval Timer/Counter -8253/8254.
(iii) DMA Controller-8237.
(iv) Programmable Interrupt Controller 8259.
(v) Clock Generation (8284A).
(vi) 8288 Bus controller.

However in recent PCs many of these support chip functions are available in a single custom chip
mounted on the PC motherboard.