2 Marks Corrected 10.12.13 (MPMC)

CS2252 MICROPROCESSORS AND MICROCONTROLLERS IV SEMESTER
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 1

DHANALAKSHMI COLLEGE OF ENGINEERING
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
MICROPROCESSORS AND MICROCONTROLLERS
Two mark Questions and Answers

SUBJECT CODE: CS2252 YEAR: II IT/ II CSE
UNIT I
THE 8085 AND 8086 MICROPROCESSORS
PART A
1. What is a flag? What is the use of auxiliary flag? April/May 2011
Flag is a flip flop used to store the information about the status of the processor and the
status of the instruction executed most recently.
The 8085 flags are:
1. Sign flag (S)
2. Zero flag (Z)
3. Auxiliary carry flag (AC)
4. Parity flag (P)
5. Carry flag (CY)
Auxiliary carry flag is set if there is an overflow out of bit 3. This flag is used for
BCD operations.
2. State the role of RESETIN and RESETOUT signals in 8085 processor. April/May 2011
RESET IN is an active low signal, a low on this pin
i) Sets program counter to zero(0000H)
ii) Reset IE and HLDA
RESET OUT is an active high signal. It indicates that the processor is being reset and it
can be used to reset other devices which are connected in the system.

3. Identify the addressing mode of the following 8085 instructions. Nov/Dec 2011
(a) SHLD 2500H (b) DCR E
(a) SHLD 2500H is a Direct addressing mode
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


(b) DCR E is a Register addressing mode.
4. Name the machine cycles needed to execute the 8085 instruction .
MVI B, 4FH. Nov/Dec 2011
The machine cycles needed to execute the 8085 instruction MVI B, 4FH are
i) Opcode fetch
ii) Memory read
iii)Memory write
5. Name any two single byte instructions to clear the accumulator register of 8085.
Nov/Dec 2010
The single byte instructions that clear the accumulator register of 8085 are XRA A
6. List the machine cycles involved in the execution of the following 8085 instructions.
(a) PUSH PSW, (b) MOV A,M. Nov/Dec 2010
PUSH PSW: Opcode fetch, Memory write, Memory write
MOV A,M: Opcode fetch, Memory Read
7. Assume that the accumulator contains data bytes 82H and the instruction MOV C,A
(4FH ) is fetched. List the steps in decoding and executing the instruction. April/May 2010
Step i: Opcode fetch
Step ii: Memory read
Step iii: Memory write
8. What is the second byte in the instructions IN and OUT of 8085 microprocessor?
April/May 2010
The second byte in the instructions IN and OUT of 8085 microprocessor is an 8-bit
address.
9. How many memory locations can be addressed by 8085 microprocessor?
May/ June 2012
The 8085 microprocessor contains 16 address lines, so it is capable of addressing 64kB of
memory locations.(2
16
=64KB)
10. Write an example for direct and indirect addressing modes of 8085. May/ June 2012
Direct addressing modes: LDA 2000H,LHLD 3000H
Indirect addressing modes: LDAX B,MOV M,A.

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


11. Why is the program counter and stack pointer registers 16 bits? Nov/Dec 2012
Program Counter (PC) and Stack Pointer (SP) are used to hold 16-bit memory addresses.
PC stores the 16-bit memory address of the next instruction to be fetched. SP points to the
beginning of stack memory. SP can be used to temporarily store the 16-bit memory address
as well as data. So PC and SP are 16-bit registers.
12. What operation can be preferred by using the instruction XRA A? Specify the status of
Z and CY flag. Nov/Dec 2012
The operation preferred by XRA A is clear accumulator content. The status of Z flag is 1
and CY flag is 0.
13. What are the limitations of 8085 microprocessor?
The limitations of 8085 are:
1. The low-order address bus of the 8085 microprocessor is multiplexed (time
shared) with data bus. The buses need to be demultiplexed.
2. Appropriate control signals need to be generated to interface memory and I/O
with the 8085.
14. Why is data bus bi-directional?
The data bus is bidirectional because the microprocessor has to fetch (read) the
data from memory or input device for processing and it has to store (write) the data to
memory or output device after processing.
15. Why is address bus unidirectional?
The address is an identification number used by the microprocessor to identify or access a
memory location or I / O device. It is an output signal from the processor. Hence the address bus
is unidirectional.
16. List the classification of signals in 8085?
The signals of 8085 can be classified into 6 groups
1. Address bus signals
2. Data bus signals
3. Control and status signals
4. Power supply and frequency signals
5. Externally initiated signals
6. Serial I/O signals
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


17. What are the purpose of SID and SOD lines?
The purpose of SID and SOD lines are:
SID (Serial input data line):
It is an input line through which the microprocessor accepts serial data.
SOD (Serial output data line):
It is an output line through which the microprocessor sends serial data.
18. What is HOLD and HLDA? How are they used?
HOLD and HLDA signals are used for the Direct Memory Access (DMA) type of
data transfer. The DMA controller places a high on HOLD pin in order to take control of
the system bus. The HOLD request is acknowledged by the 8085 by driving all its
tristated pins to high impedance state and asserting HLDA signal high.
19. What is an opcode?
Operation code or Opcode is the part of an instruction that specifies the operation
to be performed by the microprocessor.
20. List the five categories of 8085 instructions. Write examples for the instructions in each
group.
1. Data transfer group
MOV A, B
MVI A, 08H
LXI H, 4200H
2. Arithmetic group
ADD C
SUB B
INR A
3. Logical group
ANA B
XRA C
CMP B
4. Branch group
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


JMP 4100
JNZ 4200
CALL 4300
5. Stack I/O and Machine control group
PUSH B
POP D
IN 42H
HLT
21. What is the use of addressing mode? Mention the different types of addressing modes.
The different ways that a microprocessor can access data are referred to as addressing
modes. The 8085 has five addressing modes. These are:
1. Immediate addressing
2. Register addressing
3. Direct addressing
4. Indirect addressing
5. Implicit addressing
22. Mention the machine cycles in 8085.
The 8085 have seven machine cycles. They are:
1. Opcode fetch
2. Memory read
3. Memory write
4. I/O read
5. I/O write
6. Interrupt acknowledge
7. Bus idle

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


UNIT II
8086 SOFTWARE ASPECTS
PART A
1. Draw the 8086 flag register format. April/May 2010
The format of flag register of 8086 is,

OF = Overflow flag
DF = Direction flag
IF = Interrupt enable flag
TF = Trap flag
SF = Sign flag
ZF = Zero flag
AF = Auxiliary carry flag
PF = Parity flag
CF = Carry flag
2. List different types of 8086 hardware interrupts. April/May 2010
The 8086 hardware interrupts are NMI,intr.
3. List the pointer and index registers of 8086 architecture.
Nov/Dec 2010
The pointer registers of 8086 are Stack Pointer (SP), Instruction Pointer (IP).
The index registers of 8086 are Source Index (SI), Destination Index (DI).
4. Identify the addressing modes involved in the following 8086 instructions. Nov/Dec 2010
MOV AX, 0005H--------------------Immediate addressing mode
MOV AX, 50H [BX][SI]----------Base relative plus index addressing mode
5. What is the general purpose registers in 8086? Nov/Dec 2011
The general purpose registers in 8086 are AX,BX,CX,DX.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


6. What is the importance of the assembler directive EVEN? Nov/Dec 2011
The assembler directive EVEN tells the assembler to advance its location counter if
necessary so that the next defined data item or label is aligned on an even storage boundary.
7. List the pin of 8086 other than address pins and data pins. April/May 2011
The pins of 8086 are RESET, READY and NMI.
8. What are assembler directives? Write an example. April/May 2011
Assembly directives are also called pseudo opcodes. An assembler directive is a message
that the assembler needs to know in order to carry out the assembly process.
For example, an assemble directive tells the assembler where a program is to be located in
memory.
Examples: ORG (origin), EQU (equate), and DB (define byte).
10. What is BIOS function call in 8086 microprocessor? May/ June 2012
BIOS function call is to call basic input output system in 8086.
Examples: Int 17H,Int 10H.
11. What is the address used for a type 2 interrupt in 8086? Nov/Dec 2012
The address for a type-2 interrupt in 8086 is 0008h.(2x04=0008H)
12. What is the use of macro? Nov/Dec 2012
The macro is used in the microprocessor to reduce the length of the program. The macros
in the program can be defined by MACRO directive. Macro is a group of instructions. The macro
assembler directive generates the code in the program each time where the macro is called.
13. Define pipelining?
Pipelining is the feature of fetching the next instruction while the current instruction is
executing.
14. How the physical address is calculated?
Physical addressing is used to address 1MB memory of 8086. The 8086 memory address
is 20 bits but all the registers used for memory calculation are of 16 bit length. The 20 bit
physical address is computed by summing the contents of the segment register (shifted left by
4 bits) and an effective (offset) address. The segment register holds the upper 16 bits of the
20 bit memory address. The effective address represents the offset from the starting address
of the segment
Eg: (CS 10
H
) + IP = Physical address
CS is shifted left by 4 bit and summed with IP (offset) to compute physical address
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


15. What are the fundamental differences between minimum mode and maximum mode
operations?
Minimum mode Maximum mode
Suitable for unit processor or single
processor system.
Suitable for multiprocessor
systems(more than one CPU)
Compatible with smaller systems Compatible with larger systems

MN/MX is set to logic 1

MN / MX is set to logic 0

16. What are the types of interrupts in 8086?
The types of interrupts in 8086 are,
1. Type 0: Divide by zero interrupt
2. Type 1: Single step interrupt
3. Type 2:Non maskable interrupt
4. Type 3: Breakpoint
5. Type 4: Overflow interrupt
6. Software interrupts
7. Type 0-255
17. What is interrupt service routine ?
Interrupt service routine is a subroutine ( sequence of instructions) which will be
called when an interrupt is serviced.

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


UNIT III
MULTIPROCESSOR CONFIGURATIONS
1. Compare closely coupled configuration with loosely coupled configuration.
Apr/May 2010
Tightly Coupled Loosely Coupled
1. Shared memory multiprocessor
system
2. Several processor share a common
memory
3. Processors communicate through
shared memory
4. Well suited and more efficient for
higher degree of interaction between
tasks.
1. Distributed memory multiprocessor
system
2. Each processor has its own
memory
3. Processors tied together by switching
scheme and communicate through
message passing system.
4. More efficient when the interactions
between tasks are minimal.

2. Mention the need for co-processor in a microprocessor based system. Apr/May 2010
a. To increase the execution speed of the microprocessor system.
b. To perform multiple tasks at the same time.

3. What are the two internal sections of 8087 architecture? Nov/Dec 2010
The two internal sections of 8087 architecture are
a) Control Unit
b) Execution Unit

4. What are the features of closely coupled multiprocessor systems? Nov/Dec 2011
The features of closely coupled multiprocessor systems are
a) CPU and external processor share clock generator, bus control logic, entire
memory and input/output subsystem.
b) In this configuration 8086 is the master or host and the coprocessor/independent
processor is slave.

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


5. List any four 8087 data formats. May/June 2012
The data formats of 8087 processor are
a) Word integer
b) Short integer
c) Long integer
d) Packed BCD
e) Short recall
f) Long recall

6. Why the number of out ports in the peripheral-mapped I/O is restricted to
256ports?
The number of output ports in the peripheral I/O is restricted to 256 ports because
the operand of the OUT instruction is 8-bits; it can have only 256 combinations.

7. How long the INTR pulse should stay high during an interrupt process?
The INTR pulse can remain high until the interrupt flip-flop is set by the EI
instruction in the service routine.

8. What are the signals used by the DMA controller?
The signals used by DMA controller are:
a) HLDA
b) DMA request
c) DMA acknowledge
d) AEN address enable
e) ADSTB- address strobe

9. How are the signals of the 8237 classified?
The signals are classified in to two groups
a) One group of signals are used for interfacing with the MPU.
b) Second group for communicating with the peripherals.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


10. How the 8327 DMA controller transfers 64K bytes of data per channel with address
lines?
In 8327, out of the 16 bits in count register (D0 D15), D14 and D15 are used to
specify the direct memory access function. The remaining 14 bits are used to specify the
number of bytes to be transferred.

11. Why a latch is used for the output port and a tri-state buffer is used for the input
port?
A latch is necessary to hold the output data for display. The input data byte is
obtained by enabling a tri-state buffer and placed in the accumulator.

12. Write the sequence of operation when the 8085 executes the OUT instruction.
When the 8085 executes the out instruction, in the third machine cycle, it places the
output port address on the low-order address bus, duplicates the same port address on
the higher order address bus, places the contents of the accumulator on the data bus and
asserts the control signal WR.

13. How will the port number be affected if we decode the high-order address lines
A15 A8 rather than A7 A0?
The port address will remain the same because the I/O port address is duplicated on both
segments of the address bus.

14. What is Memory mapped I/O?
In a memory mapped I/O instead of a memory register, if an output device is
connected at the address, the accumulator contents will be transferred to the output device.

15. What is an interrupt I/O?
The interrupt I/O is a process of data transfer whereby an external device or a
peripheral can inform the processor that it is ready for communication and it requests
attention.

.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


UNIT IV I/O INTERFACING
PART A
1. What are the modes of operation supported by 8255?
The modes of operations supported by 8255 are
1. I/O Mode (Input / Output mode)
a) Mode 0 Simple I/O
b) Mode 1 Handshaking or Strobed I/O mode
c) Mode 2 Strobed bidirectional I/O Mode
2. BSR Mode (Bit set / reset mode

2. Write the command format for 8255 to set PA as input and PB as output.
The command format for 8255 I/O Mode is
D7 D6 D5 D4 D3 D2 D1 D0
1 GA Mode PA PC
U
GB Mode PB PC
L

Always 1
for I/O
mode
Group A mode
selection
Group A
Port A
Group A
Port PC
U

Group B
mode
selection
Group B
Port B
Group B
Port PC
L

00 Mode 0
01 Mode 1
1X Mode 2
1 Input
0 Output
1 Input
0 Output
0 Mode 0
1 Mode 1
1 Input
0 Output
1 Input
0 Output
PC
U
Port C upper
PC
L
Port C lower
The command word for 8255 to set PA as input and PB as output in mode 0 is
D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 1 X 0 0 X

10010000 = 90 H in mode 0

3. Write the BSR control word to set PC
0
and to reset PC
4
in 8255.
The BSR control word of 8255 is
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


The BSR control word to set PC
0
is

00000001 = 01H
The BSR control word to reset PC
4
is
D7 D6 D5 D4 D3 D2 D1 D0
0 X X X 1 0 0 0

00001000 = 08 H

4. What are the signals used in input control and output control of 8255 when operated in
mode 0 configuration?
The signals used in input control of 8255 are
1. STB (Strobe Input) low on this input loads data into the input latch.
2. IBF (Input Buffer Full F/F) A high on this output indicates that the data has been
loaded into the input latch and the buffer is full.
3. INTR (Interrupt Request) A high on this output can be used to interrupt the CPU
when an input device is requesting service.
4. INTE A Controlled by bit set/reset of PC4.
5. INTE B Controlled by bit set/reset of PC2.
The signals used in output control of 8255
1. OBF (Output Buffer Full F/F) The OBF output will go low to indicate that the
CPU has written data out to the port.
2. ACK (Acknowledge Input) A low on this input informs the 8255 that the data
from Port A or Port B is ready to be accepted.
D7 D6 D5 D4 D3 D2 D1 D0
0 X X X B
2
B
1
B
0
S/R

Always 0 for
BSR mode
Dont care Port C bit select Set/Reset
D7 D6 D5 D4 D3 D2 D1 D0
0 X X X 0 0 0 1
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


3. INTR (Interrupt Request) A high on this output can be used to interrupt the CPU
when an output device has accepted data transmitted by the CPU.
4. INTE A Controlled by Bit Set/Reset of PC6.
5. INTE B Controlled by Bit Set/Reset of PC2.

5. List the salient features of the 8254 Programmable Interval Timer. (N/D10 R08)
The salient features of the 8254 Programmable Interval Timer are
a) Three independent 16-bit counters
b) Handles inputs from DC to 10 MHz
8 MHz 8254
10 MHz 8254 2
c) Six programmable counter modes
d) Binary or BCD counting
e) All modes are software programmable
f) Status Read-Back Command
g) The 8254 uses H-MOS technology and comes in a 24-pin plastic or CERDIP
package

6. What are the enhanced features of 8254 Programmable Interval Timer compared with
8253? (N/D12 R08)
The enhanced features of 8254 Programmable Interval Timer compared with 8253 are
1. Operating frequency 0 10 MHz
2. Uses H-MOS technology
3. Read-Back command available
4. Reads and writes of the same counter can be interleaved

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


7. Compare 8253 with 8254.

8. List the four display modes of 8279 keyboard and display controller. (N/D12 R08)
The four Display modes of 8279 keyboard/Display controller are
1. 8 8 bit character left entry mode: In the left entry mode, the data is entered from left
side of the display unit
2. 16 8 bit character left entry mode
3. 8 8 bit character right entry mode : In this right entry mode, the first entry to be
displayed is entered on the right most display
4. 16 8 bit character right entry mode

9. What is the function of the scan section in 8279? (A/M11 R08 EEE)
The function of scan counter in scan section is
1. To scan the key matrix (keyboard)
2. To refresh the display .

10. List the major functions performed by CRT interface. (A/M11 R08)
The major functions performed by CRT interface are
a) CRT interface transmits and receives the binary data serially with fixed baud rate
b) CRT interface has three terminals TXD, RXD, GND

11. To which port of the CPU is CRT monitor and printer connected? (N/D11 R08)
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


The CPU is connected to CRT monitor through serial port using RS232 interface .The
printer is connected to CPU through serial interface (serial port) using RS232 interface or
parallel interface through parallel port (8255).

12. Write is the operating frequency of 8279?
The required internal operating frequency of 8279 is 100 KHz to a maximum of 3 MHz.

13. What is the format for program clock of 8279?
The format for program clock of 8279 is
D7 D6 D5 D4 D3 D2 D1 D0 A0
0 0 1 P P P P P 1

Required internal frequency = Clock frequency / (PPPPP)
10

Or
(PPPPP)
10
= Clock frequency / required internal frequency

14. What are the modes used in keyboard mode?
The modes used in keyboard mode are
a) Encoded Scanned keyboard mode with 2 key lockout
b) Decoded Scanned keyboard mode with 2 key lockout
c) Encoded Scanned keyboard with N-key rollover
d) Decoded Scanned keyboard with N-key rollover
e) Encoded Scanned Sensor matrix mode
f) Decoded Scanned Sensor matrix mode
g) Strobed input, Encoded display scan
h) Strobed input, Decoded display scan

15. What is Key debounce?
Key debounce is the minimum time that the microprocessor must wait for the key to
reach steady state when a key is pressed.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


Mechanical switches are used as keys in most of the keyboards. When a key is pressed the
contact bounce back and forth and settle down only after a small time delay (about 20ms). This is
called key debounce.

16. Draw the sample and hold circuit. (or) What is the function of sample and hold circuit?
(A/M 11 R08)(N/D10 R08) (M/J 12 R08)
A sample and hold circuit is a circuit which samples an input signal and holds on to its
last sampled value until the input is sampled again. Sample and hold circuits are commonly
used in analog to digital converter, communication circuits, PWM circuits etc.

AI = Analog Input
AO = Analog Output
C = Control signal (Sampling time)

17. Compare the features of A/D converter with D/A converter. (N/D11 R08)
S.No. A/D converter D/A converter
1
An analog-to-digital converter
(abbreviated ADC, A/D or A to D)
converts a continuous physical
quantity (usually voltage) to a
equivalent digital value
A digital-to-analog converter
(abbreviated DAC, D/A) translates digital
information into equivalent Analog
quantity (voltage or current )

18. Define Resolution of ADC (M/J 12 R08)
Resolution is defined as the minimum change in voltage (input) required to guarantee a
change in the output code level. The resolution Q of the ADC is equal to the LSB voltage.
The voltage resolution of an ADC is equal to its overall voltage measurement range divided
by the number of discrete values. It is expressed in volts.

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


E
FSR
is the full scale voltage range
M is the number of bits in an M bit ADC

]

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


UNIT V- 8 BIT MICROCONTROLLERS
PART A

1. What happens in power down mode of 8051 microcontroller? (A/M11 R08)
The microcontroller enters power down mode by setting the PD bit to 1.
The following happens in power down mode of 8051 microcontroller
1. The internal clock of the microcontroller is stopped. However, the program is not
dead.
2. Vcc can be reduced to as low as 2V in power down mode.
3. The internal RAM obtains its back up supply from RST/VPD pin.
4. Port values are not changed /overwritten in power down mode.

2. What are the sizes of memory system used in 8051 microcontroller? (N/D12 R08)
The sizes of the memory system in 8051 microcontroller are:
1. External program memory (ROM) 64 Kbytes
2. External data memory (RAM) 64 Kbytes
3. Internal ROM 4 Kbytes
4. Internal RAM 128 bytes

3. What is a microcontroller?
Microcontroller is a device which contains the microprocessor with integrated
peripherals like memory, serial ports, parallel ports, timer/counter, interrupt controller,
data acquisition interfaces like ADC, DAC.

4. State the function of RS
1
and RS
0
bits in the flag register of Intel 8051 microcontroller?
The function of RS
1
and RS
0
bits in the flag register is to select the register bank.
RS
1
, RS
0
Register bank select bits
RS
1
RS
0
Bank Selection Address
0 0 Bank 0 00h 07h
0 1 Bank 1 08h 0Fh
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


1 0 Bank 2 10h 17h
1 1 Bank 3 18h 1Fh

5. List the applications of 8051 microcontroller.
The applications of 8051 microcontroller are
1. Control applications:
Office automation, home automation and industrial automation.
2. Embedded applications:
Since it is single chip controller, 8051 microcontrollers are much useful in all embedded
applications like real time, wireless modes.
3. Network applications:
In the area of wireless networking, including LAN, MAN, and WAN.
4. Common applications:
Used in the measurement of frequency, reactance, voltage, current, resistance,
temperature, strain management etc.
It is also used in delay subroutine, LED display, relays, interfacing with other
electronic components.

6. Write the advantages of general purpose registers / register banks.
The advantages of general purpose registers are
1. Used by programmers
2. Default power setup
3. Less processing time

7. What is PSW and write its functions.
PSW (Program Status Word register) is an 8 bit register that contains the status of the
program information.
1. PSW consists of 4 types of flags namely carry, auxiliary carry, overflow and parity
flag.
2. PSW is bit addressable register.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


3. It is used to select the register bank (RS
1
and RS
0
)

8. What is the size of internal RAM and ROM of 8051?
The size of internal RAM and ROM of 8051 microcontroller is
1. Internal ROM 4 Kbytes
2. Internal RAM 128 bytes

9. Write the flags available in 8051.
The flags available in 8051 are
1. Four mathematical flags, carry (CY), auxiliary carry (AC), overflow flag (OV) and
parity flag (P) specified in PSW register.
2. Two general purpose flags GF
0
and GF
1
in the PCON register.

10. What is meant by Power on Reset in 8051?
Power on Reset in 8051 will reset the microcontroller and terminate all activities. It also
causes the contents of the reset register to be lost. It is normally low. Upon applying high
pulse to this pin, power on reset is activated.

11. What is the need for bitwise instructions in microcontroller? (M/J 12 R08)
Bitwise instructions are needed in microcontroller for the following reasons
a) Sometimes only 1 or 2 bits of the port are to be accessed instead of entire 8 bits
without altering the rest of the bits in the port.
b) It requires discrete input and output bits, to control or detect the logic state of
devices like switches, LEDs, LCD displays and sensors for data such as
temperature, humidity, light level etc.
c) Since microcontrollers are used in automatically controlled products and devices,
such as appliances, toys and other embedded systems.

C AC F
0
RS
1
RS
0
OV - P
MSB LSB
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


12. What are the operand types used in 8051 microcontroller. (N/D12 R08)
The different operand types used in 8051 microcontroller are
a) Immediate operand
b) Register operand
c) Memory operand

13. What are the different ways of operand addressing in 8051? (A/M11 R08)
The different ways of operand addressing in 8051 are
a) Immediate addressing
b) Register addressing
c) Direct addressing
d) Indirect addressing
e) Relative addressing
f) Index addressing
14. What are the advantages of the register indirect addressing mode in 8051
microcontroller? (N/D10 R08)
The advantages of the register indirect addressing mode in 8051 microcontroller are
a) It makes accessing data dynamic rather than static as in the case of direct
addressing mode.
b) Looping is possible in register indirect addressing mode.

15. Write an 8051 program to monitor P1 continuously. It should get out of the monitoring
only if P1 = 63H. (N/D10 R08)
MOV P1, # 0FF
LABEL: MOV A, P1
CJNE A, # 63, LABEL
HERE: SJMP HERE
16. List the special function registers used for port operation in 8051? (M/J 12 R08)
The special function registers used for port operation in 8051 are P0, P1, P2, and P3.
Each port are 8 bit wide which are bit addressable i.e. each bit can be set or reset by the bit
instructions (SETB for high, CLR for low) independently.
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


The address of
1. Port 0 is 80
2. Port 1 is 90
3. Port 2 is A0
4. Port 3 is B0
17. What are the hardware and software interrupts of 8051 c? Write its vector address.
(N/D 11 R08)
The hardware and software interrupts of 8051 c are
1. External hardware interrupt 0 (INT0) 0003H
2. External hardware interrupt 1 (INT1) 0013H
3. Timer 0 interrupt (TF0) 000BH
4. Timer 1 interrupt (TF1) 001BH
5. Serial port interrupt (RI or TI) 0023H
18. How many ports are bit addressable in 8051 c? (N/D 11 R08)
All the four ports (Port 0 to Port 3) are bit addressable in 8051 Microcontroller.

19. List the timers available in 8051.
The timers available in 8051 are
1. Timer 0 (T0) 16 bit timer / counter
2. Timer 1 (T1) 16 bit timer / counter
These two timers can be configured either as timers or event counters. They can be split
into two byte register namely TL0, TH0, TL1, and TH1.

20. List the interrupts of 8051 microcontroller.
The interrupts of 8051 microcontroller are
S.No. Source Description
1

INT0
External request from P3.2 pin
2 Timer 0
Overflow from Timer 0 activates the Interrupt Request Flag
TF0
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


3

INT 1
External request from P3.3 pin
4 Timer 1
Overflow from Timer 1 activates the Interrupt Request Flag
TF1
5 Serial port
Completion of the transmission or reception of a serial
frame activates the flag TI or RI

21. Write the control registers related to interrupt system of 8051.
The control registers related to interrupt system of 8051 are
1. Interrupt priority register
2. Interrupt enable register
Interrupt priority register
D7 D6 D5 D4 D3 D2 D1 D0
-- -- PT2 PS PT1 PX1 PT0 PX0
Priority bit = 1, high priority
Priority bit = 0, low priority
PT2 Timer 2 interrupt priority bit (8052 only)
PS Serial port interrupt priority bit
PT1 Timer 1 interrupt priority bit
PX1 External interrupt1 priority bit
PT0 Timer 0 interrupt priority bit
PX0 External interrupt 0 priority bit

Interrupt enable register
D7 D6 D5 D4 D3 D2 D1 D0
EA -- ET2 ES ET1 EX1 ET0 EX0

EA Enable All ,
EA = 0, disables all interrupt
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


EA = 1, enables or disables individually
ET2 Enable or disable Timer 2 overflow (8052 only)
ES Enable or disable serial port interrupt
ET1 Enable or disable Timer 1 overflow interrupt
EX1 Enable or disable External interrupt 1
ET0 Enable or disable Timer 0 overflow interrupt
EX0 Enable or disable External interrupt 0

22. What is the function of SCON register?
The SCON register is an 8 bit register used to program the start bit, stop bit, and data bit
of the data framing. The following format describes the various bits
D7 D6 D5 D4 D3 D2 D1 D0
SM0 SM1 SM2 REN TB8 RB8 TI R1

SM0 SM1 Mode
0 0 Serial mode 0
0 1 Serial mode 1
1 0 Serial mode 2
1 1 Serial mode 3

SM2: 1 for multiprocessor communication
0 for single processor
REN: SET/CLEAR by software to enable or disable reception
TB8: Transmit bit for serial mode 2 and 3
RB8: Receive bit for serial mode 2 and 3

23. What is the function of PCON register?
The function of PCON register is to select the power modes in 8051.The configuration of
PCON, power control register is shown below
w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m


SMOD: Serial baud rate modify bit
GF1 : General purpose user flag bit 1
GF0 : General purpose user flag bit 0
PD : Power down bit
IDL : Idle mode bit

w
w
w
.
a
u
u
p
d
a
t
e
s
.
c
o
m

2 Marks Corrected 10.12.13 (MPMC)

Transféré par

Informations du document

Titre original

Copyright

Formats disponibles

Partager ce document

Partager ou intégrer le document

Options de partage

Avez-vous trouvé ce document utile ?

Ce contenu est-il inapproprié ?

Droits d'auteur :

Formats disponibles

2 Marks Corrected 10.12.13 (MPMC)

Transféré par

Droits d'auteur :

Formats disponibles

CS2252 MICROPROCESSORS AND MICROCONTROLLERS IV SEMESTER

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 1

Vous aimerez peut-être aussi