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Error Detection and Correction Codes:-

The process of transferring information into the machine and from the
machine is especially liable to error. For example, storage of information in
magnetic tape is prone to error due to uneven magnetic surface, dust etc.
Binary information may be transmitted through some form of communication
medium such as wires or radio waves. Any external noise introduced into a
physical communication medium changes bit values from 0 to 1 or vice
versa. To facilitate the detection or correction of errors., two classes of codes
have been invented. !rror "etecting codes and error correcting codes. The
first type of code enables the e#uipment to detect the errors which occur in
the coded groups of bits and the second type of code corrects the errors
The main principal used in constructing error detecting and correcting codes
is to use redundant bits in codes. $f % is the %edundancy of a code.
Then % & n'm
( & number of bits
) & number of information print
*here n is the total number of bits of the code and m is the number of
information bits. The remaining +nm, bits are used for error detecting and
correction. The addition of a single bit allows to detect a single error but can
even help in its correction.
The property of error detection and correction is closely related with the
-amming distance between any two codes in the set of codes. $f . is the
minimum -amming distance between any two codes, then
. & / 0 " 0 1
*here / is the number of errors corrected and " is the number of
errors detected. From the above e#uation, it is clear that minimum distance
between any two codes, for detecting a single error, should be two. The most
commonly used type of errordetection code is the paritychec1 code.
1. 2arity 3 /hec1ed code
4. -amming /ode
5. /%/ +/yclic %edundancy /ode,
1., Parity Bit Code.
The parity chec1 is based on the use of an additional bit, 1nown
as a parity bit or parity chec1 Bit in each code group.
The extra bit + parity bit, is so chosen that the total number of 16s
in each code group +including parity bit, is always even +even
parity, or odd +odd parity,. The table gives code groups including
odd parity bit for B/" code.
7dd number 0
!ven number 1
Binary odd
number 2arity bit

000000 1
001010 1
001101 0
001111 1 001011 1 2arity
010010 1 failure
011101 1

*e 1now from the e#uation .& /0"01 that to correct a error,
)inimum hamming distance must be 5 +for /&1 8 "&1,
. & 10101 & 5 A popular code with . & 5 is called -amming code
(amed after its inventor -amming showed that by systematically
introducing more parity bits in the code it is not only possible to
detect an error but also find out where the error occurred and
correct it. The basic principles in constructing a -amming code
are as follows. To each group of m information bits, 1 parity bits
are added to form an +m01, bits code. The number of parity bit 1
re#uired to detect and or correct errors in codes with m
information bits is given by the ine#uality.
41 9 m0101
2osition 9 1 4 5 : ; < =
Bits 9 2
!rror 2

0 +no error, 0 0 0
1 0 0 1
4 0 1 0
5 0 1 1
: 1 0 0
; 1 0 1
< 1 1 0
= 1 1 0
4!"# 23"# 13!#
Cyc$ic %ed&ndancy C'ec(:-
The cyclic redundancy chec1, or /%/, is a techni#ue for detecting
errors in digital data, but not for ma1ing corrections when errors are
detected. $t is used primarily in data transmission. $n the /%/
method, a certain number of chec1 bits, often called a chec1sum,
are appended to the message being transmitted. The receiver can
determine whether or not the chec1 bits agree with the data, to
ascertain with a certain degree of probability whether or not an error
occurred in transmission. $f an error occurred, the receiver sends a
?negative ac1nowledgement@ +(AA, bac1 to the sender, re#uesting
that the message be retransmitted. The techni#ue is also sometimes
applied to data storage devices, such as a dis1 drive. $n this situation
each bloc1 on the dis1 would have chec1 bits, and the hardware
might automatically initiate a reread of the bloc1 when an error is
detected, or it might report the error to software.
The material that follows spea1s in terms of a ?sender@ and a
?receiver@ of a ?message,@ but it should be understood that it applies
to storage writing and reading as well.
There are several techni#ues for generating chec1 bits that can be
added to a message. 2erhaps the simplest is to append a single bit,
called the ?parity bit,@ which ma1es the total number of 1bits in the
code vector +message with parity bit appended, even +or odd,. $f a
single bit gets altered in transmission, this will change the parity
from even to odd +or the reverse,. The sender generates the parity
bit by simply summing the message bits modulo 4Bthat is, by
exclusive or6ing them together. $t then appends the parity bit +or its
complement, to the message. The receiver can chec1 the message by
summing all the message bits modulo 4 and chec1ing that the sum
agrees with the parity bit. !#uivalently, the receiver can sum all the
bits +message and parity, and chec1 that the result is 0 +if even parity
is being used,. This simple parity techni#ue is often said to detect 1
bit errors. Actually it detects errors in any odd number of bits
+including the parity bit,, but it is a small comfort to 1now you are
detecting 5bit errors if you are missing 4bit errors.
For bit serial sending and receiving, the hardware to generate and
chec1 a single parity bit is very simple. $t consists of a single
exclusive or gate together with some control circuitry. For bit
parallel transmission, an exclusive or tree may be used, as illustrated
in Figure 1:31. !fficient ways to compute the parity bit in software
are given in Cection ;34 on page =:. 7ther techni#ues for computing
a chec1sum are to form the exclusive or of all the bytes in the
message, or to compute a sum with endaround carry of all the bytes.
$n the latter method the carry from each Dbit sum is added into the
least significant bit of the accumulator. $t is believed that this is more
li1ely to detect errors than the simple exclusive or, or the sum of the
bytes with carry discarded. A techni#ue that is believed to be #uite
good in terms of error detection, and which is easy to implement in
hardware, is the cyclic redundancy chec1. This is another way to
compute a chec1sum, usually eight, 1<, or 54 bits in length, that is
appended to the message. *e will briefly review the theory and then
give some algorithms for computing in software a commonly used
54bit /%/ chec1sum.
The /%/ is based on polynomial arithmetic, in particular, on
computing the
remainder of dividing one polynomial in EF+4, +Ealois field with
two elements, by another. $t is a little li1e treating the message as a
very large binary number, and computing the remainder on dividing
it by a fairly large prime such as $ntuitively, one would expect this to
give a reliable chec1sum. A polynomial in EF+4, is a polynomial in
a single variable x whose coefficients are 0 or 1. Addition and
subtraction are done modulo 4Bthat is, they are both the same as the
exclusive or operator. For example, the sum of the polynomials
F$EF%! 1:31. Exclusive or tree.
b7 b6 b5 b4 b3 b2 b1 b0
+ + + +
+ +
Parity bit (even)
454 3 ;.
x50x01 and
1:31 /G/.$/ %!"F("A(/G /-!/A 5
is as is their difference. These polynomials are not usually written
with minus signs, but they could be, because a coefficient of 31 is
e#uivalent to a coefficient of 1.
)ultiplication of such polynomials is straightforward. The product
of one coefficient by another is the same as their combination by the
logical and operator,
and the partial products are summed using exclusive or.
)ultiplication is not
needed to compute the /%/ chec1sum.
"ivision of polynomials over EF+4, can be done in much the same
way as
long division of polynomials over the integers. Below is an example.
The reader might li1e to verify that the #uotient of multiplied by the
divisor of plus the remainder of e#uals the dividend.