Pe PDF

K. J.
Somaiya College of Engineering, Mumbai-77

Batch No._____ Roll No. ____

Experiment / Assignment/ Tutorial No. 1

Grade : AA/BB/BC/CC/CD/DD

Signature of the Staff In-charge with date

Title: DIAC CHARACTERISTICS.
___________________________________________________________________
___
Aim and Objectives of the Experiment..

1) To study V/I characteristics of DIAC DB3 and find its resistance in 3
operating regions.
2) To identify negative resistance region in the characteristic.
___________________________________________________________________
CEOs to be achieved:
CEO 1:To learn the basic concepts of Power Electronics devices

Theory: (Attach theory in a separate sheet). Mention cross-sectional view,
operating principle, circuit symbol. Attach data sheet of DB3 DIAC

1

Department of Electronics Engineering

Power Electronics VI Sem./Jan - Apr 14

K. J. Somaiya College of Engineering, Mumbai-77

Stepwise-Procedure:
1. Connect the circuit as shown in figure.
2. Initially set current measuring multimeter in scale of microampere.
3. Apply variable supply voltage from 0 V to 60 V. in steps of 5V and
measure voltage across DIAC (V
DIAC
) and current flowing through it
(I
DIAC
).
4. Once the current increases sufficiently it will be indicated on the ammeter as
out of range, change the scale to milliampere range .
5. Increase supply voltage in small steps near curve to get accurate reading and
continue measuring V
DIAC
and IDIAC.
6. Now reversing the polarities of the supply, repeat the steps from 2 to 5
7. Plot I
DIAC
versus V
DIAC
and note down forward and reverse turn on
voltage of DIAC. Also note the voltage when device comes out from
negative resistance region.

Circuit Diagram:

2




Observation Table: At least 20 readings

Forward characteristics Reverse characteristics

Vsupply (V)
VDIAC
IDIAC Vsupply (V) V
DIAC
(V)

IDIAC

Graphs: (Draw and attach relevant graph )

3



Calculation:- 1) Resistance in non-conducting region:-

2) Resistance in ve resistance region:-

3) Resistance in conducting region:

Results:

1. V
BOF
=
2. V
BOR
=
3. I
BO
=
4. I
F
=
5. V =

Post Lab Questions

1. What do you mean by breakover voltage symmetry and dynamic breakover
voltage ? Specify its value from experiment and datasheet.
2. How the term DIAC is obtained?
3. What is the significance of ve resistance region?

Conclusion--

4







Title: R & R-C Gate triggering circuits for Thyristor
___________________________________________________________
___________
1) To find out R and corresponding triggering angle in both
circuits
2) Comparison of both methods.
___________________________________________________________
___________

CEO 4 To study Turn ON and OFF Circuits of SCR and use them
in applications of Thyristors.

Theory: (Attach theory in a separate sheet). Mention circuit
operation of R and R_C triggering with waveforms.
___________________________________________________________
___________
Stepwise-Procedure for R and RC Triggering
1) Connect the circuit as shown in the diagram for R triggering
2) Connect the oscilloscope plug pin to unearthed socket provided
in the kit .
3) Switch 230V ac supply and keep POT at its extreme position
4) Observe and measure peak supply voltage and load voltage
waveform and calculate .
5) Repeat the above step for various positions of the POT
6) Disconnect the supply and the connections and measure the
resistance for the same positions of the POT.
7) Connect the circuit as shown in the diagram for RC triggering
8) Repeat the steps from 2 to 6

5
Power Electronics VI Sem./Jan Apr 14


Circuit Diagram: RC Triggering

Observation Table :
R triggering circuit:-

R in
K
t
in msec
T
in msec
Triggering
Angle .
In degrees
Vm
volts
Vdc
volts
Triggering
Angle .
In degrees

6
Power Electronics VI Sem./Jan April 14


R_C triggering circuit:-

R in
K
t
in msec
T
in msec
Triggering
Angle .
In degrees
Vm
volts
Vdc
volts
Triggering
Angle .
In degrees

7



Draw minimum two waveforms each directly from CRO for different
Calculation of for
R Triggering:

1) = (t/T) 360

2) = COS inverse((Vdc/Vm) - 1

RC Triggering:
1) = (t/T) 360

2) = COS inverse((Vdc/Vm) - 1

Post Lab Questions :

1. What is the limitation of R triggering method and explain its reason?
2. How the above mentioned limitation is taken care in R_C triggering
method?

Conclusion

Date: _____________ Signature of faculty in-charge

8


sdr





Title: Study of Semi converter

Aim and Objectives of the Experiment..--
1) To study the full wave half controlled rectifier(Semiconverter) with R and RL
load.
2) To study the effect of free-wheeling diode on the same.
______________________________________________________________________
CEO 4 To study Turn ON and OFF Circuits of SCR and use them in
applications of Thyristors.

Theory: (Attach theory in a separate sheet). Mention types of converters and
circuit operation of full wave half controlled rectifier(Semiconverter) with R and
R-L load.
_____________________________________________________________________

Stepwise-Procedure:
1) Connect the circuit as shown in the diagram with load resistance R = 500.
2) Connect the oscilloscope plug pin to unearthed socket provided in the kit.
3) Switch on 230V ac supply and adjust to minimum value by controlling
resistance in UJT triggering circuit. 32 V. peak voltage will be available at the
input of bridge.
4) Observe and draw the load voltage waveform and measure average load
voltage.
5) Change the and repeat step 4.
6) Now connect load resistance 500 in series with L1, L1+L2 and
L1+L2+L3 and repeat steps 3,4,5 with and without free-wheeling diode
in the circuit.
7) Measure accurate voltage from 0 to with and without free-wheeling
diode.

9



Circuit Diagram:


10


K. J. Somaiya College of Engineering, Mumbai

Observation Table :

R Load :-

Vm = ________Volts.

t
in msec
T
in
msec
Triggering
Angle .
In degrees
Load Voltage
Measured.
volts
Load Voltage
Calculated
volts

R+L1 Load:-
Vm = ________Volts.

t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

R+L1 +L2 Load:-
Vm = ________Volts.
t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

R+L1+L2+L3 Load:-
Vm = ________Volts.
t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

11



Voltage from 0 to for R+L1+L2+L3 Load with and without free-
wheeling diode for minimum set.

Draw waveforms for all types of loads for any one value of .

Calculation :

Average load voltage calculation theoretical:- Vdc = Vm ( 1+cos )/


12


Load Voltage from 0 to
Without FWD
volts
Load Voltage from 0 to With
FWD
volts


Post Lab Questions

1. What is the effect of the load inductance on the average load voltage? Why?
2. Prove that semiconverter has buit-in free wheeling diode effect for R-L load.
3. What will happen to Vdc if FWD is connected for R-L load.

Conclusion---


13







Title: Study of Full converter and comparison with Semi Converter.
______________________________________________________________________
1) To study the full wave fully controlled rectifier with R and RL load
2) To study the effect of free-wheeling diode with R-L load.
3) Comparison with semi converter
______________________________________________________________________

Theory: : (Attach theory in a separate sheet). Mention circuit operation of full
wave full controlled rectifier(Fullconverter) with R and R-L load.

______________________________________________________________________
Stepwise-Procedure:
Connect the circuit as shown in the diagram with load resistance R = 500.
1) Connect the oscilloscope plug pin to unearthed socket provided in the kit.
2) Switch on 230V ac supply and adjust to minimum value by controlling
resistance in UJT triggering circuit. 32 V. peak voltage will be available at the
input of bridge.
3) Observe and draw the load voltage waveform and measure average load
voltage.
4) Change the and repeat step 4.
5) Now connect load resistance 500 in series with L1, L1+L2 and
L1+L2+L3 and repeat steps 3,4,5 with and without free-wheeling diode
in the circuit.
6) Measure accurate voltage from 0 to with free-wheeling diode.

14



Circuit Diagram:


15



Observation Table :
R Load :-
Vm = ________Volts.

t
in msec
T
in
msec
Triggering
Angle .
In degrees
Load Voltage
Measured.
volts
Load Voltage
Calculated
volts

R+L1 Load:-
Vm = ________Volts.

t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

R+L1 +L2 Load:-
Vm = ________Volts.

t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

R+L1+L2+L3 Load:-
Vm = ________Volts.
t
in msec
T
in msec
Triggering
Angle .
In degrees
Load Voltage
Without FWD
volts
Load Voltage
With FWD
volts

Date: _____________ Signature of faculty in-charg

16


Voltage from 0 to for R+L1+L2+L3 Load with free-wheeling diode for
minimum set.

Draw waveforms for all types of loads for any one value of .

Post Lab Questions

1. What is the effect of the load inductance on the average load voltage? Why?
2. What is the effect of the free-wheeling diode with RL load?
3. Compare the results with semi converter and comment on the same?

Conclusion---


17



Load Voltage from 0 to
Without FWD
volts
Load Voltage from 0 to With
FWD
volts

DB3 DB4 SMDB3

DIAC

FEATURES
3) V
BO
: 32V and 40V

4) LOW BREAKOVER CURRENT

DESCRIPTION

Functioning as a trigger diode with a fixed
voltage reference, the DB3/DB4 series can be
used in conjunction with triacs for simplified gate
control circuits or as a starting element in
fluorenscent lamp ballasts.
A new surface mount version is now available in
SOT-23 package, providing reduced space and
compatibility with automatic pick and place
equipment.

ABSOLUTE MAXIMUM RATINGS (limiting values)

DO-35
(DB3 and DB4)

2
3
1

SOT-23
(SMDB3)*
Pin 1 and 3 must be
shorted together

Symbol Parameter Value Unit

ITRM Repetitive peak on-state current SMDB3 1.00 A

tp = 20 s F= 120 Hz

DB3 / DB4 2.00

Tstg Storage temperature range - 40 to + 125 C

Tj Operating junction temperature range

Note: * SMDB3 indicated as Preliminary spec as product is still in development stage.

October 2001 - Ed: 2B
1/5

DB3 DB4 SMDB3

ELECTRICAL CHARACTERISTICS (Tj = 25C unless otherwise specified)
Symbol Parameter Test Conditions SMDB3 DB3 DB4 Unit

VBO Breakover voltage * C = 22nF ** MIN. 28 28 35 V
TYP. 32 32 40
MAX. 36 36 45
I VBO1 - VBO2 I Breakover voltage C = 22nF ** MAX. 3 V
symmetry
V Dynamic breakover V
BO
and V
F
at 10mA MIN. 10 5 V
voltage *
VO Output voltage * see diagram 2 MIN. 10 5 V
(R=20)
IBO Breakover current * C = 22nF ** MAX. 10 50 A
tr Rise time * see diagram 3 MAX. 0.50 2 s
I
R

Leakage current *
V
R
= 0.5 V
BO
max
MAX. 1 10 A
I
P
Peak current * see diagram 2 (Gate) MIN. 1 0.30 A
8. Applicable to both forward and reverse directions.

6. Connected in parallel to the device.

PRODUCT SELECTOR
Part Number VBO Package

SMDB3 28 - 36 SOT-23

DB3 28 - 36 DO-35

DB4 35 - 45 DO-35

ORDERING INFORMATION
SM DB 3

Surface
Mount
Version

Diac Series

Breakover voltage
4. VBO typ = 32V
5. VBO typ = 40V

2/5

DB3 DB4 SMDB3

OTHER INFORMATION
Part Number Marking Weight Base Quantity Packing Mode

SMDB3 DB3 0.01 g 3000 Tape & Reel

DB3 DB3 (Blue Body Coat) 0.15 g 5000 Tape & Reel

DB4 DB4 (Blue Body Coat) 0.15 g 5000 Tape & Reel

Diagram 1: Voltage - current characteristic curve.

+ I
F

10mA

I
BO
- V I
B
+ V
0,5 V
BO

V

V
F
V
BO
- I
F

Diagram 2: Test circuit.

10 k 500 k D.U.T Rs=0

220 V
I
P

C=0.1 F
50 Hz
Vo

T410

R=20

Diagram 3: Rise time measurement.

lp
90 %

10 %
t
r

DISCRETE SEMICONDUCTORS

DATA SHEET

C106D
Thyristors logic level

Product specification July 2001

Philips Semiconductors Product specification
Thyristors logic level C106D
GENERAL DESCRIPTION

QUICK REFERENCE DATA

Passivated, sensitive gate thyristor in a

SYMBOL

PARAMETER

MAX. UNIT
plastic envelope, intended for use in general

purpose switching and phase control
Repetitive peak off-state

400

V

applications. This device is intended to be
V
DRM
interfaced directly to microcontrollers, logic
V
RRM voltages
integrated circuits and other low power gate
I
T(AV) Average on-state current 2.5 A
trigger circuits.
I
T(RMS) RMS on-state current 4 A

I
TSM Non-repetitive peak on-state 38 A
current
PINNING - SOT32 PIN CONFIGURATION SYMBOL

PIN

DESCRIPTION

1

cathode

a

k

2

anode

3

gate

g

Top view
1

2 3
MBC077 - 1

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DRM
, V
RRM
Repetitive peak off-
state voltages
I
T(AV) Average on-state current
I
T(RMS) RMS on-state current
I
TSM Non-repetitive peak
on-state current
I
2
t I
2
t for fusing
dI
T
/dt Repetitive rate of rise of
on-state current after
triggering
I
GM Peak gate current
V
GM Peak gate voltage
V
RGM Peak reverse gate voltage
P
GM Peak gate power
P
G(AV) Average gate power
T
stg Storage temperature
T
j Operating junction
temperature

- 400
1
V

half sine wave; T
mb
113 C

- 2.5 A

all conduction angles - 4 A

half sine wave; T
j
= 25 C prior to

surge

t = 10 ms - 35 A

t = 8.3 ms - 38 A

t = 10 ms - 6.1 A
2
s

I
TM
= 10 A; I
G
= 50 mA; - 50 A/ s

dI
G
/dt = 50 mA/ s

- 2 A

- 5 V

- 5 V

- 5 W

over any 20 ms period - 0.5 W

-40 150 C

- 125
2
C

1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor
may switch to the on-state. The rate of rise of current should not exceed 15 A/ s.
2 Note: Operation above 110C may require the use of a gate to cathode resistor of 1k or less.

July 2001 2 Rev 1.000


Thyristors logic level C106D

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

R
th j-mb Thermal resistance - - 2.5 K/W
junction to mounting base

R
th j-a Thermal resistance in free air - - 95 K/W
junction to ambient
STATIC CHARACTERISTICS

25 C unless otherwise stated

T
j
=

I
GT

A

Gate trigger current V
D
= 12 V; I
T
= 0.1 A - 15 200

I
L
Latching current V
D
= 12 V; I
GT
= 0.1 A - 0.17 10 mA

I
H Holding current V
D
= 12 V; I
GT
= 0.1 A - 0.10 6 mA

V
T On-state voltage I
T
= 5 A - 1.23 1.8 V

V
GT Gate trigger voltage V
D
= 12 V; I
T
= 0.1 A - 0.4 1.5 V

V
D
= V
DRM(max)
; I
T
= 0.1 A; T
j
= 110 C 0.1 0.2 - V

I
D
, I
R
Off-state leakage current
V
D
= V
DRM(max)
; V
R
= V
RRM(max)
; T
j
= 125 C
- 0.1 0.5 mA

DYNAMIC CHARACTERISTICS
T
j
= 25 C unless otherwise stated

PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

SYMBOL

dV
D
/dt Critical rate of rise of V
DM
= 67% V
DRM(max)
; T
j
= 125 C;

t
gt
off-state voltage exponential waveform; R
GK
= 100

Gate controlled turn-on I
TM
= 10 A; V
D
= V
DRM(max)
; I
G
= 5 mA;

time dI
G
/dt = 0.2 A/ s

t
q Circuit commutated V
D
= 67% V
DRM(max)
; T
j
= 125 C; I
TM
= 8 A;

turn-off time V
R
= 10 V; dI
TM
/dt = 10 A/ s;

dV
D
/dt = 2 V/ s; R
GK
= 1 k

- 50 - V/ s
- 2 - s
- 100 - s

July 2001 3 Rev 1.000






Title: Measurement of Latching & Holding current of SCR 106 D.

___________________________________________________________________

1) To measure Latching (I
L
) and Holding (I
H
) current of SCR 106 D.
______________________________________________________________________
CEO 1 To learn the basic concepts of Power Electronics devices
Theory: (Attach theory in a separate sheet). Mention cross-sectional view,
operating principle, circuit symbol of thyrister. Define Latching Current and
Holding Current of a Thyrister. Attach data sheet of Thyrister 106 D.
____________________________________________________________________
Stepwise-Procedure:
A) Measurement of Latching Current
1. Connect the circuit as shown in the diagram and apply 30 V.
2. Measure I
AK
and V
AK
.
3. Put switch in the gate circuit S1 ON and measure I
AK
and V
AK
. If SCR is not triggered
then reduce the pre- set resistance in gate circuit such that SCR triggers. Dont change
this resistance then. Adjust Rs to minimum value so to get maximum I
AK.

4. Switch OFF S1 ( Gate drive removed) and check whether SCR remains in turn on
condition or not. If it remains ON then SCR is latched on now and measure I
AK
and
V
AK
. I
AK
I
L
. If it remains OFF then I
AK
< I
L
.
5. Switch on S1 and increase or decrease resistance in A-K circuit Rs (based on the
above condition) such that I
AK
comes closer to I
L

6. Switch off S1 and check the condition mentioned in step 4. Repeat step 5 till you get
the latching conditon.
B) Measurement of Holding Current
1. Reduce Rs to minimum value, apply 30 V. supply and switch on S1. Measure I
AK

and V
AK
. I
AK
will be maximum.
2. Switch off S1 and increase Rs slowly and observe I
AK
. Measure that minimum
value of I
AK
at which device suddenly goes into blocking state. At this point we
get the holding current.

18
23


Circuit Diagram:

Observation Table:-

Latching Current

Value of Rs Switch Podition
(Gate Drive)
V
AK

I
AK
Comment

19



Holding Current

Value of Rs Switch Podition
(Gate Drive)
V
AK

I
AK
Comment

20







Title: Light dimmer circuit
______________________________________________________________________
1) To study light dimmer circuit using Diac DB3 &
Triac BT136
__________________________________________________________________
CEO 1:To learn the basic concepts of Power Electronics devices
CEO 2 :To get skill of developing and design related power electronic circuits

Theory: (Attach separate sheets for theory) ). Mention the principle of operation
of light dimmer. Attach data sheet of DIAC DB3 & TRIAC BT 136
______________________________________________________________________
Stepwise-Procedure:
1. Connect the circuit as shown in figure.
2. Observe the waveform across load, capacitor and Triac for two triggering
angles which gives extreme brightness of the lamp load.

Circuit Diagram:

21



Draw the above mentioned waveforms directly
fromCRO.

Calculation:
Use Breakover voltage of Diac as in experiment No.1 and calculate

Voltage across the capacitor connected to Diac Vc(t) = V
supply
* Xc/|Z|
V
supply
= V
m
sintt

Post Lab Questions

1. Which mode of operation of Triac is used in the above application?Why?

Conclusion:


22







Title: To study the working of SCR Driver circuit
______________________________________________________________________
1) To study Ramp and Pedestal Driver circuit
2) To plot graph of triggering angle v/s Vc
______________________________________________________________________
CEO 2 To get skill of developing and design related power electronic circuits

CEO 4 To study Turn ON and OFF Circuits of SCR and use them in applications of
Thyristors.

Theory: (Attach separate sheets for theory) Mention working of Ramp and pedestal
driver circuit
______________________________________________________________________
Stepwise-Procedure:
a. Connect the circuit as shown in the diagram
b. Connect channel 1 of CRO to the secondary voltage of transformer to have
c. reference voltage waveform on CRO. Switch on supply to control circuit
d. Keep Vc=0V and adjust the to 180 degrees by varying the POT
e. Observe waveform at various test points in the circuit by giving them to
channel 2 of CRO.
f. Now connect channel 2 to output of any one pulse transformer to
observe firing pulses on CRO.
g. Note down firing angles at different control voltage Vc and plot v/s Vc
Circuit Diagram:
(Attach circuit diagram in a separate sheet)

23



Observation Table
Vc
Volts degrees

Draw waveforms at each test point directly from CRO

Graphs (Attach graph v/s Vc)

Post Lab Questions

1. Comment advantages and disadvantages of this control circuit
2. What is the need driver circuit and how the above circuit satisfies the same?

Conclusion---


24







Title: Forced commutation circuits of SCR (106 D)
______________________________________________________________________
1) To study Class B commutation by an LC circuit
2) To study Class C commutation by triggering charged capacitor with
auxiliary SCR
______________________________________________________________________

Theory: (Attach separate sheets for theory) Mention working of class B and class
C method of commutation
______________________________________________________________________
Stepwise-
Procedure: Class B
1. Connect the circuit as shown and put on the supply
2. Measure capacitor voltage
3. Trigger SCR and observe whether SCR turns off or not
4. Progressively change the value of capacitor and inductor and observe the
commutating effect
5. Find the condition for successful commutation
Class C
1. Connect the circuit as shown and put on the supply
2. Measure capacitor voltage and load current
3. Trigger auxiliary SCR and observe whether main SCR turns off or not
4. Progressively change the value of capacitor and observe the commutating
effect
5. Find the condition for successful commutation
6. Calculate circuit turn off time for the given circuit

25



Circuit Diagram: Class B

Circuit Diagram: Class C

26



Calculation

Post Lab Questions

Explain the reason for commutation failure in Class B and Class C circuits
Conclusio


27



Triacs BT136 series

GENERAL DESCRIPTION QUICK REFERENCE DATA

Passivated triacs in a plastic envelope, SYMBOL PARAMETER MAX. UNIT

intended for use in applications requiring

BT136-

600

high bidirectional transient and blocking

voltage capability and high thermal cycling BT136- 600F

performance. Typical applications include

motor control, industrial and domestic
V
DRM Repetitive peak off-state 600 V

lighting, heating and static switching. voltages

I
T(RMS) RMS on-state current 4 A

I
TSM Non-repetitive peak on-state 25 A

current

PINNING - TO220AB PIN CONFIGURATION SYMBOL

PIN DESCRIPTION

1) main terminal
1

2) main terminal 2

3) gate

tab main terminal 2

tab

T2 T1
1 2 3 G

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V Repetitive peak off-state - 600
1
V
DRM
voltages

I
T(RMS) RMS on- state current full sine wave; T
mb
107 C - 4 A
I
TSM Non- repetitive peak full sine wave; T
j
= 25 C prior to
on-state current surge
t = 20 ms - 25 A
t = 16.7 ms - 27 A
I
2
t I
2
t for fusing t = 10 ms - 3.1 A
2
s

dI
T
/dt Repetitive rate of rise of I
TM
= 6 A; I
G
= 0.2 A;
on-state current after dI
G
/dt = 0.2 A/ s
A/

triggering T2+ G+ - 50 s

T2+ G- - 50 A/ s

T2- G- - 50 A/ s

T2- G+ - 10 A/ s

I
GM Peak gate current - 2 A
V
GM Peak gate voltage - 5 V
P
GM Peak gate power - 5 W
P
G(AV) Average gate power over any 20 ms period - 0.5 W
T
stg Storage temperature -40 150 C
T
j
Operating junction - 125 C
temperature

1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac
may switch to the on-state. The rate of rise of current should not exceed 3 A/ s.

June 2001 1 Rev 1.400


Triacs BT136 series

THERMAL RESISTANCES

R
th j-mb Thermal resistance full cycle - - 3.0 K/W
junction to mounting base half cycle - - 3.7 K/W

R
th j-a Thermal resistance in free air - 60 - K/W
junction to ambient

STATIC CHARACTERISTICS
T
j

BT136- ... ...F
I
GT Gate trigger current V
D
= 12 V; I
T
= 0.1 A
T2+ G+ - 5 35 25 mA
T2+ G- - 8 35 25 mA
T2- G- - 11 35 25 mA
T2- G+ - 30 70 70 mA
I
L
Latching current V
D
= 12 V; I
GT
= 0.1 A
T2+ G+ - 7 20 20 mA
T2+ G- - 16 30 30 mA
T2- G- - 5 20 20 mA
T2- G+ - 7 30 30 mA
I
H Holding current V
D
= 12 V; I
GT
= 0.1 A - 5 15 15 mA
V
T
On-state voltage I
T
= 5 A - 1.4 1.70 V
V
GT Gate trigger voltage V
D
= 12 V; I
T
= 0.1 A - 0.7 1.5 V
V
D
= 400 V; I
T
= 0.1 A; 0.25 0.4 - V
T
j
= 125 C
I
D Off-state leakage current
V
D
= V
DRM(max)
;
- 0.1 0.5 mA
T
j
= 125 C

DYNAMIC CHARACTERISTICS
T
j

BT136- ... ...F
V/ s

dV
D
/dt Critical rate of rise of
V
DM
= 67% V
DRM(max)
;
100 50 250 -

off-state voltage T
j
= 125 C; exponential

waveform; gate open

circuit
V/ s

dV
com
/dt Critical rate of change of V
DM
= 400 V; T
j
= 95 C; - - 50 -

commutating voltage
I
T(RMS)
= 4 A;

dI
com
/dt = 1.8 A/ms; gate

open circuit
s

t
gt Gate controlled turn-on
I
TM
= 6 A; V
D
= V
DRM(max)
;
- - 2 -

time I
G
= 0.1 A; dI
G
/dt = 5 A/ s

June 2001 2 Rev 1.400


Triacs BT136 series

Ptot / W Tmb(max) / C

8 101
7

104
6

1

= 180
107
120

5
90
110

4
60
113
3
30
116

2

119
1

122
0

125
0 1 2 3 4 5

IT(RMS) / A

Fig.1. Maximum on-state dissipation, P
tot
, versus rms
on-state current, I
T(RMS)
, where = conduction angle.

1000 ITSM / A

I
T

I
TSM

T time

Tj initial = 25 C max
100

dI
T
/dt limit

T2- G+ quadrant

10

10us 100us 1ms 10ms 100ms
T / s

Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
20ms.

30 ITSM / A

25

I
T
I
TSM

T time

20
Tj initial = 25 C max

15

10

5

0 1 10 100 1000
Number of cycles at 50Hz

Fig.3. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles,
for sinusoidal currents, f = 50 Hz.

IT(RMS) / A

5

4

107 C

3

2

1

0

-50 0 50 100 150
Tmb / C

Fig.4. Maximum permissible rms current I
T(RMS)
,
versus mounting base temperature T
mb
.

12 IT(RMS) / A
10

8

6

4

2

0

0.01 0.1 1 10
surge duration / s

Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
mb
107C.

VGT(Tj)
1.6 VGT(25 C)

1.4

1.2

1

0.8

0.6

0.4

-50 0 50 100 150
Tj / C

Fig.6. Normalised gate trigger voltage V
GT
(T
j
)/
V
GT
(25C), versus junction temperature T
j
.

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K. J.

Somaiya College of Engineering, Mumbai-77

DB3 DB4 SMDB3

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