IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO.

1, JANUARY 2009

219

Discrete-Event Systems Supervisory Control

for a Dynamic Flow Controller
Ali A. Afzalian, Senior Member, IEEE, S. Ali Nabavi Niaki, Senior Member, IEEE, M. Reza Iravani, Fellow, IEEE,
and W. M. Wonham, Life Fellow, IEEE

AbstractThis paper presents supervisory control of a dynamic flow controller (DFC) based on the discrete-event systems
(DES) theory. A DFC can be considered as a flexible ac transmission system controller and includes a mechanically-switched
phase-shifting transformer, a multimodule thyristor-switched
capacitor, a multimodule thyristor-switched reactor, and a mechanically switched capacitor. Owing to the inherent discrete
switching nature of a DFC, its components are modeled as finite
automata; then, a DES supervisory control is designed to implement the control logic of the DFC system in different modes of
operation (i.e., automatic and auto/manual). It is shown that
the specifications are controllable and the synthesized supervisors
are nonblocking in both modes and the modular supervisors
nonconflict in auto/manual mode.
Index TermsDiscrete-event systems (DES), dynamic flow controller (DFC), power flow, supervisory control.

I. INTRODUCTION
dynamic flow controller (DFC) is composed of: 1) a mechanically-switched phase-shifting transformer (PST);
2) a multimodule thyristor-switched series capacitor (TSSC);
3) a multimodule thyristor-switched series reactor (TSSR); and
4) a mechanically-switched shunt capacitor (MSC) unit [1].
DFC can provide steady-state and dynamic power flow control
for power lines and is considered as a FACTS controller. Due to
the discrete switching nature of PST, TSSC, TSSR, and MSC
units, which constitute a DFC: 1) these units are best modeled
as finite automata and 2) then a discrete event system (DES)
supervisory control can be used to design and implement the
overall control logic.
A DES is a dynamic system that evolves in accordance with
the sudden occurrence of physical events at possibly unknown
irregular intervals [2]. The supervisory control technique is an
effective analytical tool for automation and control of DES [3].
Discrete-event models are generally used to describe systems
where coordination and control are required to ensure the orderly flow of events, and/or to prevent the occurrence of undesired chains of events. DES serves to describe a wide variety
of behaviors in industrial and physical systems. These include

Manuscript received February 06, 2007; revised November 21, 2007. First
published April 03, 2008; current version published December 24, 2008. Paper
no. TPWRD-00063-2007.
A. A. Afzalian is with the Shahid Abbaspour University of Technology,
Tehran 171916765, Iran (e-mail: afzalian@ieee.org).
S. A. Nabavi Niaki, M. R. Iravani, and W. M. Wonham are with the University
of Toronto, Toronto, ON M5S 3G4, Canada (e-mail: nabavi.niaki@utoronto.ca;
iravani@ecf.utoronto.ca; wonham@control.toronto.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPWRD.2008.921114

control and scheduling of electrical power systems, manufacturing systems, queuing systems and communication protocols,
and database management systems. Applications of DES theory
to power systems [4][7] include: 1) supervisory control, 2)
modeling and analysis, and 3) monitoring and diagnosis. The
synthesis of a DES-based supervisory control for an underload
tap-changing transformer (ULTC) is introduced in [8].
In the last two decades, DES have been studied with respect
to modeling, analysis, and control. Synthesis methods for DES
controls have been developed and implemented in a software
environment called TCT [9] to compute controllers that are optimal in the sense that the controlled system not only satisfies
the specifications but is also as permissive as possible. The developed software [9] is used in this study for synthesizing the
supervisory controllers.
DFC components and the control specifications in each mode
of operation are modeled as finite automata. Then supervisory
control is designed for the DFC in automatic and auto/manual
modes of operation, and in centralized and decentralized
structures.
DFC consists of discrete-event dynamic components that are
event-driven and exhibit discrete-event behavior. Neglecting
discrete properties of these components in modeling and control of the system reduces the accuracy of the model and results
in a suboptimal control strategy [12]. Supervisory control
of discrete-event systems (SCDES) is a systematic approach
to synthesize a control system for plants with discrete-event
components. SCDES evaluates controllability of specifications
(control logic) with respect to the plant and guarantees the
nonblocking and nonconflicting properties for the supervisor
(controller) using a systematic formulation on a rigorous mathematical basis.
Since the DFC components have a discrete-event nature,
the conventional controllers (e.g., PI controllers) are not fully
applicable. The proposed DES controller has the following
advantages.
1) It copes with the discrete-event dynamic nature of the components, rather than their approximate continuous models.
2) It constructs the optimal controllable approximation to the
control specifications.
3) It guarantees required properties for the supervisor, such as
the nonblocking and nonconflicting properties.
4) It formulates the control solution in a hierarchical structure
for large plants, such as microgrids.
II. PRINCIPLES OF DFC OPERATION
Fig. 1 shows a schematic diagram of a DFC that is connected
between buses and within a transmission line and comprises:

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TABLE I
STEPS OF TSSC MODULES AND THE CORRESPONDING

Fig. 1. Schematic diagram of a DFC.

Fig. 2. One-line diagram of the study system.

a conventional (mechanically switched) phase-shifting

transformer (PST), which can inject a lead/lag quadraturephase voltage;
a series-connected multimodule thyristor-switched series
capacitor (TSSC) system that can insert series capacitive reactance in discrete steps to adjust the line series
reactance;
a series-connected multimodule thyristor-switched series
reactor (TSSR) system that can insert series inductive reactance in discrete steps primarily to prevent over flow in
the line;
a shunt-connected mechanically-switched capacitor
(MSC) for voltage control or reactive power compensation.
DFC belongs to the family of hybrid compensators since
it provides power flow control through series and/or shunt
compensation, analogous to the unified power flow controller
(UPFC) [11]. Although DFC does not offer all versatility and
technical features of the UPFC, its salient features make it an
alternative to the UPFC.
Furthermore, since TSSC and TSSR modules are not phasecontrolled and only switched in and out by thyristor switches,
DFC does not generate harmonics and has no adverse impact on
power quality and does not require filters.
Owing to their large inherent time-constants, PST and MSC
can only provide slow steady-state power flow control, while
the TSSC and TSSR modules can provide both dynamic and
steady-state power flow control. Since the tap control of PST
and the switching actions of TSSC and TSSR are discrete in
nature, a discrete-event control strategy is best suited.
III. PERFORMANCE CHARACTERISTICS
AND CONTROL LOGIC OF DFC
To investigate a DFC performance characteristic and develop
its discrete control logic, a DFC unit is implemented in an interconnected power system [1] and the corresponding simplified
single-line diagram of the overall system is given in Fig. 2. The

Fig. 3. Receiving-end
DFC.

P 0 Q region of the system of Fig. 2 as controlled by

DFC is connected between bus and bus and its main purpose is to increase and control the transmission line power flow.
Therefore, the DFC under investigation does not include TSSR
modules which are used to limit power flow. With respect to bus
and (Fig. 2), the power network is represented by the correand
,
sponding Thevenin equivalents (i.e.,
respectively).
The DFC of Fig. 2 is composed of:
a 115-MW PST that can inject a quadrature voltage up to
, with 19 steps of 2-kV, and consequently
introduces a maximum of 15 phase-shift;
,
a three-module TSSC with a reactance of
and
, which provides seven steps
, 4, 8, 12, 16, 20, and
(Table I), corresponding to
24 ;
25-MVAr) at bus to supply the
an MSC system (2
required reactive power.
Fig. 3 shows the receiving-end power diagram of the study
system when DFC is in service (MSC is disconnected). The
phase-shifter of DFC can increase real power from 71-MW to
276-MW in 19 tap steps of 2-kV from to . Then the TSSC
modules can be switched to increase real power transfer up to
440-MW in seven steps from to .
The TSSC modules can be switched in/out at any tap position.
in Fig. 3.
Thus, the system operating points cover the area
discrete operating points correThis area includes
s of the TSSC
sponding to various tap positions of PST and
varisystem. Each dotted line in Fig. 3 identifies a trace of
ations for a given tap position.

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221

Fig. 5. Block diagram of control system for DFC.

Fig. 4. Proposed switching control strategy for DFC.

A. Control Strategy for DFC

The DFC control should be able to:
fast respond to a power flow command;
adjust the steady-state operating point of the DFC within
area of Fig. 3) such that
the acceptable region (i.e.,
the DFC is ready to properly react to the subsequent power
flow commands without reaching its limits of operation.
This constraint is best met if the steady-state operating
point of DFC unit is located on the solid line within area
of Fig. 3.
Since the TSSC time response is short, it can be used to respond to a change in power flow first. Then, through the slow
switching process of the PST, a new operating point is determined to enable the DFC to utilize its maximum capacity for
the subsequent command for power flow control.
To demonstrate the control strategy, we assume that power
flow of the line is initially adjusted at point (
,
) on the
plane of Fig. 3. For the sake
of clarity, the operating point
and its adjacent discrete
points are magnified on Fig. 4. Let us assume that the DFC receives a command to increase real power flow by 240 MW.
Since 240 MW is larger than the initial
(point
), the DFC, through the control action of the TSSC,
.
moves its operating point to
Owing to the discrete nature of the DFC operating point,
may not exactly match the required 240 MW; however, it is lo, where
is a prespecified acceptcated within
able margin. Operating point
is not an acceptable long-term
steady-state operating point since it is close to the limit of the
DFC
characteristics, and a new command to increase
limit
real-power may result in reaching and violating the
(Fig. 4). Thus, the PST of the DFC (slowly) moves the operating
point from
to
.
violates the acceptable
and thus the
Operating point
action of TSSC results in a new operating point (i.e.,
). Then
. Since
and
are
the PST moves the operating point to
not on the desired solid line characteristic, another step of TSSC
leads to operating point
.
is located on the middle solid line charOperating point
acteristic but violates the acceptable
. Therefore by another

TSSC step the operating point moves back to point

. Then
. Operthe PST gradually removes the operating points to
does not satisfy the prespecified margin
and
ating point
thus operating point
is imposed by the TSSC.
is the new
steady-state operating point and enables the DFC to react to a
new power command without reaching the limits.
A block diagram of the DFC control system is shown in Fig. 5.
To synthesize a supervisory control for the PST, DES models of
the plant and the control specifications are needed as described
in the following sections.
IV. DES SUPERVISORY CONTROL
The supervisory control problem for a discrete-event system
is formulated by modeling the plant as well as its control logic
(specifications) as finite automata.
To solve the supervisory control problem, it is necessary to
show that a controller which forces the specification to be met
exists and is constructible. DES supervisory control is briefly
described in this section; the reader is referred to [9] for more
details.
A. Discrete-Event Models
A DES model is specified by 1) the set of states (including
an initial state, and marker states which can be desired states in
some applications); 2) the set of events; and 3) the state transition function of the system. Formally, a DES is represented by
an automation
in which is a finite set
as the initial state and
being the
of states, with
which is
desired (marker) states; is a finite set of events
referred to as an alphabet; and finally is a transition mapping
, which gives the next state after
an event occurs at . plays the role of the plant and, together
with its states, events and transition operator (mapping), models
a physical process. is called a generator, as it generates a set
of strings (sequence of events). In other words, it generates a
, consisting of strings of events which are physlanguage
ically possible in the plant.
A prefix of a string is an initial subsequence of (i.e., if is a
string in , is a prefix of if
for some string in ).
A set which contains all of the prefixes of each of its elements
is a prefix-closed set.
is said to be prefix-closed. Clearly,
As some sets of strings may not contain all of their prefixes,
the prefix-closure of a set , denoted by , is defined which
, then
contains all of the prefixes of each element of . If
the set is prefix-closed. If is not prefix-closed, then

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with strict inclusion. The language

is the set of all event
sequences which are physically possible in the plant.
is defined

(1)

Clearly,
is a subset of
, and
is also prefixclosed, because no event sequence in the plant can occur without
its prefix occurring first. Those strings which can be extended
to a marker state are of particular importance. The marked lan, consists of all strings which reach
guage, denoted by
is a subset of
and can be forsome marker state.
mally given as
(2)
. This
A DES is said to be nonblocking if
means that there always exists a sequence of events which takes
the plant from any (reachable) state to a desired state. In some
DES models, it is necessary to incorporate several independent
and asynchronous processes simultaneously. There is a procedure called synchronous product which combines two DES (
and
) into a single, more complex DES (i.e.,
).
as ordered
The synchronous product defines new states for
and . The event set of
is the union
pairs of states from
of events in
and . The initial and marker states of
are
defined similarly.
B. Nonblocking Supervisor and Controllable Specifications
A discrete-event plant must be controlled based on certain
specifications (required behavior logic). By adjoining the controller structure to the plant, it is possible to vary the language
generated by the closed loop system within certain limits. The
desired performance of such a controlled plant will be specified by stating that its generated language must be contained in
some specification language. It is often possible to meet these
specifications in a minimally restrictive way, called optimal supervision in the DES literature.
is a nonempty DES repreSuppose
is
senting the plant which must be controlled.
the set of controllable and uncontrollable events in the plant.
is the set of controllable events, which can be enabled or
disabled by an external agent (supervisor). A possible set of enabled events, which includes some controllable events and all
. Unconuncontrollable events, is called a control pattern
are always enabled by their nature. Then
trollable events
we have
. The set of all control patterns, which is
actually a set of sets, is defined as
(3)
is any function
A supervisory control for the plant
. The pair
is written
, to suggest the
concept of under the supervision of .
The plant, along with the supervisor, forms a closed loop
generates strings of events
system (Fig. 6). The plant
and sends them to the supervisor as a feedback signal.
The supervisory controller which has been designed based on
a required behavior of the plant (specifications) first determines
implicitly in which state the system is working and then sends a

Fig. 6. Block diagram of a supervisory control system.

list of events which must be disabled in that particular state, as

a control signal to the plant.
The supervisory controller is actually a DES synthesized
using specifications in such a way as to guarantee the required
behavior of the plant. The closed behavior of the system is
described as
defined to be the language
follows:
;

,
, and
, then
if
;
.
no other strings belong to
In other words, the closed loop system only generates either
the empty string or a string of the plant which is concatenated
immediately by an event decided by the supervisor to be alis nonempty and closed. The marked
lowed. Clearly
is:
. In other
behavior of
are exactly the
words, the strings reaching marker states in
that survive under supervision by . We alstrings of
.
ways have
is said to be nonblocking (for ) if
The supervisor
. A language
representing some
specification of a plant
is said to be controllable (with
is not exited under the
respect to ) if its prefix-closure
occurrence of uncontrollable events in G. In other words,
is controllable if and only if
, where
. Therefore, the controllability
. Based
condition on specification constrains only
on this definition, to test the controllability of , we only need
to test its closure.
The existence of an optimal (marking) nonblocking supervi,
,
sory controller is proved in [3]. Let
. Then, there exists a supervisory controller such
and
if and only if
is controllable. The suthat
pervisory control of a DES enforces the controllable and nonblocking behavior of the plant that is admissible under the given
specification. Actually, the supremal supervisor contains redundant information about transition constraints which are already
enforced by the plant. Therefore, the state size of the supremal
supervisor can be reduced without affecting controlled behavior
of the closed loop system [10]. A reduced supervisor that does
the job without satisfying any required behavior of the system
has the following advantages:
easier implementation;
the simpler structure may provide the designer with a better
understanding of the supervisors control actions;
the supervisor reduction is useful in the design of modular
controls, where optimal local modular supervisors may
admit quite small reduced versions that are simple and
practical to implement.

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223

The TCT procedure

calculates a
small equivalent implementation of the supervisor such that following conditions are satisfied:
and
(4)
The following steps can be done using TCT to design and
and
implement a supervisory controller for a given plant
some given specifications:
1) model the plant (components) as automata;
2) model the specifications as DES and construct one DES,
, representing all the specifications together;
called
this can be done by the
operation in TCT;
3) find the nonblocking supervisory controller using
operation in TCT (i.e.,
the
as a centralized supervisor);
4) to simplify the supervisor, the command
in
TCT can be used. In this procedure, some (automated)
heuristics are employed to reduce the supervisor.
As an alternative method, one may design a modular supervisor for each control specification in a similar way. The decentralized supervisors are valid provided the resulting controlled
behaviors are not conflicting.

Fig. 7. DES models of different components of DFC. (a) Power meter, (b) and
(d) TSSC (seven steps), and (c) and (e) PST (19 steps).

Fig. 8. DES model of the control logic (specification) for DFC in automatic
mode.

V. DES MODELS OF DFC

In this section, the DES modeling of the plant and the control logic governing the DFC are discussed. The models will be
used later to study implementation of the supervisory control.
As shown in Fig. 5, a DFC (plant) consists of three components:
power-meter, TSSC, and PST. Each component is modeled as a
DES. The TSSC can be modeled as a single automaton. It can
also be modeled as two automata, one for the plant and the other
one for the specification, in order to get a simpler final supervisor in a modular framework. The same idea has been applied
to model PST.
The supervisory design is implemented in two different
modes of operation (i.e., automatic and auto/manual). The
TCT procedures used to synthesize the supervisors are given in
Appendix A-A. In the automatic mode, simpler models for PST
and TSSC are used, while more detailed models are employed
in the auto/manual mode comprising an operator override as
well as PST tap up/down and TSSC step up/down success and
failure events.
A quick review on some of the TCT procedures is described
in Appendix B.
A. Supervisory Control in Automatic Mode
The system components and specifications are modeled as
follows.
Power-meter
The (measured) real power passing through the line must
, where is the set point,
be within a dead-band
is the allowed power deviation.
and
The power meter reports the following events associated
with the load active power: [Fig. 7(a)]:
power meter initialized (ev11);
report decrease in power is demanded (i.e.
) (ev10);

report normal situation (i.e.,

) (ev12)
report increase in power is demanded (i.e.,
) (ev14).
TSSC
The TSSC consists of a seven-step series capacitor bank,
which can be switched quickly by electronic valves. Events
associated with the TSSC are:
capacitor decrease command (ev31);
capacitor increase command (ev33).
The DES model of a TSSC can be calculated by the synchronous product of automata shown in Fig. 7(b) and (d)
).
(i.e.,
PST
The phase shifting transformer tap controls the transformer
ratio in order to increase or decrease the line power flow.
It is assumed here that the tap-changer has 19 steps. Events
associated with the PST are:
tap down command (ev41);
tap up command (ev43).
The DES model of PST can be calculated by the synchronous product of automata shown in Fig. 7(c) and (e)
).
(i.e.,
1) Control Specifications: The DFC works in automatic
mode according to the following logic (control specifications):
a) Power Decrease process:
If a decrease in power is demanded (ev10), then run the
following commands:
1) decrease TSSC steps (ev31) until it reaches the new
(ev12)];
operating point [i.e.,
2) decrease one PST tap (ev41);
3) increase one TSSC step (ev33);
4) go to 2) until all of the decreased TSSC steps are
brought back in.

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Fig. 9. Modular supervisors and control data. (a) Modular supervisor for TSC (SIMSUP_T (7, 54)), where A := f10; 11; 12; 14; 41; 43g.
(b) Modular supervisor for PST (SIMSUP_P (19, 15)), where B := f10; 11; 12; 14; 31; 33g. (c) Modular supervisor for the three-step control logic
(SUP S3 = Supcon(PLANT; SPE3) (32,46))

b) Power Increase process:

If an increase in power is demanded (ev14), then run the
following commands:
1) increase TSSC steps (ev33) until it gets to the new
) (ev12).
operating point (i.e.,
2) increase one PST tap (ev43);
3) decrease one TSSC step (ev31).
Go to 2) until all of the increased TSSC steps are removed.
Fig. 8 shows the DES model of the control specification in the

automatic mode. It implements the above control logic in a

single DES.
Based on the proposed automata for the plant and control
specifications of DFC, the supervisory control has been synthesized in two different structures, which are given in the following section.
2) Monolithic Supervisor in Automatic Mode: In the automatic mode, we designed a centralized supervisor for DFC, after
combining all three control specifications. The size of an au-

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tomation is given by the number of states and number of events.

The size of the supervisor is, (434, 610). The reduced version of
the supervisor has size (302, 556).
In the decentralized structure, we design the modular supervisory control using three specifications separately. Each
supervisor controls one part of the plant. Fig. 9 shows the
designed modular supervisors for TSSC, PST, and the control
specification.
The modular reduced supervisors (SIMSUP_T, SIMSUP_P
and SIM_S3) are much smaller than the centralized reduced supervisor (SIMSUP3). First, we check out the reduced modular
supervisors. They operate properly according the requirement
as shown in Appendix A-A.
As explained in Appendix A-A, the modular controlled behavior MODSIM (i.e., the Capacitor Bank) and the control
logic (SP3) is NOT blocking for PLANT. But, the modular
controlled behavior MODSIM2 (i.e., the Tap-Changing Transformer) and the control logic (SP3) is blocking for PLANT.
The blocking is due to the nonreturn of a buffer, here the transformer tap, to the initial state. The tap position is determined by
the load and thus should not be returned to its initial state by itself. It is acceptable based on the physical interpretation of the
plant. Of course, the monolithic supervisory control (SUPER3)
is nonblocking (see Appendix A-A).
The synthesized supervisory control is tested on the study
system as given in Section VI. Section V-B discusses the design
of the supervisory control for DFC in the auto/manual mode.
B. Supervisory Control in Auto/Manual Mode
In this mode of operation, we need a model for the operator action to switch modes and override in abnormal situations.
Events 51 and 53 are defined for operator actions:
enter Automatic mode (ev51);
enter Manual mode (ev53).
The operator can force the system from automatic to manual
mode at any time (ev53). The system switches to manual mode
from automatic mode by a Manual command from operator
(ev53), or an abnormal situation such as failure in switching the
capacitors or in tap up/tap down operation of the transformer. In
this mode of operation it is assumed that TSSC and PST can be
controlled manually or automatically. Abnormal situations
are modeled in the plant automata by introducing the following
new events:
capacitor decrease successful (ev32);
capacitor increase successful (ev34);
capacitor decrease/increase failed (ev30);
tap down successful (ev42);
tap up successful (ev44);
tap up/down failed (ev40).
The DES models of plant subsystems PST_P and TSC_P
and their specifications, considering new events, are shown in
Fig. 10. As shown in Fig. 10(d) and (e), the capacitor or tap position changes only after a successful event occurs.
1) Auto/Manual Control Specifications: In Manual state,
the system is waiting for Automatic commands (ev51). On returning to the automatic mode, the controller is reinitialized at
state 0 of the automatic specification (Fig. 8). A specification
for auto/manual mode can be achieved by inserting suitable transitions after the occurrence of ev31, ev33, ev41, and ev43 and

225

Fig. 10. DES models of the plant in auto/manual mode. (a) TSC_P. (b) Operator. (c) PST_P. (d) TSC_S. (e) PST_S.

also by adding a new state as the Manual-operation state. The

Manual command (ev53) takes the system from any state
to the manual-operation state. Then ev51 takes this state back
to the initial state. Fig. 11 shows the DES model for the control
specification in auto/manual mode.
Using the proposed automata for the plant and control specifications of DFC in the auto/manual mode, the supervisory control has been synthesized as follows.
2) Modular Supervisors in Auto/Manual Mode: The supervisory control has been synthesized in a modular and centralized structure separately. See Appendix B for the TCT procedures used to design the supervisors. The centralized supervisor
is large [i.e., (4983, 10525)] and its reduced version has size
(3215, 19762) which is still a large automaton for implementation. The decentralized structure provides the supervisory control with a smaller automaton in size for easier implementation. Fortunately, the modular supervisors are nonconflicting in
Auto/Manual mode, as shown in Appendices A and B. The
reason is that there is an operator who can return the transformer
taps (buffer) to the initial state in Auto/Manual Mode.
In the auto/manual mode, the states of the modular supervisors SIMSUP_T and SIMSUP_P are the same as their counterparts in the automatic mode [Fig. 9(a) and (c)]. But the events
31, 33, 41, and 43 are changed here to events 32, 34, 42, and 44,
respectively. This means that a change in the capacitor steps or
the transformer taps occurs only after successful events. Also,
the self-loop events are changed accordingly, to include new
events introduced in auto/manual mode. But the modular supervisor for the auto/manual specification is achieved as a (51, 100)
automation and reduced to size (33, 100) as shown in Fig. 12.
The solution is consistent, because as seen in the results
(Appendix A-B) the modular supervisors do not conflict.
VI. TEST OF THE PROPOSED SUPERVISORY CONTROL
It is guaranteed by the theorems and procedures of supervisory control [3] which are employed in this paper, that the supervisors are nonblocking and meet the control specification in
an optimal, that is, minimally restrictive fashion. It is shown
in Section III that a controller which forces the specification of
DFC to be met, exists and is constructible. To shed further light

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Fig. 11. DES model of the control logic (specification) for DFC in auto/manual mode of operation.

Fig. 12. Reduced modular supervisory control (RSUP_S3 (33, 100)) for the three-step control logic in auto/manual mode.

on this issue in our application, we verify the proposed supervisors by inspecting their behaviors in a case, where an increase
in the power flow is demanded.
For simplicity, consider the controller in Automatic mode of
operation (Fig. 9). We recall the control steps shown in Fig. 4.
corresponds to tap position 10 and
The operating point

. The steps of TSSCs operation

are shown in Table I.
and the corresponding
The off (or on) state means that TSSC is out of (or in) service.
Upon receiving the new power flow command, based on the
control specifications, the power increase process takes action
to point
as shown in Fig. 4. For example, the
from point

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227

TABLE II
SWITCHING SEQUENCE BASED ON THE DES MODEL OF THE CONTROL LOGIC

Fig. 14. (a) Reactive power ( ) and (b) terminal voltage ( ) variations in
time domain based on the proposed switching control strategy for DFC.

Fig. 13. Power variation in time-domain based on the proposed switching control strategy for DFC.

power variations, tap positions, and steps of TSSCs are shown

in Table II.
The variation of power with time is shown in Fig. 13. Numto
correspond to those of Fig. 4.
bers
The event sequence adopted by the proposed decentralized
supervisory control is highlighted in the automata shown in
Fig. 9(a), (c), and (e). The supervisor SUP_T, which controls
TSSC, disables event 31 at state 5 and event 33 at state 6 [see
the control data in Fig. 9(b)]. This means that the TSSC cannot
be stepped down at the lowest step (state 5) and cannot be
stepped up at the highest step (state 6). But it is free to switch
up and down in between, based on the enable-disable policy of
the other supervisors. Similar reasoning applies to the second
supervisor, SUP_P which controls PST. Event 41 at state 17
and event 43 at state 18 are disabled by SUP_P [Fig. 9(b)].
We inspect the behavior of the third supervisor, SUP_S3 in
the case shown in Fig. 9(c). In this figure, the control command
of the supervisor (i.e., the way the supervisor forces the DFC to
follow the desired sequence of events), can be traced in the supervisor automaton as well as in its control data, i.e. control pattern. After an increase in the demanded power shown in Fig. 4,
the supervisor forces the plant to follow the sequence of events:

This sequence of events can be seen in the control data

[Fig. 9(c)], where the supervisors disable appropriate events in
each state.
At state (0), all components of the plant are disabled except
for the wattmeter. Then, the wattmeter initializes by ev11.
At state (1), because of the increase in the demanded power
(ev14), the system goes to state (3).
At step (3), all the controllable events are disabled unless
ev33 which steps up TSSC.
At step (5), another measurement is made by initializing
the wattmeter (ev11), and the system moves to state (11),
because of the increase in the demanded power (ev14).
At step (11), another TSSC step up is forced (ev33) by
disabling all other controllable events.
At step (15), the wattmeter is initialized (ev11) and the
system moves to state (20), because the demanded power
is met (ev12).
At step (20), only ev43 is allowed to occur by the supervisor, followed by ev31, ev43, and ev31 until the system
goes back to the initial state (0), ready for another increase
or decrease in the demanded power.
At state (0), because the power flow is not in the demanded
interval, ev14 occurs after initialization of the wattmeter.
Therefore, the system moves to state (3), where it is followed by the event chain 33,11,12,43,31 until returning to
the initial state (0).
By the aforementioned chain of events, the supervisor forces
the DFC to provide the demanded power flow in the predefined
manner (Fig. 13). Variations in reactive power and voltage at
bus are presented in Fig. 14.
VII. CONCLUSION
DFC is a FACTS controller that can control power flow of a
transmission line in both steady-state and dynamic regimes. The
DFC is able to provide discrete switching of its components and

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controls power flow in discrete steps. Therefore a DES supervisory control is best suited to design and implement the overall
control logic of a DFC. This paper introduces, designs, implements, and evaluates a DES supervisory control for a DFC unit.
To implement the DFC control logic in a discrete framework,
the supervisory control of DES was applied. DES modeling of
DFC components and control specification was discussed. Controllability of the specification was evaluated. Supervisory control was designed in a decentralized structure and was implemented using TCT software. It is guaranteed by the synthesis
procedure that the designed supervisors are optimal and nonblocking. It was shown that monolithic supervisory control in
both modes of operation, and also the modular supervisors in
auto/manual mode are nonconflicting and their overall performance is isomorphic to a centralized supervisor. The proposed
supervisory control was tested by inspecting its behavior on a
simulated situation in the automatic mode. The decentralized
structure simplifies the implementation of the proposed supervisory controller on a programmable logic controller (PLC).
Based on the proposed control, the investigated DFC adjusts
power flow at desired values in a response to a command, and
establishes a new operating point to respond to the subsequent
command without reaching its limits.
APPENDIX A
TCT PROCEDURES FOR SUPERVISORY CONTROL DESIGN

First, we check out the reduced modular supervisors:

(32,46);
;
(38,224);
;
(14,80);
;
. They are OK;
Testing the first modular supervisor (SUP_T and its reduced
version (SIMSUP_T)):
(25,46);

This shows that the modular controlled behavior MODSIM

[i.e., the Capacitor Bank and the control logic (SP3)] is NOT
blocking for PLANT.
Testing the second modular supervisor (SUP_P and its reduced version (SIMSUP_P))

A. Automatic Mode
(469,862);

A centralized supervisor for DFC in the automatic mode is

designed using the following TCT procedures:
(133,1012);
(469,1198);
(434,610);
controllable;
(302,556;

This shows that the modular controlled behavior MODSIM2

(i.e., the Tap-Changing Transformer and the control logic
(SP3) is blocking for PLANT). The blocking is because of the
nonreturn of a buffer; here, the transformer tap, to the initial
state.
Of course, the monolithic supervisory control (SUPER3) is
nonblocking:

);

Modular supervisors

(387,556);
;

(14,80);
controllable;

(387,556);
(7,54;

);

(19,150;

(38,224);

B. Auto/Manual Mode

controllable;

Building the plant:

(9,36)

);

(18,108)
(32,46);

controllable;

(18,144)
(25,46;

).

;
(1,16).

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229

Modeling the control logic and designing the supervisory

control:

sublanguage of the marked (legal) language generated

by DES2 to create DES3. This structure provides a proper
supervisor for DES1.

(44,120);
(44,164)
;
(133,2076);
(4424,16328);
(4983,10525);
controllable;
(3215,9762;

);
(51,109);
controllable;
(33,100;

).
Checking out the modular supervisors:
(51,109);

(DES1, DES2) returns control data DAT3

for the supervisor DES2 of the controlled system DES1. If
DES2 represents a controllable language (with respect to
DES1), as when DES2 has been previously computed with
supcon, then condat will display the events that are to be
disabled at each state of DES2. In general condat can be used
to test whether a given language DES2 is controllable: just
check that the disabled events tabled by condat are themselves
controllable (have odd-numbered labels).
(DES1, DES2, DAT3) is a reduced
supervisor for plant DES1 which is control-equivalent to DES2,
where DES2 and control data DAT2 were previously computed
using Supcon and Condat. Also returned is an estimated lower
bound slb for the state size of a strictly state-minimal reduced
supervisor. DES3 is strictly minimal if its reported state size
happens to equal the slb.
(DES1) reduces DES1 to a minimal state
transition structure DES2 that generates the same closed and
marked languages, and the same string mapping induced by
vocalization (if any). DES2 is reachable but not necessarily
coreachable.

(330,2628);
;
(114,900);

(DES1, NULL/image events) is a generator

of the projected closed and marked languages of DES1, under
the natural projection specified by the listed null or image
events.

;
They are OK.
Now taking the meet of the 3 modular supervisors to get their
online equivalent supervisor
(222,654);
(4171,12250);

controllable;
(4983,10525);

This shows that the modular controlled behavior MODSIM

is controllable, is NOT blocking for PLANT, and is controlequivalent to the (optimal) monolithic supervisor SUPER3.
APPENDIX B
QUICK REVIEW ON SOME OF THE TCT PROCEDURES
(DES1, DES2) for a controlled generator
DES1, forms a trim recognizer for the supremal controllable

(DES1,[state-output pairs]) has the same

closed and marked behaviors as DES1, but with state outputs
corresponding to selected state/event input pairs.
(DES1) has the same closed and marked
behaviors as DES1, but is output-consistent in the sense
that nonzero state outputs are unambiguously controllable
or uncontrollable. A vocal state with output V in the range
10 99 may be split into siblings with outputs V1 or V0 in the
range 100 991.
(DES1) has the same closed and marked
behaviors as DES!, but is hierarchically consistent in the sense
that high-level controllable events may be disabled without
side effects. This may require additional vocalization together
with change in the control status of existing state outputs.
hiconsis incorporates and extends outconsis.
(DES1, DES2) tests whether DES1
and DES2 are identical up to renumbering of states; if so, their
state correspondence is displayed.
(DES1) is defined over the state-output
alphabet of (vocalized) DES1, and represents the closed and
marked state-output (or high-level) behaviors of DES1.

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Ali A. Afzalian (M93SM06) received the B.Eng. and M.Sc. degrees in electrical engineering from the University of Tehran, Tehran, Iran, in 1988 and 1991,
respectively, and the Ph.D. degree in control engineering from the University of
Sheffield, Sheffield, U.K., in 1998.
Since 1991, he has been a Faculty Member in the Department of Control Engineering of Shahid Abbaspour University of Technology, Tehran. His research interests include supervisory control of discrete-event systems, fuzzy logic, neural
networks, neurofuzzy systems, genetic algorithms, and electrical power systems
control and dynamics.

S. Ali Nabavi Niaki (M92SM04) received the B.Sc. and M.Sc. degrees in
electrical engineering from Amirkabir University of Technology, Tehran, Iran,
in 1987 and 1990, respectively, and the Ph.D. degree in electrical engineering
from the University of Toronto, Toronto, ON, Canada, in 1996.
He joined the University of Mazandaran, Babol, Iran, in 1996. Currently, he is
on leave from the University of Toronto. His research interests include analysis,
operation and control of power systems, and FACTS controllers.

M. Reza Iravani (M85SM00F03) received the B.Sc. degree in electrical

engineering from Tehran Polytechnique University, Tehran, Iran, in 1976, and
the M.Sc. and Ph.D. degrees in electrical engineering from the University of
Manitoba, Winnipeg, MB, Canada, in 1981 and 1985, respectively.
Currently, he is a Professor with the University of Toronto, Toronto, ON,
Canada. His research interests include power system dynamics and power electronics.

W. M. Wonham (M64SM76F77LF00) received the B.Eng. degree in

engineering physics from McGill University, Montreal, QC, Canada, in 1956,
and the Ph.D. degree in control engineering from the University of Cambridge,
Cambridge, U.K., in 1961.
From 1961 to 1969, he was associated with several U.S. research groups
in control. Since 1970, he has been a Faculty Member in Systems Control,
with the Department of Electrical and Computer Engineering of the University
of Toronto. His research interests include stochastic control and filtering, geometric multivariable control, and discrete-event systems.