IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

7, JULY 2013 3329

A 1-kW Step-Up/Step-Down Switched-Capacitor
ACAC Converter
Romero L. Andersen, Member, IEEE, Telles B. Lazzarin, Member, IEEE, and Ivo Barbi, Fellow, IEEE
AbstractThis paper proposes a new acac static power con-
verter based on the switched-capacitor (SC) principle, intended to
replace the conventional autotransformer in commercial and resi-
dential applications. The principle of operation, a qualitative and
quantitative analysis, the design methodology, and an example are
described in this paper. The main advantages of the proposed acac
converter are the absence of magnetic elements, the stress voltages
in all components being equal to half of the high-side voltage, the
common reference between input and output voltages, the employ-
ment of a single SC leg, the ability to be bidirectional, the high
efciency, and the high power density. In order to demonstrate
the performance of this converter in the laboratory, a prototype of
1-kW, 220-V
rms
high-side voltage, 110-V
rms
low-side voltage, and
switching frequency of 100 kHz was designed and fabricated. The
relevant experimental results are reported herein. The maximum
and rated power efciencies obtained in the laboratory were 98%
and 96%, respectively.
Index TermsACAC converter, bidirectional, switched-
capacitor (SC).
I. INTRODUCTION
T
HROUGHOUT the world, it is common to nd com-
mercial and domestic appliances that work with differ-
ent voltages from those available on the electrical grid and
the most popular solution is the employment of a low-power/
low-voltage autotransformer. However, like any electromagnetic
transformer, the autotransformer efciency is poor and it pro-
duces considerable audible noise. Moreover, the global demand
for copper, utilized in the autotransformer winding construction,
has been continuously increasing and is nowadays exceeding the
supply [1].
The switched-capacitor (SC) converters have been a very im-
portant research topic for many years, basically in relation to
nonisolated dcdc static power conversion [2][7]. Some ap-
plications that already benet from the SC principle include
power supplies for mobile electronics systems, electric vehi-
cles, battery equalizer circuits, voltage-balancing circuits for
multilevel inverters, etc. [8][20]. As SC power converters are
composed only of capacitors and switches, without magnetic de-
vices, they can achieve signicant size reduction in comparison
with the converters generally used in conventional switched-
Manuscript received June 4, 2012; revised August 9, 2012; accepted
September 20, 2012. Date of current version December 24, 2012. Recom-
mended for publication by Associate Editor J. A. Pomilio.
The authors are with the Department of Electrical Engineering, Power Elec-
tronics Institute, Federal University of Santa Catarina, Florianopolis 88040-
970, Brazil (e-mail: rlandersen@gmail.com; telles@inep.ufsc.br; ivobarbi@
inep.ufsc.br).
Digital Object Identier 10.1109/TPEL.2012.2222674
mode power supplies. Furthermore, the behavior of these cir-
cuits can be described by simple equivalent circuits [21][27]
and it is possible to fabricate these converters on a semiconduc-
tor IC chip [21][26].
Arecent publication [1] extended for the rst time the switch-
ing capacitor principle to acac static conversion, where a brief
analysis and experimental results for a step-down/step-up con-
verter with rated power of 600 W, high-side voltage of 220 V
rms
,
low-side voltage of 110 V
rms
, line frequency of 60 Hz, and
switching frequency of 50 kHz were presented. The main char-
acteristics of the converter are the stress voltages in all compo-
nents being equal to half of the high-side voltage, the differential
output voltage, the employment of two SC legs, and eight uni-
directional switches. The results presented in [1] are promising
and show that the employment of an SC in an acac converter
can contribute with new and efcient solutions for the acac
area, as, for example, in low-power/low-voltage systems aimed
at replacing the conventional autotransformer in commercial
and domestic applications.
The purpose of this paper is to introduce a new SC-based
acac static power converter topology. The main characteristics
of the proposed acac converter that are also present in [1]
are the absence of magnetic elements and the stress voltages
on the switches being equal to half of the high-side voltage.
In addition, there are also the new characteristics of having a
common reference between input and output voltages, no dc
component in the capacitor voltages, and the employment of a
single SCleg and four bidirectional switches. Adetailed analysis
of the converter, equivalent circuits, the design methodology,
and experimental results are reported herein.
II. PROPOSED SC ACAC CONVERTER
The proposed SC acac converter is presented in Fig. 1. This
converter operates as a step-down converter when congured as
shown in Fig. 1(a) or as a step-up converter when congured
according to Fig. 1(b). The only difference is that the points
where the source and the load are connected have to be in-
verted. The circuit has four bidirectional switches represented
as S
1
, S
2
, S
3
, and S
4
and three capacitors represented as C
1
, C
2
,
and C
3
. Fig. 1(c) and (d) shows the proposed gate signals and
the practical implementation of a bidirectional switch using two
conventional MOSFETs, respectively.
In this topology, one half of the high-side voltage (v
H
/2)
is applied to C
2
and C
3
. Capacitor C
1
, being connected to
C
2
and after this to C
3
in each switching period, equalizes
their voltages to v
L
= v
H
/2. Each bidirectional switch series
resistance is considered, and despite being needed for the
capacitor charge/discharge process, they also cause losses.
These losses are minimized for D = 0.5, as will be discussed in
a later section, which is the proposed duty cycle.
0885-8993/$31.00 2012 IEEE
3330 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Fig. 1. Proposed SC acac converter: (a) step-down conguration, (b) step-up conguration, (c) gate drive signals, and (d) bidirectional switch model and its
practical implementation using two MOSFETs.
Fig. 2. Theoretical waveforms of the proposed acac converter: (a) input and
output voltages; (b) voltages across the capacitors; and (c) voltage across the
switches.
III. PRINCIPLE OF OPERATION
This section presents the principle of operation of the pro-
posed SCacac converter in two steps: the rst analyzes the main
characteristics of the converter at low frequency (frequency of
the input voltage) and the second studies the operation stages of
the converter in a switching period (high-frequency analysis).
A. Low-Frequency Analysis
The low-frequency analysis presents the principle of opera-
tion, the main waveforms, and voltage stresses on the compo-
nents of the proposed converter in a period of the input source.
The SC C
1
in the acac converter shown in Fig. 1(a) and (b)
ensures the voltage balance between the capacitors C
2
and C
3
.
Consequently, it operates as a step-down or step-up converter
and the voltage stresses on the capacitors and on the switches
are one-half of high voltage v
H
. For both operation modes, the
expected waveforms of the proposed converter are illustrated in
Fig. 2, where the input and output voltages are in Fig. 2(a), the
voltages across the capacitors are in Fig. 2(b), and the voltages
across the switches are in Fig. 2(c), V
kp
being the peak value of
the high voltage v
H
.
B. High-Frequency Analysis
An SC converter can operate in three modes, which are de-
ned by the charge of the SC. These modes are complete charge
(CC), partial charge (PC), and no charge (NC) [25]. The best op-
eration regions are in PC and NC modes. The NC mode usually
requires a high operation frequency and large capacitances, and
the advantages in relation to PC mode are not signicant; thus,
the PC mode is considered for the proposed converter. There-
fore, the waveforms described in this section, in the operation
stages, relate to the converter operating in PC mode.
The proposed acac converter operating as a step-down con-
verter presents two operation stages per switching period. Dur-
ing the positive half of the grid voltage, with the converter in
the step-down conguration, these stages can be described as
follows.
First stage starts when switches S
1
and S
3
are turned ON.
Capacitor C
2
discharges and capacitor C
3
charges during the
rst part of this stage (t
1A
). When their currents reach zero,
C
2
starts to charge and C
3
starts to discharge until the end of the
stage (t
1B
). Capacitor C
1
charges throughout this stage and
the power source v
H
delivers energy to the circuit. Switches
S
1
and S
3
are turned OFF at the end of the rst stage. This
topological stage is shown in Fig. 3(a).
Second stage starts when switches S
2
and S
4
are turned ON.
Initially, the power source receives energy from the circuit, ca-
pacitor C
2
discharges, and capacitor C
3
charges until their cur-
rents reach zero (t
2A
). After this, the power source delivers
energy to the circuit, capacitor C
2
charges and capacitor C
3
discharges until the end of the stage (t
2A
). Capacitor C
1
dis-
charges throughout this stage. Switches S
2
and S
4
are turned
OFF at the end of the second stage. This topological stage is
shown in Fig. 3(b).
After the second stage, another switching period starts from
the rst stage.
In the negative half-cycle of the grid, the converter has similar
operation stages with different current directions, as can be seen
in Fig. 3(c) and (d). The main theoretical waveforms for the
positive and the negative half-cycles of the grid are shown in
Fig. 4(a) and (b), respectively.
ANDERSEN et al.: 1-kW STEP-UP/STEP-DOWN SWITCHED-CAPACITOR ACAC CONVERTER 3331
Fig. 3. Topological stages for step-down conguration. Positive half-cycle of the grid voltage: (a) First stage. (b) Second stage. Negative half-cycle of the grid
voltage: (c) First stage. (d) Second stage.
IV. QUANTITATIVE ANALYSIS
A. Ideal Voltage Gain
The ideal voltage gain of the proposed SC acac converter
can be understood by examining Fig. 1(a) and (b), where the ca-
pacitor voltages C
1
, C
2
, and C
3
are the same and are dened by
v
C1
= v
C2
= v
C3
=
v
H
2
. (1)
When the converter operates in a step-down conguration, its
output voltage is the voltage across the capacitor C
3
(v
C3
) and
the ideal voltage gain is dened by
G
vSD ideal
=
v
L
v
H
=
1
2
. (2)
When the converter operates as a step-up conguration, its
output voltage is the voltage across the capacitors C
2
and C
3
(v
C2
+ v
C3
) and the ideal voltage gain is dened by
G
vSU ideal
=
v
H
v
L
= 2. (3)
B. Equivalent Resistance
The proposed acac converter has an SC cell, as shown in
Fig. 5(a). Previous studies on dcdc converters have demon-
strated that this SC cell can be represented by an equivalent
resistance, as illustrated in Fig. 5(b), which is calculated using
(4) for different duty cycle values and (5) for a duty cycle of
50% [21], [22]. The model in Fig. 5(b) describes the equivalent
resistance of the SC acac converter seen through its high
side; nevertheless, it can also be represented through its low
side employing the relation dened in (6).
Expression (4) considers the capacitor voltages C
2
and C
3
to be constant. The proposed converter allows this approach
because capacitors C
2
and C
3
are always connected to the input
voltage. When the SC C
1
is connected in parallel with C
2
[see
Fig. 3(a) and (c)], capacitor C
2
supplies energy to C
1
only
part of the time [T
1A
in Fig. 3(a) and (c)]. During the time
T
1B
, both capacitors C
1
and C
2
receive energy. The process
is similar when the SC C
1
is connected in parallel with C
3
[see
Fig. 3(b) and (d)]. This characteristic makes the voltage ripples
in capacitors C
2
and C
3
lower than that in capacitor C
1
, even
though the order of magnitude of the capacitors is same. Thus,
it is possible to consider the voltage ripples in C
2
and C
3
to
be constant in order to obtain the equation for the equivalent
conduction resistance.
R
eqH
=
1
f
s
C

(1 e
1/f
s
2R
o n
C
)
[1(e
(D)/f
s
2R
o n
C
+e
(1D)/f
s
2R
o n
C
)+e
1/f
s
2R
o n
C
]
(4)
R
eqH(D=0.5)
=
1
f
s
C

(1 + e
1/2f
s
2R
o n
C
)
(1 e
1/2f
s
2R
o n
C
)
(5)
R
eqL
=
1
4
R
eqH
(6)
3332 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Fig. 4. Main theoretical high-frequency waveforms. (a) Positive half-cycle of
the grid voltage. (b) Negative half-cycle of the grid voltage.
Fig. 5. (a) SCacac converter. (b) Equivalent resistance of SCacac converter
seen through its high side v
H
.
Fig. 6. Normalized equivalent resistance (a) versus f
s
and (b) versus D.
A normalized equivalent resistance is dened by (7) for dif-
ferent duty cycle values and by (8) for a duty cycle of 50%.
These expressions are obtained through manipulation of (4) and
(5), and is dened in (9)
R
eqH
=
R
eqH
8 R
on
=
1
4 f
s

1 e
1/f
s

e
(D)/f
s

+ e
(1D)/f
s

+ e
1/f
s

(7)
R
eqH(D=0.5)
=
R
eqH(D=0.5)
8 R
on
=
1
4 f
s

1 + e
1/2f
s

1 e
1/2f
s

(8)
= 2 R
on
C (9)
R
eqH(D=0.5) min
= limR
eqH(D=0.5)
f
s

= 8 R
on
. (10)
Expression (8) shows the behavior of the normalized equiva-
lent resistance in relation to f
s
(product of switching frequency
and ) when Dis xed (D=0.5), which is presented in Fig. 6(a).
It indicates that an increase in frequency provides a decrease in
R
eqH
. Thus, the equivalent resistance value is lower when the
switching frequency tends to innite (or it is very high) and this
value is dened in (10).
The behavior of the normalized equivalent resistance in re-
lation to the duty cycle can be veried in Fig. 6(b) when f
s

is xed (f
s
= 0.5). The curve was drawn employing (7) and
it demonstrates that the equivalent resistance value is lower at
close to D = 0.5. Therefore, an SC acac converter with a low
equivalent resistance can be obtained through the proper design-
ing of the parameters D, f
s
, and . Consequently, its efciency
will be high.
C. Equivalent Capacitance
The SC C
1
of the proposed acac converter remains con-
nected DT
s
in parallel with C
2
and (1 D)T
s
in parallel with
C
3
in each switching period. This operation works as two equiv-
alent capacitors, one in parallel with C
2
which has a value of
D C
1
and another in parallel with C
3
which has a value of
(1 D) C
1
, as represented in Fig. 7(a). The analysis of this
electrical circuit (considering D = 0.5 and three equal capac-
itors) enables an equivalent capacitance to be found for the
acac converter which, when seen through the high side, is de-
ned in (11) and has the conguration shown in Fig. 7(b). The
ANDERSEN et al.: 1-kW STEP-UP/STEP-DOWN SWITCHED-CAPACITOR ACAC CONVERTER 3333
Fig. 7. (a) Model employed to obtain the equivalent capacitance. (b) Equiva-
lent capacitance of SC acac converter seen through high side v
H
.
same capacitance can be represented by the low side, as given
by (12). The equivalent capacitance allows the reactive power
ow required by the acac converter and its power factor to be
estimated.
C
eqH
=
3
4
C (11)
C
eqL
= 3 C (12)
D. Switching Losses
The converter proposed in Fig. 1 employs bidirectional
switches implemented by MOSFETs. The switching loss in one
MOSFET due to its parasitic capacitance is given by (13), where
C
OSS
is the output capacitance of a MOSFET, f
s
is the switch-
ing frequency, and v
s
is the voltage across the switch that is
shown in Fig. 2(c) and dened by (14). Equation (13) calculates
the power supplied to the MOSFET capacitance in a switching
period. The sum of the supplied power in all switching peri-
ods during one period of input voltage provides the total power
supplied to the MOSFET capacitance, which is given by (15).
As the converter uses eight switches, the total switching losses
due to parasitic capacitances of MOSFETs are expressed by
(16). This equation demonstrates that increasing the switching
frequency of the acac converter also increases the switching
losses
P
sl1S
= E f
s
=
1
2
C
OSS
(v
S
)
2
f
s
(13)
v
S
=
v
H
2
=
V
pk
2
sin () (14)
P
sl1S
=
1
2
C
OSS
f
s

1
2

2
0
V
pk
2
sin () d
=
1
16
C
OSS
f
s
V
2
pk
(15)
P
sl8S
= 8 P
sl1S
=
1
2
C
OSS
f
s
V
2
pk
. (16)
An equivalent resistance that describes the switching losses
of the acac converter on the high side can be obtained from
(17). On substituting (16) into (17), this equivalent resistance is
dependent only on C
oss
and f
s
, as shown by (18). This equivalent
Fig. 8. Equivalent circuit of SC acac converter. (a) Model seen by high
side. (b) Model seen by low side.
resistance can be reected to the low side by (19).
R
slH
=
v
2
H
P
sl8S
(17)
R
slH
=
1
C
OSS
f
s
(18)
R
slL
=
1
4 C
OSS
f
s
. (19)
E. Equivalent Circuit
Based on Sections IV-B, IV-C, and IV-D, an equivalent circuit
for the acac converter is proposed, as presented in Fig. 8.
Its variables can be represented by the high side, as shown in
Fig. 8(a), or by the lowside, as shown in Fig. 8(b). The elements
that compose the equivalent circuit are as follows:
R
slH
or R
slL
: parallel resistance that indicates the switching
loss due to intrinsic capacitances of the MOSFETs;
R
eqH
or R
eqL
: series resistance that indicates conduction
loss in switches and capacitors;
C
eqH
or C
eqL
: parallel capacitance that indicates reactive
power ow required by acac converter.
The study in Sections IV-A and IV-D demonstrated that the
resistances R
eqH
and R
sl
decrease when the switching fre-
quency increases; therefore, the conduction loss decreases and
the switching loss increases. As the total loss of the acac con-
verter is the sum of both losses, there is a range of switching
frequency that minimizes the total loss and, consequently, in-
creases the efciency of the converter.
The analysis of the equivalent circuit allows simple equations
to be found that are employed to examine and design the pro-
posed acac converter. These equations are shown in Table I and
they provide the main information on the acac converter. The
variable f in the equations is the frequency of the input voltage.
V. DESIGN EXAMPLE
A. Specication
After the theoretical analysis, some design specications
were dened with the objective of simulating the converter and
3334 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
TABLE I
EQUIVALENT CIRCUIT EQUATIONS
implementing a prototype. These specications are: P
o
=1000-
W output power; Q
i
0.3P
o
-VAR input reactive power; v
H
=
220-V high-side voltage; v
L
= 110-V low-side voltage; f
i
=
60-Hz frequency of ac voltage; > 95% expected efciency;
and D = 0.5 duty cycle.
The proposed acac converter is designed to operate with low
equivalent resistance. This requires that f
s
0.2 and D

= 0.5
in Fig. 6(a) and (b). Thus, an adequate design sets the duty cycle
at 0.5, calculates the capacitor according to the desired reactive
power, and chooses the switches and the switching frequency
to maintain f
s
higher than 0.2 while still keeping the switch
conduction resistance low (R
on
) and the switching frequency
f
s
achievable in the practical implementation. In the following
sections, the choice of components, the choice of switching
frequency, and an analysis of the results are discussed.
B. Capacitance Calculation
Based on the specication and the equation for the input
reactive power in Table I, the maximum capacitance for C
1
, C
2
,
and C
3
is obtained using
C
2 (0.3 P
o
)
3 v
2
H
f
21.9 F. (20)
Two 10-F/400-V parallel-connected were chosen for each
capacitor (C =20 F). Thus, the expected power factor is 0.969
in full load.
C. Switching Frequency and Choice of Switches
The MOSFETs that implement the bidirectional switches are
chosen with the aim of obtaining the appropriate f
s
and a low
Fig. 9. Efciency versus switching frequency.
conduction resistance. Thus, the MOSFETFQA62N25C, which
has a R
DS(on)
value of 35 m at 25

C (or 60 m at 100

C),
was selected. Its maximum drainsource voltage is 250 V.
The total conduction resistance of a bidirectional switch
(R
on
) is twice the resistance of a MOSFET, and therefore, the
resistance R
on
is 120 m at 100

C.
Applying the values of C and R
on
in the efciency equation
in Table I allows the efciency of the acac converter to be pre-
dicted for the switching frequency selected, as shown in Fig. 9.
This curve demonstrates that the converter is most efcient at
between 80 and 120 kHz. Thus, the switching frequency se-
lected was 100 kHz, as identied in the gure. At this operation
point, the expected efciency is 97.3%.
ANDERSEN et al.: 1-kW STEP-UP/STEP-DOWN SWITCHED-CAPACITOR ACAC CONVERTER 3335
TABLE II
MAIN PARAMETERS OF EQUIVALENT CIRCUIT
TABLE III
DESIGN EXAMPLE RESULTS
D. Equivalent Circuit
The denition of the values of C, R
on
, D, and f
s
allows the
parameters for the equivalent circuit to be calculated, as shown
in Table II.
E. Main Results of Design Example
The expected results for the design example were obtained
by applying the equations in Table I and by simulation of the
proposed acac converter. Both sets of results are shown in
Table III, those obtained from the equations in the rst column
and from the simulation in the second column.
The results in Table III indicate that the specication of the
design example could be extended as it has an expected ef-
ciency of 97.4%. The results also allow it to be estimated that
for this converter the conduction loss is around 24.8 W and the
switching loss is around 4.6 W.
The results in the two columns are very similar, which val-
idate the equations presented in Table I, determined through
an analysis of the proposed equivalent circuit. Therefore, the
equations in Table I and the equivalent circuit can be used in
the study of the proposed acac converter to produce consistent
results.
VI. PROTOTYPE IMPLEMENTATION AND
EXPERIMENTAL RESULTS
After the analysis, design, and simulations, a prototype was
built to verify the operation of the proposed converter in lab-
oratory. The main specications and components used in the
prototype are presented in Table IV. The schematic of the im-
plemented circuit and a photo of the prototype are presented
TABLE IV
MAIN SPECIFICATIONS AND COMPONENTS OF THE PROTOTYPE
in Figs. 10 and 11, respectively. The experiments were carried
out with the converter fed by the electric grid. As the converter
provides a signicant level of power, the input lter needs to be
either an inductive L or an inductive-capacitive LC lter. The
frequency of the current ripple is high (100 kHz), and thus, a
small lter is sufcient to lter the input current. An Llter was
selected in order to employ the line inductance as a lter rather
that add an external inductor. However, an LC lter could be
used, and in cases of high power, this may be a more appropri-
ate choice. An input inductance changes slightly the shape of
the current ripple in capacitors and switches because the high-
frequency component circulates only through C
2
and C
3
. This
difference slightly decreases the efciency of the converter, but
this is not signicant. The line inductance during the test was
around 10 H.
The prototype uses a simple gate drive circuitry. The gate
signals were generated using a UC3525 PWM modulator, two
integrated drivers UCC27424, and two small gate drive trans-
formers with a 1:1:1 turns ratio. A commercial 15-W 12-V
auxiliary power supply was included in the prototype to feed
the ICs and the overall size is much reduced.
First, the prototype was tested for the step-down conguration
and the basic waveforms were acquired. Fig. 12 shows the input
and output voltages in this situation. The output voltage follows
the shape and phase of the grid voltage and the small voltage
drop compared to the ideal value of v
H
/2 is caused by the total
equivalent resistance. Fig. 13 shows the voltage across a switch
and the output voltage; as expected, the low-side voltage is
applied to the switches. This is an advantage of the topology
which allowed the use of low-resistance low-voltage (250 V)
MOSFETs.
The voltages across the capacitors can be seen in Fig. 14. Their
value is around v
H
/2 and the ripple is almost imperceptible
for the chosen parameters. The current through capacitor C
1
is shown in Fig. 15 and its shape is similar to that shown in
Fig. 4.
The input current leads the voltage by approximately 14.4

as can be seen in Fig. 16, which is expected for the capacitive

circuit. Its prole is near sinusoidal with some distortion which
is reproduced from the grid voltage. The grid series inductance
was able to lter most of the high-frequency component. The
measured power factor for rated power was 0.9687.
The operation with different types of loads can be seen in
Figs. 17 and 18 for an RL load and a nonlinear load, respectively.
In both gures, the voltage distortion that is present in the grid
3336 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Fig. 10. Schematic of the implemented circuit.
Fig. 11. Photo of the prototype.
Fig. 12. Experimental waveforms: Input v
H
and output v
L
voltages.
Fig. 13. Experimental waveforms: Voltage across switch S
1
and output volt-
age v
L
.
voltage appears in the output voltage. The output current in
Fig. 17 lags the voltage as expected by around 60

and has
sinusoidal prole (R = 10 and L = 45 mH). The output
current in Fig. 18 is caused by a single-phase rectier with a
capacitive lter of 300 F, a line inductance of 1.4 mH, and a
resistor of 20 . In both situations, the converter presents normal
operation.
Second, the same procedure was followed for the step-up
conguration. The waveforms acquired for the input and output
voltages shown in Fig. 19, the low-side voltage and the voltage
across a switch shown in Fig. 20, and the capacitor voltages
shown in Fig. 21 are similar to those presented for the step-
down conguration. The only difference is that in this case,
the power source is connected to the low side and the load is
ANDERSEN et al.: 1-kW STEP-UP/STEP-DOWN SWITCHED-CAPACITOR ACAC CONVERTER 3337
Fig. 14. Experimental waveforms: Voltages across capacitors C
1
, C
2
, and
C
3
.
Fig. 15. Experimental waveform: Current through capacitor C
1
(i
C 1
). Scale:
10 A/div. and 2 s/div.
Fig. 16. Experimental waveforms: Input voltage v
H
and input current i
H
.
Fig. 17. Experimental waveforms: Input voltage v
H
, output voltage v
L
, and
output current i
L
for RL load.
Fig. 18. Experimental waveforms: Input voltage v
H
, output voltage v
L
, and
output current i
L
for nonlinear load.
Fig. 19. Experimental waveforms: Input v
L
and output v
H
voltages.
3338 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Fig. 20. Experimental waveforms: Voltage across switch S
1
and low-side
voltage v
L
.
Fig. 21. Experimental waveforms: Voltages across capacitors C
1
, C
2
, and
C
3
.
connected to the high side. The input current, shown in Fig. 22,
also leads the voltage by around 13.5

, as expected, and the

measured power factor for the rated power was 0.9724. The
high-frequency component is more ltered in this case than it
is in the step-down conguration because the input current is
higher.
Finally, the experimental curves for the efciency, regula-
tion, and power factor were compared to the theoretical curves
obtained through calculation using the equations presented pre-
viously in the analysis.
The efciency curves plotted in Fig. 23 show that for a wide
load range, the experimental efciency is higher than 96% for
both the step-down and step-up congurations. The experimen-
tal efciency at rated power was 96.2% for the step-down [see
Fig. 23(a)] and 95.6% for the step-up [see Fig. 23(b)] con-
guration. The efciency peaks were 97.8% (step-down) and
97.2% (step-up), and occurred at 400 W. The theoretical and
simulation curves are above the experimental curves, due to the
experimental setup wires and connections having resistances
Fig. 22. Experimental waveforms: Input voltage v
L
and input current i
L
(low
side).
that were not taken into account in the theoretical analysis, and
consequently, the losses were greater than those considered in
the calculations. Fig. 23(a) also shows a theoretical curve where
the experimental setup resistance was considered as an addition
of 50%in the equivalent resistance (from259 to 388 m). In this
case, the calculated efciency is much closer to the experimental
result.
The output regulation curves can be seen in Fig. 24. Fig. 24(a)
shows the calculated output voltage regulation, the theoretical
regulation where the experimental setup resistances were con-
sidered, and the experimental regulation for step-down opera-
tion. Fig. 24(b) shows a comparison between the simulated and
the experimental regulation for step-up operation. A voltage
drop of less than 3.5% was noted for rated power compared to
the no-load output voltage. Again, this voltage drop is higher
than expected based on the calculations and the simulations
because the experiment had more resistances. The cables and
connections used to install the measurement instruments typi-
cally have resistances of the order of a few tens of milliohms,
which can cause this difference.
The curves in Fig. 24 also verify the switching losses of
the proposed model (19). The converter has switching losses
due to the intrinsic capacitances of MOSFETs even when the
converter is under no-load conditions (0 kW in output power).
Nevertheless, the regulation is 100% at this operation point,
verifying that there is no drop in the output voltage due to the
charge/discharge of the intrinsic capacitances of the MOSFET.
This energy is supplied by the input voltage and it does not affect
the output voltage. However, it is present and it is responsible
for the low efciency under the low-load conditions shown in
Fig. 23.
The input power factor curves in Fig. 25 show very good
agreement between the calculations and experimental measure-
ments. The power factor is close to 1 at rated power but it
drops considerably for low power. This is a consequence of the
capacitive circuit and the parameters chosen. Nevertheless, the
capacitive characteristic can be benecial in some scenarios and
contribute to increasing the overall power factor where most of
the loads are inductive.
ANDERSEN et al.: 1-kW STEP-UP/STEP-DOWN SWITCHED-CAPACITOR ACAC CONVERTER 3339
Fig. 23. Measured efciency. (a) Theoretical A (calculation); theoretical B (calculation considering prototype resistances) and experimental step-down.
(b) Simulation step-up and experimental step-up.
Fig. 24. Output voltage regulation. (a) Theoretical A (calculation); theoretical B (calculation considering prototype resistances) and experimental step-down.
(b) Simulation step-up and experimental step-up.
Fig. 25. Input power factor. Theoretical (calculation); experimental step-down
and experimental step-up.
VII. CONCLUSION
A new acac static power converter based on the SC princi-
ple has been proposed. The following conclusions can be drawn
from the theoretical analysis and the experimental results re-
ported in this paper:
1) the proposed acac static power converter employs only
capacitors and switches;
2) the converter employs a single SC and has a common
reference between output and input voltages;
3) the converter operating in open loop with a con-
stant duty cycle of 0.5 presents better voltage regula-
tion than its autotransformer counterpart with the same
specications;
4) the topology does not require complex control algorithms,
the conversion efciency is high, and the power factor is
close to 1 for rated power;
5) the circuit can operate as a step-down converter (static
gain of 0.5) or a step-up converter (static gain of 2), and
3340 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
in both modes, only one-half of the high-side voltage is
applied to the switches and the capacitors;
6) the theoretical analysis results were corroborated by the
experimental results;
7) the proposed converter is a potential candidate for sub-
stituting the conventional autotransformer in low-power
applications.
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Romero L. Andersen (M11) was born in Florian o-
polis, Santa Catarina, Brazil, in 1980. He received
the B.S., M.S., and Ph.D. degrees in electrical engi-
neering from the Federal University of Santa Cata-
rina, Florian opolis, Brazil, in 2003, 2006, and 2010,
respectively.
He is currently a Postdoctoral Researcher at the
Power Electronics Institute, Federal University of
Santa Catarina. His interests include dcdc power
conversion, power converter modeling, and renew-
able energy sources.
Telles B. Lazzarin (S09M12) was born in
Crici uma, Santa Catarina, Brazil, in 1979. He re-
ceived the B.Sc., M.Sc., and Ph.D. degrees in electri-
cal engineering from the Federal University of Santa
Catarina (UFSC), Florian opolis, Brazil, in 2004,
2006, and 2010, respectively.
He is currently a Professor at the Federal Institute
of Santa Catarina, Florian opolis, and he also works as
a Guest Researcher at the Power Electronics Institute
(INEP), UFSC. In 2007, he was a Research Assistant
at the University Center of Jaragua do Sul, Brazil. In
2010 and 2011, he was a Postdoctoral Fellow at INEP, UFSC. His interests
include inverters, parallel operation of inverters, UPS, high-voltage dc-dc con-
verters, acac power converters, and switched-capacitor converters.
Dr. Lazzarin is a Member of the Brazilian Power Electronic Society, the
IEEE Power Electronics Society, and the IEEE Industrial Electronics Society.
Ivo Barbi (M78SM90F11) was born in Gaspar,
Santa Catarina, Brazil, in 1949. He received the B.S.
and M.S. degree in electrical engineering from the
Federal University of Santa Catarina, Florianopolis,
Brazil, in 1973 and 1976, respectively, and the Dr.Ing.
degree from the Institut National Polytechnique de
Toulouse, Toulouse, France, in 1979.
He founded the Brazilian Power Electronics So-
ciety and the Power Electronics Institute of the Fed-
eral University of Santa Catarina. He is currently a
professor of the Power Electronics Institute, Federal
University of Santa Catarina.