Course Contents:

Module I: Parallel computer models

The state of computing, Multiprocessors and multicomputers, Multivector and SIMD computers,
Architectural development tracks
Program and network properties: Conditions of parallelism, Data and resource dependences, ardware and
software parallelism, Program partitioning and scheduling, !rain si"e and latenc#, Program flow
mechanisms, Control flow versus data flow, Data flow architecture, Demand driven mechanisms,
Comparisons of flow mechanisms

Module II: System Interconnect Architectures
$etwork properties and routing, Static interconnection networks, D#namic interconnection $etworks,
Multiprocessor s#stem interconnects, ierarchical %us s#stems, Cross%ar switch and multiport memor#,
Multistage and com%ining network&
Module III: Processors and Memory Hierarchy
Advanced processor technolog#, Instruction'set Architectures,CISC Scalar Processors, (ISC Scalar
Processors, Superscalar Processors,)*I+ Architectures, )ector and S#m%olic processors
Memor# Technolog#: ierarchical memor# technolog#, Inclusion, Coherence and *ocalit#, Memor#
capacit# planning, )irtual Memor# Technolog#

Module IV: Backplane Bus System
,ackplane %us specification, Addressing and timing protocols, Ar%itration transaction and interrupt, Cache
addressing models, Direct mapping and associative caches&
Pipelining: *inear pipeline processor, $onlinear pipeline processor, Instruction pipeline design,
Mechanisms for instruction pipelining, D#namic instruction scheduling, ,ranch handling techni-ues,
Arithmetic Pipeline Design, Computer arithmetic principles, Static arithmetic pipeline, Multifunctional
arithmetic pipelines
Module V: Vector Processing Principles
)ector instruction t#pes, )ector'access memor# schemes&
S#nchronous Parallel Processing: SIMD Architecture and Programming Principles, SIMD Parallel
Algorithms, SIMD Computers and Performance .nhancement

Examination Scheme:
Components A C S!V!" HA EE
#eightage $%& / 01 2 3 31
CT: Class Test, A: ome Assignment, S4)45: Seminar4)iva45ui", ..: .nd Semester .6amination7 Att:
Attendance
ext ' (e)erences:
Text:
8ai wang, 9Advanced computer architecture:7 TM, ;111&
References:
<&P& a#es, 9computer Architecture and organi"ation:, M!, 0==2&
M&< >l#nn, 9Computer Architecture, Pipelined and Parallel Processor Design:, $arosa Pu%lishing,
0==2&
D&A& Patterson, <&*& enness#, 9Computer Architecture: A -uantitative approach:, Morgan 8auffmann,
;11;&
wang and ,riggs, 9Computer Architecture and Parallel Processing:7 M!, ;111&