Intel 8085 microprocessor architecture

Related links
Memory
8085 family
Program, data and stack memories occupy the same memory space. The total
All CPU architectures
addressable memory size is 64 KB.

Program memory - program can be located anywhere in memory. Jump, branch and call instructions
16-bit addresses, i.e. they can be used to jump/branch anywhere within 64 KB. All jump/branch instru
use absolute addressing.

Data memory - the processor always uses 16-bit addresses so that data can be placed anywhere.

Stack memory is limited only by the size of memory. Stack grows downward.

First 64 bytes in a zero memory page should be reserved for vectors used by RST instructions.
Interrupts

The processor has 5 interrupts. They are presented below in the order of their priority (from lowest to
highest):

INTR is maskable 8080A compatible interrupt. When the interrupt occurs the processor fetches from t
one instruction, usually one of these instructions:

• One of the 8 RST instructions (RST0 - RST7). The processor saves current program counter into
and branches to memory location N * 8 (where N is a 3-bit number from 0 to 7 supplied with th
instruction).
• CALL instruction (3 byte instruction). The processor calls the subroutine, address of which is spe
the second and third bytes of the instruction.

RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of th
register into stack and branches to 2Ch (hexadecimal) address.

RST6.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of th
register into stack and branches to 34h (hexadecimal) address.

RST7.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of th
register into stack and branches to 3Ch (hexadecimal) address.

Trap is a non-maskable interrupt. When this interrupt is received the processor saves the contents of
register into stack and branches to 24h (hexadecimal) address.
All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5 and R
interrupts can be enabled or disabled individually using SIM instruction.
I/O ports

256 Input ports

256 Output ports
Registers

Accumulator or A register is an 8-bit register used for arithmetic, logic, I/O and load/store operations

Flag is an 8-bit register containing 5 1-bit flags:

• Sign - set if the most significant bit of the result is set.

• Zero - set if the result is zero.
• Auxiliary carry - set if there was a carry out from bit 3 to bit 4 of the result.
• Parity - set if the parity (the number of set bits in the result) is even.
• Carry - set if there was a carry during addition, or borrow during subtraction/comparison.

General registers:

• 8-bit B and 8-bit C registers can be used as one 16-bit BC register pair. When used as a pair the
register contains low-order byte. Some instructions may use BC register as a data pointer.
• 8-bit D and 8-bit E registers can be used as one 16-bit DE register pair. When used as a pair the
register contains low-order byte. Some instructions may use DE register as a data pointer.
• 8-bit H and 8-bit L registers can be used as one 16-bit HL register pair. When used as a pair the
register contains low-order byte. HL register usually contains a data pointer used to reference m
addresses.

Stack pointer is a 16 bit register. This register is always incremented/decremented by 2.

Program counter is a 16-bit register.

Instruction Set

8085 instruction set consists of the following instructions:

• Data moving instructions.

• Arithmetic - add, subtract, increment and decrement.
• Logic - AND, OR, XOR and rotate.
• Control transfer - conditional, unconditional, call subroutine, return from subroutine and restarts
• Input/Output instructions.
• Other - setting/clearing flag bits, enabling/disabling interrupts, stack operations, etc.

Addressing modes
Register - references the data in a register or in a register pair.
Register indirect - instruction specifies register pair containing address, where the data is located.
Direct.
Immediate - 8 or 16-bit data.
Last modified: 2

(c) Copyright 2003 Gen

 Intel 8085 microprocessor family

Links
Intel 8085 microprocessor is the next generation of Intel 8080 CPU family. In
addition to being faster than the 8080, the 8085 had the following enhancements: History
Architecture
• Intel 8085 had single 5V power supply. Identification
• The processor integrated clock oscillator and system controller on a chip. Pinouts
• Serial I/O port. Support chips
• New instructions, most of them were undocumented. At a glan
• Full list of differences between Intel 8080 and 8085 processors. Type:
Micropro
There were multiple versions of 8085 microprocessors. The original version of the Introduction:

8085 microprocessor without suffix "A" was manufactured by Intel only, and was
Bus width:
very quickly replaced with 8085A containing bug fixes. In a few years after that,
around 1980, Intel introduced 8085AH - HMOS version of 8085A. It's not clear if Frequency:
80C85, CMOS version of 8085A, was ever manufactured by Intel, but it was produced 3-
by at least two second source manufacturers - OKI and Tundra Semiconductor,
Tundra Semiconductor also manufactured the fastest 8085 microprocessor running at
8 MHz.

Second source manufacturers: AMD, Mitsubishi, NEC, OKI, Siemens, Toshiba. Soviet
Union also manufactured clones of Intel 8085 CPU.

Computers: Radio Shack TRS-80 Models 100 and 200, CompuPro 8/16.
Die pictures: NEC 8085A
Manufacturers

AMD

AMD AM8085A-2DC / C8085A-2

5 MHz
40-pin ceramic DIP
Purple ceramic/gold top/gold pins

Intel
Intel C8085
3 MHz
40-pin ceramic DIP
Purple ceramic/black top/tin pins

NEC

NEC D8085A
3 MHz
40-pin ceramic DIP
White ceramic/silver top/gold pins

Mitsubishi

Mitsubishi M5L8085AP
3 MHz
40-pin plastic DIP

OKI
OKI M80C85AH
3 MHz
40-pin plastic DIP

Siemens

Siemens SAB8085A-C
3 MHz
40-pin ceramic DIP
Purple ceramic/silver top/tin pins

Toshiba

Toshiba TMP8085AP
3 MHz
40-pin plastic DIP

USSR
USSR IM1821VM85A
3.6 MHz
40-pin ceramic DIP
White ceramic/silver top/tin pins

Soviet clone of Intel 80c85 processor

Military version
 Differences between Intel 8080 and 8085 processors
8080 8085
Features
Processor speed (MHz) 2 - 3.1 3-6
Power supply +5V, -5V and +12V +5V
Clock oscillator (similar to 8224)
On-chip peripherals system controller (similar to 8228)
Serial I/O lines
Address/Data bus Separate address and data busses Multiplexed address and data
Reset Out pin
RD bus signal
Pins/signals WR bus signal
IO/M bus signal
ALE pin provides encoded bus status inform
Interrupts Three maskable interrupts and one non-mask
RIM - read interrupt mask
Instruction set
SIM - Set interrupt mask
8085 microprocessor questions

1. What are the various registers in 8085? - Accumulator register, Temporary

register, Instruction register, Stack Pointer, Program Counter are the various
registers in 8085 .
2. In 8085 name the 16 bit registers? - Stack pointer and Program counter all have
16 bits.
3. What are the various flags used in 8085? - Sign flag, Zero flag, Auxillary flag,
Parity flag, Carry flag.
4. What is Stack Pointer? - Stack pointer is a special purpose 16-bit register in the
Microprocessor, which holds the address of the top of the stack.
5. What is Program counter? - Program counter holds the address of either the
first byte of the next instruction to be fetched for execution or the address of the
next byte of a multi byte instruction, which has not been completely fetched. In
both the cases it gets incremented automatically one by one as the instruction
bytes get fetched. Also Program register keeps the address of the next instruction.
6. Which Stack is used in 8085? - LIFO (Last In First Out) stack is used in 8085.In
this type of Stack the last stored information can be retrieved first.
7. What happens when HLT instruction is executed in processor? - The Micro
Processor enters into Halt-State and the buses are tri-stated.
8. What is meant by a bus? - A bus is a group of conducting lines that carriers data,
address, & control signals.
9. What is Tri-state logic? - Three Logic Levels are used and they are High, Low,
High impedance state. The high and low are normal logic levels & high
impedance state is electrical open circuit conditions. Tri-state logic has a third line
called enable line.
10. Give an example of one address microprocessor? - 8085 is a one address
microprocessor.
11. In what way interrupts are classified in 8085? - In 8085 the interrupts are
classified as Hardware and Software interrupts.
12. What are Hardware interrupts? - TRAP, RST7.5, RST6.5, RST5.5, INTR.
13. What are Software interrupts? - RST0, RST1, RST2, RST3, RST4, RST5,
RST6, RST7.
14. Which interrupt has the highest priority? - TRAP has the highest priority.
15. Name 5 different addressing modes? - Immediate, Direct, Register, Register
indirect, Implied addressing modes.
16. How many interrupts are there in 8085? - There are 12 interrupts in 8085.
17. What is clock frequency for 8085? - 3 MHz is the maximum clock frequency for
8085.
18. What is the RST for the TRAP? - RST 4.5 is called as TRAP.
19. In 8085 which is called as High order / Low order Register? - Flag is called as
Low order register & Accumulator is called as High order Register.
20. What are input & output devices? - Keyboards, Floppy disk are the examples of
input devices. Printer, LED / LCD display, CRT Monitor are the examples of
output devices.
 21. Can an RC circuit be used as clock source for 8085? - Yes, it can be used, if an
accurate clock frequency is not required. Also, the component cost is low
compared to LC or Crystal.
22. Why crystal is a preferred clock source? - Because of high stability, large Q
(Quality Factor) & the frequency that doesn’t drift with aging. Crystal is used as a
clock source most of the times.
23. Which interrupt is not level-sensitive in 8085? - RST 7.5 is a raising edge-
triggering interrupt.
24. What does Quality factor mean? - The Quality factor is also defined, as Q. So it
is a number, which reflects the lossness of a circuit. Higher the Q, the lower are
the losses.
25. What are level-triggering interrupt? - RST 6.5 & RST 5.5 are level-triggering
interrupts.

R. S. Gaonkar-- "Microprocessor Architecture, Programming & Applications";